arch/tile/include/asm/pci.h

   1 /*
   2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful, but
   9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11  *   NON INFRINGEMENT.  See the GNU General Public License for
  12  *   more details.
  13  */
  14
  15 #ifndef _ASM_TILE_PCI_H
  16 #define _ASM_TILE_PCI_H
  17
  18 #include <linux/pci.h>
  19
  20 /*
  21  * Structure of a PCI controller (host bridge)
  22  */
  23 struct pci_controller {
  24         int index;              /* PCI domain number */
  25         struct pci_bus *root_bus;
  26
  27         int first_busno;
  28         int last_busno;
  29
  30         int hv_cfg_fd[2];       /* config{0,1} fds for this PCIe controller */
  31         int hv_mem_fd;          /* fd to Hypervisor for MMIO operations */
  32
  33         struct pci_ops *ops;
  34
  35         int irq_base;           /* Base IRQ from the Hypervisor */
  36         int plx_gen1;           /* flag for PLX Gen 1 configuration */
  37
  38         /* Address ranges that are routed to this controller/bridge. */
  39         struct resource mem_resources[3];
  40 };
  41
  42 /*
  43  * The hypervisor maps the entirety of CPA-space as bus addresses, so
  44  * bus addresses are physical addresses.  The networking and block
  45  * device layers use this boolean for bounce buffer decisions.
  46  */
  47 #define PCI_DMA_BUS_IS_PHYS     1
  48
  49 int __devinit tile_pci_init(void);
  50 int __devinit pcibios_init(void);
  51
  52 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
  53 static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {}
  54
  55 void __devinit pcibios_fixup_bus(struct pci_bus *bus);
  56
  57 #define TILE_NUM_PCIE   2
  58
  59 #define pci_domain_nr(bus) (((struct pci_controller *)(bus)->sysdata)->index)
  60
  61 /*
  62  * This decides whether to display the domain number in /proc.
  63  */
  64 static inline int pci_proc_domain(struct pci_bus *bus)
  65 {
  66         return 1;
  67 }
  68
  69 /*
  70  * pcibios_assign_all_busses() tells whether or not the bus numbers
  71  * should be reassigned, in case the BIOS didn't do it correctly, or
  72  * in case we don't have a BIOS and we want to let Linux do it.
  73  */
  74 static inline int pcibios_assign_all_busses(void)
  75 {
  76         return 1;
  77 }
  78
  79 /*
  80  * No special bus mastering setup handling.
  81  */
  82 static inline void pcibios_set_master(struct pci_dev *dev)
  83 {
  84 }
  85
  86 #define PCIBIOS_MIN_MEM         0
  87 #define PCIBIOS_MIN_IO          0
  88
  89 /*
  90  * This flag tells if the platform is TILEmpower that needs
  91  * special configuration for the PLX switch chip.
  92  */
  93 extern int tile_plx_gen1;
  94
  95 /* Use any cpu for PCI. */
  96 #define cpumask_of_pcibus(bus) cpu_online_mask
  97
  98 /* implement the pci_ DMA API in terms of the generic device dma_ one */
  99 #include <asm-generic/pci-dma-compat.h>
 100
 101 /* generic pci stuff */
 102 #include <asm-generic/pci.h>
 103
 104 #endif /* _ASM_TILE_PCI_H */