2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/module.h>
16 #include <linux/ssb/ssb.h>
17 #include <linux/ssb/ssb_regs.h>
18 #include <linux/ssb/ssb_driver_gige.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/mmc/sdio_func.h>
22 #include <linux/slab.h>
24 #include <pcmcia/cistpl.h>
25 #include <pcmcia/ds.h>
28 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
29 MODULE_LICENSE("GPL");
32 /* Temporary list of yet-to-be-attached buses */
33 static LIST_HEAD(attach_queue
);
34 /* List if running buses */
35 static LIST_HEAD(buses
);
36 /* Software ID counter */
37 static unsigned int next_busnumber
;
38 /* buses_mutes locks the two buslists and the next_busnumber.
39 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
40 static DEFINE_MUTEX(buses_mutex
);
42 /* There are differences in the codeflow, if the bus is
43 * initialized from early boot, as various needed services
44 * are not available early. This is a mechanism to delay
45 * these initializations to after early boot has finished.
46 * It's also used to avoid mutex locking, as that's not
47 * available and needed early. */
48 static bool ssb_is_early_boot
= 1;
50 static void ssb_buses_lock(void);
51 static void ssb_buses_unlock(void);
54 #ifdef CONFIG_SSB_PCIHOST
55 struct ssb_bus
*ssb_pci_dev_to_bus(struct pci_dev
*pdev
)
60 list_for_each_entry(bus
, &buses
, list
) {
61 if (bus
->bustype
== SSB_BUSTYPE_PCI
&&
62 bus
->host_pci
== pdev
)
71 #endif /* CONFIG_SSB_PCIHOST */
73 #ifdef CONFIG_SSB_PCMCIAHOST
74 struct ssb_bus
*ssb_pcmcia_dev_to_bus(struct pcmcia_device
*pdev
)
79 list_for_each_entry(bus
, &buses
, list
) {
80 if (bus
->bustype
== SSB_BUSTYPE_PCMCIA
&&
81 bus
->host_pcmcia
== pdev
)
90 #endif /* CONFIG_SSB_PCMCIAHOST */
92 #ifdef CONFIG_SSB_SDIOHOST
93 struct ssb_bus
*ssb_sdio_func_to_bus(struct sdio_func
*func
)
98 list_for_each_entry(bus
, &buses
, list
) {
99 if (bus
->bustype
== SSB_BUSTYPE_SDIO
&&
100 bus
->host_sdio
== func
)
109 #endif /* CONFIG_SSB_SDIOHOST */
111 int ssb_for_each_bus_call(unsigned long data
,
112 int (*func
)(struct ssb_bus
*bus
, unsigned long data
))
118 list_for_each_entry(bus
, &buses
, list
) {
119 res
= func(bus
, data
);
130 static struct ssb_device
*ssb_device_get(struct ssb_device
*dev
)
133 get_device(dev
->dev
);
137 static void ssb_device_put(struct ssb_device
*dev
)
140 put_device(dev
->dev
);
143 static int ssb_device_resume(struct device
*dev
)
145 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
146 struct ssb_driver
*ssb_drv
;
150 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
151 if (ssb_drv
&& ssb_drv
->resume
)
152 err
= ssb_drv
->resume(ssb_dev
);
160 static int ssb_device_suspend(struct device
*dev
, pm_message_t state
)
162 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
163 struct ssb_driver
*ssb_drv
;
167 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
168 if (ssb_drv
&& ssb_drv
->suspend
)
169 err
= ssb_drv
->suspend(ssb_dev
, state
);
177 int ssb_bus_resume(struct ssb_bus
*bus
)
181 /* Reset HW state information in memory, so that HW is
182 * completely reinitialized. */
183 bus
->mapped_device
= NULL
;
184 #ifdef CONFIG_SSB_DRIVER_PCICORE
185 bus
->pcicore
.setup_done
= 0;
188 err
= ssb_bus_powerup(bus
, 0);
191 err
= ssb_pcmcia_hardware_setup(bus
);
193 ssb_bus_may_powerdown(bus
);
196 ssb_chipco_resume(&bus
->chipco
);
197 ssb_bus_may_powerdown(bus
);
201 EXPORT_SYMBOL(ssb_bus_resume
);
203 int ssb_bus_suspend(struct ssb_bus
*bus
)
205 ssb_chipco_suspend(&bus
->chipco
);
206 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
210 EXPORT_SYMBOL(ssb_bus_suspend
);
212 #ifdef CONFIG_SSB_SPROM
213 /** ssb_devices_freeze - Freeze all devices on the bus.
215 * After freezing no device driver will be handling a device
216 * on this bus anymore. ssb_devices_thaw() must be called after
217 * a successful freeze to reactivate the devices.
220 * @ctx: Context structure. Pass this to ssb_devices_thaw().
222 int ssb_devices_freeze(struct ssb_bus
*bus
, struct ssb_freeze_context
*ctx
)
224 struct ssb_device
*sdev
;
225 struct ssb_driver
*sdrv
;
228 memset(ctx
, 0, sizeof(*ctx
));
230 SSB_WARN_ON(bus
->nr_devices
> ARRAY_SIZE(ctx
->device_frozen
));
232 for (i
= 0; i
< bus
->nr_devices
; i
++) {
233 sdev
= ssb_device_get(&bus
->devices
[i
]);
235 if (!sdev
->dev
|| !sdev
->dev
->driver
||
236 !device_is_registered(sdev
->dev
)) {
237 ssb_device_put(sdev
);
240 sdrv
= drv_to_ssb_drv(sdev
->dev
->driver
);
241 if (SSB_WARN_ON(!sdrv
->remove
))
244 ctx
->device_frozen
[i
] = 1;
250 /** ssb_devices_thaw - Unfreeze all devices on the bus.
252 * This will re-attach the device drivers and re-init the devices.
254 * @ctx: The context structure from ssb_devices_freeze()
256 int ssb_devices_thaw(struct ssb_freeze_context
*ctx
)
258 struct ssb_bus
*bus
= ctx
->bus
;
259 struct ssb_device
*sdev
;
260 struct ssb_driver
*sdrv
;
264 for (i
= 0; i
< bus
->nr_devices
; i
++) {
265 if (!ctx
->device_frozen
[i
])
267 sdev
= &bus
->devices
[i
];
269 if (SSB_WARN_ON(!sdev
->dev
|| !sdev
->dev
->driver
))
271 sdrv
= drv_to_ssb_drv(sdev
->dev
->driver
);
272 if (SSB_WARN_ON(!sdrv
|| !sdrv
->probe
))
275 err
= sdrv
->probe(sdev
, &sdev
->id
);
277 ssb_printk(KERN_ERR PFX
"Failed to thaw device %s\n",
278 dev_name(sdev
->dev
));
281 ssb_device_put(sdev
);
286 #endif /* CONFIG_SSB_SPROM */
288 static void ssb_device_shutdown(struct device
*dev
)
290 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
291 struct ssb_driver
*ssb_drv
;
295 ssb_drv
= drv_to_ssb_drv(dev
->driver
);
296 if (ssb_drv
&& ssb_drv
->shutdown
)
297 ssb_drv
->shutdown(ssb_dev
);
300 static int ssb_device_remove(struct device
*dev
)
302 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
303 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
305 if (ssb_drv
&& ssb_drv
->remove
)
306 ssb_drv
->remove(ssb_dev
);
307 ssb_device_put(ssb_dev
);
312 static int ssb_device_probe(struct device
*dev
)
314 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
315 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(dev
->driver
);
318 ssb_device_get(ssb_dev
);
319 if (ssb_drv
&& ssb_drv
->probe
)
320 err
= ssb_drv
->probe(ssb_dev
, &ssb_dev
->id
);
322 ssb_device_put(ssb_dev
);
327 static int ssb_match_devid(const struct ssb_device_id
*tabid
,
328 const struct ssb_device_id
*devid
)
330 if ((tabid
->vendor
!= devid
->vendor
) &&
331 tabid
->vendor
!= SSB_ANY_VENDOR
)
333 if ((tabid
->coreid
!= devid
->coreid
) &&
334 tabid
->coreid
!= SSB_ANY_ID
)
336 if ((tabid
->revision
!= devid
->revision
) &&
337 tabid
->revision
!= SSB_ANY_REV
)
342 static int ssb_bus_match(struct device
*dev
, struct device_driver
*drv
)
344 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
345 struct ssb_driver
*ssb_drv
= drv_to_ssb_drv(drv
);
346 const struct ssb_device_id
*id
;
348 for (id
= ssb_drv
->id_table
;
349 id
->vendor
|| id
->coreid
|| id
->revision
;
351 if (ssb_match_devid(id
, &ssb_dev
->id
))
352 return 1; /* found */
358 static int ssb_device_uevent(struct device
*dev
, struct kobj_uevent_env
*env
)
360 struct ssb_device
*ssb_dev
= dev_to_ssb_dev(dev
);
365 return add_uevent_var(env
,
366 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
367 ssb_dev
->id
.vendor
, ssb_dev
->id
.coreid
,
368 ssb_dev
->id
.revision
);
371 #define ssb_config_attr(attrib, field, format_string) \
373 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
375 return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
378 ssb_config_attr(core_num
, core_index
, "%u\n")
379 ssb_config_attr(coreid
, id
.coreid
, "0x%04x\n")
380 ssb_config_attr(vendor
, id
.vendor
, "0x%04x\n")
381 ssb_config_attr(revision
, id
.revision
, "%u\n")
382 ssb_config_attr(irq
, irq
, "%u\n")
384 name_show(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
386 return sprintf(buf
, "%s\n",
387 ssb_core_name(dev_to_ssb_dev(dev
)->id
.coreid
));
390 static struct device_attribute ssb_device_attrs
[] = {
400 static struct bus_type ssb_bustype
= {
402 .match
= ssb_bus_match
,
403 .probe
= ssb_device_probe
,
404 .remove
= ssb_device_remove
,
405 .shutdown
= ssb_device_shutdown
,
406 .suspend
= ssb_device_suspend
,
407 .resume
= ssb_device_resume
,
408 .uevent
= ssb_device_uevent
,
409 .dev_attrs
= ssb_device_attrs
,
412 static void ssb_buses_lock(void)
414 /* See the comment at the ssb_is_early_boot definition */
415 if (!ssb_is_early_boot
)
416 mutex_lock(&buses_mutex
);
419 static void ssb_buses_unlock(void)
421 /* See the comment at the ssb_is_early_boot definition */
422 if (!ssb_is_early_boot
)
423 mutex_unlock(&buses_mutex
);
426 static void ssb_devices_unregister(struct ssb_bus
*bus
)
428 struct ssb_device
*sdev
;
431 for (i
= bus
->nr_devices
- 1; i
>= 0; i
--) {
432 sdev
= &(bus
->devices
[i
]);
434 device_unregister(sdev
->dev
);
438 void ssb_bus_unregister(struct ssb_bus
*bus
)
441 ssb_devices_unregister(bus
);
442 list_del(&bus
->list
);
445 ssb_pcmcia_exit(bus
);
449 EXPORT_SYMBOL(ssb_bus_unregister
);
451 static void ssb_release_dev(struct device
*dev
)
453 struct __ssb_dev_wrapper
*devwrap
;
455 devwrap
= container_of(dev
, struct __ssb_dev_wrapper
, dev
);
459 static int ssb_devices_register(struct ssb_bus
*bus
)
461 struct ssb_device
*sdev
;
463 struct __ssb_dev_wrapper
*devwrap
;
467 for (i
= 0; i
< bus
->nr_devices
; i
++) {
468 sdev
= &(bus
->devices
[i
]);
470 /* We don't register SSB-system devices to the kernel,
471 * as the drivers for them are built into SSB. */
472 switch (sdev
->id
.coreid
) {
473 case SSB_DEV_CHIPCOMMON
:
478 case SSB_DEV_MIPS_3302
:
483 devwrap
= kzalloc(sizeof(*devwrap
), GFP_KERNEL
);
485 ssb_printk(KERN_ERR PFX
486 "Could not allocate device\n");
491 devwrap
->sdev
= sdev
;
493 dev
->release
= ssb_release_dev
;
494 dev
->bus
= &ssb_bustype
;
495 dev_set_name(dev
, "ssb%u:%d", bus
->busnumber
, dev_idx
);
497 switch (bus
->bustype
) {
498 case SSB_BUSTYPE_PCI
:
499 #ifdef CONFIG_SSB_PCIHOST
500 sdev
->irq
= bus
->host_pci
->irq
;
501 dev
->parent
= &bus
->host_pci
->dev
;
502 sdev
->dma_dev
= dev
->parent
;
505 case SSB_BUSTYPE_PCMCIA
:
506 #ifdef CONFIG_SSB_PCMCIAHOST
507 sdev
->irq
= bus
->host_pcmcia
->irq
;
508 dev
->parent
= &bus
->host_pcmcia
->dev
;
511 case SSB_BUSTYPE_SDIO
:
512 #ifdef CONFIG_SSB_SDIOHOST
513 dev
->parent
= &bus
->host_sdio
->dev
;
516 case SSB_BUSTYPE_SSB
:
517 dev
->dma_mask
= &dev
->coherent_dma_mask
;
523 err
= device_register(dev
);
525 ssb_printk(KERN_ERR PFX
526 "Could not register %s\n",
528 /* Set dev to NULL to not unregister
529 * dev on error unwinding. */
539 /* Unwind the already registered devices. */
540 ssb_devices_unregister(bus
);
544 /* Needs ssb_buses_lock() */
545 static int __devinit
ssb_attach_queued_buses(void)
547 struct ssb_bus
*bus
, *n
;
549 int drop_them_all
= 0;
551 list_for_each_entry_safe(bus
, n
, &attach_queue
, list
) {
553 list_del(&bus
->list
);
556 /* Can't init the PCIcore in ssb_bus_register(), as that
557 * is too early in boot for embedded systems
558 * (no udelay() available). So do it here in attach stage.
560 err
= ssb_bus_powerup(bus
, 0);
563 ssb_pcicore_init(&bus
->pcicore
);
564 ssb_bus_may_powerdown(bus
);
566 err
= ssb_devices_register(bus
);
570 list_del(&bus
->list
);
573 list_move_tail(&bus
->list
, &buses
);
579 static u8
ssb_ssb_read8(struct ssb_device
*dev
, u16 offset
)
581 struct ssb_bus
*bus
= dev
->bus
;
583 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
584 return readb(bus
->mmio
+ offset
);
587 static u16
ssb_ssb_read16(struct ssb_device
*dev
, u16 offset
)
589 struct ssb_bus
*bus
= dev
->bus
;
591 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
592 return readw(bus
->mmio
+ offset
);
595 static u32
ssb_ssb_read32(struct ssb_device
*dev
, u16 offset
)
597 struct ssb_bus
*bus
= dev
->bus
;
599 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
600 return readl(bus
->mmio
+ offset
);
603 #ifdef CONFIG_SSB_BLOCKIO
604 static void ssb_ssb_block_read(struct ssb_device
*dev
, void *buffer
,
605 size_t count
, u16 offset
, u8 reg_width
)
607 struct ssb_bus
*bus
= dev
->bus
;
610 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
611 addr
= bus
->mmio
+ offset
;
618 *buf
= __raw_readb(addr
);
625 __le16
*buf
= buffer
;
627 SSB_WARN_ON(count
& 1);
629 *buf
= (__force __le16
)__raw_readw(addr
);
636 __le32
*buf
= buffer
;
638 SSB_WARN_ON(count
& 3);
640 *buf
= (__force __le32
)__raw_readl(addr
);
650 #endif /* CONFIG_SSB_BLOCKIO */
652 static void ssb_ssb_write8(struct ssb_device
*dev
, u16 offset
, u8 value
)
654 struct ssb_bus
*bus
= dev
->bus
;
656 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
657 writeb(value
, bus
->mmio
+ offset
);
660 static void ssb_ssb_write16(struct ssb_device
*dev
, u16 offset
, u16 value
)
662 struct ssb_bus
*bus
= dev
->bus
;
664 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
665 writew(value
, bus
->mmio
+ offset
);
668 static void ssb_ssb_write32(struct ssb_device
*dev
, u16 offset
, u32 value
)
670 struct ssb_bus
*bus
= dev
->bus
;
672 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
673 writel(value
, bus
->mmio
+ offset
);
676 #ifdef CONFIG_SSB_BLOCKIO
677 static void ssb_ssb_block_write(struct ssb_device
*dev
, const void *buffer
,
678 size_t count
, u16 offset
, u8 reg_width
)
680 struct ssb_bus
*bus
= dev
->bus
;
683 offset
+= dev
->core_index
* SSB_CORE_SIZE
;
684 addr
= bus
->mmio
+ offset
;
688 const u8
*buf
= buffer
;
691 __raw_writeb(*buf
, addr
);
698 const __le16
*buf
= buffer
;
700 SSB_WARN_ON(count
& 1);
702 __raw_writew((__force u16
)(*buf
), addr
);
709 const __le32
*buf
= buffer
;
711 SSB_WARN_ON(count
& 3);
713 __raw_writel((__force u32
)(*buf
), addr
);
723 #endif /* CONFIG_SSB_BLOCKIO */
725 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
726 static const struct ssb_bus_ops ssb_ssb_ops
= {
727 .read8
= ssb_ssb_read8
,
728 .read16
= ssb_ssb_read16
,
729 .read32
= ssb_ssb_read32
,
730 .write8
= ssb_ssb_write8
,
731 .write16
= ssb_ssb_write16
,
732 .write32
= ssb_ssb_write32
,
733 #ifdef CONFIG_SSB_BLOCKIO
734 .block_read
= ssb_ssb_block_read
,
735 .block_write
= ssb_ssb_block_write
,
739 static int ssb_fetch_invariants(struct ssb_bus
*bus
,
740 ssb_invariants_func_t get_invariants
)
742 struct ssb_init_invariants iv
;
745 memset(&iv
, 0, sizeof(iv
));
746 err
= get_invariants(bus
, &iv
);
749 memcpy(&bus
->boardinfo
, &iv
.boardinfo
, sizeof(iv
.boardinfo
));
750 memcpy(&bus
->sprom
, &iv
.sprom
, sizeof(iv
.sprom
));
751 bus
->has_cardbus_slot
= iv
.has_cardbus_slot
;
756 static int __devinit
ssb_bus_register(struct ssb_bus
*bus
,
757 ssb_invariants_func_t get_invariants
,
758 unsigned long baseaddr
)
762 spin_lock_init(&bus
->bar_lock
);
763 INIT_LIST_HEAD(&bus
->list
);
764 #ifdef CONFIG_SSB_EMBEDDED
765 spin_lock_init(&bus
->gpio_lock
);
768 /* Powerup the bus */
769 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
773 /* Init SDIO-host device (if any), before the scan */
774 err
= ssb_sdio_init(bus
);
776 goto err_disable_xtal
;
779 bus
->busnumber
= next_busnumber
;
780 /* Scan for devices (cores) */
781 err
= ssb_bus_scan(bus
, baseaddr
);
785 /* Init PCI-host device (if any) */
786 err
= ssb_pci_init(bus
);
789 /* Init PCMCIA-host device (if any) */
790 err
= ssb_pcmcia_init(bus
);
794 /* Initialize basic system devices (if available) */
795 err
= ssb_bus_powerup(bus
, 0);
797 goto err_pcmcia_exit
;
798 ssb_chipcommon_init(&bus
->chipco
);
799 ssb_extif_init(&bus
->extif
);
800 ssb_mipscore_init(&bus
->mipscore
);
801 err
= ssb_fetch_invariants(bus
, get_invariants
);
803 ssb_bus_may_powerdown(bus
);
804 goto err_pcmcia_exit
;
806 ssb_bus_may_powerdown(bus
);
808 /* Queue it for attach.
809 * See the comment at the ssb_is_early_boot definition. */
810 list_add_tail(&bus
->list
, &attach_queue
);
811 if (!ssb_is_early_boot
) {
812 /* This is not early boot, so we must attach the bus now */
813 err
= ssb_attach_queued_buses();
824 list_del(&bus
->list
);
826 ssb_pcmcia_exit(bus
);
835 ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
839 #ifdef CONFIG_SSB_PCIHOST
840 int __devinit
ssb_bus_pcibus_register(struct ssb_bus
*bus
,
841 struct pci_dev
*host_pci
)
845 bus
->bustype
= SSB_BUSTYPE_PCI
;
846 bus
->host_pci
= host_pci
;
847 bus
->ops
= &ssb_pci_ops
;
849 err
= ssb_bus_register(bus
, ssb_pci_get_invariants
, 0);
851 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
852 "PCI device %s\n", dev_name(&host_pci
->dev
));
854 ssb_printk(KERN_ERR PFX
"Failed to register PCI version"
855 " of SSB with error %d\n", err
);
860 EXPORT_SYMBOL(ssb_bus_pcibus_register
);
861 #endif /* CONFIG_SSB_PCIHOST */
863 #ifdef CONFIG_SSB_PCMCIAHOST
864 int __devinit
ssb_bus_pcmciabus_register(struct ssb_bus
*bus
,
865 struct pcmcia_device
*pcmcia_dev
,
866 unsigned long baseaddr
)
870 bus
->bustype
= SSB_BUSTYPE_PCMCIA
;
871 bus
->host_pcmcia
= pcmcia_dev
;
872 bus
->ops
= &ssb_pcmcia_ops
;
874 err
= ssb_bus_register(bus
, ssb_pcmcia_get_invariants
, baseaddr
);
876 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
877 "PCMCIA device %s\n", pcmcia_dev
->devname
);
882 EXPORT_SYMBOL(ssb_bus_pcmciabus_register
);
883 #endif /* CONFIG_SSB_PCMCIAHOST */
885 #ifdef CONFIG_SSB_SDIOHOST
886 int __devinit
ssb_bus_sdiobus_register(struct ssb_bus
*bus
,
887 struct sdio_func
*func
,
892 bus
->bustype
= SSB_BUSTYPE_SDIO
;
893 bus
->host_sdio
= func
;
894 bus
->ops
= &ssb_sdio_ops
;
895 bus
->quirks
= quirks
;
897 err
= ssb_bus_register(bus
, ssb_sdio_get_invariants
, ~0);
899 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found on "
900 "SDIO device %s\n", sdio_func_id(func
));
905 EXPORT_SYMBOL(ssb_bus_sdiobus_register
);
906 #endif /* CONFIG_SSB_PCMCIAHOST */
908 int __devinit
ssb_bus_ssbbus_register(struct ssb_bus
*bus
,
909 unsigned long baseaddr
,
910 ssb_invariants_func_t get_invariants
)
914 bus
->bustype
= SSB_BUSTYPE_SSB
;
915 bus
->ops
= &ssb_ssb_ops
;
917 err
= ssb_bus_register(bus
, get_invariants
, baseaddr
);
919 ssb_printk(KERN_INFO PFX
"Sonics Silicon Backplane found at "
920 "address 0x%08lX\n", baseaddr
);
926 int __ssb_driver_register(struct ssb_driver
*drv
, struct module
*owner
)
928 drv
->drv
.name
= drv
->name
;
929 drv
->drv
.bus
= &ssb_bustype
;
930 drv
->drv
.owner
= owner
;
932 return driver_register(&drv
->drv
);
934 EXPORT_SYMBOL(__ssb_driver_register
);
936 void ssb_driver_unregister(struct ssb_driver
*drv
)
938 driver_unregister(&drv
->drv
);
940 EXPORT_SYMBOL(ssb_driver_unregister
);
942 void ssb_set_devtypedata(struct ssb_device
*dev
, void *data
)
944 struct ssb_bus
*bus
= dev
->bus
;
945 struct ssb_device
*ent
;
948 for (i
= 0; i
< bus
->nr_devices
; i
++) {
949 ent
= &(bus
->devices
[i
]);
950 if (ent
->id
.vendor
!= dev
->id
.vendor
)
952 if (ent
->id
.coreid
!= dev
->id
.coreid
)
955 ent
->devtypedata
= data
;
958 EXPORT_SYMBOL(ssb_set_devtypedata
);
960 static u32
clkfactor_f6_resolve(u32 v
)
962 /* map the magic values */
964 case SSB_CHIPCO_CLK_F6_2
:
966 case SSB_CHIPCO_CLK_F6_3
:
968 case SSB_CHIPCO_CLK_F6_4
:
970 case SSB_CHIPCO_CLK_F6_5
:
972 case SSB_CHIPCO_CLK_F6_6
:
974 case SSB_CHIPCO_CLK_F6_7
:
980 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
981 u32
ssb_calc_clock_rate(u32 plltype
, u32 n
, u32 m
)
983 u32 n1
, n2
, clock
, m1
, m2
, m3
, mc
;
985 n1
= (n
& SSB_CHIPCO_CLK_N1
);
986 n2
= ((n
& SSB_CHIPCO_CLK_N2
) >> SSB_CHIPCO_CLK_N2_SHIFT
);
989 case SSB_PLLTYPE_6
: /* 100/200 or 120/240 only */
990 if (m
& SSB_CHIPCO_CLK_T6_MMASK
)
991 return SSB_CHIPCO_CLK_T6_M1
;
992 return SSB_CHIPCO_CLK_T6_M0
;
993 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
994 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
995 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
996 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
997 n1
= clkfactor_f6_resolve(n1
);
998 n2
+= SSB_CHIPCO_CLK_F5_BIAS
;
1000 case SSB_PLLTYPE_2
: /* 48Mhz, 4 dividers */
1001 n1
+= SSB_CHIPCO_CLK_T2_BIAS
;
1002 n2
+= SSB_CHIPCO_CLK_T2_BIAS
;
1003 SSB_WARN_ON(!((n1
>= 2) && (n1
<= 7)));
1004 SSB_WARN_ON(!((n2
>= 5) && (n2
<= 23)));
1006 case SSB_PLLTYPE_5
: /* 25Mhz, 4 dividers */
1013 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
1014 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
1015 clock
= SSB_CHIPCO_CLK_BASE2
* n1
* n2
;
1018 clock
= SSB_CHIPCO_CLK_BASE1
* n1
* n2
;
1023 m1
= (m
& SSB_CHIPCO_CLK_M1
);
1024 m2
= ((m
& SSB_CHIPCO_CLK_M2
) >> SSB_CHIPCO_CLK_M2_SHIFT
);
1025 m3
= ((m
& SSB_CHIPCO_CLK_M3
) >> SSB_CHIPCO_CLK_M3_SHIFT
);
1026 mc
= ((m
& SSB_CHIPCO_CLK_MC
) >> SSB_CHIPCO_CLK_MC_SHIFT
);
1029 case SSB_PLLTYPE_1
: /* 48Mhz base, 3 dividers */
1030 case SSB_PLLTYPE_3
: /* 25Mhz, 2 dividers */
1031 case SSB_PLLTYPE_4
: /* 48Mhz, 4 dividers */
1032 case SSB_PLLTYPE_7
: /* 25Mhz, 4 dividers */
1033 m1
= clkfactor_f6_resolve(m1
);
1034 if ((plltype
== SSB_PLLTYPE_1
) ||
1035 (plltype
== SSB_PLLTYPE_3
))
1036 m2
+= SSB_CHIPCO_CLK_F5_BIAS
;
1038 m2
= clkfactor_f6_resolve(m2
);
1039 m3
= clkfactor_f6_resolve(m3
);
1042 case SSB_CHIPCO_CLK_MC_BYPASS
:
1044 case SSB_CHIPCO_CLK_MC_M1
:
1045 return (clock
/ m1
);
1046 case SSB_CHIPCO_CLK_MC_M1M2
:
1047 return (clock
/ (m1
* m2
));
1048 case SSB_CHIPCO_CLK_MC_M1M2M3
:
1049 return (clock
/ (m1
* m2
* m3
));
1050 case SSB_CHIPCO_CLK_MC_M1M3
:
1051 return (clock
/ (m1
* m3
));
1055 m1
+= SSB_CHIPCO_CLK_T2_BIAS
;
1056 m2
+= SSB_CHIPCO_CLK_T2M2_BIAS
;
1057 m3
+= SSB_CHIPCO_CLK_T2_BIAS
;
1058 SSB_WARN_ON(!((m1
>= 2) && (m1
<= 7)));
1059 SSB_WARN_ON(!((m2
>= 3) && (m2
<= 10)));
1060 SSB_WARN_ON(!((m3
>= 2) && (m3
<= 7)));
1062 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M1BYP
))
1064 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M2BYP
))
1066 if (!(mc
& SSB_CHIPCO_CLK_T2MC_M3BYP
))
1075 /* Get the current speed the backplane is running at */
1076 u32
ssb_clockspeed(struct ssb_bus
*bus
)
1080 u32 clkctl_n
, clkctl_m
;
1082 if (bus
->chipco
.capabilities
& SSB_CHIPCO_CAP_PMU
)
1083 return ssb_pmu_get_controlclock(&bus
->chipco
);
1085 if (ssb_extif_available(&bus
->extif
))
1086 ssb_extif_get_clockcontrol(&bus
->extif
, &plltype
,
1087 &clkctl_n
, &clkctl_m
);
1088 else if (bus
->chipco
.dev
)
1089 ssb_chipco_get_clockcontrol(&bus
->chipco
, &plltype
,
1090 &clkctl_n
, &clkctl_m
);
1094 if (bus
->chip_id
== 0x5365) {
1097 rate
= ssb_calc_clock_rate(plltype
, clkctl_n
, clkctl_m
);
1098 if (plltype
== SSB_PLLTYPE_3
) /* 25Mhz, 2 dividers */
1104 EXPORT_SYMBOL(ssb_clockspeed
);
1106 static u32
ssb_tmslow_reject_bitmask(struct ssb_device
*dev
)
1108 u32 rev
= ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_SSBREV
;
1110 /* The REJECT bit seems to be different for Backplane rev 2.3 */
1112 case SSB_IDLOW_SSBREV_22
:
1113 case SSB_IDLOW_SSBREV_24
:
1114 case SSB_IDLOW_SSBREV_26
:
1115 return SSB_TMSLOW_REJECT
;
1116 case SSB_IDLOW_SSBREV_23
:
1117 return SSB_TMSLOW_REJECT_23
;
1118 case SSB_IDLOW_SSBREV_25
: /* TODO - find the proper REJECT bit */
1119 case SSB_IDLOW_SSBREV_27
: /* same here */
1120 return SSB_TMSLOW_REJECT
; /* this is a guess */
1122 printk(KERN_INFO
"ssb: Backplane Revision 0x%.8X\n", rev
);
1125 return (SSB_TMSLOW_REJECT
| SSB_TMSLOW_REJECT_23
);
1128 int ssb_device_is_enabled(struct ssb_device
*dev
)
1133 reject
= ssb_tmslow_reject_bitmask(dev
);
1134 val
= ssb_read32(dev
, SSB_TMSLOW
);
1135 val
&= SSB_TMSLOW_CLOCK
| SSB_TMSLOW_RESET
| reject
;
1137 return (val
== SSB_TMSLOW_CLOCK
);
1139 EXPORT_SYMBOL(ssb_device_is_enabled
);
1141 static void ssb_flush_tmslow(struct ssb_device
*dev
)
1143 /* Make _really_ sure the device has finished the TMSLOW
1144 * register write transaction, as we risk running into
1145 * a machine check exception otherwise.
1146 * Do this by reading the register back to commit the
1147 * PCI write and delay an additional usec for the device
1148 * to react to the change. */
1149 ssb_read32(dev
, SSB_TMSLOW
);
1153 void ssb_device_enable(struct ssb_device
*dev
, u32 core_specific_flags
)
1157 ssb_device_disable(dev
, core_specific_flags
);
1158 ssb_write32(dev
, SSB_TMSLOW
,
1159 SSB_TMSLOW_RESET
| SSB_TMSLOW_CLOCK
|
1160 SSB_TMSLOW_FGC
| core_specific_flags
);
1161 ssb_flush_tmslow(dev
);
1163 /* Clear SERR if set. This is a hw bug workaround. */
1164 if (ssb_read32(dev
, SSB_TMSHIGH
) & SSB_TMSHIGH_SERR
)
1165 ssb_write32(dev
, SSB_TMSHIGH
, 0);
1167 val
= ssb_read32(dev
, SSB_IMSTATE
);
1168 if (val
& (SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
)) {
1169 val
&= ~(SSB_IMSTATE_IBE
| SSB_IMSTATE_TO
);
1170 ssb_write32(dev
, SSB_IMSTATE
, val
);
1173 ssb_write32(dev
, SSB_TMSLOW
,
1174 SSB_TMSLOW_CLOCK
| SSB_TMSLOW_FGC
|
1175 core_specific_flags
);
1176 ssb_flush_tmslow(dev
);
1178 ssb_write32(dev
, SSB_TMSLOW
, SSB_TMSLOW_CLOCK
|
1179 core_specific_flags
);
1180 ssb_flush_tmslow(dev
);
1182 EXPORT_SYMBOL(ssb_device_enable
);
1184 /* Wait for bitmask in a register to get set or cleared.
1185 * timeout is in units of ten-microseconds */
1186 static int ssb_wait_bits(struct ssb_device
*dev
, u16 reg
, u32 bitmask
,
1187 int timeout
, int set
)
1192 for (i
= 0; i
< timeout
; i
++) {
1193 val
= ssb_read32(dev
, reg
);
1195 if ((val
& bitmask
) == bitmask
)
1198 if (!(val
& bitmask
))
1203 printk(KERN_ERR PFX
"Timeout waiting for bitmask %08X on "
1204 "register %04X to %s.\n",
1205 bitmask
, reg
, (set
? "set" : "clear"));
1210 void ssb_device_disable(struct ssb_device
*dev
, u32 core_specific_flags
)
1214 if (ssb_read32(dev
, SSB_TMSLOW
) & SSB_TMSLOW_RESET
)
1217 reject
= ssb_tmslow_reject_bitmask(dev
);
1219 if (ssb_read32(dev
, SSB_TMSLOW
) & SSB_TMSLOW_CLOCK
) {
1220 ssb_write32(dev
, SSB_TMSLOW
, reject
| SSB_TMSLOW_CLOCK
);
1221 ssb_wait_bits(dev
, SSB_TMSLOW
, reject
, 1000, 1);
1222 ssb_wait_bits(dev
, SSB_TMSHIGH
, SSB_TMSHIGH_BUSY
, 1000, 0);
1224 if (ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_INITIATOR
) {
1225 val
= ssb_read32(dev
, SSB_IMSTATE
);
1226 val
|= SSB_IMSTATE_REJECT
;
1227 ssb_write32(dev
, SSB_IMSTATE
, val
);
1228 ssb_wait_bits(dev
, SSB_IMSTATE
, SSB_IMSTATE_BUSY
, 1000,
1232 ssb_write32(dev
, SSB_TMSLOW
,
1233 SSB_TMSLOW_FGC
| SSB_TMSLOW_CLOCK
|
1234 reject
| SSB_TMSLOW_RESET
|
1235 core_specific_flags
);
1236 ssb_flush_tmslow(dev
);
1238 if (ssb_read32(dev
, SSB_IDLOW
) & SSB_IDLOW_INITIATOR
) {
1239 val
= ssb_read32(dev
, SSB_IMSTATE
);
1240 val
&= ~SSB_IMSTATE_REJECT
;
1241 ssb_write32(dev
, SSB_IMSTATE
, val
);
1245 ssb_write32(dev
, SSB_TMSLOW
,
1246 reject
| SSB_TMSLOW_RESET
|
1247 core_specific_flags
);
1248 ssb_flush_tmslow(dev
);
1250 EXPORT_SYMBOL(ssb_device_disable
);
1252 /* Some chipsets need routing known for PCIe and 64-bit DMA */
1253 static bool ssb_dma_translation_special_bit(struct ssb_device
*dev
)
1255 u16 chip_id
= dev
->bus
->chip_id
;
1257 if (dev
->id
.coreid
== SSB_DEV_80211
) {
1258 return (chip_id
== 0x4322 || chip_id
== 43221 ||
1259 chip_id
== 43231 || chip_id
== 43222);
1265 u32
ssb_dma_translation(struct ssb_device
*dev
)
1267 switch (dev
->bus
->bustype
) {
1268 case SSB_BUSTYPE_SSB
:
1270 case SSB_BUSTYPE_PCI
:
1271 if (pci_is_pcie(dev
->bus
->host_pci
) &&
1272 ssb_read32(dev
, SSB_TMSHIGH
) & SSB_TMSHIGH_DMA64
) {
1273 return SSB_PCIE_DMA_H32
;
1275 if (ssb_dma_translation_special_bit(dev
))
1276 return SSB_PCIE_DMA_H32
;
1281 __ssb_dma_not_implemented(dev
);
1285 EXPORT_SYMBOL(ssb_dma_translation
);
1287 int ssb_bus_may_powerdown(struct ssb_bus
*bus
)
1289 struct ssb_chipcommon
*cc
;
1292 /* On buses where more than one core may be working
1293 * at a time, we must not powerdown stuff if there are
1294 * still cores that may want to run. */
1295 if (bus
->bustype
== SSB_BUSTYPE_SSB
)
1302 if (cc
->dev
->id
.revision
< 5)
1305 ssb_chipco_set_clockmode(cc
, SSB_CLKMODE_SLOW
);
1306 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 0);
1310 #ifdef CONFIG_SSB_DEBUG
1311 bus
->powered_up
= 0;
1315 ssb_printk(KERN_ERR PFX
"Bus powerdown failed\n");
1318 EXPORT_SYMBOL(ssb_bus_may_powerdown
);
1320 int ssb_bus_powerup(struct ssb_bus
*bus
, bool dynamic_pctl
)
1323 enum ssb_clkmode mode
;
1325 err
= ssb_pci_xtal(bus
, SSB_GPIO_XTAL
| SSB_GPIO_PLL
, 1);
1329 #ifdef CONFIG_SSB_DEBUG
1330 bus
->powered_up
= 1;
1333 mode
= dynamic_pctl
? SSB_CLKMODE_DYNAMIC
: SSB_CLKMODE_FAST
;
1334 ssb_chipco_set_clockmode(&bus
->chipco
, mode
);
1338 ssb_printk(KERN_ERR PFX
"Bus powerup failed\n");
1341 EXPORT_SYMBOL(ssb_bus_powerup
);
1343 static void ssb_broadcast_value(struct ssb_device
*dev
,
1344 u32 address
, u32 data
)
1346 #ifdef CONFIG_SSB_DRIVER_PCICORE
1347 /* This is used for both, PCI and ChipCommon core, so be careful. */
1348 BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR
!= SSB_CHIPCO_BCAST_ADDR
);
1349 BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA
!= SSB_CHIPCO_BCAST_DATA
);
1352 ssb_write32(dev
, SSB_CHIPCO_BCAST_ADDR
, address
);
1353 ssb_read32(dev
, SSB_CHIPCO_BCAST_ADDR
); /* flush */
1354 ssb_write32(dev
, SSB_CHIPCO_BCAST_DATA
, data
);
1355 ssb_read32(dev
, SSB_CHIPCO_BCAST_DATA
); /* flush */
1358 void ssb_commit_settings(struct ssb_bus
*bus
)
1360 struct ssb_device
*dev
;
1362 #ifdef CONFIG_SSB_DRIVER_PCICORE
1363 dev
= bus
->chipco
.dev
? bus
->chipco
.dev
: bus
->pcicore
.dev
;
1365 dev
= bus
->chipco
.dev
;
1369 /* This forces an update of the cached registers. */
1370 ssb_broadcast_value(dev
, 0xFD8, 0);
1372 EXPORT_SYMBOL(ssb_commit_settings
);
1374 u32
ssb_admatch_base(u32 adm
)
1378 switch (adm
& SSB_ADM_TYPE
) {
1380 base
= (adm
& SSB_ADM_BASE0
);
1383 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1384 base
= (adm
& SSB_ADM_BASE1
);
1387 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1388 base
= (adm
& SSB_ADM_BASE2
);
1396 EXPORT_SYMBOL(ssb_admatch_base
);
1398 u32
ssb_admatch_size(u32 adm
)
1402 switch (adm
& SSB_ADM_TYPE
) {
1404 size
= ((adm
& SSB_ADM_SZ0
) >> SSB_ADM_SZ0_SHIFT
);
1407 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1408 size
= ((adm
& SSB_ADM_SZ1
) >> SSB_ADM_SZ1_SHIFT
);
1411 SSB_WARN_ON(adm
& SSB_ADM_NEG
); /* unsupported */
1412 size
= ((adm
& SSB_ADM_SZ2
) >> SSB_ADM_SZ2_SHIFT
);
1417 size
= (1 << (size
+ 1));
1421 EXPORT_SYMBOL(ssb_admatch_size
);
1423 static int __init
ssb_modinit(void)
1427 /* See the comment at the ssb_is_early_boot definition */
1428 ssb_is_early_boot
= 0;
1429 err
= bus_register(&ssb_bustype
);
1433 /* Maybe we already registered some buses at early boot.
1434 * Check for this and attach them
1437 err
= ssb_attach_queued_buses();
1440 bus_unregister(&ssb_bustype
);
1444 err
= b43_pci_ssb_bridge_init();
1446 ssb_printk(KERN_ERR
"Broadcom 43xx PCI-SSB-bridge "
1447 "initialization failed\n");
1448 /* don't fail SSB init because of this */
1451 err
= ssb_gige_init();
1453 ssb_printk(KERN_ERR
"SSB Broadcom Gigabit Ethernet "
1454 "driver initialization failed\n");
1455 /* don't fail SSB init because of this */
1461 /* ssb must be initialized after PCI but before the ssb drivers.
1462 * That means we must use some initcall between subsys_initcall
1463 * and device_initcall. */
1464 fs_initcall(ssb_modinit
);
1466 static void __exit
ssb_modexit(void)
1469 b43_pci_ssb_bridge_exit();
1470 bus_unregister(&ssb_bustype
);
1472 module_exit(ssb_modexit
)