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atl1c: correct wrong definition of REG_DMA_CTRL
[linux-2.6/btrfs-unstable.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
blob461305e1f7632044dfbe14b0f73440b0829d77ad
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27 #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
28 #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
29 #define PCI_DEVICE_ID_ATHEROS_L2C_B 0x2060 /* AR8152 v1.1 Fast 10/100 */
30 #define PCI_DEVICE_ID_ATHEROS_L2C_B2 0x2062 /* AR8152 v2.0 Fast 10/100 */
31 #define PCI_DEVICE_ID_ATHEROS_L1D 0x1073 /* AR8151 v1.0 Gigabit 1000 */
32 #define PCI_DEVICE_ID_ATHEROS_L1D_2_0 0x1083 /* AR8151 v2.0 Gigabit 1000 */
33 #define L2CB_V10 0xc0
34 #define L2CB_V11 0xc1
35
36 /*
37 * atl1c_pci_tbl - PCI Device ID Table
38 *
39 * Wildcard entries (PCI_ANY_ID) should come last
40 * Last entry must be all 0s
41 *
42 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
43 * Class, Class Mask, private data (not used) }
44 */
45 static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
46 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
47 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
48 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
49 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
50 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
51 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
52 /* required last entry */
53 { 0 }
54 };
55 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
56
57 MODULE_AUTHOR("Jie Yang");
58 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
59 MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
60 MODULE_LICENSE("GPL");
61 MODULE_VERSION(ATL1C_DRV_VERSION);
62
63 static int atl1c_stop_mac(struct atl1c_hw *hw);
64 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
65 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
66 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
67 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
68 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
69 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
70 int *work_done, int work_to_do);
71 static int atl1c_up(struct atl1c_adapter *adapter);
72 static void atl1c_down(struct atl1c_adapter *adapter);
73
74 static const u16 atl1c_pay_load_size[] = {
75 128, 256, 512, 1024, 2048, 4096,
76 };
77
78
79 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
80 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
81 static void atl1c_pcie_patch(struct atl1c_hw *hw)
82 {
83 u32 data;
84
85 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
86 data |= PCIE_PHYMISC_FORCE_RCV_DET;
87 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
88
89 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
90 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
91
92 data &= ~(PCIE_PHYMISC2_SERDES_CDR_MASK <<
93 PCIE_PHYMISC2_SERDES_CDR_SHIFT);
94 data |= 3 << PCIE_PHYMISC2_SERDES_CDR_SHIFT;
95 data &= ~(PCIE_PHYMISC2_SERDES_TH_MASK <<
96 PCIE_PHYMISC2_SERDES_TH_SHIFT);
97 data |= 3 << PCIE_PHYMISC2_SERDES_TH_SHIFT;
98 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
99 }
100 }
101
102 /* FIXME: no need any more ? */
103 /*
104 * atl1c_init_pcie - init PCIE module
105 */
106 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
107 {
108 u32 data;
109 u32 pci_cmd;
110 struct pci_dev *pdev = hw->adapter->pdev;
111
112 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
113 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
114 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
115 PCI_COMMAND_IO);
116 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
117
118 /*
119 * Clear any PowerSaveing Settings
120 */
121 pci_enable_wake(pdev, PCI_D3hot, 0);
122 pci_enable_wake(pdev, PCI_D3cold, 0);
123
124 /*
125 * Mask some pcie error bits
126 */
127 AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
128 data &= ~PCIE_UC_SERVRITY_DLP;
129 data &= ~PCIE_UC_SERVRITY_FCP;
130 AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
131
132 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
133 data &= ~LTSSM_ID_EN_WRO;
134 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
135
136 atl1c_pcie_patch(hw);
137 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
138 atl1c_disable_l0s_l1(hw);
139 if (flag & ATL1C_PCIE_PHY_RESET)
140 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
141 else
142 AT_WRITE_REG(hw, REG_GPHY_CTRL,
143 GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
144
145 msleep(5);
146 }
147
148 /*
149 * atl1c_irq_enable - Enable default interrupt generation settings
150 * @adapter: board private structure
151 */
152 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
153 {
154 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
155 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
156 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
157 AT_WRITE_FLUSH(&adapter->hw);
158 }
159 }
160
161 /*
162 * atl1c_irq_disable - Mask off interrupt generation on the NIC
163 * @adapter: board private structure
164 */
165 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
166 {
167 atomic_inc(&adapter->irq_sem);
168 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
169 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
170 AT_WRITE_FLUSH(&adapter->hw);
171 synchronize_irq(adapter->pdev->irq);
172 }
173
174 /*
175 * atl1c_irq_reset - reset interrupt confiure on the NIC
176 * @adapter: board private structure
177 */
178 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
179 {
180 atomic_set(&adapter->irq_sem, 1);
181 atl1c_irq_enable(adapter);
182 }
183
184 /*
185 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
186 * of the idle status register until the device is actually idle
187 */
188 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
189 {
190 int timeout;
191 u32 data;
192
193 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
194 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
195 if ((data & IDLE_STATUS_MASK) == 0)
196 return 0;
197 msleep(1);
198 }
199 return data;
200 }
201
202 /*
203 * atl1c_phy_config - Timer Call-back
204 * @data: pointer to netdev cast into an unsigned long
205 */
206 static void atl1c_phy_config(unsigned long data)
207 {
208 struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
209 struct atl1c_hw *hw = &adapter->hw;
210 unsigned long flags;
211
212 spin_lock_irqsave(&adapter->mdio_lock, flags);
213 atl1c_restart_autoneg(hw);
214 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
215 }
216
217 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
218 {
219 WARN_ON(in_interrupt());
220 atl1c_down(adapter);
221 atl1c_up(adapter);
222 clear_bit(__AT_RESETTING, &adapter->flags);
223 }
224
225 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
226 {
227 struct atl1c_hw *hw = &adapter->hw;
228 struct net_device *netdev = adapter->netdev;
229 struct pci_dev *pdev = adapter->pdev;
230 int err;
231 unsigned long flags;
232 u16 speed, duplex, phy_data;
233
234 spin_lock_irqsave(&adapter->mdio_lock, flags);
235 /* MII_BMSR must read twise */
236 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
237 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
238 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
239
240 if ((phy_data & BMSR_LSTATUS) == 0) {
241 /* link down */
242 hw->hibernate = true;
243 if (atl1c_stop_mac(hw) != 0)
244 if (netif_msg_hw(adapter))
245 dev_warn(&pdev->dev, "stop mac failed\n");
246 atl1c_set_aspm(hw, false);
247 netif_carrier_off(netdev);
248 netif_stop_queue(netdev);
249 atl1c_phy_reset(hw);
250 atl1c_phy_init(&adapter->hw);
251 } else {
252 /* Link Up */
253 hw->hibernate = false;
254 spin_lock_irqsave(&adapter->mdio_lock, flags);
255 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
256 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
257 if (unlikely(err))
258 return;
259 /* link result is our setting */
260 if (adapter->link_speed != speed ||
261 adapter->link_duplex != duplex) {
262 adapter->link_speed = speed;
263 adapter->link_duplex = duplex;
264 atl1c_set_aspm(hw, true);
265 atl1c_enable_tx_ctrl(hw);
266 atl1c_enable_rx_ctrl(hw);
267 atl1c_setup_mac_ctrl(adapter);
268 if (netif_msg_link(adapter))
269 dev_info(&pdev->dev,
270 "%s: %s NIC Link is Up<%d Mbps %s>\n",
271 atl1c_driver_name, netdev->name,
272 adapter->link_speed,
273 adapter->link_duplex == FULL_DUPLEX ?
274 "Full Duplex" : "Half Duplex");
275 }
276 if (!netif_carrier_ok(netdev))
277 netif_carrier_on(netdev);
278 }
279 }
280
281 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
282 {
283 struct net_device *netdev = adapter->netdev;
284 struct pci_dev *pdev = adapter->pdev;
285 u16 phy_data;
286 u16 link_up;
287
288 spin_lock(&adapter->mdio_lock);
289 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
290 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
291 spin_unlock(&adapter->mdio_lock);
292 link_up = phy_data & BMSR_LSTATUS;
293 /* notify upper layer link down ASAP */
294 if (!link_up) {
295 if (netif_carrier_ok(netdev)) {
296 /* old link state: Up */
297 netif_carrier_off(netdev);
298 if (netif_msg_link(adapter))
299 dev_info(&pdev->dev,
300 "%s: %s NIC Link is Down\n",
301 atl1c_driver_name, netdev->name);
302 adapter->link_speed = SPEED_0;
303 }
304 }
305
306 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
307 schedule_work(&adapter->common_task);
308 }
309
310 static void atl1c_common_task(struct work_struct *work)
311 {
312 struct atl1c_adapter *adapter;
313 struct net_device *netdev;
314
315 adapter = container_of(work, struct atl1c_adapter, common_task);
316 netdev = adapter->netdev;
317
318 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
319 netif_device_detach(netdev);
320 atl1c_down(adapter);
321 atl1c_up(adapter);
322 netif_device_attach(netdev);
323 }
324
325 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
326 &adapter->work_event))
327 atl1c_check_link_status(adapter);
328 }
329
330
331 static void atl1c_del_timer(struct atl1c_adapter *adapter)
332 {
333 del_timer_sync(&adapter->phy_config_timer);
334 }
335
336
337 /*
338 * atl1c_tx_timeout - Respond to a Tx Hang
339 * @netdev: network interface device structure
340 */
341 static void atl1c_tx_timeout(struct net_device *netdev)
342 {
343 struct atl1c_adapter *adapter = netdev_priv(netdev);
344
345 /* Do the reset outside of interrupt context */
346 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
347 schedule_work(&adapter->common_task);
348 }
349
350 /*
351 * atl1c_set_multi - Multicast and Promiscuous mode set
352 * @netdev: network interface device structure
353 *
354 * The set_multi entry point is called whenever the multicast address
355 * list or the network interface flags are updated. This routine is
356 * responsible for configuring the hardware for proper multicast,
357 * promiscuous mode, and all-multi behavior.
358 */
359 static void atl1c_set_multi(struct net_device *netdev)
360 {
361 struct atl1c_adapter *adapter = netdev_priv(netdev);
362 struct atl1c_hw *hw = &adapter->hw;
363 struct netdev_hw_addr *ha;
364 u32 mac_ctrl_data;
365 u32 hash_value;
366
367 /* Check for Promiscuous and All Multicast modes */
368 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
369
370 if (netdev->flags & IFF_PROMISC) {
371 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
372 } else if (netdev->flags & IFF_ALLMULTI) {
373 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
374 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
375 } else {
376 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
377 }
378
379 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
380
381 /* clear the old settings from the multicast hash table */
382 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
383 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
384
385 /* comoute mc addresses' hash value ,and put it into hash table */
386 netdev_for_each_mc_addr(ha, netdev) {
387 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
388 atl1c_hash_set(hw, hash_value);
389 }
390 }
391
392 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
393 {
394 if (features & NETIF_F_HW_VLAN_RX) {
395 /* enable VLAN tag insert/strip */
396 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
397 } else {
398 /* disable VLAN tag insert/strip */
399 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
400 }
401 }
402
403 static void atl1c_vlan_mode(struct net_device *netdev,
404 netdev_features_t features)
405 {
406 struct atl1c_adapter *adapter = netdev_priv(netdev);
407 struct pci_dev *pdev = adapter->pdev;
408 u32 mac_ctrl_data = 0;
409
410 if (netif_msg_pktdata(adapter))
411 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
412
413 atl1c_irq_disable(adapter);
414 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
415 __atl1c_vlan_mode(features, &mac_ctrl_data);
416 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
417 atl1c_irq_enable(adapter);
418 }
419
420 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
421 {
422 struct pci_dev *pdev = adapter->pdev;
423
424 if (netif_msg_pktdata(adapter))
425 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
426 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
427 }
428
429 /*
430 * atl1c_set_mac - Change the Ethernet Address of the NIC
431 * @netdev: network interface device structure
432 * @p: pointer to an address structure
433 *
434 * Returns 0 on success, negative on failure
435 */
436 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
437 {
438 struct atl1c_adapter *adapter = netdev_priv(netdev);
439 struct sockaddr *addr = p;
440
441 if (!is_valid_ether_addr(addr->sa_data))
442 return -EADDRNOTAVAIL;
443
444 if (netif_running(netdev))
445 return -EBUSY;
446
447 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
448 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
449 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
450
451 atl1c_hw_set_mac_addr(&adapter->hw);
452
453 return 0;
454 }
455
456 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
457 struct net_device *dev)
458 {
459 int mtu = dev->mtu;
460
461 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
462 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
463 }
464
465 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
466 netdev_features_t features)
467 {
468 /*
469 * Since there is no support for separate rx/tx vlan accel
470 * enable/disable make sure tx flag is always in same state as rx.
471 */
472 if (features & NETIF_F_HW_VLAN_RX)
473 features |= NETIF_F_HW_VLAN_TX;
474 else
475 features &= ~NETIF_F_HW_VLAN_TX;
476
477 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
478 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
479
480 return features;
481 }
482
483 static int atl1c_set_features(struct net_device *netdev,
484 netdev_features_t features)
485 {
486 netdev_features_t changed = netdev->features ^ features;
487
488 if (changed & NETIF_F_HW_VLAN_RX)
489 atl1c_vlan_mode(netdev, features);
490
491 return 0;
492 }
493
494 /*
495 * atl1c_change_mtu - Change the Maximum Transfer Unit
496 * @netdev: network interface device structure
497 * @new_mtu: new value for maximum frame size
498 *
499 * Returns 0 on success, negative on failure
500 */
501 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
502 {
503 struct atl1c_adapter *adapter = netdev_priv(netdev);
504 int old_mtu = netdev->mtu;
505 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
506
507 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
508 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
509 if (netif_msg_link(adapter))
510 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
511 return -EINVAL;
512 }
513 /* set MTU */
514 if (old_mtu != new_mtu && netif_running(netdev)) {
515 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
516 msleep(1);
517 netdev->mtu = new_mtu;
518 adapter->hw.max_frame_size = new_mtu;
519 atl1c_set_rxbufsize(adapter, netdev);
520 atl1c_down(adapter);
521 netdev_update_features(netdev);
522 atl1c_up(adapter);
523 clear_bit(__AT_RESETTING, &adapter->flags);
524 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
525 u32 phy_data;
526
527 AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
528 phy_data |= 0x10000000;
529 AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
530 }
531
532 }
533 return 0;
534 }
535
536 /*
537 * caller should hold mdio_lock
538 */
539 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
540 {
541 struct atl1c_adapter *adapter = netdev_priv(netdev);
542 u16 result;
543
544 atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
545 return result;
546 }
547
548 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
549 int reg_num, int val)
550 {
551 struct atl1c_adapter *adapter = netdev_priv(netdev);
552
553 atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
554 }
555
556 /*
557 * atl1c_mii_ioctl -
558 * @netdev:
559 * @ifreq:
560 * @cmd:
561 */
562 static int atl1c_mii_ioctl(struct net_device *netdev,
563 struct ifreq *ifr, int cmd)
564 {
565 struct atl1c_adapter *adapter = netdev_priv(netdev);
566 struct pci_dev *pdev = adapter->pdev;
567 struct mii_ioctl_data *data = if_mii(ifr);
568 unsigned long flags;
569 int retval = 0;
570
571 if (!netif_running(netdev))
572 return -EINVAL;
573
574 spin_lock_irqsave(&adapter->mdio_lock, flags);
575 switch (cmd) {
576 case SIOCGMIIPHY:
577 data->phy_id = 0;
578 break;
579
580 case SIOCGMIIREG:
581 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
582 &data->val_out)) {
583 retval = -EIO;
584 goto out;
585 }
586 break;
587
588 case SIOCSMIIREG:
589 if (data->reg_num & ~(0x1F)) {
590 retval = -EFAULT;
591 goto out;
592 }
593
594 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
595 data->reg_num, data->val_in);
596 if (atl1c_write_phy_reg(&adapter->hw,
597 data->reg_num, data->val_in)) {
598 retval = -EIO;
599 goto out;
600 }
601 break;
602
603 default:
604 retval = -EOPNOTSUPP;
605 break;
606 }
607 out:
608 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
609 return retval;
610 }
611
612 /*
613 * atl1c_ioctl -
614 * @netdev:
615 * @ifreq:
616 * @cmd:
617 */
618 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
619 {
620 switch (cmd) {
621 case SIOCGMIIPHY:
622 case SIOCGMIIREG:
623 case SIOCSMIIREG:
624 return atl1c_mii_ioctl(netdev, ifr, cmd);
625 default:
626 return -EOPNOTSUPP;
627 }
628 }
629
630 /*
631 * atl1c_alloc_queues - Allocate memory for all rings
632 * @adapter: board private structure to initialize
633 *
634 */
635 static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
636 {
637 return 0;
638 }
639
640 static void atl1c_set_mac_type(struct atl1c_hw *hw)
641 {
642 switch (hw->device_id) {
643 case PCI_DEVICE_ID_ATTANSIC_L2C:
644 hw->nic_type = athr_l2c;
645 break;
646 case PCI_DEVICE_ID_ATTANSIC_L1C:
647 hw->nic_type = athr_l1c;
648 break;
649 case PCI_DEVICE_ID_ATHEROS_L2C_B:
650 hw->nic_type = athr_l2c_b;
651 break;
652 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
653 hw->nic_type = athr_l2c_b2;
654 break;
655 case PCI_DEVICE_ID_ATHEROS_L1D:
656 hw->nic_type = athr_l1d;
657 break;
658 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
659 hw->nic_type = athr_l1d_2;
660 break;
661 default:
662 break;
663 }
664 }
665
666 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
667 {
668 u32 phy_status_data;
669 u32 link_ctrl_data;
670
671 atl1c_set_mac_type(hw);
672 AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
673 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
674
675 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
676 ATL1C_TXQ_MODE_ENHANCE;
677 if (link_ctrl_data & LINK_CTRL_L0S_EN)
678 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
679 if (link_ctrl_data & LINK_CTRL_L1_EN)
680 hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
681 if (link_ctrl_data & LINK_CTRL_EXT_SYNC)
682 hw->ctrl_flags |= ATL1C_LINK_EXT_SYNC;
683 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
684
685 if (hw->nic_type == athr_l1c ||
686 hw->nic_type == athr_l1d ||
687 hw->nic_type == athr_l1d_2)
688 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
689 return 0;
690 }
691 /*
692 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
693 * @adapter: board private structure to initialize
694 *
695 * atl1c_sw_init initializes the Adapter private data structure.
696 * Fields are initialized based on PCI device information and
697 * OS network device settings (MTU size).
698 */
699 static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
700 {
701 struct atl1c_hw *hw = &adapter->hw;
702 struct pci_dev *pdev = adapter->pdev;
703 u32 revision;
704
705
706 adapter->wol = 0;
707 device_set_wakeup_enable(&pdev->dev, false);
708 adapter->link_speed = SPEED_0;
709 adapter->link_duplex = FULL_DUPLEX;
710 adapter->tpd_ring[0].count = 1024;
711 adapter->rfd_ring.count = 512;
712
713 hw->vendor_id = pdev->vendor;
714 hw->device_id = pdev->device;
715 hw->subsystem_vendor_id = pdev->subsystem_vendor;
716 hw->subsystem_id = pdev->subsystem_device;
717 AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
718 hw->revision_id = revision & 0xFF;
719 /* before link up, we assume hibernate is true */
720 hw->hibernate = true;
721 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
722 if (atl1c_setup_mac_funcs(hw) != 0) {
723 dev_err(&pdev->dev, "set mac function pointers failed\n");
724 return -1;
725 }
726 hw->intr_mask = IMR_NORMAL_MASK;
727 hw->phy_configured = false;
728 hw->preamble_len = 7;
729 hw->max_frame_size = adapter->netdev->mtu;
730 hw->autoneg_advertised = ADVERTISED_Autoneg;
731 hw->indirect_tab = 0xE4E4E4E4;
732 hw->base_cpu = 0;
733
734 hw->ict = 50000; /* 100ms */
735 hw->smb_timer = 200000; /* 400ms */
736 hw->rx_imt = 200;
737 hw->tx_imt = 1000;
738
739 hw->tpd_burst = 5;
740 hw->rfd_burst = 8;
741 hw->dma_order = atl1c_dma_ord_out;
742 hw->dmar_block = atl1c_dma_req_1024;
743 hw->dmaw_block = atl1c_dma_req_1024;
744 hw->dmar_dly_cnt = 15;
745 hw->dmaw_dly_cnt = 4;
746
747 if (atl1c_alloc_queues(adapter)) {
748 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
749 return -ENOMEM;
750 }
751 /* TODO */
752 atl1c_set_rxbufsize(adapter, adapter->netdev);
753 atomic_set(&adapter->irq_sem, 1);
754 spin_lock_init(&adapter->mdio_lock);
755 spin_lock_init(&adapter->tx_lock);
756 set_bit(__AT_DOWN, &adapter->flags);
757
758 return 0;
759 }
760
761 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
762 struct atl1c_buffer *buffer_info, int in_irq)
763 {
764 u16 pci_driection;
765 if (buffer_info->flags & ATL1C_BUFFER_FREE)
766 return;
767 if (buffer_info->dma) {
768 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
769 pci_driection = PCI_DMA_FROMDEVICE;
770 else
771 pci_driection = PCI_DMA_TODEVICE;
772
773 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
774 pci_unmap_single(pdev, buffer_info->dma,
775 buffer_info->length, pci_driection);
776 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
777 pci_unmap_page(pdev, buffer_info->dma,
778 buffer_info->length, pci_driection);
779 }
780 if (buffer_info->skb) {
781 if (in_irq)
782 dev_kfree_skb_irq(buffer_info->skb);
783 else
784 dev_kfree_skb(buffer_info->skb);
785 }
786 buffer_info->dma = 0;
787 buffer_info->skb = NULL;
788 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
789 }
790 /*
791 * atl1c_clean_tx_ring - Free Tx-skb
792 * @adapter: board private structure
793 */
794 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
795 enum atl1c_trans_queue type)
796 {
797 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
798 struct atl1c_buffer *buffer_info;
799 struct pci_dev *pdev = adapter->pdev;
800 u16 index, ring_count;
801
802 ring_count = tpd_ring->count;
803 for (index = 0; index < ring_count; index++) {
804 buffer_info = &tpd_ring->buffer_info[index];
805 atl1c_clean_buffer(pdev, buffer_info, 0);
806 }
807
808 /* Zero out Tx-buffers */
809 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
810 ring_count);
811 atomic_set(&tpd_ring->next_to_clean, 0);
812 tpd_ring->next_to_use = 0;
813 }
814
815 /*
816 * atl1c_clean_rx_ring - Free rx-reservation skbs
817 * @adapter: board private structure
818 */
819 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
820 {
821 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
822 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
823 struct atl1c_buffer *buffer_info;
824 struct pci_dev *pdev = adapter->pdev;
825 int j;
826
827 for (j = 0; j < rfd_ring->count; j++) {
828 buffer_info = &rfd_ring->buffer_info[j];
829 atl1c_clean_buffer(pdev, buffer_info, 0);
830 }
831 /* zero out the descriptor ring */
832 memset(rfd_ring->desc, 0, rfd_ring->size);
833 rfd_ring->next_to_clean = 0;
834 rfd_ring->next_to_use = 0;
835 rrd_ring->next_to_use = 0;
836 rrd_ring->next_to_clean = 0;
837 }
838
839 /*
840 * Read / Write Ptr Initialize:
841 */
842 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
843 {
844 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
845 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
846 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
847 struct atl1c_buffer *buffer_info;
848 int i, j;
849
850 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
851 tpd_ring[i].next_to_use = 0;
852 atomic_set(&tpd_ring[i].next_to_clean, 0);
853 buffer_info = tpd_ring[i].buffer_info;
854 for (j = 0; j < tpd_ring->count; j++)
855 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
856 ATL1C_BUFFER_FREE);
857 }
858 rfd_ring->next_to_use = 0;
859 rfd_ring->next_to_clean = 0;
860 rrd_ring->next_to_use = 0;
861 rrd_ring->next_to_clean = 0;
862 for (j = 0; j < rfd_ring->count; j++) {
863 buffer_info = &rfd_ring->buffer_info[j];
864 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
865 }
866 }
867
868 /*
869 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
870 * @adapter: board private structure
871 *
872 * Free all transmit software resources
873 */
874 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
875 {
876 struct pci_dev *pdev = adapter->pdev;
877
878 pci_free_consistent(pdev, adapter->ring_header.size,
879 adapter->ring_header.desc,
880 adapter->ring_header.dma);
881 adapter->ring_header.desc = NULL;
882
883 /* Note: just free tdp_ring.buffer_info,
884 * it contain rfd_ring.buffer_info, do not double free */
885 if (adapter->tpd_ring[0].buffer_info) {
886 kfree(adapter->tpd_ring[0].buffer_info);
887 adapter->tpd_ring[0].buffer_info = NULL;
888 }
889 }
890
891 /*
892 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
893 * @adapter: board private structure
894 *
895 * Return 0 on success, negative on failure
896 */
897 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
898 {
899 struct pci_dev *pdev = adapter->pdev;
900 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
901 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
902 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
903 struct atl1c_ring_header *ring_header = &adapter->ring_header;
904 int size;
905 int i;
906 int count = 0;
907 int rx_desc_count = 0;
908 u32 offset = 0;
909
910 rrd_ring->count = rfd_ring->count;
911 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
912 tpd_ring[i].count = tpd_ring[0].count;
913
914 /* 2 tpd queue, one high priority queue,
915 * another normal priority queue */
916 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
917 rfd_ring->count);
918 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
919 if (unlikely(!tpd_ring->buffer_info)) {
920 dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
921 size);
922 goto err_nomem;
923 }
924 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
925 tpd_ring[i].buffer_info =
926 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
927 count += tpd_ring[i].count;
928 }
929
930 rfd_ring->buffer_info =
931 (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
932 count += rfd_ring->count;
933 rx_desc_count += rfd_ring->count;
934
935 /*
936 * real ring DMA buffer
937 * each ring/block may need up to 8 bytes for alignment, hence the
938 * additional bytes tacked onto the end.
939 */
940 ring_header->size = size =
941 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
942 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
943 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
944 8 * 4;
945
946 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
947 &ring_header->dma);
948 if (unlikely(!ring_header->desc)) {
949 dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
950 goto err_nomem;
951 }
952 memset(ring_header->desc, 0, ring_header->size);
953 /* init TPD ring */
954
955 tpd_ring[0].dma = roundup(ring_header->dma, 8);
956 offset = tpd_ring[0].dma - ring_header->dma;
957 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
958 tpd_ring[i].dma = ring_header->dma + offset;
959 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
960 tpd_ring[i].size =
961 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
962 offset += roundup(tpd_ring[i].size, 8);
963 }
964 /* init RFD ring */
965 rfd_ring->dma = ring_header->dma + offset;
966 rfd_ring->desc = (u8 *) ring_header->desc + offset;
967 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
968 offset += roundup(rfd_ring->size, 8);
969
970 /* init RRD ring */
971 rrd_ring->dma = ring_header->dma + offset;
972 rrd_ring->desc = (u8 *) ring_header->desc + offset;
973 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
974 rrd_ring->count;
975 offset += roundup(rrd_ring->size, 8);
976
977 return 0;
978
979 err_nomem:
980 kfree(tpd_ring->buffer_info);
981 return -ENOMEM;
982 }
983
984 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
985 {
986 struct atl1c_hw *hw = &adapter->hw;
987 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
988 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
989 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
990 adapter->tpd_ring;
991 u32 data;
992
993 /* TPD */
994 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
995 (u32)((tpd_ring[atl1c_trans_normal].dma &
996 AT_DMA_HI_ADDR_MASK) >> 32));
997 /* just enable normal priority TX queue */
998 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
999 (u32)(tpd_ring[atl1c_trans_normal].dma &
1000 AT_DMA_LO_ADDR_MASK));
1001 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
1002 (u32)(tpd_ring[atl1c_trans_high].dma &
1003 AT_DMA_LO_ADDR_MASK));
1004 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1005 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1006
1007
1008 /* RFD */
1009 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1010 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1011 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1012 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
1013
1014 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1015 rfd_ring->count & RFD_RING_SIZE_MASK);
1016 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1017 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1018
1019 /* RRD */
1020 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1021 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
1022 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1023 (rrd_ring->count & RRD_RING_SIZE_MASK));
1024
1025 if (hw->nic_type == athr_l2c_b) {
1026 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1027 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1028 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1029 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1030 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1031 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1032 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1033 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1034 }
1035 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d_2) {
1036 /* Power Saving for L2c_B */
1037 AT_READ_REG(hw, REG_SERDES_LOCK, &data);
1038 data |= SERDES_MAC_CLK_SLOWDOWN;
1039 data |= SERDES_PYH_CLK_SLOWDOWN;
1040 AT_WRITE_REG(hw, REG_SERDES_LOCK, data);
1041 }
1042 /* Load all of base address above */
1043 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1044 }
1045
1046 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1047 {
1048 struct atl1c_hw *hw = &adapter->hw;
1049 u32 dev_ctrl_data;
1050 u32 max_pay_load;
1051 u16 tx_offload_thresh;
1052 u32 txq_ctrl_data;
1053 u32 max_pay_load_data;
1054
1055 tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
1056 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1057 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1058 AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
1059 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
1060 DEVICE_CTRL_MAX_PAYLOAD_MASK;
1061 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
1062 max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
1063 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
1064 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1065
1066 txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
1067 TXQ_NUM_TPD_BURST_SHIFT;
1068 if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
1069 txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
1070 max_pay_load_data = (atl1c_pay_load_size[hw->dmar_block] &
1071 TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
1072 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2)
1073 max_pay_load_data >>= 1;
1074 txq_ctrl_data |= max_pay_load_data;
1075
1076 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1077 }
1078
1079 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1080 {
1081 struct atl1c_hw *hw = &adapter->hw;
1082 u32 rxq_ctrl_data;
1083
1084 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1085 RXQ_RFD_BURST_NUM_SHIFT;
1086
1087 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1088 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1089
1090 if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
1091 rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_1M &
1092 ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
1093
1094 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1095 }
1096
1097 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1098 {
1099 struct atl1c_hw *hw = &adapter->hw;
1100 u32 dma_ctrl_data;
1101
1102 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1103 DMA_CTRL_RREQ_PRI_DATA |
1104 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1105 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1106 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1107
1108 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1109 }
1110
1111 /*
1112 * Stop the mac, transmit and receive units
1113 * hw - Struct containing variables accessed by shared code
1114 * return : 0 or idle status (if error)
1115 */
1116 static int atl1c_stop_mac(struct atl1c_hw *hw)
1117 {
1118 u32 data;
1119
1120 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1121 data &= ~RXQ_CTRL_EN;
1122 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1123
1124 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1125 data &= ~TXQ_CTRL_EN;
1126 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1127
1128 atl1c_wait_until_idle(hw);
1129
1130 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1131 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1132 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1133
1134 return (int)atl1c_wait_until_idle(hw);
1135 }
1136
1137 static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
1138 {
1139 u32 data;
1140
1141 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1142 data |= RXQ_CTRL_EN;
1143 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1144 }
1145
1146 static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
1147 {
1148 u32 data;
1149
1150 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1151 data |= TXQ_CTRL_EN;
1152 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1153 }
1154
1155 /*
1156 * Reset the transmit and receive units; mask and clear all interrupts.
1157 * hw - Struct containing variables accessed by shared code
1158 * return : 0 or idle status (if error)
1159 */
1160 static int atl1c_reset_mac(struct atl1c_hw *hw)
1161 {
1162 struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
1163 struct pci_dev *pdev = adapter->pdev;
1164 u32 master_ctrl_data = 0;
1165
1166 AT_WRITE_REG(hw, REG_IMR, 0);
1167 AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
1168
1169 atl1c_stop_mac(hw);
1170 /*
1171 * Issue Soft Reset to the MAC. This will reset the chip's
1172 * transmit, receive, DMA. It will not effect
1173 * the current PCI configuration. The global reset bit is self-
1174 * clearing, and should clear within a microsecond.
1175 */
1176 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1177 master_ctrl_data |= MASTER_CTRL_OOB_DIS_OFF;
1178 AT_WRITE_REGW(hw, REG_MASTER_CTRL, ((master_ctrl_data | MASTER_CTRL_SOFT_RST)
1179 & 0xFFFF));
1180
1181 AT_WRITE_FLUSH(hw);
1182 msleep(10);
1183 /* Wait at least 10ms for All module to be Idle */
1184
1185 if (atl1c_wait_until_idle(hw)) {
1186 dev_err(&pdev->dev,
1187 "MAC state machine can't be idle since"
1188 " disabled for 10ms second\n");
1189 return -1;
1190 }
1191 return 0;
1192 }
1193
1194 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1195 {
1196 u32 pm_ctrl_data;
1197
1198 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1199 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1200 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1201 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1202 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1203 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1204 pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
1205 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1206
1207 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1208 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1209 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1210 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1211 }
1212
1213 /*
1214 * Set ASPM state.
1215 * Enable/disable L0s/L1 depend on link state.
1216 */
1217 static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
1218 {
1219 u32 pm_ctrl_data;
1220 u32 link_ctrl_data;
1221 u32 link_l1_timer = 0xF;
1222
1223 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1224 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
1225
1226 pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
1227 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1228 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1229 pm_ctrl_data &= ~(PM_CTRL_LCKDET_TIMER_MASK <<
1230 PM_CTRL_LCKDET_TIMER_SHIFT);
1231 pm_ctrl_data |= AT_LCKDET_TIMER << PM_CTRL_LCKDET_TIMER_SHIFT;
1232
1233 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1234 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1235 link_ctrl_data &= ~LINK_CTRL_EXT_SYNC;
1236 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE)) {
1237 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10)
1238 link_ctrl_data |= LINK_CTRL_EXT_SYNC;
1239 }
1240
1241 AT_WRITE_REG(hw, REG_LINK_CTRL, link_ctrl_data);
1242
1243 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER;
1244 pm_ctrl_data &= ~(PM_CTRL_PM_REQ_TIMER_MASK <<
1245 PM_CTRL_PM_REQ_TIMER_SHIFT);
1246 pm_ctrl_data |= AT_ASPM_L1_TIMER <<
1247 PM_CTRL_PM_REQ_TIMER_SHIFT;
1248 pm_ctrl_data &= ~PM_CTRL_SA_DLY_EN;
1249 pm_ctrl_data &= ~PM_CTRL_HOTRST;
1250 pm_ctrl_data |= 1 << PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1251 pm_ctrl_data |= PM_CTRL_SERDES_PD_EX_L1;
1252 }
1253 pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
1254 if (linkup) {
1255 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1256 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1257 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1258 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1259 if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
1260 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
1261
1262 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1263 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1264 if (hw->nic_type == athr_l2c_b)
1265 if (!(hw->ctrl_flags & ATL1C_APS_MODE_ENABLE))
1266 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1267 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1268 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1269 pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
1270 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1271 if (hw->adapter->link_speed == SPEED_100 ||
1272 hw->adapter->link_speed == SPEED_1000) {
1273 pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
1274 PM_CTRL_L1_ENTRY_TIMER_SHIFT);
1275 if (hw->nic_type == athr_l2c_b)
1276 link_l1_timer = 7;
1277 else if (hw->nic_type == athr_l2c_b2 ||
1278 hw->nic_type == athr_l1d_2)
1279 link_l1_timer = 4;
1280 pm_ctrl_data |= link_l1_timer <<
1281 PM_CTRL_L1_ENTRY_TIMER_SHIFT;
1282 }
1283 } else {
1284 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
1285 pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
1286 pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
1287 pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
1288 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1289 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1290
1291 }
1292 } else {
1293 pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
1294 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1295 pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
1296 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1297
1298 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1299 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
1300 else
1301 pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
1302 }
1303 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1304
1305 return;
1306 }
1307
1308 static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
1309 {
1310 struct atl1c_hw *hw = &adapter->hw;
1311 struct net_device *netdev = adapter->netdev;
1312 u32 mac_ctrl_data;
1313
1314 mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1315 mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1316
1317 if (adapter->link_duplex == FULL_DUPLEX) {
1318 hw->mac_duplex = true;
1319 mac_ctrl_data |= MAC_CTRL_DUPLX;
1320 }
1321
1322 if (adapter->link_speed == SPEED_1000)
1323 hw->mac_speed = atl1c_mac_speed_1000;
1324 else
1325 hw->mac_speed = atl1c_mac_speed_10_100;
1326
1327 mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
1328 MAC_CTRL_SPEED_SHIFT;
1329
1330 mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1331 mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1332 MAC_CTRL_PRMLEN_SHIFT);
1333
1334 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
1335
1336 mac_ctrl_data |= MAC_CTRL_BC_EN;
1337 if (netdev->flags & IFF_PROMISC)
1338 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
1339 if (netdev->flags & IFF_ALLMULTI)
1340 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
1341
1342 mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
1343 if (hw->nic_type == athr_l1d || hw->nic_type == athr_l2c_b2 ||
1344 hw->nic_type == athr_l1d_2) {
1345 mac_ctrl_data |= MAC_CTRL_SPEED_MODE_SW;
1346 mac_ctrl_data |= MAC_CTRL_HASH_ALG_CRC32;
1347 }
1348 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
1349 }
1350
1351 /*
1352 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1353 * @adapter: board private structure
1354 *
1355 * Configure the Tx /Rx unit of the MAC after a reset.
1356 */
1357 static int atl1c_configure(struct atl1c_adapter *adapter)
1358 {
1359 struct atl1c_hw *hw = &adapter->hw;
1360 u32 master_ctrl_data = 0;
1361 u32 intr_modrt_data;
1362 u32 data;
1363
1364 /* clear interrupt status */
1365 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1366 /* Clear any WOL status */
1367 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1368 /* set Interrupt Clear Timer
1369 * HW will enable self to assert interrupt event to system after
1370 * waiting x-time for software to notify it accept interrupt.
1371 */
1372
1373 data = CLK_GATING_EN_ALL;
1374 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1375 if (hw->nic_type == athr_l2c_b)
1376 data &= ~CLK_GATING_RXMAC_EN;
1377 } else
1378 data = 0;
1379 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1380
1381 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1382 hw->ict & INT_RETRIG_TIMER_MASK);
1383
1384 atl1c_configure_des_ring(adapter);
1385
1386 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1387 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1388 IRQ_MODRT_TX_TIMER_SHIFT;
1389 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1390 IRQ_MODRT_RX_TIMER_SHIFT;
1391 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1392 master_ctrl_data |=
1393 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1394 }
1395
1396 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1397 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1398
1399 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1400 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1401
1402 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1403 hw->smb_timer & SMB_STAT_TIMER_MASK);
1404
1405 /* set MTU */
1406 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1407 VLAN_HLEN + ETH_FCS_LEN);
1408
1409 atl1c_configure_tx(adapter);
1410 atl1c_configure_rx(adapter);
1411 atl1c_configure_dma(adapter);
1412
1413 return 0;
1414 }
1415
1416 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1417 {
1418 u16 hw_reg_addr = 0;
1419 unsigned long *stats_item = NULL;
1420 u32 data;
1421
1422 /* update rx status */
1423 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1424 stats_item = &adapter->hw_stats.rx_ok;
1425 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1426 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1427 *stats_item += data;
1428 stats_item++;
1429 hw_reg_addr += 4;
1430 }
1431 /* update tx status */
1432 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1433 stats_item = &adapter->hw_stats.tx_ok;
1434 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1435 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1436 *stats_item += data;
1437 stats_item++;
1438 hw_reg_addr += 4;
1439 }
1440 }
1441
1442 /*
1443 * atl1c_get_stats - Get System Network Statistics
1444 * @netdev: network interface device structure
1445 *
1446 * Returns the address of the device statistics structure.
1447 * The statistics are actually updated from the timer callback.
1448 */
1449 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1450 {
1451 struct atl1c_adapter *adapter = netdev_priv(netdev);
1452 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1453 struct net_device_stats *net_stats = &netdev->stats;
1454
1455 atl1c_update_hw_stats(adapter);
1456 net_stats->rx_packets = hw_stats->rx_ok;
1457 net_stats->tx_packets = hw_stats->tx_ok;
1458 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1459 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1460 net_stats->multicast = hw_stats->rx_mcast;
1461 net_stats->collisions = hw_stats->tx_1_col +
1462 hw_stats->tx_2_col * 2 +
1463 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1464 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1465 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1466 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1467 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1468 net_stats->rx_length_errors = hw_stats->rx_len_err;
1469 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1470 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1471 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1472
1473 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1474
1475 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1476 hw_stats->tx_underrun + hw_stats->tx_trunc;
1477 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1478 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1479 net_stats->tx_window_errors = hw_stats->tx_late_col;
1480
1481 return net_stats;
1482 }
1483
1484 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1485 {
1486 u16 phy_data;
1487
1488 spin_lock(&adapter->mdio_lock);
1489 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1490 spin_unlock(&adapter->mdio_lock);
1491 }
1492
1493 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1494 enum atl1c_trans_queue type)
1495 {
1496 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1497 &adapter->tpd_ring[type];
1498 struct atl1c_buffer *buffer_info;
1499 struct pci_dev *pdev = adapter->pdev;
1500 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1501 u16 hw_next_to_clean;
1502 u16 reg;
1503
1504 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
1505
1506 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
1507
1508 while (next_to_clean != hw_next_to_clean) {
1509 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1510 atl1c_clean_buffer(pdev, buffer_info, 1);
1511 if (++next_to_clean == tpd_ring->count)
1512 next_to_clean = 0;
1513 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1514 }
1515
1516 if (netif_queue_stopped(adapter->netdev) &&
1517 netif_carrier_ok(adapter->netdev)) {
1518 netif_wake_queue(adapter->netdev);
1519 }
1520
1521 return true;
1522 }
1523
1524 /*
1525 * atl1c_intr - Interrupt Handler
1526 * @irq: interrupt number
1527 * @data: pointer to a network interface device structure
1528 * @pt_regs: CPU registers structure
1529 */
1530 static irqreturn_t atl1c_intr(int irq, void *data)
1531 {
1532 struct net_device *netdev = data;
1533 struct atl1c_adapter *adapter = netdev_priv(netdev);
1534 struct pci_dev *pdev = adapter->pdev;
1535 struct atl1c_hw *hw = &adapter->hw;
1536 int max_ints = AT_MAX_INT_WORK;
1537 int handled = IRQ_NONE;
1538 u32 status;
1539 u32 reg_data;
1540
1541 do {
1542 AT_READ_REG(hw, REG_ISR, &reg_data);
1543 status = reg_data & hw->intr_mask;
1544
1545 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1546 if (max_ints != AT_MAX_INT_WORK)
1547 handled = IRQ_HANDLED;
1548 break;
1549 }
1550 /* link event */
1551 if (status & ISR_GPHY)
1552 atl1c_clear_phy_int(adapter);
1553 /* Ack ISR */
1554 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1555 if (status & ISR_RX_PKT) {
1556 if (likely(napi_schedule_prep(&adapter->napi))) {
1557 hw->intr_mask &= ~ISR_RX_PKT;
1558 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1559 __napi_schedule(&adapter->napi);
1560 }
1561 }
1562 if (status & ISR_TX_PKT)
1563 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1564
1565 handled = IRQ_HANDLED;
1566 /* check if PCIE PHY Link down */
1567 if (status & ISR_ERROR) {
1568 if (netif_msg_hw(adapter))
1569 dev_err(&pdev->dev,
1570 "atl1c hardware error (status = 0x%x)\n",
1571 status & ISR_ERROR);
1572 /* reset MAC */
1573 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1574 schedule_work(&adapter->common_task);
1575 return IRQ_HANDLED;
1576 }
1577
1578 if (status & ISR_OVER)
1579 if (netif_msg_intr(adapter))
1580 dev_warn(&pdev->dev,
1581 "TX/RX overflow (status = 0x%x)\n",
1582 status & ISR_OVER);
1583
1584 /* link event */
1585 if (status & (ISR_GPHY | ISR_MANUAL)) {
1586 netdev->stats.tx_carrier_errors++;
1587 atl1c_link_chg_event(adapter);
1588 break;
1589 }
1590
1591 } while (--max_ints > 0);
1592 /* re-enable Interrupt*/
1593 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1594 return handled;
1595 }
1596
1597 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1598 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1599 {
1600 /*
1601 * The pid field in RRS in not correct sometimes, so we
1602 * cannot figure out if the packet is fragmented or not,
1603 * so we tell the KERNEL CHECKSUM_NONE
1604 */
1605 skb_checksum_none_assert(skb);
1606 }
1607
1608 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
1609 {
1610 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1611 struct pci_dev *pdev = adapter->pdev;
1612 struct atl1c_buffer *buffer_info, *next_info;
1613 struct sk_buff *skb;
1614 void *vir_addr = NULL;
1615 u16 num_alloc = 0;
1616 u16 rfd_next_to_use, next_next;
1617 struct atl1c_rx_free_desc *rfd_desc;
1618
1619 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1620 if (++next_next == rfd_ring->count)
1621 next_next = 0;
1622 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1623 next_info = &rfd_ring->buffer_info[next_next];
1624
1625 while (next_info->flags & ATL1C_BUFFER_FREE) {
1626 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1627
1628 skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
1629 if (unlikely(!skb)) {
1630 if (netif_msg_rx_err(adapter))
1631 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1632 break;
1633 }
1634
1635 /*
1636 * Make buffer alignment 2 beyond a 16 byte boundary
1637 * this will result in a 16 byte aligned IP header after
1638 * the 14 byte MAC header is removed
1639 */
1640 vir_addr = skb->data;
1641 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1642 buffer_info->skb = skb;
1643 buffer_info->length = adapter->rx_buffer_len;
1644 buffer_info->dma = pci_map_single(pdev, vir_addr,
1645 buffer_info->length,
1646 PCI_DMA_FROMDEVICE);
1647 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1648 ATL1C_PCIMAP_FROMDEVICE);
1649 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1650 rfd_next_to_use = next_next;
1651 if (++next_next == rfd_ring->count)
1652 next_next = 0;
1653 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1654 next_info = &rfd_ring->buffer_info[next_next];
1655 num_alloc++;
1656 }
1657
1658 if (num_alloc) {
1659 /* TODO: update mailbox here */
1660 wmb();
1661 rfd_ring->next_to_use = rfd_next_to_use;
1662 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
1663 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1664 }
1665
1666 return num_alloc;
1667 }
1668
1669 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1670 struct atl1c_recv_ret_status *rrs, u16 num)
1671 {
1672 u16 i;
1673 /* the relationship between rrd and rfd is one map one */
1674 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1675 rrd_ring->next_to_clean)) {
1676 rrs->word3 &= ~RRS_RXD_UPDATED;
1677 if (++rrd_ring->next_to_clean == rrd_ring->count)
1678 rrd_ring->next_to_clean = 0;
1679 }
1680 }
1681
1682 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1683 struct atl1c_recv_ret_status *rrs, u16 num)
1684 {
1685 u16 i;
1686 u16 rfd_index;
1687 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1688
1689 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1690 RRS_RX_RFD_INDEX_MASK;
1691 for (i = 0; i < num; i++) {
1692 buffer_info[rfd_index].skb = NULL;
1693 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1694 ATL1C_BUFFER_FREE);
1695 if (++rfd_index == rfd_ring->count)
1696 rfd_index = 0;
1697 }
1698 rfd_ring->next_to_clean = rfd_index;
1699 }
1700
1701 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
1702 int *work_done, int work_to_do)
1703 {
1704 u16 rfd_num, rfd_index;
1705 u16 count = 0;
1706 u16 length;
1707 struct pci_dev *pdev = adapter->pdev;
1708 struct net_device *netdev = adapter->netdev;
1709 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1710 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1711 struct sk_buff *skb;
1712 struct atl1c_recv_ret_status *rrs;
1713 struct atl1c_buffer *buffer_info;
1714
1715 while (1) {
1716 if (*work_done >= work_to_do)
1717 break;
1718 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1719 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1720 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1721 RRS_RX_RFD_CNT_MASK;
1722 if (unlikely(rfd_num != 1))
1723 /* TODO support mul rfd*/
1724 if (netif_msg_rx_err(adapter))
1725 dev_warn(&pdev->dev,
1726 "Multi rfd not support yet!\n");
1727 goto rrs_checked;
1728 } else {
1729 break;
1730 }
1731 rrs_checked:
1732 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1733 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1734 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1735 if (netif_msg_rx_err(adapter))
1736 dev_warn(&pdev->dev,
1737 "wrong packet! rrs word3 is %x\n",
1738 rrs->word3);
1739 continue;
1740 }
1741
1742 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1743 RRS_PKT_SIZE_MASK);
1744 /* Good Receive */
1745 if (likely(rfd_num == 1)) {
1746 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1747 RRS_RX_RFD_INDEX_MASK;
1748 buffer_info = &rfd_ring->buffer_info[rfd_index];
1749 pci_unmap_single(pdev, buffer_info->dma,
1750 buffer_info->length, PCI_DMA_FROMDEVICE);
1751 skb = buffer_info->skb;
1752 } else {
1753 /* TODO */
1754 if (netif_msg_rx_err(adapter))
1755 dev_warn(&pdev->dev,
1756 "Multi rfd not support yet!\n");
1757 break;
1758 }
1759 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1760 skb_put(skb, length - ETH_FCS_LEN);
1761 skb->protocol = eth_type_trans(skb, netdev);
1762 atl1c_rx_checksum(adapter, skb, rrs);
1763 if (rrs->word3 & RRS_VLAN_INS) {
1764 u16 vlan;
1765
1766 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1767 vlan = le16_to_cpu(vlan);
1768 __vlan_hwaccel_put_tag(skb, vlan);
1769 }
1770 netif_receive_skb(skb);
1771
1772 (*work_done)++;
1773 count++;
1774 }
1775 if (count)
1776 atl1c_alloc_rx_buffer(adapter);
1777 }
1778
1779 /*
1780 * atl1c_clean - NAPI Rx polling callback
1781 * @adapter: board private structure
1782 */
1783 static int atl1c_clean(struct napi_struct *napi, int budget)
1784 {
1785 struct atl1c_adapter *adapter =
1786 container_of(napi, struct atl1c_adapter, napi);
1787 int work_done = 0;
1788
1789 /* Keep link state information with original netdev */
1790 if (!netif_carrier_ok(adapter->netdev))
1791 goto quit_polling;
1792 /* just enable one RXQ */
1793 atl1c_clean_rx_irq(adapter, &work_done, budget);
1794
1795 if (work_done < budget) {
1796 quit_polling:
1797 napi_complete(napi);
1798 adapter->hw.intr_mask |= ISR_RX_PKT;
1799 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1800 }
1801 return work_done;
1802 }
1803
1804 #ifdef CONFIG_NET_POLL_CONTROLLER
1805
1806 /*
1807 * Polling 'interrupt' - used by things like netconsole to send skbs
1808 * without having to re-enable interrupts. It's not called while
1809 * the interrupt routine is executing.
1810 */
1811 static void atl1c_netpoll(struct net_device *netdev)
1812 {
1813 struct atl1c_adapter *adapter = netdev_priv(netdev);
1814
1815 disable_irq(adapter->pdev->irq);
1816 atl1c_intr(adapter->pdev->irq, netdev);
1817 enable_irq(adapter->pdev->irq);
1818 }
1819 #endif
1820
1821 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1822 {
1823 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1824 u16 next_to_use = 0;
1825 u16 next_to_clean = 0;
1826
1827 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1828 next_to_use = tpd_ring->next_to_use;
1829
1830 return (u16)(next_to_clean > next_to_use) ?
1831 (next_to_clean - next_to_use - 1) :
1832 (tpd_ring->count + next_to_clean - next_to_use - 1);
1833 }
1834
1835 /*
1836 * get next usable tpd
1837 * Note: should call atl1c_tdp_avail to make sure
1838 * there is enough tpd to use
1839 */
1840 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1841 enum atl1c_trans_queue type)
1842 {
1843 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1844 struct atl1c_tpd_desc *tpd_desc;
1845 u16 next_to_use = 0;
1846
1847 next_to_use = tpd_ring->next_to_use;
1848 if (++tpd_ring->next_to_use == tpd_ring->count)
1849 tpd_ring->next_to_use = 0;
1850 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1851 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1852 return tpd_desc;
1853 }
1854
1855 static struct atl1c_buffer *
1856 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1857 {
1858 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1859
1860 return &tpd_ring->buffer_info[tpd -
1861 (struct atl1c_tpd_desc *)tpd_ring->desc];
1862 }
1863
1864 /* Calculate the transmit packet descript needed*/
1865 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1866 {
1867 u16 tpd_req;
1868 u16 proto_hdr_len = 0;
1869
1870 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1871
1872 if (skb_is_gso(skb)) {
1873 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1874 if (proto_hdr_len < skb_headlen(skb))
1875 tpd_req++;
1876 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1877 tpd_req++;
1878 }
1879 return tpd_req;
1880 }
1881
1882 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1883 struct sk_buff *skb,
1884 struct atl1c_tpd_desc **tpd,
1885 enum atl1c_trans_queue type)
1886 {
1887 struct pci_dev *pdev = adapter->pdev;
1888 u8 hdr_len;
1889 u32 real_len;
1890 unsigned short offload_type;
1891 int err;
1892
1893 if (skb_is_gso(skb)) {
1894 if (skb_header_cloned(skb)) {
1895 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1896 if (unlikely(err))
1897 return -1;
1898 }
1899 offload_type = skb_shinfo(skb)->gso_type;
1900
1901 if (offload_type & SKB_GSO_TCPV4) {
1902 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1903 + ntohs(ip_hdr(skb)->tot_len));
1904
1905 if (real_len < skb->len)
1906 pskb_trim(skb, real_len);
1907
1908 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1909 if (unlikely(skb->len == hdr_len)) {
1910 /* only xsum need */
1911 if (netif_msg_tx_queued(adapter))
1912 dev_warn(&pdev->dev,
1913 "IPV4 tso with zero data??\n");
1914 goto check_sum;
1915 } else {
1916 ip_hdr(skb)->check = 0;
1917 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1918 ip_hdr(skb)->saddr,
1919 ip_hdr(skb)->daddr,
1920 0, IPPROTO_TCP, 0);
1921 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
1922 }
1923 }
1924
1925 if (offload_type & SKB_GSO_TCPV6) {
1926 struct atl1c_tpd_ext_desc *etpd =
1927 *(struct atl1c_tpd_ext_desc **)(tpd);
1928
1929 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
1930 *tpd = atl1c_get_tpd(adapter, type);
1931 ipv6_hdr(skb)->payload_len = 0;
1932 /* check payload == 0 byte ? */
1933 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1934 if (unlikely(skb->len == hdr_len)) {
1935 /* only xsum need */
1936 if (netif_msg_tx_queued(adapter))
1937 dev_warn(&pdev->dev,
1938 "IPV6 tso with zero data??\n");
1939 goto check_sum;
1940 } else
1941 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1942 &ipv6_hdr(skb)->saddr,
1943 &ipv6_hdr(skb)->daddr,
1944 0, IPPROTO_TCP, 0);
1945 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
1946 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
1947 etpd->pkt_len = cpu_to_le32(skb->len);
1948 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
1949 }
1950
1951 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
1952 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
1953 TPD_TCPHDR_OFFSET_SHIFT;
1954 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
1955 TPD_MSS_SHIFT;
1956 return 0;
1957 }
1958
1959 check_sum:
1960 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1961 u8 css, cso;
1962 cso = skb_checksum_start_offset(skb);
1963
1964 if (unlikely(cso & 0x1)) {
1965 if (netif_msg_tx_err(adapter))
1966 dev_err(&adapter->pdev->dev,
1967 "payload offset should not an event number\n");
1968 return -1;
1969 } else {
1970 css = cso + skb->csum_offset;
1971
1972 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
1973 TPD_PLOADOFFSET_SHIFT;
1974 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
1975 TPD_CCSUM_OFFSET_SHIFT;
1976 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
1977 }
1978 }
1979 return 0;
1980 }
1981
1982 static void atl1c_tx_map(struct atl1c_adapter *adapter,
1983 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
1984 enum atl1c_trans_queue type)
1985 {
1986 struct atl1c_tpd_desc *use_tpd = NULL;
1987 struct atl1c_buffer *buffer_info = NULL;
1988 u16 buf_len = skb_headlen(skb);
1989 u16 map_len = 0;
1990 u16 mapped_len = 0;
1991 u16 hdr_len = 0;
1992 u16 nr_frags;
1993 u16 f;
1994 int tso;
1995
1996 nr_frags = skb_shinfo(skb)->nr_frags;
1997 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
1998 if (tso) {
1999 /* TSO */
2000 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2001 use_tpd = tpd;
2002
2003 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2004 buffer_info->length = map_len;
2005 buffer_info->dma = pci_map_single(adapter->pdev,
2006 skb->data, hdr_len, PCI_DMA_TODEVICE);
2007 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2008 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2009 ATL1C_PCIMAP_TODEVICE);
2010 mapped_len += map_len;
2011 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2012 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2013 }
2014
2015 if (mapped_len < buf_len) {
2016 /* mapped_len == 0, means we should use the first tpd,
2017 which is given by caller */
2018 if (mapped_len == 0)
2019 use_tpd = tpd;
2020 else {
2021 use_tpd = atl1c_get_tpd(adapter, type);
2022 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2023 }
2024 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2025 buffer_info->length = buf_len - mapped_len;
2026 buffer_info->dma =
2027 pci_map_single(adapter->pdev, skb->data + mapped_len,
2028 buffer_info->length, PCI_DMA_TODEVICE);
2029 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2030 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2031 ATL1C_PCIMAP_TODEVICE);
2032 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2033 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2034 }
2035
2036 for (f = 0; f < nr_frags; f++) {
2037 struct skb_frag_struct *frag;
2038
2039 frag = &skb_shinfo(skb)->frags[f];
2040
2041 use_tpd = atl1c_get_tpd(adapter, type);
2042 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2043
2044 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2045 buffer_info->length = skb_frag_size(frag);
2046 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2047 frag, 0,
2048 buffer_info->length,
2049 DMA_TO_DEVICE);
2050 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2051 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2052 ATL1C_PCIMAP_TODEVICE);
2053 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2054 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2055 }
2056
2057 /* The last tpd */
2058 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2059 /* The last buffer info contain the skb address,
2060 so it will be free after unmap */
2061 buffer_info->skb = skb;
2062 }
2063
2064 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2065 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2066 {
2067 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2068 u16 reg;
2069
2070 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2071 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
2072 }
2073
2074 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2075 struct net_device *netdev)
2076 {
2077 struct atl1c_adapter *adapter = netdev_priv(netdev);
2078 unsigned long flags;
2079 u16 tpd_req = 1;
2080 struct atl1c_tpd_desc *tpd;
2081 enum atl1c_trans_queue type = atl1c_trans_normal;
2082
2083 if (test_bit(__AT_DOWN, &adapter->flags)) {
2084 dev_kfree_skb_any(skb);
2085 return NETDEV_TX_OK;
2086 }
2087
2088 tpd_req = atl1c_cal_tpd_req(skb);
2089 if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
2090 if (netif_msg_pktdata(adapter))
2091 dev_info(&adapter->pdev->dev, "tx locked\n");
2092 return NETDEV_TX_LOCKED;
2093 }
2094
2095 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2096 /* no enough descriptor, just stop queue */
2097 netif_stop_queue(netdev);
2098 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2099 return NETDEV_TX_BUSY;
2100 }
2101
2102 tpd = atl1c_get_tpd(adapter, type);
2103
2104 /* do TSO and check sum */
2105 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2106 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2107 dev_kfree_skb_any(skb);
2108 return NETDEV_TX_OK;
2109 }
2110
2111 if (unlikely(vlan_tx_tag_present(skb))) {
2112 u16 vlan = vlan_tx_tag_get(skb);
2113 __le16 tag;
2114
2115 vlan = cpu_to_le16(vlan);
2116 AT_VLAN_TO_TAG(vlan, tag);
2117 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2118 tpd->vlan_tag = tag;
2119 }
2120
2121 if (skb_network_offset(skb) != ETH_HLEN)
2122 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2123
2124 atl1c_tx_map(adapter, skb, tpd, type);
2125 atl1c_tx_queue(adapter, skb, tpd, type);
2126
2127 spin_unlock_irqrestore(&adapter->tx_lock, flags);
2128 return NETDEV_TX_OK;
2129 }
2130
2131 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2132 {
2133 struct net_device *netdev = adapter->netdev;
2134
2135 free_irq(adapter->pdev->irq, netdev);
2136
2137 if (adapter->have_msi)
2138 pci_disable_msi(adapter->pdev);
2139 }
2140
2141 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2142 {
2143 struct pci_dev *pdev = adapter->pdev;
2144 struct net_device *netdev = adapter->netdev;
2145 int flags = 0;
2146 int err = 0;
2147
2148 adapter->have_msi = true;
2149 err = pci_enable_msi(adapter->pdev);
2150 if (err) {
2151 if (netif_msg_ifup(adapter))
2152 dev_err(&pdev->dev,
2153 "Unable to allocate MSI interrupt Error: %d\n",
2154 err);
2155 adapter->have_msi = false;
2156 }
2157
2158 if (!adapter->have_msi)
2159 flags |= IRQF_SHARED;
2160 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2161 netdev->name, netdev);
2162 if (err) {
2163 if (netif_msg_ifup(adapter))
2164 dev_err(&pdev->dev,
2165 "Unable to allocate interrupt Error: %d\n",
2166 err);
2167 if (adapter->have_msi)
2168 pci_disable_msi(adapter->pdev);
2169 return err;
2170 }
2171 if (netif_msg_ifup(adapter))
2172 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2173 return err;
2174 }
2175
2176 static int atl1c_up(struct atl1c_adapter *adapter)
2177 {
2178 struct net_device *netdev = adapter->netdev;
2179 int num;
2180 int err;
2181
2182 netif_carrier_off(netdev);
2183 atl1c_init_ring_ptrs(adapter);
2184 atl1c_set_multi(netdev);
2185 atl1c_restore_vlan(adapter);
2186
2187 num = atl1c_alloc_rx_buffer(adapter);
2188 if (unlikely(num == 0)) {
2189 err = -ENOMEM;
2190 goto err_alloc_rx;
2191 }
2192
2193 if (atl1c_configure(adapter)) {
2194 err = -EIO;
2195 goto err_up;
2196 }
2197
2198 err = atl1c_request_irq(adapter);
2199 if (unlikely(err))
2200 goto err_up;
2201
2202 clear_bit(__AT_DOWN, &adapter->flags);
2203 napi_enable(&adapter->napi);
2204 atl1c_irq_enable(adapter);
2205 atl1c_check_link_status(adapter);
2206 netif_start_queue(netdev);
2207 return err;
2208
2209 err_up:
2210 err_alloc_rx:
2211 atl1c_clean_rx_ring(adapter);
2212 return err;
2213 }
2214
2215 static void atl1c_down(struct atl1c_adapter *adapter)
2216 {
2217 struct net_device *netdev = adapter->netdev;
2218
2219 atl1c_del_timer(adapter);
2220 adapter->work_event = 0; /* clear all event */
2221 /* signal that we're down so the interrupt handler does not
2222 * reschedule our watchdog timer */
2223 set_bit(__AT_DOWN, &adapter->flags);
2224 netif_carrier_off(netdev);
2225 napi_disable(&adapter->napi);
2226 atl1c_irq_disable(adapter);
2227 atl1c_free_irq(adapter);
2228 /* reset MAC to disable all RX/TX */
2229 atl1c_reset_mac(&adapter->hw);
2230 msleep(1);
2231
2232 adapter->link_speed = SPEED_0;
2233 adapter->link_duplex = -1;
2234 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2235 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2236 atl1c_clean_rx_ring(adapter);
2237 }
2238
2239 /*
2240 * atl1c_open - Called when a network interface is made active
2241 * @netdev: network interface device structure
2242 *
2243 * Returns 0 on success, negative value on failure
2244 *
2245 * The open entry point is called when a network interface is made
2246 * active by the system (IFF_UP). At this point all resources needed
2247 * for transmit and receive operations are allocated, the interrupt
2248 * handler is registered with the OS, the watchdog timer is started,
2249 * and the stack is notified that the interface is ready.
2250 */
2251 static int atl1c_open(struct net_device *netdev)
2252 {
2253 struct atl1c_adapter *adapter = netdev_priv(netdev);
2254 int err;
2255
2256 /* disallow open during test */
2257 if (test_bit(__AT_TESTING, &adapter->flags))
2258 return -EBUSY;
2259
2260 /* allocate rx/tx dma buffer & descriptors */
2261 err = atl1c_setup_ring_resources(adapter);
2262 if (unlikely(err))
2263 return err;
2264
2265 err = atl1c_up(adapter);
2266 if (unlikely(err))
2267 goto err_up;
2268
2269 if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
2270 u32 phy_data;
2271
2272 AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
2273 phy_data |= MDIO_AP_EN;
2274 AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
2275 }
2276 return 0;
2277
2278 err_up:
2279 atl1c_free_irq(adapter);
2280 atl1c_free_ring_resources(adapter);
2281 atl1c_reset_mac(&adapter->hw);
2282 return err;
2283 }
2284
2285 /*
2286 * atl1c_close - Disables a network interface
2287 * @netdev: network interface device structure
2288 *
2289 * Returns 0, this is not allowed to fail
2290 *
2291 * The close entry point is called when an interface is de-activated
2292 * by the OS. The hardware is still under the drivers control, but
2293 * needs to be disabled. A global MAC reset is issued to stop the
2294 * hardware, and all transmit and receive resources are freed.
2295 */
2296 static int atl1c_close(struct net_device *netdev)
2297 {
2298 struct atl1c_adapter *adapter = netdev_priv(netdev);
2299
2300 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2301 atl1c_down(adapter);
2302 atl1c_free_ring_resources(adapter);
2303 return 0;
2304 }
2305
2306 static int atl1c_suspend(struct device *dev)
2307 {
2308 struct pci_dev *pdev = to_pci_dev(dev);
2309 struct net_device *netdev = pci_get_drvdata(pdev);
2310 struct atl1c_adapter *adapter = netdev_priv(netdev);
2311 struct atl1c_hw *hw = &adapter->hw;
2312 u32 mac_ctrl_data = 0;
2313 u32 master_ctrl_data = 0;
2314 u32 wol_ctrl_data = 0;
2315 u16 mii_intr_status_data = 0;
2316 u32 wufc = adapter->wol;
2317
2318 atl1c_disable_l0s_l1(hw);
2319 if (netif_running(netdev)) {
2320 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2321 atl1c_down(adapter);
2322 }
2323 netif_device_detach(netdev);
2324
2325 if (wufc)
2326 if (atl1c_phy_power_saving(hw) != 0)
2327 dev_dbg(&pdev->dev, "phy power saving failed");
2328
2329 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
2330 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
2331
2332 master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
2333 mac_ctrl_data &= ~(MAC_CTRL_PRMLEN_MASK << MAC_CTRL_PRMLEN_SHIFT);
2334 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2335 MAC_CTRL_PRMLEN_MASK) <<
2336 MAC_CTRL_PRMLEN_SHIFT);
2337 mac_ctrl_data &= ~(MAC_CTRL_SPEED_MASK << MAC_CTRL_SPEED_SHIFT);
2338 mac_ctrl_data &= ~MAC_CTRL_DUPLX;
2339
2340 if (wufc) {
2341 mac_ctrl_data |= MAC_CTRL_RX_EN;
2342 if (adapter->link_speed == SPEED_1000 ||
2343 adapter->link_speed == SPEED_0) {
2344 mac_ctrl_data |= atl1c_mac_speed_1000 <<
2345 MAC_CTRL_SPEED_SHIFT;
2346 mac_ctrl_data |= MAC_CTRL_DUPLX;
2347 } else
2348 mac_ctrl_data |= atl1c_mac_speed_10_100 <<
2349 MAC_CTRL_SPEED_SHIFT;
2350
2351 if (adapter->link_duplex == DUPLEX_FULL)
2352 mac_ctrl_data |= MAC_CTRL_DUPLX;
2353
2354 /* turn on magic packet wol */
2355 if (wufc & AT_WUFC_MAG)
2356 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2357
2358 if (wufc & AT_WUFC_LNKC) {
2359 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2360 /* only link up can wake up */
2361 if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
2362 dev_dbg(&pdev->dev, "%s: read write phy "
2363 "register failed.\n",
2364 atl1c_driver_name);
2365 }
2366 }
2367 /* clear phy interrupt */
2368 atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
2369 /* Config MAC Ctrl register */
2370 __atl1c_vlan_mode(netdev->features, &mac_ctrl_data);
2371
2372 /* magic packet maybe Broadcast&multicast&Unicast frame */
2373 if (wufc & AT_WUFC_MAG)
2374 mac_ctrl_data |= MAC_CTRL_BC_EN;
2375
2376 dev_dbg(&pdev->dev,
2377 "%s: suspend MAC=0x%x\n",
2378 atl1c_driver_name, mac_ctrl_data);
2379 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2380 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2381 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2382
2383 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT |
2384 GPHY_CTRL_EXT_RESET);
2385 } else {
2386 AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_POWER_SAVING);
2387 master_ctrl_data |= MASTER_CTRL_CLK_SEL_DIS;
2388 mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
2389 mac_ctrl_data |= MAC_CTRL_DUPLX;
2390 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
2391 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2392 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2393 hw->phy_configured = false; /* re-init PHY when resume */
2394 }
2395
2396 return 0;
2397 }
2398
2399 #ifdef CONFIG_PM_SLEEP
2400 static int atl1c_resume(struct device *dev)
2401 {
2402 struct pci_dev *pdev = to_pci_dev(dev);
2403 struct net_device *netdev = pci_get_drvdata(pdev);
2404 struct atl1c_adapter *adapter = netdev_priv(netdev);
2405
2406 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2407 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2408 ATL1C_PCIE_PHY_RESET);
2409
2410 atl1c_phy_reset(&adapter->hw);
2411 atl1c_reset_mac(&adapter->hw);
2412 atl1c_phy_init(&adapter->hw);
2413
2414 #if 0
2415 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2416 pm_data &= ~PM_CTRLSTAT_PME_EN;
2417 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2418 #endif
2419
2420 netif_device_attach(netdev);
2421 if (netif_running(netdev))
2422 atl1c_up(adapter);
2423
2424 return 0;
2425 }
2426 #endif
2427
2428 static void atl1c_shutdown(struct pci_dev *pdev)
2429 {
2430 struct net_device *netdev = pci_get_drvdata(pdev);
2431 struct atl1c_adapter *adapter = netdev_priv(netdev);
2432
2433 atl1c_suspend(&pdev->dev);
2434 pci_wake_from_d3(pdev, adapter->wol);
2435 pci_set_power_state(pdev, PCI_D3hot);
2436 }
2437
2438 static const struct net_device_ops atl1c_netdev_ops = {
2439 .ndo_open = atl1c_open,
2440 .ndo_stop = atl1c_close,
2441 .ndo_validate_addr = eth_validate_addr,
2442 .ndo_start_xmit = atl1c_xmit_frame,
2443 .ndo_set_mac_address = atl1c_set_mac_addr,
2444 .ndo_set_rx_mode = atl1c_set_multi,
2445 .ndo_change_mtu = atl1c_change_mtu,
2446 .ndo_fix_features = atl1c_fix_features,
2447 .ndo_set_features = atl1c_set_features,
2448 .ndo_do_ioctl = atl1c_ioctl,
2449 .ndo_tx_timeout = atl1c_tx_timeout,
2450 .ndo_get_stats = atl1c_get_stats,
2451 #ifdef CONFIG_NET_POLL_CONTROLLER
2452 .ndo_poll_controller = atl1c_netpoll,
2453 #endif
2454 };
2455
2456 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2457 {
2458 SET_NETDEV_DEV(netdev, &pdev->dev);
2459 pci_set_drvdata(pdev, netdev);
2460
2461 netdev->netdev_ops = &atl1c_netdev_ops;
2462 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2463 atl1c_set_ethtool_ops(netdev);
2464
2465 /* TODO: add when ready */
2466 netdev->hw_features = NETIF_F_SG |
2467 NETIF_F_HW_CSUM |
2468 NETIF_F_HW_VLAN_RX |
2469 NETIF_F_TSO |
2470 NETIF_F_TSO6;
2471 netdev->features = netdev->hw_features |
2472 NETIF_F_HW_VLAN_TX;
2473 return 0;
2474 }
2475
2476 /*
2477 * atl1c_probe - Device Initialization Routine
2478 * @pdev: PCI device information struct
2479 * @ent: entry in atl1c_pci_tbl
2480 *
2481 * Returns 0 on success, negative on failure
2482 *
2483 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2484 * The OS initialization, configuring of the adapter private structure,
2485 * and a hardware reset occur.
2486 */
2487 static int __devinit atl1c_probe(struct pci_dev *pdev,
2488 const struct pci_device_id *ent)
2489 {
2490 struct net_device *netdev;
2491 struct atl1c_adapter *adapter;
2492 static int cards_found;
2493
2494 int err = 0;
2495
2496 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2497 err = pci_enable_device_mem(pdev);
2498 if (err) {
2499 dev_err(&pdev->dev, "cannot enable PCI device\n");
2500 return err;
2501 }
2502
2503 /*
2504 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2505 * shared register for the high 32 bits, so only a single, aligned,
2506 * 4 GB physical address range can be used at a time.
2507 *
2508 * Supporting 64-bit DMA on this hardware is more trouble than it's
2509 * worth. It is far easier to limit to 32-bit DMA than update
2510 * various kernel subsystems to support the mechanics required by a
2511 * fixed-high-32-bit system.
2512 */
2513 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2514 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2515 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2516 goto err_dma;
2517 }
2518
2519 err = pci_request_regions(pdev, atl1c_driver_name);
2520 if (err) {
2521 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2522 goto err_pci_reg;
2523 }
2524
2525 pci_set_master(pdev);
2526
2527 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2528 if (netdev == NULL) {
2529 err = -ENOMEM;
2530 goto err_alloc_etherdev;
2531 }
2532
2533 err = atl1c_init_netdev(netdev, pdev);
2534 if (err) {
2535 dev_err(&pdev->dev, "init netdevice failed\n");
2536 goto err_init_netdev;
2537 }
2538 adapter = netdev_priv(netdev);
2539 adapter->bd_number = cards_found;
2540 adapter->netdev = netdev;
2541 adapter->pdev = pdev;
2542 adapter->hw.adapter = adapter;
2543 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2544 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2545 if (!adapter->hw.hw_addr) {
2546 err = -EIO;
2547 dev_err(&pdev->dev, "cannot map device registers\n");
2548 goto err_ioremap;
2549 }
2550
2551 /* init mii data */
2552 adapter->mii.dev = netdev;
2553 adapter->mii.mdio_read = atl1c_mdio_read;
2554 adapter->mii.mdio_write = atl1c_mdio_write;
2555 adapter->mii.phy_id_mask = 0x1f;
2556 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2557 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2558 setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
2559 (unsigned long)adapter);
2560 /* setup the private structure */
2561 err = atl1c_sw_init(adapter);
2562 if (err) {
2563 dev_err(&pdev->dev, "net device private data init failed\n");
2564 goto err_sw_init;
2565 }
2566 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
2567 ATL1C_PCIE_PHY_RESET);
2568
2569 /* Init GPHY as early as possible due to power saving issue */
2570 atl1c_phy_reset(&adapter->hw);
2571
2572 err = atl1c_reset_mac(&adapter->hw);
2573 if (err) {
2574 err = -EIO;
2575 goto err_reset;
2576 }
2577
2578 /* reset the controller to
2579 * put the device in a known good starting state */
2580 err = atl1c_phy_init(&adapter->hw);
2581 if (err) {
2582 err = -EIO;
2583 goto err_reset;
2584 }
2585 if (atl1c_read_mac_addr(&adapter->hw)) {
2586 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2587 netdev->addr_assign_type |= NET_ADDR_RANDOM;
2588 }
2589 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2590 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2591 if (netif_msg_probe(adapter))
2592 dev_dbg(&pdev->dev, "mac address : %pM\n",
2593 adapter->hw.mac_addr);
2594
2595 atl1c_hw_set_mac_addr(&adapter->hw);
2596 INIT_WORK(&adapter->common_task, atl1c_common_task);
2597 adapter->work_event = 0;
2598 err = register_netdev(netdev);
2599 if (err) {
2600 dev_err(&pdev->dev, "register netdevice failed\n");
2601 goto err_register;
2602 }
2603
2604 if (netif_msg_probe(adapter))
2605 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2606 cards_found++;
2607 return 0;
2608
2609 err_reset:
2610 err_register:
2611 err_sw_init:
2612 iounmap(adapter->hw.hw_addr);
2613 err_init_netdev:
2614 err_ioremap:
2615 free_netdev(netdev);
2616 err_alloc_etherdev:
2617 pci_release_regions(pdev);
2618 err_pci_reg:
2619 err_dma:
2620 pci_disable_device(pdev);
2621 return err;
2622 }
2623
2624 /*
2625 * atl1c_remove - Device Removal Routine
2626 * @pdev: PCI device information struct
2627 *
2628 * atl1c_remove is called by the PCI subsystem to alert the driver
2629 * that it should release a PCI device. The could be caused by a
2630 * Hot-Plug event, or because the driver is going to be removed from
2631 * memory.
2632 */
2633 static void __devexit atl1c_remove(struct pci_dev *pdev)
2634 {
2635 struct net_device *netdev = pci_get_drvdata(pdev);
2636 struct atl1c_adapter *adapter = netdev_priv(netdev);
2637
2638 unregister_netdev(netdev);
2639 atl1c_phy_disable(&adapter->hw);
2640
2641 iounmap(adapter->hw.hw_addr);
2642
2643 pci_release_regions(pdev);
2644 pci_disable_device(pdev);
2645 free_netdev(netdev);
2646 }
2647
2648 /*
2649 * atl1c_io_error_detected - called when PCI error is detected
2650 * @pdev: Pointer to PCI device
2651 * @state: The current pci connection state
2652 *
2653 * This function is called after a PCI bus error affecting
2654 * this device has been detected.
2655 */
2656 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2657 pci_channel_state_t state)
2658 {
2659 struct net_device *netdev = pci_get_drvdata(pdev);
2660 struct atl1c_adapter *adapter = netdev_priv(netdev);
2661
2662 netif_device_detach(netdev);
2663
2664 if (state == pci_channel_io_perm_failure)
2665 return PCI_ERS_RESULT_DISCONNECT;
2666
2667 if (netif_running(netdev))
2668 atl1c_down(adapter);
2669
2670 pci_disable_device(pdev);
2671
2672 /* Request a slot slot reset. */
2673 return PCI_ERS_RESULT_NEED_RESET;
2674 }
2675
2676 /*
2677 * atl1c_io_slot_reset - called after the pci bus has been reset.
2678 * @pdev: Pointer to PCI device
2679 *
2680 * Restart the card from scratch, as if from a cold-boot. Implementation
2681 * resembles the first-half of the e1000_resume routine.
2682 */
2683 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2684 {
2685 struct net_device *netdev = pci_get_drvdata(pdev);
2686 struct atl1c_adapter *adapter = netdev_priv(netdev);
2687
2688 if (pci_enable_device(pdev)) {
2689 if (netif_msg_hw(adapter))
2690 dev_err(&pdev->dev,
2691 "Cannot re-enable PCI device after reset\n");
2692 return PCI_ERS_RESULT_DISCONNECT;
2693 }
2694 pci_set_master(pdev);
2695
2696 pci_enable_wake(pdev, PCI_D3hot, 0);
2697 pci_enable_wake(pdev, PCI_D3cold, 0);
2698
2699 atl1c_reset_mac(&adapter->hw);
2700
2701 return PCI_ERS_RESULT_RECOVERED;
2702 }
2703
2704 /*
2705 * atl1c_io_resume - called when traffic can start flowing again.
2706 * @pdev: Pointer to PCI device
2707 *
2708 * This callback is called when the error recovery driver tells us that
2709 * its OK to resume normal operation. Implementation resembles the
2710 * second-half of the atl1c_resume routine.
2711 */
2712 static void atl1c_io_resume(struct pci_dev *pdev)
2713 {
2714 struct net_device *netdev = pci_get_drvdata(pdev);
2715 struct atl1c_adapter *adapter = netdev_priv(netdev);
2716
2717 if (netif_running(netdev)) {
2718 if (atl1c_up(adapter)) {
2719 if (netif_msg_hw(adapter))
2720 dev_err(&pdev->dev,
2721 "Cannot bring device back up after reset\n");
2722 return;
2723 }
2724 }
2725
2726 netif_device_attach(netdev);
2727 }
2728
2729 static struct pci_error_handlers atl1c_err_handler = {
2730 .error_detected = atl1c_io_error_detected,
2731 .slot_reset = atl1c_io_slot_reset,
2732 .resume = atl1c_io_resume,
2733 };
2734
2735 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2736
2737 static struct pci_driver atl1c_driver = {
2738 .name = atl1c_driver_name,
2739 .id_table = atl1c_pci_tbl,
2740 .probe = atl1c_probe,
2741 .remove = __devexit_p(atl1c_remove),
2742 .shutdown = atl1c_shutdown,
2743 .err_handler = &atl1c_err_handler,
2744 .driver.pm = &atl1c_pm_ops,
2745 };
2746
2747 /*
2748 * atl1c_init_module - Driver Registration Routine
2749 *
2750 * atl1c_init_module is the first routine called when the driver is
2751 * loaded. All it does is register with the PCI subsystem.
2752 */
2753 static int __init atl1c_init_module(void)
2754 {
2755 return pci_register_driver(&atl1c_driver);
2756 }
2757
2758 /*
2759 * atl1c_exit_module - Driver Exit Cleanup Routine
2760 *
2761 * atl1c_exit_module is called just before the driver is removed
2762 * from memory.
2763 */
2764 static void __exit atl1c_exit_module(void)
2765 {
2766 pci_unregister_driver(&atl1c_driver);
2767 }
2768
2769 module_init(atl1c_init_module);
2770 module_exit(atl1c_exit_module);
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