2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/export.h>
32 #include <linux/kallsyms.h>
33 #include <linux/mqueue.h>
34 #include <linux/hardirq.h>
35 #include <linux/utsname.h>
36 #include <linux/ftrace.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/personality.h>
39 #include <linux/random.h>
40 #include <linux/hw_breakpoint.h>
42 #include <asm/pgtable.h>
43 #include <asm/uaccess.h>
45 #include <asm/processor.h>
48 #include <asm/machdep.h>
50 #include <asm/runlatch.h>
51 #include <asm/syscalls.h>
52 #include <asm/switch_to.h>
54 #include <asm/debug.h>
56 #include <asm/firmware.h>
58 #include <linux/kprobes.h>
59 #include <linux/kdebug.h>
61 /* Transactional Memory debug */
63 #define TM_DEBUG(x...) printk(KERN_INFO x)
65 #define TM_DEBUG(x...) do { } while(0)
68 extern unsigned long _get_SP(void);
71 struct task_struct
*last_task_used_math
= NULL
;
72 struct task_struct
*last_task_used_altivec
= NULL
;
73 struct task_struct
*last_task_used_vsx
= NULL
;
74 struct task_struct
*last_task_used_spe
= NULL
;
79 * Make sure the floating-point register state in the
80 * the thread_struct is up to date for task tsk.
82 void flush_fp_to_thread(struct task_struct
*tsk
)
84 if (tsk
->thread
.regs
) {
86 * We need to disable preemption here because if we didn't,
87 * another process could get scheduled after the regs->msr
88 * test but before we have finished saving the FP registers
89 * to the thread_struct. That process could take over the
90 * FPU, and then when we get scheduled again we would store
91 * bogus values for the remaining FP registers.
94 if (tsk
->thread
.regs
->msr
& MSR_FP
) {
97 * This should only ever be called for current or
98 * for a stopped child process. Since we save away
99 * the FP register state on context switch on SMP,
100 * there is something wrong if a stopped child appears
101 * to still have its FP state in the CPU registers.
103 BUG_ON(tsk
!= current
);
110 EXPORT_SYMBOL_GPL(flush_fp_to_thread
);
113 void enable_kernel_fp(void)
115 WARN_ON(preemptible());
118 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_FP
))
121 giveup_fpu(NULL
); /* just enables FP for kernel */
123 giveup_fpu(last_task_used_math
);
124 #endif /* CONFIG_SMP */
126 EXPORT_SYMBOL(enable_kernel_fp
);
128 #ifdef CONFIG_ALTIVEC
129 void enable_kernel_altivec(void)
131 WARN_ON(preemptible());
134 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_VEC
))
135 giveup_altivec(current
);
137 giveup_altivec_notask();
139 giveup_altivec(last_task_used_altivec
);
140 #endif /* CONFIG_SMP */
142 EXPORT_SYMBOL(enable_kernel_altivec
);
145 * Make sure the VMX/Altivec register state in the
146 * the thread_struct is up to date for task tsk.
148 void flush_altivec_to_thread(struct task_struct
*tsk
)
150 if (tsk
->thread
.regs
) {
152 if (tsk
->thread
.regs
->msr
& MSR_VEC
) {
154 BUG_ON(tsk
!= current
);
161 EXPORT_SYMBOL_GPL(flush_altivec_to_thread
);
162 #endif /* CONFIG_ALTIVEC */
166 /* not currently used, but some crazy RAID module might want to later */
167 void enable_kernel_vsx(void)
169 WARN_ON(preemptible());
172 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_VSX
))
175 giveup_vsx(NULL
); /* just enable vsx for kernel - force */
177 giveup_vsx(last_task_used_vsx
);
178 #endif /* CONFIG_SMP */
180 EXPORT_SYMBOL(enable_kernel_vsx
);
183 void giveup_vsx(struct task_struct
*tsk
)
190 void flush_vsx_to_thread(struct task_struct
*tsk
)
192 if (tsk
->thread
.regs
) {
194 if (tsk
->thread
.regs
->msr
& MSR_VSX
) {
196 BUG_ON(tsk
!= current
);
203 EXPORT_SYMBOL_GPL(flush_vsx_to_thread
);
204 #endif /* CONFIG_VSX */
208 void enable_kernel_spe(void)
210 WARN_ON(preemptible());
213 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_SPE
))
216 giveup_spe(NULL
); /* just enable SPE for kernel - force */
218 giveup_spe(last_task_used_spe
);
219 #endif /* __SMP __ */
221 EXPORT_SYMBOL(enable_kernel_spe
);
223 void flush_spe_to_thread(struct task_struct
*tsk
)
225 if (tsk
->thread
.regs
) {
227 if (tsk
->thread
.regs
->msr
& MSR_SPE
) {
229 BUG_ON(tsk
!= current
);
231 tsk
->thread
.spefscr
= mfspr(SPRN_SPEFSCR
);
237 #endif /* CONFIG_SPE */
241 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
242 * and the current task has some state, discard it.
244 void discard_lazy_cpu_state(void)
247 if (last_task_used_math
== current
)
248 last_task_used_math
= NULL
;
249 #ifdef CONFIG_ALTIVEC
250 if (last_task_used_altivec
== current
)
251 last_task_used_altivec
= NULL
;
252 #endif /* CONFIG_ALTIVEC */
254 if (last_task_used_vsx
== current
)
255 last_task_used_vsx
= NULL
;
256 #endif /* CONFIG_VSX */
258 if (last_task_used_spe
== current
)
259 last_task_used_spe
= NULL
;
263 #endif /* CONFIG_SMP */
265 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
266 void do_send_trap(struct pt_regs
*regs
, unsigned long address
,
267 unsigned long error_code
, int signal_code
, int breakpt
)
271 current
->thread
.trap_nr
= signal_code
;
272 if (notify_die(DIE_DABR_MATCH
, "dabr_match", regs
, error_code
,
273 11, SIGSEGV
) == NOTIFY_STOP
)
276 /* Deliver the signal to userspace */
277 info
.si_signo
= SIGTRAP
;
278 info
.si_errno
= breakpt
; /* breakpoint or watchpoint id */
279 info
.si_code
= signal_code
;
280 info
.si_addr
= (void __user
*)address
;
281 force_sig_info(SIGTRAP
, &info
, current
);
283 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
284 void do_break (struct pt_regs
*regs
, unsigned long address
,
285 unsigned long error_code
)
289 current
->thread
.trap_nr
= TRAP_HWBKPT
;
290 if (notify_die(DIE_DABR_MATCH
, "dabr_match", regs
, error_code
,
291 11, SIGSEGV
) == NOTIFY_STOP
)
294 if (debugger_break_match(regs
))
297 /* Clear the breakpoint */
298 hw_breakpoint_disable();
300 /* Deliver the signal to userspace */
301 info
.si_signo
= SIGTRAP
;
303 info
.si_code
= TRAP_HWBKPT
;
304 info
.si_addr
= (void __user
*)address
;
305 force_sig_info(SIGTRAP
, &info
, current
);
307 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
309 static DEFINE_PER_CPU(struct arch_hw_breakpoint
, current_brk
);
311 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
313 * Set the debug registers back to their default "safe" values.
315 static void set_debug_reg_defaults(struct thread_struct
*thread
)
317 thread
->debug
.iac1
= thread
->debug
.iac2
= 0;
318 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
319 thread
->debug
.iac3
= thread
->debug
.iac4
= 0;
321 thread
->debug
.dac1
= thread
->debug
.dac2
= 0;
322 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
323 thread
->debug
.dvc1
= thread
->debug
.dvc2
= 0;
325 thread
->debug
.dbcr0
= 0;
328 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
330 thread
->debug
.dbcr1
= DBCR1_IAC1US
| DBCR1_IAC2US
|
331 DBCR1_IAC3US
| DBCR1_IAC4US
;
333 * Force Data Address Compare User/Supervisor bits to be User-only
334 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
336 thread
->debug
.dbcr2
= DBCR2_DAC1US
| DBCR2_DAC2US
;
338 thread
->debug
.dbcr1
= 0;
342 static void prime_debug_regs(struct thread_struct
*thread
)
345 * We could have inherited MSR_DE from userspace, since
346 * it doesn't get cleared on exception entry. Make sure
347 * MSR_DE is clear before we enable any debug events.
349 mtmsr(mfmsr() & ~MSR_DE
);
351 mtspr(SPRN_IAC1
, thread
->debug
.iac1
);
352 mtspr(SPRN_IAC2
, thread
->debug
.iac2
);
353 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
354 mtspr(SPRN_IAC3
, thread
->debug
.iac3
);
355 mtspr(SPRN_IAC4
, thread
->debug
.iac4
);
357 mtspr(SPRN_DAC1
, thread
->debug
.dac1
);
358 mtspr(SPRN_DAC2
, thread
->debug
.dac2
);
359 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
360 mtspr(SPRN_DVC1
, thread
->debug
.dvc1
);
361 mtspr(SPRN_DVC2
, thread
->debug
.dvc2
);
363 mtspr(SPRN_DBCR0
, thread
->debug
.dbcr0
);
364 mtspr(SPRN_DBCR1
, thread
->debug
.dbcr1
);
366 mtspr(SPRN_DBCR2
, thread
->debug
.dbcr2
);
370 * Unless neither the old or new thread are making use of the
371 * debug registers, set the debug registers from the values
372 * stored in the new thread.
374 void switch_booke_debug_regs(struct thread_struct
*new_thread
)
376 if ((current
->thread
.debug
.dbcr0
& DBCR0_IDM
)
377 || (new_thread
->debug
.dbcr0
& DBCR0_IDM
))
378 prime_debug_regs(new_thread
);
380 EXPORT_SYMBOL_GPL(switch_booke_debug_regs
);
381 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
382 #ifndef CONFIG_HAVE_HW_BREAKPOINT
383 static void set_debug_reg_defaults(struct thread_struct
*thread
)
385 thread
->hw_brk
.address
= 0;
386 thread
->hw_brk
.type
= 0;
387 set_breakpoint(&thread
->hw_brk
);
389 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
390 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
392 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
393 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
395 mtspr(SPRN_DAC1
, dabr
);
396 #ifdef CONFIG_PPC_47x
401 #elif defined(CONFIG_PPC_BOOK3S)
402 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
404 mtspr(SPRN_DABR
, dabr
);
405 if (cpu_has_feature(CPU_FTR_DABRX
))
406 mtspr(SPRN_DABRX
, dabrx
);
410 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
416 static inline int set_dabr(struct arch_hw_breakpoint
*brk
)
418 unsigned long dabr
, dabrx
;
420 dabr
= brk
->address
| (brk
->type
& HW_BRK_TYPE_DABR
);
421 dabrx
= ((brk
->type
>> 3) & 0x7);
424 return ppc_md
.set_dabr(dabr
, dabrx
);
426 return __set_dabr(dabr
, dabrx
);
429 static inline int set_dawr(struct arch_hw_breakpoint
*brk
)
431 unsigned long dawr
, dawrx
, mrd
;
435 dawrx
= (brk
->type
& (HW_BRK_TYPE_READ
| HW_BRK_TYPE_WRITE
)) \
436 << (63 - 58); //* read/write bits */
437 dawrx
|= ((brk
->type
& (HW_BRK_TYPE_TRANSLATE
)) >> 2) \
438 << (63 - 59); //* translate */
439 dawrx
|= (brk
->type
& (HW_BRK_TYPE_PRIV_ALL
)) \
440 >> 3; //* PRIM bits */
441 /* dawr length is stored in field MDR bits 48:53. Matches range in
442 doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
444 brk->len is in bytes.
445 This aligns up to double word size, shifts and does the bias.
447 mrd
= ((brk
->len
+ 7) >> 3) - 1;
448 dawrx
|= (mrd
& 0x3f) << (63 - 53);
451 return ppc_md
.set_dawr(dawr
, dawrx
);
452 mtspr(SPRN_DAWR
, dawr
);
453 mtspr(SPRN_DAWRX
, dawrx
);
457 int set_breakpoint(struct arch_hw_breakpoint
*brk
)
459 __get_cpu_var(current_brk
) = *brk
;
461 if (cpu_has_feature(CPU_FTR_DAWR
))
462 return set_dawr(brk
);
464 return set_dabr(brk
);
468 DEFINE_PER_CPU(struct cpu_usage
, cpu_usage_array
);
471 static inline bool hw_brk_match(struct arch_hw_breakpoint
*a
,
472 struct arch_hw_breakpoint
*b
)
474 if (a
->address
!= b
->address
)
476 if (a
->type
!= b
->type
)
478 if (a
->len
!= b
->len
)
482 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
483 static inline void tm_reclaim_task(struct task_struct
*tsk
)
485 /* We have to work out if we're switching from/to a task that's in the
486 * middle of a transaction.
488 * In switching we need to maintain a 2nd register state as
489 * oldtask->thread.ckpt_regs. We tm_reclaim(oldproc); this saves the
490 * checkpointed (tbegin) state in ckpt_regs and saves the transactional
491 * (current) FPRs into oldtask->thread.transact_fpr[].
493 * We also context switch (save) TFHAR/TEXASR/TFIAR in here.
495 struct thread_struct
*thr
= &tsk
->thread
;
500 if (!MSR_TM_ACTIVE(thr
->regs
->msr
))
501 goto out_and_saveregs
;
503 /* Stash the original thread MSR, as giveup_fpu et al will
504 * modify it. We hold onto it to see whether the task used
507 thr
->tm_orig_msr
= thr
->regs
->msr
;
509 TM_DEBUG("--- tm_reclaim on pid %d (NIP=%lx, "
510 "ccr=%lx, msr=%lx, trap=%lx)\n",
511 tsk
->pid
, thr
->regs
->nip
,
512 thr
->regs
->ccr
, thr
->regs
->msr
,
515 tm_reclaim(thr
, thr
->regs
->msr
, TM_CAUSE_RESCHED
);
517 TM_DEBUG("--- tm_reclaim on pid %d complete\n",
521 /* Always save the regs here, even if a transaction's not active.
522 * This context-switches a thread's TM info SPRs. We do it here to
523 * be consistent with the restore path (in recheckpoint) which
524 * cannot happen later in _switch().
529 static inline void tm_recheckpoint_new_task(struct task_struct
*new)
533 if (!cpu_has_feature(CPU_FTR_TM
))
536 /* Recheckpoint the registers of the thread we're about to switch to.
538 * If the task was using FP, we non-lazily reload both the original and
539 * the speculative FP register states. This is because the kernel
540 * doesn't see if/when a TM rollback occurs, so if we take an FP
541 * unavoidable later, we are unable to determine which set of FP regs
542 * need to be restored.
544 if (!new->thread
.regs
)
547 /* The TM SPRs are restored here, so that TEXASR.FS can be set
548 * before the trecheckpoint and no explosion occurs.
550 tm_restore_sprs(&new->thread
);
552 if (!MSR_TM_ACTIVE(new->thread
.regs
->msr
))
554 msr
= new->thread
.tm_orig_msr
;
555 /* Recheckpoint to restore original checkpointed register state. */
556 TM_DEBUG("*** tm_recheckpoint of pid %d "
557 "(new->msr 0x%lx, new->origmsr 0x%lx)\n",
558 new->pid
, new->thread
.regs
->msr
, msr
);
560 /* This loads the checkpointed FP/VEC state, if used */
561 tm_recheckpoint(&new->thread
, msr
);
563 /* This loads the speculative FP/VEC state, if used */
565 do_load_up_transact_fpu(&new->thread
);
566 new->thread
.regs
->msr
|=
567 (MSR_FP
| new->thread
.fpexc_mode
);
569 #ifdef CONFIG_ALTIVEC
571 do_load_up_transact_altivec(&new->thread
);
572 new->thread
.regs
->msr
|= MSR_VEC
;
575 /* We may as well turn on VSX too since all the state is restored now */
577 new->thread
.regs
->msr
|= MSR_VSX
;
579 TM_DEBUG("*** tm_recheckpoint of pid %d complete "
580 "(kernel msr 0x%lx)\n",
584 static inline void __switch_to_tm(struct task_struct
*prev
)
586 if (cpu_has_feature(CPU_FTR_TM
)) {
588 tm_reclaim_task(prev
);
592 #define tm_recheckpoint_new_task(new)
593 #define __switch_to_tm(prev)
594 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
596 struct task_struct
*__switch_to(struct task_struct
*prev
,
597 struct task_struct
*new)
599 struct thread_struct
*new_thread
, *old_thread
;
601 struct task_struct
*last
;
602 #ifdef CONFIG_PPC_BOOK3S_64
603 struct ppc64_tlb_batch
*batch
;
606 /* Back up the TAR across context switches.
607 * Note that the TAR is not available for use in the kernel. (To
608 * provide this, the TAR should be backed up/restored on exception
609 * entry/exit instead, and be in pt_regs. FIXME, this should be in
610 * pt_regs anyway (for debug).)
611 * Save the TAR here before we do treclaim/trecheckpoint as these
612 * will change the TAR.
614 save_tar(&prev
->thread
);
616 __switch_to_tm(prev
);
619 /* avoid complexity of lazy save/restore of fpu
620 * by just saving it every time we switch out if
621 * this task used the fpu during the last quantum.
623 * If it tries to use the fpu again, it'll trap and
624 * reload its fp regs. So we don't have to do a restore
625 * every switch, just a save.
628 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_FP
))
630 #ifdef CONFIG_ALTIVEC
632 * If the previous thread used altivec in the last quantum
633 * (thus changing altivec regs) then save them.
634 * We used to check the VRSAVE register but not all apps
635 * set it, so we don't rely on it now (and in fact we need
636 * to save & restore VSCR even if VRSAVE == 0). -- paulus
638 * On SMP we always save/restore altivec regs just to avoid the
639 * complexity of changing processors.
642 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_VEC
))
643 giveup_altivec(prev
);
644 #endif /* CONFIG_ALTIVEC */
646 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_VSX
))
647 /* VMX and FPU registers are already save here */
649 #endif /* CONFIG_VSX */
652 * If the previous thread used spe in the last quantum
653 * (thus changing spe regs) then save them.
655 * On SMP we always save/restore spe regs just to avoid the
656 * complexity of changing processors.
658 if ((prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_SPE
)))
660 #endif /* CONFIG_SPE */
662 #else /* CONFIG_SMP */
663 #ifdef CONFIG_ALTIVEC
664 /* Avoid the trap. On smp this this never happens since
665 * we don't set last_task_used_altivec -- Cort
667 if (new->thread
.regs
&& last_task_used_altivec
== new)
668 new->thread
.regs
->msr
|= MSR_VEC
;
669 #endif /* CONFIG_ALTIVEC */
671 if (new->thread
.regs
&& last_task_used_vsx
== new)
672 new->thread
.regs
->msr
|= MSR_VSX
;
673 #endif /* CONFIG_VSX */
675 /* Avoid the trap. On smp this this never happens since
676 * we don't set last_task_used_spe
678 if (new->thread
.regs
&& last_task_used_spe
== new)
679 new->thread
.regs
->msr
|= MSR_SPE
;
680 #endif /* CONFIG_SPE */
682 #endif /* CONFIG_SMP */
684 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
685 switch_booke_debug_regs(&new->thread
);
688 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
691 #ifndef CONFIG_HAVE_HW_BREAKPOINT
692 if (unlikely(hw_brk_match(&__get_cpu_var(current_brk
), &new->thread
.hw_brk
)))
693 set_breakpoint(&new->thread
.hw_brk
);
694 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
698 new_thread
= &new->thread
;
699 old_thread
= ¤t
->thread
;
703 * Collect processor utilization data per process
705 if (firmware_has_feature(FW_FEATURE_SPLPAR
)) {
706 struct cpu_usage
*cu
= &__get_cpu_var(cpu_usage_array
);
707 long unsigned start_tb
, current_tb
;
708 start_tb
= old_thread
->start_tb
;
709 cu
->current_tb
= current_tb
= mfspr(SPRN_PURR
);
710 old_thread
->accum_tb
+= (current_tb
- start_tb
);
711 new_thread
->start_tb
= current_tb
;
713 #endif /* CONFIG_PPC64 */
715 #ifdef CONFIG_PPC_BOOK3S_64
716 batch
= &__get_cpu_var(ppc64_tlb_batch
);
718 current_thread_info()->local_flags
|= _TLF_LAZY_MMU
;
720 __flush_tlb_pending(batch
);
723 #endif /* CONFIG_PPC_BOOK3S_64 */
725 local_irq_save(flags
);
728 * We can't take a PMU exception inside _switch() since there is a
729 * window where the kernel stack SLB and the kernel stack are out
730 * of sync. Hard disable here.
734 tm_recheckpoint_new_task(new);
736 last
= _switch(old_thread
, new_thread
);
738 #ifdef CONFIG_PPC_BOOK3S_64
739 if (current_thread_info()->local_flags
& _TLF_LAZY_MMU
) {
740 current_thread_info()->local_flags
&= ~_TLF_LAZY_MMU
;
741 batch
= &__get_cpu_var(ppc64_tlb_batch
);
744 #endif /* CONFIG_PPC_BOOK3S_64 */
746 local_irq_restore(flags
);
751 static int instructions_to_print
= 16;
753 static void show_instructions(struct pt_regs
*regs
)
756 unsigned long pc
= regs
->nip
- (instructions_to_print
* 3 / 4 *
759 printk("Instruction dump:");
761 for (i
= 0; i
< instructions_to_print
; i
++) {
767 #if !defined(CONFIG_BOOKE)
768 /* If executing with the IMMU off, adjust pc rather
769 * than print XXXXXXXX.
771 if (!(regs
->msr
& MSR_IR
))
772 pc
= (unsigned long)phys_to_virt(pc
);
775 /* We use __get_user here *only* to avoid an OOPS on a
776 * bad address because the pc *should* only be a
779 if (!__kernel_text_address(pc
) ||
780 __get_user(instr
, (unsigned int __user
*)pc
)) {
781 printk(KERN_CONT
"XXXXXXXX ");
784 printk(KERN_CONT
"<%08x> ", instr
);
786 printk(KERN_CONT
"%08x ", instr
);
795 static struct regbit
{
799 #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
828 static void printbits(unsigned long val
, struct regbit
*bits
)
830 const char *sep
= "";
833 for (; bits
->bit
; ++bits
)
834 if (val
& bits
->bit
) {
835 printk("%s%s", sep
, bits
->name
);
843 #define REGS_PER_LINE 4
844 #define LAST_VOLATILE 13
847 #define REGS_PER_LINE 8
848 #define LAST_VOLATILE 12
851 void show_regs(struct pt_regs
* regs
)
855 show_regs_print_info(KERN_DEFAULT
);
857 printk("NIP: "REG
" LR: "REG
" CTR: "REG
"\n",
858 regs
->nip
, regs
->link
, regs
->ctr
);
859 printk("REGS: %p TRAP: %04lx %s (%s)\n",
860 regs
, regs
->trap
, print_tainted(), init_utsname()->release
);
861 printk("MSR: "REG
" ", regs
->msr
);
862 printbits(regs
->msr
, msr_bits
);
863 printk(" CR: %08lx XER: %08lx\n", regs
->ccr
, regs
->xer
);
865 printk("SOFTE: %ld\n", regs
->softe
);
868 if ((regs
->trap
!= 0xc00) && cpu_has_feature(CPU_FTR_CFAR
))
869 printk("CFAR: "REG
"\n", regs
->orig_gpr3
);
870 if (trap
== 0x300 || trap
== 0x600)
871 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
872 printk("DEAR: "REG
", ESR: "REG
"\n", regs
->dar
, regs
->dsisr
);
874 printk("DAR: "REG
", DSISR: %08lx\n", regs
->dar
, regs
->dsisr
);
877 for (i
= 0; i
< 32; i
++) {
878 if ((i
% REGS_PER_LINE
) == 0)
879 printk("\nGPR%02d: ", i
);
880 printk(REG
" ", regs
->gpr
[i
]);
881 if (i
== LAST_VOLATILE
&& !FULL_REGS(regs
))
885 #ifdef CONFIG_KALLSYMS
887 * Lookup NIP late so we have the best change of getting the
888 * above info out without failing
890 printk("NIP ["REG
"] %pS\n", regs
->nip
, (void *)regs
->nip
);
891 printk("LR ["REG
"] %pS\n", regs
->link
, (void *)regs
->link
);
893 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
894 printk("PACATMSCRATCH [%llx]\n", get_paca()->tm_scratch
);
896 show_stack(current
, (unsigned long *) regs
->gpr
[1]);
897 if (!user_mode(regs
))
898 show_instructions(regs
);
901 void exit_thread(void)
903 discard_lazy_cpu_state();
906 void flush_thread(void)
908 discard_lazy_cpu_state();
910 #ifdef CONFIG_HAVE_HW_BREAKPOINT
911 flush_ptrace_hw_breakpoint(current
);
912 #else /* CONFIG_HAVE_HW_BREAKPOINT */
913 set_debug_reg_defaults(¤t
->thread
);
914 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
918 release_thread(struct task_struct
*t
)
923 * this gets called so that we can store coprocessor state into memory and
924 * copy the current task into the new thread.
926 int arch_dup_task_struct(struct task_struct
*dst
, struct task_struct
*src
)
928 flush_fp_to_thread(src
);
929 flush_altivec_to_thread(src
);
930 flush_vsx_to_thread(src
);
931 flush_spe_to_thread(src
);
943 extern unsigned long dscr_default
; /* defined in arch/powerpc/kernel/sysfs.c */
945 int copy_thread(unsigned long clone_flags
, unsigned long usp
,
946 unsigned long arg
, struct task_struct
*p
)
948 struct pt_regs
*childregs
, *kregs
;
949 extern void ret_from_fork(void);
950 extern void ret_from_kernel_thread(void);
952 unsigned long sp
= (unsigned long)task_stack_page(p
) + THREAD_SIZE
;
955 sp
-= sizeof(struct pt_regs
);
956 childregs
= (struct pt_regs
*) sp
;
957 if (unlikely(p
->flags
& PF_KTHREAD
)) {
958 struct thread_info
*ti
= (void *)task_stack_page(p
);
959 memset(childregs
, 0, sizeof(struct pt_regs
));
960 childregs
->gpr
[1] = sp
+ sizeof(struct pt_regs
);
961 childregs
->gpr
[14] = usp
; /* function */
963 clear_tsk_thread_flag(p
, TIF_32BIT
);
964 childregs
->softe
= 1;
966 childregs
->gpr
[15] = arg
;
967 p
->thread
.regs
= NULL
; /* no user register state */
968 ti
->flags
|= _TIF_RESTOREALL
;
969 f
= ret_from_kernel_thread
;
971 struct pt_regs
*regs
= current_pt_regs();
972 CHECK_FULL_REGS(regs
);
975 childregs
->gpr
[1] = usp
;
976 p
->thread
.regs
= childregs
;
977 childregs
->gpr
[3] = 0; /* Result from fork() */
978 if (clone_flags
& CLONE_SETTLS
) {
980 if (!is_32bit_task())
981 childregs
->gpr
[13] = childregs
->gpr
[6];
984 childregs
->gpr
[2] = childregs
->gpr
[6];
989 sp
-= STACK_FRAME_OVERHEAD
;
992 * The way this works is that at some point in the future
993 * some task will call _switch to switch to the new task.
994 * That will pop off the stack frame created below and start
995 * the new task running at ret_from_fork. The new task will
996 * do some house keeping and then return from the fork or clone
997 * system call, using the stack frame created above.
999 ((unsigned long *)sp
)[0] = 0;
1000 sp
-= sizeof(struct pt_regs
);
1001 kregs
= (struct pt_regs
*) sp
;
1002 sp
-= STACK_FRAME_OVERHEAD
;
1005 p
->thread
.ksp_limit
= (unsigned long)task_stack_page(p
) +
1006 _ALIGN_UP(sizeof(struct thread_info
), 16);
1008 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1009 p
->thread
.ptrace_bps
[0] = NULL
;
1012 p
->thread
.fp_save_area
= NULL
;
1013 #ifdef CONFIG_ALTIVEC
1014 p
->thread
.vr_save_area
= NULL
;
1017 #ifdef CONFIG_PPC_STD_MMU_64
1018 if (mmu_has_feature(MMU_FTR_SLB
)) {
1019 unsigned long sp_vsid
;
1020 unsigned long llp
= mmu_psize_defs
[mmu_linear_psize
].sllp
;
1022 if (mmu_has_feature(MMU_FTR_1T_SEGMENT
))
1023 sp_vsid
= get_kernel_vsid(sp
, MMU_SEGSIZE_1T
)
1024 << SLB_VSID_SHIFT_1T
;
1026 sp_vsid
= get_kernel_vsid(sp
, MMU_SEGSIZE_256M
)
1028 sp_vsid
|= SLB_VSID_KERNEL
| llp
;
1029 p
->thread
.ksp_vsid
= sp_vsid
;
1031 #endif /* CONFIG_PPC_STD_MMU_64 */
1033 if (cpu_has_feature(CPU_FTR_DSCR
)) {
1034 p
->thread
.dscr_inherit
= current
->thread
.dscr_inherit
;
1035 p
->thread
.dscr
= current
->thread
.dscr
;
1037 if (cpu_has_feature(CPU_FTR_HAS_PPR
))
1038 p
->thread
.ppr
= INIT_PPR
;
1041 * The PPC64 ABI makes use of a TOC to contain function
1042 * pointers. The function (ret_from_except) is actually a pointer
1043 * to the TOC entry. The first entry is a pointer to the actual
1047 kregs
->nip
= *((unsigned long *)f
);
1049 kregs
->nip
= (unsigned long)f
;
1055 * Set up a thread for executing a new program
1057 void start_thread(struct pt_regs
*regs
, unsigned long start
, unsigned long sp
)
1060 unsigned long load_addr
= regs
->gpr
[2]; /* saved by ELF_PLAT_INIT */
1064 * If we exec out of a kernel thread then thread.regs will not be
1067 if (!current
->thread
.regs
) {
1068 struct pt_regs
*regs
= task_stack_page(current
) + THREAD_SIZE
;
1069 current
->thread
.regs
= regs
- 1;
1072 memset(regs
->gpr
, 0, sizeof(regs
->gpr
));
1080 * We have just cleared all the nonvolatile GPRs, so make
1081 * FULL_REGS(regs) return true. This is necessary to allow
1082 * ptrace to examine the thread immediately after exec.
1089 regs
->msr
= MSR_USER
;
1091 if (!is_32bit_task()) {
1092 unsigned long entry
, toc
;
1094 /* start is a relocated pointer to the function descriptor for
1095 * the elf _start routine. The first entry in the function
1096 * descriptor is the entry address of _start and the second
1097 * entry is the TOC value we need to use.
1099 __get_user(entry
, (unsigned long __user
*)start
);
1100 __get_user(toc
, (unsigned long __user
*)start
+1);
1102 /* Check whether the e_entry function descriptor entries
1103 * need to be relocated before we can use them.
1105 if (load_addr
!= 0) {
1111 regs
->msr
= MSR_USER64
;
1115 regs
->msr
= MSR_USER32
;
1118 discard_lazy_cpu_state();
1120 current
->thread
.used_vsr
= 0;
1122 memset(¤t
->thread
.fp_state
, 0, sizeof(current
->thread
.fp_state
));
1123 current
->thread
.fp_save_area
= NULL
;
1124 #ifdef CONFIG_ALTIVEC
1125 memset(¤t
->thread
.vr_state
, 0, sizeof(current
->thread
.vr_state
));
1126 current
->thread
.vr_state
.vscr
.u
[3] = 0x00010000; /* Java mode disabled */
1127 current
->thread
.vr_save_area
= NULL
;
1128 current
->thread
.vrsave
= 0;
1129 current
->thread
.used_vr
= 0;
1130 #endif /* CONFIG_ALTIVEC */
1132 memset(current
->thread
.evr
, 0, sizeof(current
->thread
.evr
));
1133 current
->thread
.acc
= 0;
1134 current
->thread
.spefscr
= 0;
1135 current
->thread
.used_spe
= 0;
1136 #endif /* CONFIG_SPE */
1137 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1138 if (cpu_has_feature(CPU_FTR_TM
))
1139 regs
->msr
|= MSR_TM
;
1140 current
->thread
.tm_tfhar
= 0;
1141 current
->thread
.tm_texasr
= 0;
1142 current
->thread
.tm_tfiar
= 0;
1143 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
1146 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
1147 | PR_FP_EXC_RES | PR_FP_EXC_INV)
1149 int set_fpexc_mode(struct task_struct
*tsk
, unsigned int val
)
1151 struct pt_regs
*regs
= tsk
->thread
.regs
;
1153 /* This is a bit hairy. If we are an SPE enabled processor
1154 * (have embedded fp) we store the IEEE exception enable flags in
1155 * fpexc_mode. fpexc_mode is also used for setting FP exception
1156 * mode (asyn, precise, disabled) for 'Classic' FP. */
1157 if (val
& PR_FP_EXC_SW_ENABLE
) {
1159 if (cpu_has_feature(CPU_FTR_SPE
)) {
1160 tsk
->thread
.fpexc_mode
= val
&
1161 (PR_FP_EXC_SW_ENABLE
| PR_FP_ALL_EXCEPT
);
1171 /* on a CONFIG_SPE this does not hurt us. The bits that
1172 * __pack_fe01 use do not overlap with bits used for
1173 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
1174 * on CONFIG_SPE implementations are reserved so writing to
1175 * them does not change anything */
1176 if (val
> PR_FP_EXC_PRECISE
)
1178 tsk
->thread
.fpexc_mode
= __pack_fe01(val
);
1179 if (regs
!= NULL
&& (regs
->msr
& MSR_FP
) != 0)
1180 regs
->msr
= (regs
->msr
& ~(MSR_FE0
|MSR_FE1
))
1181 | tsk
->thread
.fpexc_mode
;
1185 int get_fpexc_mode(struct task_struct
*tsk
, unsigned long adr
)
1189 if (tsk
->thread
.fpexc_mode
& PR_FP_EXC_SW_ENABLE
)
1191 if (cpu_has_feature(CPU_FTR_SPE
))
1192 val
= tsk
->thread
.fpexc_mode
;
1199 val
= __unpack_fe01(tsk
->thread
.fpexc_mode
);
1200 return put_user(val
, (unsigned int __user
*) adr
);
1203 int set_endian(struct task_struct
*tsk
, unsigned int val
)
1205 struct pt_regs
*regs
= tsk
->thread
.regs
;
1207 if ((val
== PR_ENDIAN_LITTLE
&& !cpu_has_feature(CPU_FTR_REAL_LE
)) ||
1208 (val
== PR_ENDIAN_PPC_LITTLE
&& !cpu_has_feature(CPU_FTR_PPC_LE
)))
1214 if (val
== PR_ENDIAN_BIG
)
1215 regs
->msr
&= ~MSR_LE
;
1216 else if (val
== PR_ENDIAN_LITTLE
|| val
== PR_ENDIAN_PPC_LITTLE
)
1217 regs
->msr
|= MSR_LE
;
1224 int get_endian(struct task_struct
*tsk
, unsigned long adr
)
1226 struct pt_regs
*regs
= tsk
->thread
.regs
;
1229 if (!cpu_has_feature(CPU_FTR_PPC_LE
) &&
1230 !cpu_has_feature(CPU_FTR_REAL_LE
))
1236 if (regs
->msr
& MSR_LE
) {
1237 if (cpu_has_feature(CPU_FTR_REAL_LE
))
1238 val
= PR_ENDIAN_LITTLE
;
1240 val
= PR_ENDIAN_PPC_LITTLE
;
1242 val
= PR_ENDIAN_BIG
;
1244 return put_user(val
, (unsigned int __user
*)adr
);
1247 int set_unalign_ctl(struct task_struct
*tsk
, unsigned int val
)
1249 tsk
->thread
.align_ctl
= val
;
1253 int get_unalign_ctl(struct task_struct
*tsk
, unsigned long adr
)
1255 return put_user(tsk
->thread
.align_ctl
, (unsigned int __user
*)adr
);
1258 static inline int valid_irq_stack(unsigned long sp
, struct task_struct
*p
,
1259 unsigned long nbytes
)
1261 unsigned long stack_page
;
1262 unsigned long cpu
= task_cpu(p
);
1265 * Avoid crashing if the stack has overflowed and corrupted
1266 * task_cpu(p), which is in the thread_info struct.
1268 if (cpu
< NR_CPUS
&& cpu_possible(cpu
)) {
1269 stack_page
= (unsigned long) hardirq_ctx
[cpu
];
1270 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1271 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1274 stack_page
= (unsigned long) softirq_ctx
[cpu
];
1275 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1276 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1282 int validate_sp(unsigned long sp
, struct task_struct
*p
,
1283 unsigned long nbytes
)
1285 unsigned long stack_page
= (unsigned long)task_stack_page(p
);
1287 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1288 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1291 return valid_irq_stack(sp
, p
, nbytes
);
1294 EXPORT_SYMBOL(validate_sp
);
1296 unsigned long get_wchan(struct task_struct
*p
)
1298 unsigned long ip
, sp
;
1301 if (!p
|| p
== current
|| p
->state
== TASK_RUNNING
)
1305 if (!validate_sp(sp
, p
, STACK_FRAME_OVERHEAD
))
1309 sp
= *(unsigned long *)sp
;
1310 if (!validate_sp(sp
, p
, STACK_FRAME_OVERHEAD
))
1313 ip
= ((unsigned long *)sp
)[STACK_FRAME_LR_SAVE
];
1314 if (!in_sched_functions(ip
))
1317 } while (count
++ < 16);
1321 static int kstack_depth_to_print
= CONFIG_PRINT_STACK_DEPTH
;
1323 void show_stack(struct task_struct
*tsk
, unsigned long *stack
)
1325 unsigned long sp
, ip
, lr
, newsp
;
1328 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1329 int curr_frame
= current
->curr_ret_stack
;
1330 extern void return_to_handler(void);
1331 unsigned long rth
= (unsigned long)return_to_handler
;
1332 unsigned long mrth
= -1;
1334 extern void mod_return_to_handler(void);
1335 rth
= *(unsigned long *)rth
;
1336 mrth
= (unsigned long)mod_return_to_handler
;
1337 mrth
= *(unsigned long *)mrth
;
1341 sp
= (unsigned long) stack
;
1346 asm("mr %0,1" : "=r" (sp
));
1348 sp
= tsk
->thread
.ksp
;
1352 printk("Call Trace:\n");
1354 if (!validate_sp(sp
, tsk
, STACK_FRAME_OVERHEAD
))
1357 stack
= (unsigned long *) sp
;
1359 ip
= stack
[STACK_FRAME_LR_SAVE
];
1360 if (!firstframe
|| ip
!= lr
) {
1361 printk("["REG
"] ["REG
"] %pS", sp
, ip
, (void *)ip
);
1362 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1363 if ((ip
== rth
|| ip
== mrth
) && curr_frame
>= 0) {
1365 (void *)current
->ret_stack
[curr_frame
].ret
);
1370 printk(" (unreliable)");
1376 * See if this is an exception frame.
1377 * We look for the "regshere" marker in the current frame.
1379 if (validate_sp(sp
, tsk
, STACK_INT_FRAME_SIZE
)
1380 && stack
[STACK_FRAME_MARKER
] == STACK_FRAME_REGS_MARKER
) {
1381 struct pt_regs
*regs
= (struct pt_regs
*)
1382 (sp
+ STACK_FRAME_OVERHEAD
);
1384 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1385 regs
->trap
, (void *)regs
->nip
, (void *)lr
);
1390 } while (count
++ < kstack_depth_to_print
);
1394 /* Called with hard IRQs off */
1395 void notrace
__ppc64_runlatch_on(void)
1397 struct thread_info
*ti
= current_thread_info();
1400 ctrl
= mfspr(SPRN_CTRLF
);
1401 ctrl
|= CTRL_RUNLATCH
;
1402 mtspr(SPRN_CTRLT
, ctrl
);
1404 ti
->local_flags
|= _TLF_RUNLATCH
;
1407 /* Called with hard IRQs off */
1408 void notrace
__ppc64_runlatch_off(void)
1410 struct thread_info
*ti
= current_thread_info();
1413 ti
->local_flags
&= ~_TLF_RUNLATCH
;
1415 ctrl
= mfspr(SPRN_CTRLF
);
1416 ctrl
&= ~CTRL_RUNLATCH
;
1417 mtspr(SPRN_CTRLT
, ctrl
);
1419 #endif /* CONFIG_PPC64 */
1421 unsigned long arch_align_stack(unsigned long sp
)
1423 if (!(current
->personality
& ADDR_NO_RANDOMIZE
) && randomize_va_space
)
1424 sp
-= get_random_int() & ~PAGE_MASK
;
1428 static inline unsigned long brk_rnd(void)
1430 unsigned long rnd
= 0;
1432 /* 8MB for 32bit, 1GB for 64bit */
1433 if (is_32bit_task())
1434 rnd
= (long)(get_random_int() % (1<<(23-PAGE_SHIFT
)));
1436 rnd
= (long)(get_random_int() % (1<<(30-PAGE_SHIFT
)));
1438 return rnd
<< PAGE_SHIFT
;
1441 unsigned long arch_randomize_brk(struct mm_struct
*mm
)
1443 unsigned long base
= mm
->brk
;
1446 #ifdef CONFIG_PPC_STD_MMU_64
1448 * If we are using 1TB segments and we are allowed to randomise
1449 * the heap, we can put it above 1TB so it is backed by a 1TB
1450 * segment. Otherwise the heap will be in the bottom 1TB
1451 * which always uses 256MB segments and this may result in a
1452 * performance penalty.
1454 if (!is_32bit_task() && (mmu_highuser_ssize
== MMU_SEGSIZE_1T
))
1455 base
= max_t(unsigned long, mm
->brk
, 1UL << SID_SHIFT_1T
);
1458 ret
= PAGE_ALIGN(base
+ brk_rnd());
1466 unsigned long randomize_et_dyn(unsigned long base
)
1468 unsigned long ret
= PAGE_ALIGN(base
+ brk_rnd());