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ASoC: blackfin: Switch bf5xx-ad1836 from bf5xx-tdm to bf5xx-i2s
[linux-2.6/btrfs-unstable.git] / arch / blackfin / mach-bf537 / boards / stamp.c
blobd978ca93fcf7798c72a2be70da0e3b1bf30c26fd
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/io.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/mtd/plat-ram.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/flash.h>
21 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
22 #include <linux/usb/isp1362.h>
23 #endif
24 #include <linux/i2c.h>
25 #include <linux/i2c/adp5588.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ata_platform.h>
28 #include <linux/irq.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb/sl811.h>
31 #include <linux/spi/mmc_spi.h>
32 #include <linux/leds.h>
33 #include <linux/input.h>
34 #include <asm/dma.h>
35 #include <asm/bfin5xx_spi.h>
36 #include <asm/reboot.h>
37 #include <asm/portmux.h>
38 #include <asm/dpmc.h>
39 #include <asm/bfin_sport.h>
40 #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
41 #include <linux/regulator/fixed.h>
42 #endif
43 #include <linux/regulator/machine.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/regulator/userspace-consumer.h>
46
47 /*
48 * Name the Board for the /proc/cpuinfo
49 */
50 const char bfin_board_name[] = "ADI BF537-STAMP";
51
52 /*
53 * Driver needs to know address, irq and flag pin.
54 */
55
56 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
57 #include <linux/usb/isp1760.h>
58 static struct resource bfin_isp1760_resources[] = {
59 [0] = {
60 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_PF7,
66 .end = IRQ_PF7,
67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
68 },
69 };
70
71 static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
73 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
78 };
79
80 static struct platform_device bfin_isp1760_device = {
81 .name = "isp1760",
82 .id = 0,
83 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
88 };
89 #endif
90
91 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
92 #include <linux/gpio_keys.h>
93
94 static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99 };
100
101 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104 };
105
106 static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111 };
112 #endif
113
114 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115 static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = 0x20311000, /* Attribute Memory */
122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
124 }, {
125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
128 }, {
129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133 };
134
135 static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140 };
141 #endif
142
143 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144 static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147 };
148 #endif
149
150 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
151 #include <linux/smc91x.h>
152
153 static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157 };
158
159 static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
165 }, {
166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171 };
172 static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
177 .dev = {
178 .platform_data = &smc91x_info,
179 },
180 };
181 #endif
182
183 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184 static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
187 .end = 0x203FB800 + 1,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200 };
201
202 static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207 };
208 #endif
209
210 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211 static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
216 }, {
217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
220 }, {
221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225 };
226
227 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228 void sl811_port_power(struct device *dev, int is_on)
229 {
230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
232 }
233 #endif
234
235 static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240 #endif
241 };
242
243 static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251 };
252 #endif
253
254 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255 static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
260 }, {
261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
264 }, {
265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
268 },
269 };
270
271 static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280 };
281
282 static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290 };
291 #endif
292
293 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294 static unsigned short bfin_can_peripherals[] = {
295 P_CAN0_RX, P_CAN0_TX, 0
296 };
297
298 static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319 };
320
321 static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328 };
329 #endif
330
331 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
332 #include <linux/bfin_mac.h>
333 static const unsigned short bfin_mac_peripherals[] = P_MII0;
334
335 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
336 {
337 .addr = 1,
338 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
339 },
340 };
341
342 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
343 .phydev_number = 1,
344 .phydev_data = bfin_phydev_data,
345 .phy_mode = PHY_INTERFACE_MODE_MII,
346 .mac_peripherals = bfin_mac_peripherals,
347 };
348
349 static struct platform_device bfin_mii_bus = {
350 .name = "bfin_mii_bus",
351 .dev = {
352 .platform_data = &bfin_mii_bus_data,
353 }
354 };
355
356 static struct platform_device bfin_mac_device = {
357 .name = "bfin_mac",
358 .dev = {
359 .platform_data = &bfin_mii_bus,
360 }
361 };
362 #endif
363
364 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
365 static struct resource net2272_bfin_resources[] = {
366 {
367 .start = 0x20300000,
368 .end = 0x20300000 + 0x100,
369 .flags = IORESOURCE_MEM,
370 }, {
371 .start = 1,
372 .flags = IORESOURCE_BUS,
373 }, {
374 .start = IRQ_PF7,
375 .end = IRQ_PF7,
376 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
377 },
378 };
379
380 static struct platform_device net2272_bfin_device = {
381 .name = "net2272",
382 .id = -1,
383 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
384 .resource = net2272_bfin_resources,
385 };
386 #endif
387
388 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
389 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
390
391 static struct mtd_partition bfin_plat_nand_partitions[] = {
392 {
393 .name = "linux kernel(nand)",
394 .size = 0x400000,
395 .offset = 0,
396 }, {
397 .name = "file system(nand)",
398 .size = MTDPART_SIZ_FULL,
399 .offset = MTDPART_OFS_APPEND,
400 },
401 };
402
403 #define BFIN_NAND_PLAT_CLE 2
404 #define BFIN_NAND_PLAT_ALE 1
405 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
406 {
407 struct nand_chip *this = mtd->priv;
408
409 if (cmd == NAND_CMD_NONE)
410 return;
411
412 if (ctrl & NAND_CLE)
413 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
414 else
415 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
416 }
417
418 #define BFIN_NAND_PLAT_READY GPIO_PF3
419 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
420 {
421 return gpio_get_value(BFIN_NAND_PLAT_READY);
422 }
423
424 static struct platform_nand_data bfin_plat_nand_data = {
425 .chip = {
426 .nr_chips = 1,
427 .chip_delay = 30,
428 .part_probe_types = part_probes,
429 .partitions = bfin_plat_nand_partitions,
430 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
431 },
432 .ctrl = {
433 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
434 .dev_ready = bfin_plat_nand_dev_ready,
435 },
436 };
437
438 #define MAX(x, y) (x > y ? x : y)
439 static struct resource bfin_plat_nand_resources = {
440 .start = 0x20212000,
441 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
442 .flags = IORESOURCE_MEM,
443 };
444
445 static struct platform_device bfin_async_nand_device = {
446 .name = "gen_nand",
447 .id = -1,
448 .num_resources = 1,
449 .resource = &bfin_plat_nand_resources,
450 .dev = {
451 .platform_data = &bfin_plat_nand_data,
452 },
453 };
454
455 static void bfin_plat_nand_init(void)
456 {
457 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
458 gpio_direction_input(BFIN_NAND_PLAT_READY);
459 }
460 #else
461 static void bfin_plat_nand_init(void) {}
462 #endif
463
464 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
465 static struct mtd_partition stamp_partitions[] = {
466 {
467 .name = "bootloader(nor)",
468 .size = 0x40000,
469 .offset = 0,
470 }, {
471 .name = "linux kernel(nor)",
472 .size = 0x180000,
473 .offset = MTDPART_OFS_APPEND,
474 }, {
475 .name = "file system(nor)",
476 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
477 .offset = MTDPART_OFS_APPEND,
478 }, {
479 .name = "MAC Address(nor)",
480 .size = MTDPART_SIZ_FULL,
481 .offset = 0x3F0000,
482 .mask_flags = MTD_WRITEABLE,
483 }
484 };
485
486 static struct physmap_flash_data stamp_flash_data = {
487 .width = 2,
488 .parts = stamp_partitions,
489 .nr_parts = ARRAY_SIZE(stamp_partitions),
490 #ifdef CONFIG_ROMKERNEL
491 .probe_type = "map_rom",
492 #endif
493 };
494
495 static struct resource stamp_flash_resource = {
496 .start = 0x20000000,
497 .end = 0x203fffff,
498 .flags = IORESOURCE_MEM,
499 };
500
501 static struct platform_device stamp_flash_device = {
502 .name = "physmap-flash",
503 .id = 0,
504 .dev = {
505 .platform_data = &stamp_flash_data,
506 },
507 .num_resources = 1,
508 .resource = &stamp_flash_resource,
509 };
510 #endif
511
512 #if defined(CONFIG_MTD_M25P80) \
513 || defined(CONFIG_MTD_M25P80_MODULE)
514 static struct mtd_partition bfin_spi_flash_partitions[] = {
515 {
516 .name = "bootloader(spi)",
517 .size = 0x00040000,
518 .offset = 0,
519 .mask_flags = MTD_CAP_ROM
520 }, {
521 .name = "linux kernel(spi)",
522 .size = 0x180000,
523 .offset = MTDPART_OFS_APPEND,
524 }, {
525 .name = "file system(spi)",
526 .size = MTDPART_SIZ_FULL,
527 .offset = MTDPART_OFS_APPEND,
528 }
529 };
530
531 static struct flash_platform_data bfin_spi_flash_data = {
532 .name = "m25p80",
533 .parts = bfin_spi_flash_partitions,
534 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
535 /* .type = "m25p64", */
536 };
537
538 /* SPI flash chip (m25p64) */
539 static struct bfin5xx_spi_chip spi_flash_chip_info = {
540 .enable_dma = 0, /* use dma transfer with this chip*/
541 };
542 #endif
543
544 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
545 #include <linux/input/ad714x.h>
546
547 static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
548 {
549 .start_stage = 0,
550 .end_stage = 7,
551 .max_coord = 128,
552 },
553 };
554
555 static struct ad714x_button_plat ad7147_spi_button_plat[] = {
556 {
557 .keycode = BTN_FORWARD,
558 .l_mask = 0,
559 .h_mask = 0x600,
560 },
561 {
562 .keycode = BTN_LEFT,
563 .l_mask = 0,
564 .h_mask = 0x500,
565 },
566 {
567 .keycode = BTN_MIDDLE,
568 .l_mask = 0,
569 .h_mask = 0x800,
570 },
571 {
572 .keycode = BTN_RIGHT,
573 .l_mask = 0x100,
574 .h_mask = 0x400,
575 },
576 {
577 .keycode = BTN_BACK,
578 .l_mask = 0x200,
579 .h_mask = 0x400,
580 },
581 };
582 static struct ad714x_platform_data ad7147_spi_platform_data = {
583 .slider_num = 1,
584 .button_num = 5,
585 .slider = ad7147_spi_slider_plat,
586 .button = ad7147_spi_button_plat,
587 .stage_cfg_reg = {
588 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
589 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
591 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
592 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
593 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
594 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
595 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
596 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
597 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
598 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
599 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
600 },
601 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
602 };
603 #endif
604
605 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
606 #include <linux/input/ad714x.h>
607 static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
608 {
609 .keycode = BTN_1,
610 .l_mask = 0,
611 .h_mask = 0x1,
612 },
613 {
614 .keycode = BTN_2,
615 .l_mask = 0,
616 .h_mask = 0x2,
617 },
618 {
619 .keycode = BTN_3,
620 .l_mask = 0,
621 .h_mask = 0x4,
622 },
623 {
624 .keycode = BTN_4,
625 .l_mask = 0x0,
626 .h_mask = 0x8,
627 },
628 };
629 static struct ad714x_platform_data ad7142_i2c_platform_data = {
630 .button_num = 4,
631 .button = ad7142_i2c_button_plat,
632 .stage_cfg_reg = {
633 /* fixme: figure out right setting for all comoponent according
634 * to hardware feature of EVAL-AD7142EB board */
635 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
636 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
637 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
638 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
643 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
644 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
645 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
646 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
647 },
648 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
649 };
650 #endif
651
652 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
653 static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
654 .enable_dma = 0,
655 };
656 #endif
657
658 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
659 static unsigned short ad2s120x_platform_data[] = {
660 /* used as SAMPLE and RDVEL */
661 GPIO_PF5, GPIO_PF6, 0
662 };
663
664 static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
665 .enable_dma = 0,
666 };
667 #endif
668
669 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
670 static unsigned short ad2s1210_platform_data[] = {
671 /* use as SAMPLE, A0, A1 */
672 GPIO_PF7, GPIO_PF8, GPIO_PF9,
673 # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
674 /* the RES0 and RES1 pins */
675 GPIO_PF4, GPIO_PF5,
676 # endif
677 0,
678 };
679
680 static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
681 .enable_dma = 0,
682 };
683 #endif
684
685 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
686 static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
687 .enable_dma = 0,
688 };
689 #endif
690
691 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
692 static unsigned short ad7816_platform_data[] = {
693 GPIO_PF4, /* rdwr_pin */
694 GPIO_PF5, /* convert_pin */
695 GPIO_PF7, /* busy_pin */
696 0,
697 };
698
699 static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
700 .enable_dma = 0,
701 };
702 #endif
703
704 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
705 static unsigned long adt7310_platform_data[3] = {
706 /* INT bound temperature alarm event. line 1 */
707 IRQ_PG4, IRQF_TRIGGER_LOW,
708 /* CT bound temperature alarm event irq_flags. line 0 */
709 IRQF_TRIGGER_LOW,
710 };
711
712 static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
713 .enable_dma = 0,
714 };
715 #endif
716
717 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
718 static unsigned short ad7298_platform_data[] = {
719 GPIO_PF7, /* busy_pin */
720 0,
721 };
722 #endif
723
724 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
725 static unsigned long adt7316_spi_data[2] = {
726 IRQF_TRIGGER_LOW, /* interrupt flags */
727 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
728 };
729
730 static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
731 .enable_dma = 0,
732 };
733 #endif
734
735 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
736 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
737
738 static int bfin_mmc_spi_init(struct device *dev,
739 irqreturn_t (*detect_int)(int, void *), void *data)
740 {
741 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
742 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
743 }
744
745 static void bfin_mmc_spi_exit(struct device *dev, void *data)
746 {
747 free_irq(MMC_SPI_CARD_DETECT_INT, data);
748 }
749
750 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
751 .init = bfin_mmc_spi_init,
752 .exit = bfin_mmc_spi_exit,
753 .detect_delay = 100, /* msecs */
754 };
755
756 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
757 .enable_dma = 0,
758 .pio_interrupt = 0,
759 };
760 #endif
761
762 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
763 #include <linux/spi/ad7877.h>
764 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
765 .model = 7877,
766 .vref_delay_usecs = 50, /* internal, no capacitor */
767 .x_plate_ohms = 419,
768 .y_plate_ohms = 486,
769 .pressure_max = 1000,
770 .pressure_min = 0,
771 .stopacq_polarity = 1,
772 .first_conversion_delay = 3,
773 .acquisition_time = 1,
774 .averaging = 1,
775 .pen_down_acc_interval = 1,
776 };
777 #endif
778
779 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
780 #include <linux/spi/ad7879.h>
781 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
782 .model = 7879, /* Model = AD7879 */
783 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
784 .pressure_max = 10000,
785 .pressure_min = 0,
786 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
787 .acquisition_time = 1, /* 4us acquisition time per sample */
788 .median = 2, /* do 8 measurements */
789 .averaging = 1, /* take the average of 4 middle samples */
790 .pen_down_acc_interval = 255, /* 9.4 ms */
791 .gpio_export = 1, /* Export GPIO to gpiolib */
792 .gpio_base = -1, /* Dynamic allocation */
793 };
794 #endif
795
796 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
797 #include <linux/input/adxl34x.h>
798 static const struct adxl34x_platform_data adxl34x_info = {
799 .x_axis_offset = 0,
800 .y_axis_offset = 0,
801 .z_axis_offset = 0,
802 .tap_threshold = 0x31,
803 .tap_duration = 0x10,
804 .tap_latency = 0x60,
805 .tap_window = 0xF0,
806 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
807 .act_axis_control = 0xFF,
808 .activity_threshold = 5,
809 .inactivity_threshold = 3,
810 .inactivity_time = 4,
811 .free_fall_threshold = 0x7,
812 .free_fall_time = 0x20,
813 .data_rate = 0x8,
814 .data_range = ADXL_FULL_RES,
815
816 .ev_type = EV_ABS,
817 .ev_code_x = ABS_X, /* EV_REL */
818 .ev_code_y = ABS_Y, /* EV_REL */
819 .ev_code_z = ABS_Z, /* EV_REL */
820
821 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
822
823 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
824 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
825 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
826 .fifo_mode = ADXL_FIFO_STREAM,
827 .orientation_enable = ADXL_EN_ORIENTATION_3D,
828 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
829 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
830 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
831 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
832 };
833 #endif
834
835 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
836 static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
837 .enable_dma = 1,
838 };
839 #endif
840
841 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
842 #include <linux/spi/adf702x.h>
843 #define TXREG 0x0160A470
844 static const u32 adf7021_regs[] = {
845 0x09608FA0,
846 0x00575011,
847 0x00A7F092,
848 0x2B141563,
849 0x81F29E94,
850 0x00003155,
851 0x050A4F66,
852 0x00000007,
853 0x00000008,
854 0x000231E9,
855 0x3296354A,
856 0x891A2B3B,
857 0x00000D9C,
858 0x0000000D,
859 0x0000000E,
860 0x0000000F,
861 };
862
863 static struct adf702x_platform_data adf7021_platform_data = {
864 .regs_base = (void *)SPORT1_TCR1,
865 .dma_ch_rx = CH_SPORT1_RX,
866 .dma_ch_tx = CH_SPORT1_TX,
867 .irq_sport_err = IRQ_SPORT1_ERROR,
868 .gpio_int_rfs = GPIO_PF8,
869 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
870 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
871 .adf702x_model = MODEL_ADF7021,
872 .adf702x_regs = adf7021_regs,
873 .tx_reg = TXREG,
874 };
875 static inline void adf702x_mac_init(void)
876 {
877 eth_random_addr(adf7021_platform_data.mac_addr);
878 }
879 #else
880 static inline void adf702x_mac_init(void) {}
881 #endif
882
883 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
884 #include <linux/spi/ads7846.h>
885 static int ads7873_get_pendown_state(void)
886 {
887 return gpio_get_value(GPIO_PF6);
888 }
889
890 static struct ads7846_platform_data __initdata ad7873_pdata = {
891 .model = 7873, /* AD7873 */
892 .x_max = 0xfff,
893 .y_max = 0xfff,
894 .x_plate_ohms = 620,
895 .debounce_max = 1,
896 .debounce_rep = 0,
897 .debounce_tol = (~0),
898 .get_pendown_state = ads7873_get_pendown_state,
899 };
900 #endif
901
902 #if defined(CONFIG_MTD_DATAFLASH) \
903 || defined(CONFIG_MTD_DATAFLASH_MODULE)
904
905 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
906 {
907 .name = "bootloader(spi)",
908 .size = 0x00040000,
909 .offset = 0,
910 .mask_flags = MTD_CAP_ROM
911 }, {
912 .name = "linux kernel(spi)",
913 .size = 0x180000,
914 .offset = MTDPART_OFS_APPEND,
915 }, {
916 .name = "file system(spi)",
917 .size = MTDPART_SIZ_FULL,
918 .offset = MTDPART_OFS_APPEND,
919 }
920 };
921
922 static struct flash_platform_data bfin_spi_dataflash_data = {
923 .name = "SPI Dataflash",
924 .parts = bfin_spi_dataflash_partitions,
925 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
926 };
927
928 /* DataFlash chip */
929 static struct bfin5xx_spi_chip data_flash_chip_info = {
930 .enable_dma = 0, /* use dma transfer with this chip*/
931 };
932 #endif
933
934 #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
935 static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
936 .enable_dma = 0, /* use dma transfer with this chip*/
937 };
938 #endif
939
940 static struct spi_board_info bfin_spi_board_info[] __initdata = {
941 #if defined(CONFIG_MTD_M25P80) \
942 || defined(CONFIG_MTD_M25P80_MODULE)
943 {
944 /* the modalias must be the same as spi device driver name */
945 .modalias = "m25p80", /* Name of spi_driver for this device */
946 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
947 .bus_num = 0, /* Framework bus number */
948 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
949 .platform_data = &bfin_spi_flash_data,
950 .controller_data = &spi_flash_chip_info,
951 .mode = SPI_MODE_3,
952 },
953 #endif
954 #if defined(CONFIG_MTD_DATAFLASH) \
955 || defined(CONFIG_MTD_DATAFLASH_MODULE)
956 { /* DataFlash chip */
957 .modalias = "mtd_dataflash",
958 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
959 .bus_num = 0, /* Framework bus number */
960 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
961 .platform_data = &bfin_spi_dataflash_data,
962 .controller_data = &data_flash_chip_info,
963 .mode = SPI_MODE_3,
964 },
965 #endif
966
967 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
968 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
969 {
970 .modalias = "ad1836",
971 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
972 .bus_num = 0,
973 .chip_select = 4,
974 .platform_data = "ad1836", /* only includes chip name for the moment */
975 .mode = SPI_MODE_3,
976 },
977 #endif
978
979 #ifdef CONFIG_SND_SOC_AD193X_SPI
980 {
981 .modalias = "ad193x",
982 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
983 .bus_num = 0,
984 .chip_select = 5,
985 .mode = SPI_MODE_3,
986 },
987 #endif
988
989 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
990 {
991 .modalias = "adav801",
992 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
993 .bus_num = 0,
994 .chip_select = 1,
995 .mode = SPI_MODE_3,
996 },
997 #endif
998
999 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
1000 {
1001 .modalias = "ad714x_captouch",
1002 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1003 .irq = IRQ_PF4,
1004 .bus_num = 0,
1005 .chip_select = 5,
1006 .mode = SPI_MODE_3,
1007 .platform_data = &ad7147_spi_platform_data,
1008 },
1009 #endif
1010
1011 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1012 {
1013 .modalias = "ad2s90",
1014 .bus_num = 0,
1015 .chip_select = 3, /* change it for your board */
1016 .mode = SPI_MODE_3,
1017 .platform_data = NULL,
1018 .controller_data = &ad2s90_spi_chip_info,
1019 },
1020 #endif
1021
1022 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1023 {
1024 .modalias = "ad2s120x",
1025 .bus_num = 0,
1026 .chip_select = 4, /* CS, change it for your board */
1027 .platform_data = ad2s120x_platform_data,
1028 .controller_data = &ad2s120x_spi_chip_info,
1029 },
1030 #endif
1031
1032 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1033 {
1034 .modalias = "ad2s1210",
1035 .max_speed_hz = 8192000,
1036 .bus_num = 0,
1037 .chip_select = 4, /* CS, change it for your board */
1038 .platform_data = ad2s1210_platform_data,
1039 .controller_data = &ad2s1210_spi_chip_info,
1040 },
1041 #endif
1042
1043 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1044 {
1045 .modalias = "ad7314",
1046 .max_speed_hz = 1000000,
1047 .bus_num = 0,
1048 .chip_select = 4, /* CS, change it for your board */
1049 .controller_data = &ad7314_spi_chip_info,
1050 .mode = SPI_MODE_1,
1051 },
1052 #endif
1053
1054 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1055 {
1056 .modalias = "ad7818",
1057 .max_speed_hz = 1000000,
1058 .bus_num = 0,
1059 .chip_select = 4, /* CS, change it for your board */
1060 .platform_data = ad7816_platform_data,
1061 .controller_data = &ad7816_spi_chip_info,
1062 .mode = SPI_MODE_3,
1063 },
1064 #endif
1065
1066 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1067 {
1068 .modalias = "adt7310",
1069 .max_speed_hz = 1000000,
1070 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1071 .bus_num = 0,
1072 .chip_select = 4, /* CS, change it for your board */
1073 .platform_data = adt7310_platform_data,
1074 .controller_data = &adt7310_spi_chip_info,
1075 .mode = SPI_MODE_3,
1076 },
1077 #endif
1078
1079 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1080 {
1081 .modalias = "ad7298",
1082 .max_speed_hz = 1000000,
1083 .bus_num = 0,
1084 .chip_select = 4, /* CS, change it for your board */
1085 .platform_data = ad7298_platform_data,
1086 .mode = SPI_MODE_3,
1087 },
1088 #endif
1089
1090 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1091 {
1092 .modalias = "adt7316",
1093 .max_speed_hz = 1000000,
1094 .irq = IRQ_PG5, /* interrupt line */
1095 .bus_num = 0,
1096 .chip_select = 4, /* CS, change it for your board */
1097 .platform_data = adt7316_spi_data,
1098 .controller_data = &adt7316_spi_chip_info,
1099 .mode = SPI_MODE_3,
1100 },
1101 #endif
1102
1103 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1104 {
1105 .modalias = "mmc_spi",
1106 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1107 .bus_num = 0,
1108 .chip_select = 4,
1109 .platform_data = &bfin_mmc_spi_pdata,
1110 .controller_data = &mmc_spi_chip_info,
1111 .mode = SPI_MODE_3,
1112 },
1113 #endif
1114 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1115 {
1116 .modalias = "ad7877",
1117 .platform_data = &bfin_ad7877_ts_info,
1118 .irq = IRQ_PF6,
1119 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1120 .bus_num = 0,
1121 .chip_select = 1,
1122 },
1123 #endif
1124 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
1125 {
1126 .modalias = "ad7879",
1127 .platform_data = &bfin_ad7879_ts_info,
1128 .irq = IRQ_PF7,
1129 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1130 .bus_num = 0,
1131 .chip_select = 1,
1132 .mode = SPI_CPHA | SPI_CPOL,
1133 },
1134 #endif
1135 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1136 {
1137 .modalias = "spidev",
1138 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1139 .bus_num = 0,
1140 .chip_select = 1,
1141 },
1142 #endif
1143 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1144 {
1145 .modalias = "bfin-lq035q1-spi",
1146 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1147 .bus_num = 0,
1148 .chip_select = 2,
1149 .mode = SPI_CPHA | SPI_CPOL,
1150 },
1151 #endif
1152 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1153 {
1154 .modalias = "enc28j60",
1155 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1156 .irq = IRQ_PF6,
1157 .bus_num = 0,
1158 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1159 .controller_data = &enc28j60_spi_chip_info,
1160 .mode = SPI_MODE_0,
1161 },
1162 #endif
1163 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1164 {
1165 .modalias = "adxl34x",
1166 .platform_data = &adxl34x_info,
1167 .irq = IRQ_PF6,
1168 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1169 .bus_num = 0,
1170 .chip_select = 2,
1171 .mode = SPI_MODE_3,
1172 },
1173 #endif
1174 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1175 {
1176 .modalias = "adf702x",
1177 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1178 .bus_num = 0,
1179 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1180 .platform_data = &adf7021_platform_data,
1181 .mode = SPI_MODE_0,
1182 },
1183 #endif
1184 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1185 {
1186 .modalias = "ads7846",
1187 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1188 .bus_num = 0,
1189 .irq = IRQ_PF6,
1190 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1191 .platform_data = &ad7873_pdata,
1192 .mode = SPI_MODE_0,
1193 },
1194 #endif
1195 #if defined(CONFIG_AD7476) \
1196 || defined(CONFIG_AD7476_MODULE)
1197 {
1198 .modalias = "ad7476", /* Name of spi_driver for this device */
1199 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1200 .bus_num = 0, /* Framework bus number */
1201 .chip_select = 1, /* Framework chip select. */
1202 .platform_data = NULL, /* No spi_driver specific config */
1203 .controller_data = &spi_ad7476_chip_info,
1204 .mode = SPI_MODE_3,
1205 },
1206 #endif
1207 #if defined(CONFIG_ADE7753) \
1208 || defined(CONFIG_ADE7753_MODULE)
1209 {
1210 .modalias = "ade7753",
1211 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1212 .bus_num = 0,
1213 .chip_select = 1, /* CS, change it for your board */
1214 .platform_data = NULL, /* No spi_driver specific config */
1215 .mode = SPI_MODE_1,
1216 },
1217 #endif
1218 #if defined(CONFIG_ADE7754) \
1219 || defined(CONFIG_ADE7754_MODULE)
1220 {
1221 .modalias = "ade7754",
1222 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1223 .bus_num = 0,
1224 .chip_select = 1, /* CS, change it for your board */
1225 .platform_data = NULL, /* No spi_driver specific config */
1226 .mode = SPI_MODE_1,
1227 },
1228 #endif
1229 #if defined(CONFIG_ADE7758) \
1230 || defined(CONFIG_ADE7758_MODULE)
1231 {
1232 .modalias = "ade7758",
1233 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1234 .bus_num = 0,
1235 .chip_select = 1, /* CS, change it for your board */
1236 .platform_data = NULL, /* No spi_driver specific config */
1237 .mode = SPI_MODE_1,
1238 },
1239 #endif
1240 #if defined(CONFIG_ADE7759) \
1241 || defined(CONFIG_ADE7759_MODULE)
1242 {
1243 .modalias = "ade7759",
1244 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1245 .bus_num = 0,
1246 .chip_select = 1, /* CS, change it for your board */
1247 .platform_data = NULL, /* No spi_driver specific config */
1248 .mode = SPI_MODE_1,
1249 },
1250 #endif
1251 #if defined(CONFIG_ADE7854_SPI) \
1252 || defined(CONFIG_ADE7854_SPI_MODULE)
1253 {
1254 .modalias = "ade7854",
1255 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1256 .bus_num = 0,
1257 .chip_select = 1, /* CS, change it for your board */
1258 .platform_data = NULL, /* No spi_driver specific config */
1259 .mode = SPI_MODE_3,
1260 },
1261 #endif
1262 #if defined(CONFIG_ADIS16060) \
1263 || defined(CONFIG_ADIS16060_MODULE)
1264 {
1265 .modalias = "adis16060_r",
1266 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1267 .bus_num = 0,
1268 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1269 .platform_data = NULL, /* No spi_driver specific config */
1270 .mode = SPI_MODE_0,
1271 },
1272 {
1273 .modalias = "adis16060_w",
1274 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1275 .bus_num = 0,
1276 .chip_select = 2, /* CS for write, change it for your board */
1277 .platform_data = NULL, /* No spi_driver specific config */
1278 .mode = SPI_MODE_1,
1279 },
1280 #endif
1281 #if defined(CONFIG_ADIS16130) \
1282 || defined(CONFIG_ADIS16130_MODULE)
1283 {
1284 .modalias = "adis16130",
1285 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1286 .bus_num = 0,
1287 .chip_select = 1, /* CS for read, change it for your board */
1288 .platform_data = NULL, /* No spi_driver specific config */
1289 .mode = SPI_MODE_3,
1290 },
1291 #endif
1292 #if defined(CONFIG_ADIS16201) \
1293 || defined(CONFIG_ADIS16201_MODULE)
1294 {
1295 .modalias = "adis16201",
1296 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1297 .bus_num = 0,
1298 .chip_select = 5, /* CS, change it for your board */
1299 .platform_data = NULL, /* No spi_driver specific config */
1300 .mode = SPI_MODE_3,
1301 .irq = IRQ_PF4,
1302 },
1303 #endif
1304 #if defined(CONFIG_ADIS16203) \
1305 || defined(CONFIG_ADIS16203_MODULE)
1306 {
1307 .modalias = "adis16203",
1308 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1309 .bus_num = 0,
1310 .chip_select = 5, /* CS, change it for your board */
1311 .platform_data = NULL, /* No spi_driver specific config */
1312 .mode = SPI_MODE_3,
1313 .irq = IRQ_PF4,
1314 },
1315 #endif
1316 #if defined(CONFIG_ADIS16204) \
1317 || defined(CONFIG_ADIS16204_MODULE)
1318 {
1319 .modalias = "adis16204",
1320 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1321 .bus_num = 0,
1322 .chip_select = 5, /* CS, change it for your board */
1323 .platform_data = NULL, /* No spi_driver specific config */
1324 .mode = SPI_MODE_3,
1325 .irq = IRQ_PF4,
1326 },
1327 #endif
1328 #if defined(CONFIG_ADIS16209) \
1329 || defined(CONFIG_ADIS16209_MODULE)
1330 {
1331 .modalias = "adis16209",
1332 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1333 .bus_num = 0,
1334 .chip_select = 5, /* CS, change it for your board */
1335 .platform_data = NULL, /* No spi_driver specific config */
1336 .mode = SPI_MODE_3,
1337 .irq = IRQ_PF4,
1338 },
1339 #endif
1340 #if defined(CONFIG_ADIS16220) \
1341 || defined(CONFIG_ADIS16220_MODULE)
1342 {
1343 .modalias = "adis16220",
1344 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1345 .bus_num = 0,
1346 .chip_select = 5, /* CS, change it for your board */
1347 .platform_data = NULL, /* No spi_driver specific config */
1348 .mode = SPI_MODE_3,
1349 .irq = IRQ_PF4,
1350 },
1351 #endif
1352 #if defined(CONFIG_ADIS16240) \
1353 || defined(CONFIG_ADIS16240_MODULE)
1354 {
1355 .modalias = "adis16240",
1356 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1357 .bus_num = 0,
1358 .chip_select = 5, /* CS, change it for your board */
1359 .platform_data = NULL, /* No spi_driver specific config */
1360 .mode = SPI_MODE_3,
1361 .irq = IRQ_PF4,
1362 },
1363 #endif
1364 #if defined(CONFIG_ADIS16260) \
1365 || defined(CONFIG_ADIS16260_MODULE)
1366 {
1367 .modalias = "adis16260",
1368 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1369 .bus_num = 0,
1370 .chip_select = 5, /* CS, change it for your board */
1371 .platform_data = NULL, /* No spi_driver specific config */
1372 .mode = SPI_MODE_3,
1373 .irq = IRQ_PF4,
1374 },
1375 #endif
1376 #if defined(CONFIG_ADIS16261) \
1377 || defined(CONFIG_ADIS16261_MODULE)
1378 {
1379 .modalias = "adis16261",
1380 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1381 .bus_num = 0,
1382 .chip_select = 1, /* CS, change it for your board */
1383 .platform_data = NULL, /* No spi_driver specific config */
1384 .mode = SPI_MODE_3,
1385 },
1386 #endif
1387 #if defined(CONFIG_ADIS16300) \
1388 || defined(CONFIG_ADIS16300_MODULE)
1389 {
1390 .modalias = "adis16300",
1391 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1392 .bus_num = 0,
1393 .chip_select = 5, /* CS, change it for your board */
1394 .platform_data = NULL, /* No spi_driver specific config */
1395 .mode = SPI_MODE_3,
1396 .irq = IRQ_PF4,
1397 },
1398 #endif
1399 #if defined(CONFIG_ADIS16350) \
1400 || defined(CONFIG_ADIS16350_MODULE)
1401 {
1402 .modalias = "adis16364",
1403 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1404 .bus_num = 0,
1405 .chip_select = 5, /* CS, change it for your board */
1406 .platform_data = NULL, /* No spi_driver specific config */
1407 .mode = SPI_MODE_3,
1408 .irq = IRQ_PF4,
1409 },
1410 #endif
1411 #if defined(CONFIG_ADIS16400) \
1412 || defined(CONFIG_ADIS16400_MODULE)
1413 {
1414 .modalias = "adis16400",
1415 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1416 .bus_num = 0,
1417 .chip_select = 1, /* CS, change it for your board */
1418 .platform_data = NULL, /* No spi_driver specific config */
1419 .mode = SPI_MODE_3,
1420 },
1421 #endif
1422 };
1423
1424 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1425 /* SPI controller data */
1426 static struct bfin5xx_spi_master bfin_spi0_info = {
1427 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1428 .enable_dma = 1, /* master has the ability to do dma transfer */
1429 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1430 };
1431
1432 /* SPI (0) */
1433 static struct resource bfin_spi0_resource[] = {
1434 [0] = {
1435 .start = SPI0_REGBASE,
1436 .end = SPI0_REGBASE + 0xFF,
1437 .flags = IORESOURCE_MEM,
1438 },
1439 [1] = {
1440 .start = CH_SPI,
1441 .end = CH_SPI,
1442 .flags = IORESOURCE_DMA,
1443 },
1444 [2] = {
1445 .start = IRQ_SPI,
1446 .end = IRQ_SPI,
1447 .flags = IORESOURCE_IRQ,
1448 },
1449 };
1450
1451 static struct platform_device bfin_spi0_device = {
1452 .name = "bfin-spi",
1453 .id = 0, /* Bus number */
1454 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1455 .resource = bfin_spi0_resource,
1456 .dev = {
1457 .platform_data = &bfin_spi0_info, /* Passed to driver */
1458 },
1459 };
1460 #endif /* spi master and devices */
1461
1462 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1463
1464 /* SPORT SPI controller data */
1465 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1466 .num_chipselect = MAX_BLACKFIN_GPIOS,
1467 .enable_dma = 0, /* master don't support DMA */
1468 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1469 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1470 };
1471
1472 static struct resource bfin_sport_spi0_resource[] = {
1473 [0] = {
1474 .start = SPORT0_TCR1,
1475 .end = SPORT0_TCR1 + 0xFF,
1476 .flags = IORESOURCE_MEM,
1477 },
1478 [1] = {
1479 .start = IRQ_SPORT0_ERROR,
1480 .end = IRQ_SPORT0_ERROR,
1481 .flags = IORESOURCE_IRQ,
1482 },
1483 };
1484
1485 static struct platform_device bfin_sport_spi0_device = {
1486 .name = "bfin-sport-spi",
1487 .id = 1, /* Bus number */
1488 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1489 .resource = bfin_sport_spi0_resource,
1490 .dev = {
1491 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1492 },
1493 };
1494
1495 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1496 .num_chipselect = MAX_BLACKFIN_GPIOS,
1497 .enable_dma = 0, /* master don't support DMA */
1498 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1499 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1500 };
1501
1502 static struct resource bfin_sport_spi1_resource[] = {
1503 [0] = {
1504 .start = SPORT1_TCR1,
1505 .end = SPORT1_TCR1 + 0xFF,
1506 .flags = IORESOURCE_MEM,
1507 },
1508 [1] = {
1509 .start = IRQ_SPORT1_ERROR,
1510 .end = IRQ_SPORT1_ERROR,
1511 .flags = IORESOURCE_IRQ,
1512 },
1513 };
1514
1515 static struct platform_device bfin_sport_spi1_device = {
1516 .name = "bfin-sport-spi",
1517 .id = 2, /* Bus number */
1518 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1519 .resource = bfin_sport_spi1_resource,
1520 .dev = {
1521 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1522 },
1523 };
1524
1525 #endif /* sport spi master and devices */
1526
1527 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1528 static struct platform_device bfin_fb_device = {
1529 .name = "bf537_lq035",
1530 };
1531 #endif
1532
1533 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1534 #include <asm/bfin-lq035q1.h>
1535
1536 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1537 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1538 .ppi_mode = USE_RGB565_16_BIT_PPI,
1539 .use_bl = 0, /* let something else control the LCD Blacklight */
1540 .gpio_bl = GPIO_PF7,
1541 };
1542
1543 static struct resource bfin_lq035q1_resources[] = {
1544 {
1545 .start = IRQ_PPI_ERROR,
1546 .end = IRQ_PPI_ERROR,
1547 .flags = IORESOURCE_IRQ,
1548 },
1549 };
1550
1551 static struct platform_device bfin_lq035q1_device = {
1552 .name = "bfin-lq035q1",
1553 .id = -1,
1554 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1555 .resource = bfin_lq035q1_resources,
1556 .dev = {
1557 .platform_data = &bfin_lq035q1_data,
1558 },
1559 };
1560 #endif
1561
1562 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1563 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1564 #include <linux/videodev2.h>
1565 #include <media/blackfin/bfin_capture.h>
1566 #include <media/blackfin/ppi.h>
1567
1568 static const unsigned short ppi_req[] = {
1569 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1570 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1571 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1572 0,
1573 };
1574
1575 static const struct ppi_info ppi_info = {
1576 .type = PPI_TYPE_PPI,
1577 .dma_ch = CH_PPI,
1578 .irq_err = IRQ_PPI_ERROR,
1579 .base = (void __iomem *)PPI_CONTROL,
1580 .pin_req = ppi_req,
1581 };
1582
1583 #if defined(CONFIG_VIDEO_VS6624) \
1584 || defined(CONFIG_VIDEO_VS6624_MODULE)
1585 static struct v4l2_input vs6624_inputs[] = {
1586 {
1587 .index = 0,
1588 .name = "Camera",
1589 .type = V4L2_INPUT_TYPE_CAMERA,
1590 .std = V4L2_STD_UNKNOWN,
1591 },
1592 };
1593
1594 static struct bcap_route vs6624_routes[] = {
1595 {
1596 .input = 0,
1597 .output = 0,
1598 },
1599 };
1600
1601 static const unsigned vs6624_ce_pin = GPIO_PF10;
1602
1603 static struct bfin_capture_config bfin_capture_data = {
1604 .card_name = "BF537",
1605 .inputs = vs6624_inputs,
1606 .num_inputs = ARRAY_SIZE(vs6624_inputs),
1607 .routes = vs6624_routes,
1608 .i2c_adapter_id = 0,
1609 .board_info = {
1610 .type = "vs6624",
1611 .addr = 0x10,
1612 .platform_data = (void *)&vs6624_ce_pin,
1613 },
1614 .ppi_info = &ppi_info,
1615 .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
1616 };
1617 #endif
1618
1619 static struct platform_device bfin_capture_device = {
1620 .name = "bfin_capture",
1621 .dev = {
1622 .platform_data = &bfin_capture_data,
1623 },
1624 };
1625 #endif
1626
1627 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1628 #ifdef CONFIG_SERIAL_BFIN_UART0
1629 static struct resource bfin_uart0_resources[] = {
1630 {
1631 .start = UART0_THR,
1632 .end = UART0_GCTL+2,
1633 .flags = IORESOURCE_MEM,
1634 },
1635 {
1636 .start = IRQ_UART0_TX,
1637 .end = IRQ_UART0_TX,
1638 .flags = IORESOURCE_IRQ,
1639 },
1640 {
1641 .start = IRQ_UART0_RX,
1642 .end = IRQ_UART0_RX,
1643 .flags = IORESOURCE_IRQ,
1644 },
1645 {
1646 .start = IRQ_UART0_ERROR,
1647 .end = IRQ_UART0_ERROR,
1648 .flags = IORESOURCE_IRQ,
1649 },
1650 {
1651 .start = CH_UART0_TX,
1652 .end = CH_UART0_TX,
1653 .flags = IORESOURCE_DMA,
1654 },
1655 {
1656 .start = CH_UART0_RX,
1657 .end = CH_UART0_RX,
1658 .flags = IORESOURCE_DMA,
1659 },
1660 #ifdef CONFIG_BFIN_UART0_CTSRTS
1661 { /* CTS pin */
1662 .start = GPIO_PG7,
1663 .end = GPIO_PG7,
1664 .flags = IORESOURCE_IO,
1665 },
1666 { /* RTS pin */
1667 .start = GPIO_PG6,
1668 .end = GPIO_PG6,
1669 .flags = IORESOURCE_IO,
1670 },
1671 #endif
1672 };
1673
1674 static unsigned short bfin_uart0_peripherals[] = {
1675 P_UART0_TX, P_UART0_RX, 0
1676 };
1677
1678 static struct platform_device bfin_uart0_device = {
1679 .name = "bfin-uart",
1680 .id = 0,
1681 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1682 .resource = bfin_uart0_resources,
1683 .dev = {
1684 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1685 },
1686 };
1687 #endif
1688 #ifdef CONFIG_SERIAL_BFIN_UART1
1689 static struct resource bfin_uart1_resources[] = {
1690 {
1691 .start = UART1_THR,
1692 .end = UART1_GCTL+2,
1693 .flags = IORESOURCE_MEM,
1694 },
1695 {
1696 .start = IRQ_UART1_TX,
1697 .end = IRQ_UART1_TX,
1698 .flags = IORESOURCE_IRQ,
1699 },
1700 {
1701 .start = IRQ_UART1_RX,
1702 .end = IRQ_UART1_RX,
1703 .flags = IORESOURCE_IRQ,
1704 },
1705 {
1706 .start = IRQ_UART1_ERROR,
1707 .end = IRQ_UART1_ERROR,
1708 .flags = IORESOURCE_IRQ,
1709 },
1710 {
1711 .start = CH_UART1_TX,
1712 .end = CH_UART1_TX,
1713 .flags = IORESOURCE_DMA,
1714 },
1715 {
1716 .start = CH_UART1_RX,
1717 .end = CH_UART1_RX,
1718 .flags = IORESOURCE_DMA,
1719 },
1720 };
1721
1722 static unsigned short bfin_uart1_peripherals[] = {
1723 P_UART1_TX, P_UART1_RX, 0
1724 };
1725
1726 static struct platform_device bfin_uart1_device = {
1727 .name = "bfin-uart",
1728 .id = 1,
1729 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1730 .resource = bfin_uart1_resources,
1731 .dev = {
1732 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1733 },
1734 };
1735 #endif
1736 #endif
1737
1738 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1739 #ifdef CONFIG_BFIN_SIR0
1740 static struct resource bfin_sir0_resources[] = {
1741 {
1742 .start = 0xFFC00400,
1743 .end = 0xFFC004FF,
1744 .flags = IORESOURCE_MEM,
1745 },
1746 {
1747 .start = IRQ_UART0_RX,
1748 .end = IRQ_UART0_RX+1,
1749 .flags = IORESOURCE_IRQ,
1750 },
1751 {
1752 .start = CH_UART0_RX,
1753 .end = CH_UART0_RX+1,
1754 .flags = IORESOURCE_DMA,
1755 },
1756 };
1757
1758 static struct platform_device bfin_sir0_device = {
1759 .name = "bfin_sir",
1760 .id = 0,
1761 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1762 .resource = bfin_sir0_resources,
1763 };
1764 #endif
1765 #ifdef CONFIG_BFIN_SIR1
1766 static struct resource bfin_sir1_resources[] = {
1767 {
1768 .start = 0xFFC02000,
1769 .end = 0xFFC020FF,
1770 .flags = IORESOURCE_MEM,
1771 },
1772 {
1773 .start = IRQ_UART1_RX,
1774 .end = IRQ_UART1_RX+1,
1775 .flags = IORESOURCE_IRQ,
1776 },
1777 {
1778 .start = CH_UART1_RX,
1779 .end = CH_UART1_RX+1,
1780 .flags = IORESOURCE_DMA,
1781 },
1782 };
1783
1784 static struct platform_device bfin_sir1_device = {
1785 .name = "bfin_sir",
1786 .id = 1,
1787 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1788 .resource = bfin_sir1_resources,
1789 };
1790 #endif
1791 #endif
1792
1793 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1794 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1795
1796 static struct resource bfin_twi0_resource[] = {
1797 [0] = {
1798 .start = TWI0_REGBASE,
1799 .end = TWI0_REGBASE,
1800 .flags = IORESOURCE_MEM,
1801 },
1802 [1] = {
1803 .start = IRQ_TWI,
1804 .end = IRQ_TWI,
1805 .flags = IORESOURCE_IRQ,
1806 },
1807 };
1808
1809 static struct platform_device i2c_bfin_twi_device = {
1810 .name = "i2c-bfin-twi",
1811 .id = 0,
1812 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1813 .resource = bfin_twi0_resource,
1814 .dev = {
1815 .platform_data = &bfin_twi0_pins,
1816 },
1817 };
1818 #endif
1819
1820 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1821 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1822 [0] = KEY_GRAVE,
1823 [1] = KEY_1,
1824 [2] = KEY_2,
1825 [3] = KEY_3,
1826 [4] = KEY_4,
1827 [5] = KEY_5,
1828 [6] = KEY_6,
1829 [7] = KEY_7,
1830 [8] = KEY_8,
1831 [9] = KEY_9,
1832 [10] = KEY_0,
1833 [11] = KEY_MINUS,
1834 [12] = KEY_EQUAL,
1835 [13] = KEY_BACKSLASH,
1836 [15] = KEY_KP0,
1837 [16] = KEY_Q,
1838 [17] = KEY_W,
1839 [18] = KEY_E,
1840 [19] = KEY_R,
1841 [20] = KEY_T,
1842 [21] = KEY_Y,
1843 [22] = KEY_U,
1844 [23] = KEY_I,
1845 [24] = KEY_O,
1846 [25] = KEY_P,
1847 [26] = KEY_LEFTBRACE,
1848 [27] = KEY_RIGHTBRACE,
1849 [29] = KEY_KP1,
1850 [30] = KEY_KP2,
1851 [31] = KEY_KP3,
1852 [32] = KEY_A,
1853 [33] = KEY_S,
1854 [34] = KEY_D,
1855 [35] = KEY_F,
1856 [36] = KEY_G,
1857 [37] = KEY_H,
1858 [38] = KEY_J,
1859 [39] = KEY_K,
1860 [40] = KEY_L,
1861 [41] = KEY_SEMICOLON,
1862 [42] = KEY_APOSTROPHE,
1863 [43] = KEY_BACKSLASH,
1864 [45] = KEY_KP4,
1865 [46] = KEY_KP5,
1866 [47] = KEY_KP6,
1867 [48] = KEY_102ND,
1868 [49] = KEY_Z,
1869 [50] = KEY_X,
1870 [51] = KEY_C,
1871 [52] = KEY_V,
1872 [53] = KEY_B,
1873 [54] = KEY_N,
1874 [55] = KEY_M,
1875 [56] = KEY_COMMA,
1876 [57] = KEY_DOT,
1877 [58] = KEY_SLASH,
1878 [60] = KEY_KPDOT,
1879 [61] = KEY_KP7,
1880 [62] = KEY_KP8,
1881 [63] = KEY_KP9,
1882 [64] = KEY_SPACE,
1883 [65] = KEY_BACKSPACE,
1884 [66] = KEY_TAB,
1885 [67] = KEY_KPENTER,
1886 [68] = KEY_ENTER,
1887 [69] = KEY_ESC,
1888 [70] = KEY_DELETE,
1889 [74] = KEY_KPMINUS,
1890 [76] = KEY_UP,
1891 [77] = KEY_DOWN,
1892 [78] = KEY_RIGHT,
1893 [79] = KEY_LEFT,
1894 };
1895
1896 static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1897 .rows = 8,
1898 .cols = 10,
1899 .keymap = adp5588_keymap,
1900 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1901 .repeat = 0,
1902 };
1903 #endif
1904
1905 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1906 #include <linux/mfd/adp5520.h>
1907
1908 /*
1909 * ADP5520/5501 Backlight Data
1910 */
1911
1912 static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1913 .fade_in = ADP5520_FADE_T_1200ms,
1914 .fade_out = ADP5520_FADE_T_1200ms,
1915 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1916 .en_ambl_sens = 1,
1917 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1918 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1919 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1920 .l2_office_max = ADP5520_BL_CUR_mA(7),
1921 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1922 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1923 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1924 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1925 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1926 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1927 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
1928 };
1929
1930 /*
1931 * ADP5520/5501 LEDs Data
1932 */
1933
1934 static struct led_info adp5520_leds[] = {
1935 {
1936 .name = "adp5520-led1",
1937 .default_trigger = "none",
1938 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
1939 },
1940 #ifdef ADP5520_EN_ALL_LEDS
1941 {
1942 .name = "adp5520-led2",
1943 .default_trigger = "none",
1944 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1945 },
1946 {
1947 .name = "adp5520-led3",
1948 .default_trigger = "none",
1949 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1950 },
1951 #endif
1952 };
1953
1954 static struct adp5520_leds_platform_data adp5520_leds_data = {
1955 .num_leds = ARRAY_SIZE(adp5520_leds),
1956 .leds = adp5520_leds,
1957 .fade_in = ADP5520_FADE_T_600ms,
1958 .fade_out = ADP5520_FADE_T_600ms,
1959 .led_on_time = ADP5520_LED_ONT_600ms,
1960 };
1961
1962 /*
1963 * ADP5520 GPIO Data
1964 */
1965
1966 static struct adp5520_gpio_platform_data adp5520_gpio_data = {
1967 .gpio_start = 50,
1968 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1969 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1970 };
1971
1972 /*
1973 * ADP5520 Keypad Data
1974 */
1975
1976 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1977 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1978 [ADP5520_KEY(0, 1)] = KEY_1,
1979 [ADP5520_KEY(0, 2)] = KEY_2,
1980 [ADP5520_KEY(0, 3)] = KEY_3,
1981 [ADP5520_KEY(1, 0)] = KEY_4,
1982 [ADP5520_KEY(1, 1)] = KEY_5,
1983 [ADP5520_KEY(1, 2)] = KEY_6,
1984 [ADP5520_KEY(1, 3)] = KEY_7,
1985 [ADP5520_KEY(2, 0)] = KEY_8,
1986 [ADP5520_KEY(2, 1)] = KEY_9,
1987 [ADP5520_KEY(2, 2)] = KEY_0,
1988 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1989 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1990 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1991 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1992 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1993 };
1994
1995 static struct adp5520_keys_platform_data adp5520_keys_data = {
1996 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1997 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
1998 .keymap = adp5520_keymap,
1999 .keymapsize = ARRAY_SIZE(adp5520_keymap),
2000 .repeat = 0,
2001 };
2002
2003 /*
2004 * ADP5520/5501 Multifunction Device Init Data
2005 */
2006
2007 static struct adp5520_platform_data adp5520_pdev_data = {
2008 .backlight = &adp5520_backlight_data,
2009 .leds = &adp5520_leds_data,
2010 .gpio = &adp5520_gpio_data,
2011 .keys = &adp5520_keys_data,
2012 };
2013
2014 #endif
2015
2016 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2017 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
2018 .gpio_start = 50,
2019 .pullup_dis_mask = 0,
2020 };
2021 #endif
2022
2023 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2024 #include <linux/i2c/adp8870.h>
2025 static struct led_info adp8870_leds[] = {
2026 {
2027 .name = "adp8870-led7",
2028 .default_trigger = "none",
2029 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2030 },
2031 };
2032
2033
2034 static struct adp8870_backlight_platform_data adp8870_pdata = {
2035 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2036 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2037 .pwm_assign = 0, /* 1 = Enables PWM mode */
2038
2039 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2040 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2041 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2042
2043 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2044 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2045
2046 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2047 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2048 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2049 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2050 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2051 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2052 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2053 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2054 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2055 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2056
2057 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2058 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2059 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2060 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2061 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2062 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2063 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2064 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2065
2066 .leds = adp8870_leds,
2067 .num_leds = ARRAY_SIZE(adp8870_leds),
2068 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2069 .led_fade_in = ADP8870_FADE_T_600ms,
2070 .led_fade_out = ADP8870_FADE_T_600ms,
2071 .led_on_time = ADP8870_LED_ONT_200ms,
2072 };
2073 #endif
2074
2075 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2076 #include <linux/i2c/adp8860.h>
2077 static struct led_info adp8860_leds[] = {
2078 {
2079 .name = "adp8860-led7",
2080 .default_trigger = "none",
2081 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2082 },
2083 };
2084
2085 static struct adp8860_backlight_platform_data adp8860_pdata = {
2086 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2087 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2088
2089 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2090 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2091 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2092
2093 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2094 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2095
2096 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2097 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2098 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2099 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2100 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2101 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2102
2103 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2104 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2105 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2106 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2107
2108 .leds = adp8860_leds,
2109 .num_leds = ARRAY_SIZE(adp8860_leds),
2110 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2111 .led_fade_in = ADP8860_FADE_T_600ms,
2112 .led_fade_out = ADP8860_FADE_T_600ms,
2113 .led_on_time = ADP8860_LED_ONT_200ms,
2114 };
2115 #endif
2116
2117 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2118 static struct regulator_consumer_supply ad5398_consumer = {
2119 .supply = "current",
2120 };
2121
2122 static struct regulator_init_data ad5398_regulator_data = {
2123 .constraints = {
2124 .name = "current range",
2125 .max_uA = 120000,
2126 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2127 },
2128 .num_consumer_supplies = 1,
2129 .consumer_supplies = &ad5398_consumer,
2130 };
2131
2132 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2133 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2134 static struct platform_device ad5398_virt_consumer_device = {
2135 .name = "reg-virt-consumer",
2136 .id = 0,
2137 .dev = {
2138 .platform_data = "current", /* Passed to driver */
2139 },
2140 };
2141 #endif
2142 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2143 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2144 static struct regulator_bulk_data ad5398_bulk_data = {
2145 .supply = "current",
2146 };
2147
2148 static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2149 .name = "ad5398",
2150 .num_supplies = 1,
2151 .supplies = &ad5398_bulk_data,
2152 };
2153
2154 static struct platform_device ad5398_userspace_consumer_device = {
2155 .name = "reg-userspace-consumer",
2156 .id = 0,
2157 .dev = {
2158 .platform_data = &ad5398_userspace_comsumer_data,
2159 },
2160 };
2161 #endif
2162 #endif
2163
2164 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2165 /* INT bound temperature alarm event. line 1 */
2166 static unsigned long adt7410_platform_data[2] = {
2167 IRQ_PG4, IRQF_TRIGGER_LOW,
2168 };
2169 #endif
2170
2171 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2172 /* INT bound temperature alarm event. line 1 */
2173 static unsigned long adt7316_i2c_data[2] = {
2174 IRQF_TRIGGER_LOW, /* interrupt flags */
2175 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2176 };
2177 #endif
2178
2179 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2180 #ifdef CONFIG_SND_SOC_AD193X_I2C
2181 {
2182 I2C_BOARD_INFO("ad1937", 0x04),
2183 },
2184 #endif
2185
2186 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
2187 {
2188 I2C_BOARD_INFO("adav803", 0x10),
2189 },
2190 #endif
2191
2192 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
2193 {
2194 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
2195 .irq = IRQ_PG5,
2196 .platform_data = (void *)&ad7142_i2c_platform_data,
2197 },
2198 #endif
2199
2200 #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2201 {
2202 I2C_BOARD_INFO("ad7150", 0x48),
2203 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2204 },
2205 #endif
2206
2207 #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2208 {
2209 I2C_BOARD_INFO("ad7152", 0x48),
2210 },
2211 #endif
2212
2213 #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2214 {
2215 I2C_BOARD_INFO("ad774x", 0x48),
2216 },
2217 #endif
2218
2219 #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2220 {
2221 I2C_BOARD_INFO("ade7854", 0x38),
2222 },
2223 #endif
2224
2225 #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2226 {
2227 I2C_BOARD_INFO("adt75", 0x9),
2228 .irq = IRQ_PG5,
2229 },
2230 #endif
2231
2232 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2233 {
2234 I2C_BOARD_INFO("adt7410", 0x48),
2235 /* CT critical temperature event. line 0 */
2236 .irq = IRQ_PG5,
2237 .platform_data = (void *)&adt7410_platform_data,
2238 },
2239 #endif
2240
2241 #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2242 {
2243 I2C_BOARD_INFO("ad7291", 0x20),
2244 .irq = IRQ_PG5,
2245 },
2246 #endif
2247
2248 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2249 {
2250 I2C_BOARD_INFO("adt7316", 0x48),
2251 .irq = IRQ_PG6,
2252 .platform_data = (void *)&adt7316_i2c_data,
2253 },
2254 #endif
2255
2256 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2257 {
2258 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
2259 },
2260 #endif
2261 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
2262 {
2263 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
2264 .irq = IRQ_PG6,
2265 },
2266 #endif
2267 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2268 {
2269 I2C_BOARD_INFO("ad7879", 0x2F),
2270 .irq = IRQ_PG5,
2271 .platform_data = (void *)&bfin_ad7879_ts_info,
2272 },
2273 #endif
2274 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2275 {
2276 I2C_BOARD_INFO("adp5588-keys", 0x34),
2277 .irq = IRQ_PG0,
2278 .platform_data = (void *)&adp5588_kpad_data,
2279 },
2280 #endif
2281 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2282 {
2283 I2C_BOARD_INFO("pmic-adp5520", 0x32),
2284 .irq = IRQ_PG0,
2285 .platform_data = (void *)&adp5520_pdev_data,
2286 },
2287 #endif
2288 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2289 {
2290 I2C_BOARD_INFO("adxl34x", 0x53),
2291 .irq = IRQ_PG3,
2292 .platform_data = (void *)&adxl34x_info,
2293 },
2294 #endif
2295 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2296 {
2297 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2298 .platform_data = (void *)&adp5588_gpio_data,
2299 },
2300 #endif
2301 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2302 {
2303 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2304 },
2305 #endif
2306 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2307 {
2308 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
2309 },
2310 #endif
2311 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2312 {
2313 I2C_BOARD_INFO("adp8870", 0x2B),
2314 .platform_data = (void *)&adp8870_pdata,
2315 },
2316 #endif
2317 #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2318 {
2319 I2C_BOARD_INFO("adau1371", 0x1A),
2320 },
2321 #endif
2322 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2323 {
2324 I2C_BOARD_INFO("adau1761", 0x38),
2325 },
2326 #endif
2327 #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2328 {
2329 I2C_BOARD_INFO("adau1361", 0x38),
2330 },
2331 #endif
2332 #if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
2333 {
2334 I2C_BOARD_INFO("adau1701", 0x34),
2335 },
2336 #endif
2337 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2338 {
2339 I2C_BOARD_INFO("ad5258", 0x18),
2340 },
2341 #endif
2342 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2343 {
2344 I2C_BOARD_INFO("ssm2602", 0x1b),
2345 },
2346 #endif
2347 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2348 {
2349 I2C_BOARD_INFO("ad5398", 0xC),
2350 .platform_data = (void *)&ad5398_regulator_data,
2351 },
2352 #endif
2353 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2354 {
2355 I2C_BOARD_INFO("adp8860", 0x2A),
2356 .platform_data = (void *)&adp8860_pdata,
2357 },
2358 #endif
2359 #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2360 {
2361 I2C_BOARD_INFO("adau1373", 0x1A),
2362 },
2363 #endif
2364 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2365 {
2366 I2C_BOARD_INFO("ad5252", 0x2e),
2367 },
2368 #endif
2369 };
2370 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
2371 || defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2372 unsigned short bfin_sport0_peripherals[] = {
2373 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2374 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
2375 };
2376 #endif
2377 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2378 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2379 static struct resource bfin_sport0_uart_resources[] = {
2380 {
2381 .start = SPORT0_TCR1,
2382 .end = SPORT0_MRCS3+4,
2383 .flags = IORESOURCE_MEM,
2384 },
2385 {
2386 .start = IRQ_SPORT0_RX,
2387 .end = IRQ_SPORT0_RX+1,
2388 .flags = IORESOURCE_IRQ,
2389 },
2390 {
2391 .start = IRQ_SPORT0_ERROR,
2392 .end = IRQ_SPORT0_ERROR,
2393 .flags = IORESOURCE_IRQ,
2394 },
2395 };
2396
2397 static struct platform_device bfin_sport0_uart_device = {
2398 .name = "bfin-sport-uart",
2399 .id = 0,
2400 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2401 .resource = bfin_sport0_uart_resources,
2402 .dev = {
2403 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2404 },
2405 };
2406 #endif
2407 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2408 static struct resource bfin_sport1_uart_resources[] = {
2409 {
2410 .start = SPORT1_TCR1,
2411 .end = SPORT1_MRCS3+4,
2412 .flags = IORESOURCE_MEM,
2413 },
2414 {
2415 .start = IRQ_SPORT1_RX,
2416 .end = IRQ_SPORT1_RX+1,
2417 .flags = IORESOURCE_IRQ,
2418 },
2419 {
2420 .start = IRQ_SPORT1_ERROR,
2421 .end = IRQ_SPORT1_ERROR,
2422 .flags = IORESOURCE_IRQ,
2423 },
2424 };
2425
2426 static unsigned short bfin_sport1_peripherals[] = {
2427 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2428 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
2429 };
2430
2431 static struct platform_device bfin_sport1_uart_device = {
2432 .name = "bfin-sport-uart",
2433 .id = 1,
2434 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2435 .resource = bfin_sport1_uart_resources,
2436 .dev = {
2437 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2438 },
2439 };
2440 #endif
2441 #endif
2442 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2443 static struct resource bfin_sport0_resources[] = {
2444 {
2445 .start = SPORT0_TCR1,
2446 .end = SPORT0_MRCS3+4,
2447 .flags = IORESOURCE_MEM,
2448 },
2449 {
2450 .start = IRQ_SPORT0_RX,
2451 .end = IRQ_SPORT0_RX+1,
2452 .flags = IORESOURCE_IRQ,
2453 },
2454 {
2455 .start = IRQ_SPORT0_TX,
2456 .end = IRQ_SPORT0_TX+1,
2457 .flags = IORESOURCE_IRQ,
2458 },
2459 {
2460 .start = IRQ_SPORT0_ERROR,
2461 .end = IRQ_SPORT0_ERROR,
2462 .flags = IORESOURCE_IRQ,
2463 },
2464 {
2465 .start = CH_SPORT0_TX,
2466 .end = CH_SPORT0_TX,
2467 .flags = IORESOURCE_DMA,
2468 },
2469 {
2470 .start = CH_SPORT0_RX,
2471 .end = CH_SPORT0_RX,
2472 .flags = IORESOURCE_DMA,
2473 },
2474 };
2475 static struct platform_device bfin_sport0_device = {
2476 .name = "bfin_sport_raw",
2477 .id = 0,
2478 .num_resources = ARRAY_SIZE(bfin_sport0_resources),
2479 .resource = bfin_sport0_resources,
2480 .dev = {
2481 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2482 },
2483 };
2484 #endif
2485 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2486 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2487 /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
2488
2489 #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2490 #define PATA_INT IRQ_PF5
2491 static struct pata_platform_info bfin_pata_platform_data = {
2492 .ioport_shift = 1,
2493 .irq_flags = IRQF_TRIGGER_HIGH,
2494 };
2495
2496 static struct resource bfin_pata_resources[] = {
2497 {
2498 .start = 0x20314020,
2499 .end = 0x2031403F,
2500 .flags = IORESOURCE_MEM,
2501 },
2502 {
2503 .start = 0x2031401C,
2504 .end = 0x2031401F,
2505 .flags = IORESOURCE_MEM,
2506 },
2507 {
2508 .start = PATA_INT,
2509 .end = PATA_INT,
2510 .flags = IORESOURCE_IRQ,
2511 },
2512 };
2513 #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2514 static struct pata_platform_info bfin_pata_platform_data = {
2515 .ioport_shift = 0,
2516 };
2517 /* CompactFlash Storage Card Memory Mapped Addressing
2518 * /REG = A11 = 1
2519 */
2520 static struct resource bfin_pata_resources[] = {
2521 {
2522 .start = 0x20211800,
2523 .end = 0x20211807,
2524 .flags = IORESOURCE_MEM,
2525 },
2526 {
2527 .start = 0x2021180E, /* Device Ctl */
2528 .end = 0x2021180E,
2529 .flags = IORESOURCE_MEM,
2530 },
2531 };
2532 #endif
2533
2534 static struct platform_device bfin_pata_device = {
2535 .name = "pata_platform",
2536 .id = -1,
2537 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2538 .resource = bfin_pata_resources,
2539 .dev = {
2540 .platform_data = &bfin_pata_platform_data,
2541 }
2542 };
2543 #endif
2544
2545 static const unsigned int cclk_vlev_datasheet[] =
2546 {
2547 VRPAIR(VLEV_085, 250000000),
2548 VRPAIR(VLEV_090, 376000000),
2549 VRPAIR(VLEV_095, 426000000),
2550 VRPAIR(VLEV_100, 426000000),
2551 VRPAIR(VLEV_105, 476000000),
2552 VRPAIR(VLEV_110, 476000000),
2553 VRPAIR(VLEV_115, 476000000),
2554 VRPAIR(VLEV_120, 500000000),
2555 VRPAIR(VLEV_125, 533000000),
2556 VRPAIR(VLEV_130, 600000000),
2557 };
2558
2559 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2560 .tuple_tab = cclk_vlev_datasheet,
2561 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2562 .vr_settling_time = 25 /* us */,
2563 };
2564
2565 static struct platform_device bfin_dpmc = {
2566 .name = "bfin dpmc",
2567 .dev = {
2568 .platform_data = &bfin_dmpc_vreg_data,
2569 },
2570 };
2571
2572 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2573 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2574 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2575
2576 #define SPORT_REQ(x) \
2577 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2578 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2579
2580 static const u16 bfin_snd_pin[][7] = {
2581 SPORT_REQ(0),
2582 SPORT_REQ(1),
2583 };
2584
2585 static struct bfin_snd_platform_data bfin_snd_data[] = {
2586 {
2587 .pin_req = &bfin_snd_pin[0][0],
2588 },
2589 {
2590 .pin_req = &bfin_snd_pin[1][0],
2591 },
2592 };
2593
2594 #define BFIN_SND_RES(x) \
2595 [x] = { \
2596 { \
2597 .start = SPORT##x##_TCR1, \
2598 .end = SPORT##x##_TCR1, \
2599 .flags = IORESOURCE_MEM \
2600 }, \
2601 { \
2602 .start = CH_SPORT##x##_RX, \
2603 .end = CH_SPORT##x##_RX, \
2604 .flags = IORESOURCE_DMA, \
2605 }, \
2606 { \
2607 .start = CH_SPORT##x##_TX, \
2608 .end = CH_SPORT##x##_TX, \
2609 .flags = IORESOURCE_DMA, \
2610 }, \
2611 { \
2612 .start = IRQ_SPORT##x##_ERROR, \
2613 .end = IRQ_SPORT##x##_ERROR, \
2614 .flags = IORESOURCE_IRQ, \
2615 } \
2616 }
2617
2618 static struct resource bfin_snd_resources[][4] = {
2619 BFIN_SND_RES(0),
2620 BFIN_SND_RES(1),
2621 };
2622 #endif
2623
2624 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2625 static struct platform_device bfin_i2s_pcm = {
2626 .name = "bfin-i2s-pcm-audio",
2627 .id = -1,
2628 };
2629 #endif
2630
2631 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2632 static struct platform_device bfin_tdm_pcm = {
2633 .name = "bfin-tdm-pcm-audio",
2634 .id = -1,
2635 };
2636 #endif
2637
2638 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2639 static struct platform_device bfin_ac97_pcm = {
2640 .name = "bfin-ac97-pcm-audio",
2641 .id = -1,
2642 };
2643 #endif
2644
2645 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
2646 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2647 static const char * const ad1836_link[] = {
2648 "bfin-i2s.0",
2649 "spi0.4",
2650 };
2651 static struct platform_device bfin_ad1836_machine = {
2652 .name = "bfin-snd-ad1836",
2653 .id = -1,
2654 .dev = {
2655 .platform_data = (void *)ad1836_link,
2656 },
2657 };
2658 #endif
2659
2660 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2661 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2662 static const unsigned ad73311_gpio[] = {
2663 GPIO_PF4,
2664 };
2665
2666 static struct platform_device bfin_ad73311_machine = {
2667 .name = "bfin-snd-ad73311",
2668 .id = 1,
2669 .dev = {
2670 .platform_data = (void *)ad73311_gpio,
2671 },
2672 };
2673 #endif
2674
2675 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2676 static struct platform_device bfin_ad73311_codec_device = {
2677 .name = "ad73311",
2678 .id = -1,
2679 };
2680 #endif
2681
2682 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
2683 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
2684 static struct platform_device bfin_eval_adav801_device = {
2685 .name = "bfin-eval-adav801",
2686 .id = -1,
2687 };
2688 #endif
2689
2690 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2691 static struct platform_device bfin_i2s = {
2692 .name = "bfin-i2s",
2693 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2694 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2695 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2696 .dev = {
2697 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2698 },
2699 };
2700 #endif
2701
2702 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2703 static struct platform_device bfin_tdm = {
2704 .name = "bfin-tdm",
2705 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2706 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2707 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2708 .dev = {
2709 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2710 },
2711 };
2712 #endif
2713
2714 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2715 static struct platform_device bfin_ac97 = {
2716 .name = "bfin-ac97",
2717 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2718 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2719 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2720 .dev = {
2721 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2722 },
2723 };
2724 #endif
2725
2726 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2727 #define REGULATOR_ADP122 "adp122"
2728 #define REGULATOR_ADP122_UV 2500000
2729
2730 static struct regulator_consumer_supply adp122_consumers = {
2731 .supply = REGULATOR_ADP122,
2732 };
2733
2734 static struct regulator_init_data adp_switch_regulator_data = {
2735 .constraints = {
2736 .name = REGULATOR_ADP122,
2737 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2738 .min_uV = REGULATOR_ADP122_UV,
2739 .max_uV = REGULATOR_ADP122_UV,
2740 .min_uA = 0,
2741 .max_uA = 300000,
2742 },
2743 .num_consumer_supplies = 1, /* only 1 */
2744 .consumer_supplies = &adp122_consumers,
2745 };
2746
2747 static struct fixed_voltage_config adp_switch_pdata = {
2748 .supply_name = REGULATOR_ADP122,
2749 .microvolts = REGULATOR_ADP122_UV,
2750 .gpio = GPIO_PF2,
2751 .enable_high = 1,
2752 .enabled_at_boot = 0,
2753 .init_data = &adp_switch_regulator_data,
2754 };
2755
2756 static struct platform_device adp_switch_device = {
2757 .name = "reg-fixed-voltage",
2758 .id = 0,
2759 .dev = {
2760 .platform_data = &adp_switch_pdata,
2761 },
2762 };
2763
2764 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2765 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2766 static struct regulator_bulk_data adp122_bulk_data = {
2767 .supply = REGULATOR_ADP122,
2768 };
2769
2770 static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2771 .name = REGULATOR_ADP122,
2772 .num_supplies = 1,
2773 .supplies = &adp122_bulk_data,
2774 };
2775
2776 static struct platform_device adp122_userspace_consumer_device = {
2777 .name = "reg-userspace-consumer",
2778 .id = 0,
2779 .dev = {
2780 .platform_data = &adp122_userspace_comsumer_data,
2781 },
2782 };
2783 #endif
2784 #endif
2785
2786 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2787 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2788
2789 static struct resource iio_gpio_trigger_resources[] = {
2790 [0] = {
2791 .start = IRQ_PF5,
2792 .end = IRQ_PF5,
2793 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2794 },
2795 };
2796
2797 static struct platform_device iio_gpio_trigger = {
2798 .name = "iio_gpio_trigger",
2799 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2800 .resource = iio_gpio_trigger_resources,
2801 };
2802 #endif
2803
2804 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2805 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2806 static struct platform_device bf5xx_adau1373_device = {
2807 .name = "bfin-eval-adau1373",
2808 };
2809 #endif
2810
2811 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
2812 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
2813 static struct platform_device bf5xx_adau1701_device = {
2814 .name = "bfin-eval-adau1701",
2815 };
2816 #endif
2817
2818 static struct platform_device *stamp_devices[] __initdata = {
2819
2820 &bfin_dpmc,
2821 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2822 &bfin_sport0_device,
2823 #endif
2824 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2825 &bfin_pcmcia_cf_device,
2826 #endif
2827
2828 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2829 &rtc_device,
2830 #endif
2831
2832 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2833 &sl811_hcd_device,
2834 #endif
2835
2836 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2837 &isp1362_hcd_device,
2838 #endif
2839
2840 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2841 &bfin_isp1760_device,
2842 #endif
2843
2844 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2845 &smc91x_device,
2846 #endif
2847
2848 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2849 &dm9000_device,
2850 #endif
2851
2852 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2853 &bfin_can_device,
2854 #endif
2855
2856 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
2857 &bfin_mii_bus,
2858 &bfin_mac_device,
2859 #endif
2860
2861 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2862 &net2272_bfin_device,
2863 #endif
2864
2865 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
2866 &bfin_spi0_device,
2867 #endif
2868
2869 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2870 &bfin_sport_spi0_device,
2871 &bfin_sport_spi1_device,
2872 #endif
2873
2874 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2875 &bfin_fb_device,
2876 #endif
2877
2878 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2879 &bfin_lq035q1_device,
2880 #endif
2881
2882 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
2883 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
2884 &bfin_capture_device,
2885 #endif
2886
2887 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
2888 #ifdef CONFIG_SERIAL_BFIN_UART0
2889 &bfin_uart0_device,
2890 #endif
2891 #ifdef CONFIG_SERIAL_BFIN_UART1
2892 &bfin_uart1_device,
2893 #endif
2894 #endif
2895
2896 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
2897 #ifdef CONFIG_BFIN_SIR0
2898 &bfin_sir0_device,
2899 #endif
2900 #ifdef CONFIG_BFIN_SIR1
2901 &bfin_sir1_device,
2902 #endif
2903 #endif
2904
2905 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2906 &i2c_bfin_twi_device,
2907 #endif
2908
2909 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2910 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2911 &bfin_sport0_uart_device,
2912 #endif
2913 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2914 &bfin_sport1_uart_device,
2915 #endif
2916 #endif
2917
2918 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2919 &bfin_pata_device,
2920 #endif
2921
2922 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2923 &bfin_device_gpiokeys,
2924 #endif
2925
2926 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2927 &bfin_async_nand_device,
2928 #endif
2929
2930 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2931 &stamp_flash_device,
2932 #endif
2933
2934 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2935 &bfin_i2s_pcm,
2936 #endif
2937
2938 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2939 &bfin_tdm_pcm,
2940 #endif
2941
2942 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2943 &bfin_ac97_pcm,
2944 #endif
2945
2946 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
2947 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2948 &bfin_ad1836_machine,
2949 #endif
2950
2951 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2952 defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2953 &bfin_ad73311_machine,
2954 #endif
2955
2956 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2957 &bfin_ad73311_codec_device,
2958 #endif
2959
2960 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2961 &bfin_i2s,
2962 #endif
2963
2964 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2965 &bfin_tdm,
2966 #endif
2967
2968 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2969 &bfin_ac97,
2970 #endif
2971
2972 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2973 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2974 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2975 &ad5398_virt_consumer_device,
2976 #endif
2977 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2978 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2979 &ad5398_userspace_consumer_device,
2980 #endif
2981 #endif
2982
2983 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2984 &adp_switch_device,
2985 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2986 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2987 &adp122_userspace_consumer_device,
2988 #endif
2989 #endif
2990
2991 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2992 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2993 &iio_gpio_trigger,
2994 #endif
2995
2996 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2997 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2998 &bf5xx_adau1373_device,
2999 #endif
3000
3001 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
3002 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
3003 &bf5xx_adau1701_device,
3004 #endif
3005
3006 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
3007 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
3008 &bfin_eval_adav801_device,
3009 #endif
3010 };
3011
3012 static int __init net2272_init(void)
3013 {
3014 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
3015 int ret;
3016
3017 ret = gpio_request(GPIO_PF6, "net2272");
3018 if (ret)
3019 return ret;
3020
3021 /* Reset the USB chip */
3022 gpio_direction_output(GPIO_PF6, 0);
3023 mdelay(2);
3024 gpio_set_value(GPIO_PF6, 1);
3025 #endif
3026
3027 return 0;
3028 }
3029
3030 static int __init stamp_init(void)
3031 {
3032 printk(KERN_INFO "%s(): registering device resources\n", __func__);
3033 bfin_plat_nand_init();
3034 adf702x_mac_init();
3035 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
3036 i2c_register_board_info(0, bfin_i2c_board_info,
3037 ARRAY_SIZE(bfin_i2c_board_info));
3038 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
3039
3040 if (net2272_init())
3041 pr_warning("unable to configure net2272; it probably won't work\n");
3042
3043 return 0;
3044 }
3045
3046 arch_initcall(stamp_init);
3047
3048
3049 static struct platform_device *stamp_early_devices[] __initdata = {
3050 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
3051 #ifdef CONFIG_SERIAL_BFIN_UART0
3052 &bfin_uart0_device,
3053 #endif
3054 #ifdef CONFIG_SERIAL_BFIN_UART1
3055 &bfin_uart1_device,
3056 #endif
3057 #endif
3058
3059 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
3060 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
3061 &bfin_sport0_uart_device,
3062 #endif
3063 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
3064 &bfin_sport1_uart_device,
3065 #endif
3066 #endif
3067 };
3068
3069 void __init native_machine_early_platform_add_devices(void)
3070 {
3071 printk(KERN_INFO "register early platform devices\n");
3072 early_platform_add_devices(stamp_early_devices,
3073 ARRAY_SIZE(stamp_early_devices));
3074 }
3075
3076 void native_machine_restart(char *cmd)
3077 {
3078 /* workaround reboot hang when booting from SPI */
3079 if ((bfin_read_SYSCR() & 0x7) == 0x3)
3080 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
3081 }
3082
3083 /*
3084 * Currently the MAC address is saved in Flash by U-Boot
3085 */
3086 #define FLASH_MAC 0x203f0000
3087 int bfin_get_ether_addr(char *addr)
3088 {
3089 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
3090 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
3091 return 0;
3092 }
3093 EXPORT_SYMBOL(bfin_get_ether_addr);
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