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pinctrl: sunxi: Move Allwinner A13 pinctrl driver to a driver of its own
[linux-2.6/btrfs-unstable.git] / drivers / pinctrl / sunxi / pinctrl-sunxi-pins.h
blob6ed6f4c3c2625338ed7ebc365de886093fc481ce
1 /*
2 * Allwinner A1X SoCs pinctrl driver.
3 *
4 * Copyright (C) 2012 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13 #ifndef __PINCTRL_SUNXI_PINS_H
14 #define __PINCTRL_SUNXI_PINS_H
15
16 #include "pinctrl-sunxi.h"
17
18 static const struct sunxi_desc_pin sun6i_a31_pins[] = {
19 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
20 SUNXI_FUNCTION(0x0, "gpio_in"),
21 SUNXI_FUNCTION(0x1, "gpio_out"),
22 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
23 SUNXI_FUNCTION(0x3, "lcd1"), /* D0 */
24 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
25 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
26 SUNXI_FUNCTION(0x0, "gpio_in"),
27 SUNXI_FUNCTION(0x1, "gpio_out"),
28 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
29 SUNXI_FUNCTION(0x3, "lcd1"), /* D1 */
30 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
31 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
32 SUNXI_FUNCTION(0x0, "gpio_in"),
33 SUNXI_FUNCTION(0x1, "gpio_out"),
34 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
35 SUNXI_FUNCTION(0x3, "lcd1"), /* D2 */
36 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
37 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
38 SUNXI_FUNCTION(0x0, "gpio_in"),
39 SUNXI_FUNCTION(0x1, "gpio_out"),
40 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
41 SUNXI_FUNCTION(0x3, "lcd1"), /* D3 */
42 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
43 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out"),
46 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
47 SUNXI_FUNCTION(0x3, "lcd1"), /* D4 */
48 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
49 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
50 SUNXI_FUNCTION(0x0, "gpio_in"),
51 SUNXI_FUNCTION(0x1, "gpio_out"),
52 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
53 SUNXI_FUNCTION(0x3, "lcd1"), /* D5 */
54 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
55 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
56 SUNXI_FUNCTION(0x0, "gpio_in"),
57 SUNXI_FUNCTION(0x1, "gpio_out"),
58 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
59 SUNXI_FUNCTION(0x3, "lcd1"), /* D6 */
60 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
65 SUNXI_FUNCTION(0x3, "lcd1"), /* D7 */
66 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
67 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
68 SUNXI_FUNCTION(0x0, "gpio_in"),
69 SUNXI_FUNCTION(0x1, "gpio_out"),
70 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
71 SUNXI_FUNCTION(0x3, "lcd1")), /* D8 */
72 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
73 SUNXI_FUNCTION(0x0, "gpio_in"),
74 SUNXI_FUNCTION(0x1, "gpio_out"),
75 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
76 SUNXI_FUNCTION(0x3, "lcd1"), /* D9 */
77 SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */
78 SUNXI_FUNCTION(0x5, "mmc2")), /* CMD */
79 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
80 SUNXI_FUNCTION(0x0, "gpio_in"),
81 SUNXI_FUNCTION(0x1, "gpio_out"),
82 SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */
83 SUNXI_FUNCTION(0x3, "lcd1"), /* D10 */
84 SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */
85 SUNXI_FUNCTION(0x5, "mmc2")), /* CLK */
86 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
90 SUNXI_FUNCTION(0x3, "lcd1"), /* D11 */
91 SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */
92 SUNXI_FUNCTION(0x5, "mmc2")), /* D0 */
93 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
94 SUNXI_FUNCTION(0x0, "gpio_in"),
95 SUNXI_FUNCTION(0x1, "gpio_out"),
96 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
97 SUNXI_FUNCTION(0x3, "lcd1"), /* D12 */
98 SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */
99 SUNXI_FUNCTION(0x5, "mmc2")), /* D1 */
100 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
101 SUNXI_FUNCTION(0x0, "gpio_in"),
102 SUNXI_FUNCTION(0x1, "gpio_out"),
103 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
104 SUNXI_FUNCTION(0x3, "lcd1"), /* D13 */
105 SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */
106 SUNXI_FUNCTION(0x5, "mmc2")), /* D2 */
107 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
108 SUNXI_FUNCTION(0x0, "gpio_in"),
109 SUNXI_FUNCTION(0x1, "gpio_out"),
110 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
111 SUNXI_FUNCTION(0x3, "lcd1"), /* D14 */
112 SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */
113 SUNXI_FUNCTION(0x5, "mmc2")), /* D3 */
114 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
115 SUNXI_FUNCTION(0x0, "gpio_in"),
116 SUNXI_FUNCTION(0x1, "gpio_out"),
117 SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
118 SUNXI_FUNCTION(0x3, "lcd1")), /* D15 */
119 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
120 SUNXI_FUNCTION(0x0, "gpio_in"),
121 SUNXI_FUNCTION(0x1, "gpio_out"),
122 SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
123 SUNXI_FUNCTION(0x3, "lcd1")), /* D16 */
124 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
128 SUNXI_FUNCTION(0x3, "lcd1")), /* D17 */
129 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
130 SUNXI_FUNCTION(0x0, "gpio_in"),
131 SUNXI_FUNCTION(0x1, "gpio_out"),
132 SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
133 SUNXI_FUNCTION(0x3, "lcd1")), /* D18 */
134 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
135 SUNXI_FUNCTION(0x0, "gpio_in"),
136 SUNXI_FUNCTION(0x1, "gpio_out"),
137 SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */
138 SUNXI_FUNCTION(0x3, "lcd1"), /* D19 */
139 SUNXI_FUNCTION(0x4, "pwm3")), /* Positive */
140 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
141 SUNXI_FUNCTION(0x0, "gpio_in"),
142 SUNXI_FUNCTION(0x1, "gpio_out"),
143 SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */
144 SUNXI_FUNCTION(0x3, "lcd1"), /* D20 */
145 SUNXI_FUNCTION(0x4, "pwm3")), /* Negative */
146 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
147 SUNXI_FUNCTION(0x0, "gpio_in"),
148 SUNXI_FUNCTION(0x1, "gpio_out"),
149 SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */
150 SUNXI_FUNCTION(0x3, "lcd1"), /* D21 */
151 SUNXI_FUNCTION(0x4, "spi3")), /* CS0 */
152 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
153 SUNXI_FUNCTION(0x0, "gpio_in"),
154 SUNXI_FUNCTION(0x1, "gpio_out"),
155 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
156 SUNXI_FUNCTION(0x3, "lcd1"), /* D22 */
157 SUNXI_FUNCTION(0x4, "spi3")), /* CLK */
158 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "gmac"), /* COL */
162 SUNXI_FUNCTION(0x3, "lcd1"), /* D23 */
163 SUNXI_FUNCTION(0x4, "spi3")), /* MOSI */
164 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
165 SUNXI_FUNCTION(0x0, "gpio_in"),
166 SUNXI_FUNCTION(0x1, "gpio_out"),
167 SUNXI_FUNCTION(0x2, "gmac"), /* CRS */
168 SUNXI_FUNCTION(0x3, "lcd1"), /* CLK */
169 SUNXI_FUNCTION(0x4, "spi3")), /* MISO */
170 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
171 SUNXI_FUNCTION(0x0, "gpio_in"),
172 SUNXI_FUNCTION(0x1, "gpio_out"),
173 SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */
174 SUNXI_FUNCTION(0x3, "lcd1"), /* DE */
175 SUNXI_FUNCTION(0x4, "spi3")), /* CS1 */
176 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
177 SUNXI_FUNCTION(0x0, "gpio_in"),
178 SUNXI_FUNCTION(0x1, "gpio_out"),
179 SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
180 SUNXI_FUNCTION(0x3, "lcd1")), /* HSYNC */
181 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
184 SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */
185 SUNXI_FUNCTION(0x3, "lcd1")), /* VSYNC */
186 /* Hole */
187 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
188 SUNXI_FUNCTION(0x0, "gpio_in"),
189 SUNXI_FUNCTION(0x1, "gpio_out"),
190 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
191 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
192 SUNXI_FUNCTION(0x4, "csi")), /* MCLK1 */
193 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out"),
196 SUNXI_FUNCTION(0x2, "i2s0")), /* BCLK */
197 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
198 SUNXI_FUNCTION(0x0, "gpio_in"),
199 SUNXI_FUNCTION(0x1, "gpio_out"),
200 SUNXI_FUNCTION(0x2, "i2s0")), /* LRCK */
201 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
202 SUNXI_FUNCTION(0x0, "gpio_in"),
203 SUNXI_FUNCTION(0x1, "gpio_out"),
204 SUNXI_FUNCTION(0x2, "i2s0")), /* DO0 */
205 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
206 SUNXI_FUNCTION(0x0, "gpio_in"),
207 SUNXI_FUNCTION(0x1, "gpio_out"),
208 SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */
209 SUNXI_FUNCTION(0x3, "uart3")), /* RTS */
210 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
211 SUNXI_FUNCTION(0x0, "gpio_in"),
212 SUNXI_FUNCTION(0x1, "gpio_out"),
213 SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */
214 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
215 SUNXI_FUNCTION(0x4, "i2c3")), /* SCK */
216 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
217 SUNXI_FUNCTION(0x0, "gpio_in"),
218 SUNXI_FUNCTION(0x1, "gpio_out"),
219 SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */
220 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
221 SUNXI_FUNCTION(0x4, "i2c3")), /* SDA */
222 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
223 SUNXI_FUNCTION(0x0, "gpio_in"),
224 SUNXI_FUNCTION(0x1, "gpio_out"),
225 SUNXI_FUNCTION(0x3, "i2s0")), /* DI */
226 /* Hole */
227 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
228 SUNXI_FUNCTION(0x0, "gpio_in"),
229 SUNXI_FUNCTION(0x1, "gpio_out"),
230 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
231 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
232 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
233 SUNXI_FUNCTION(0x0, "gpio_in"),
234 SUNXI_FUNCTION(0x1, "gpio_out"),
235 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
236 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
237 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
238 SUNXI_FUNCTION(0x0, "gpio_in"),
239 SUNXI_FUNCTION(0x1, "gpio_out"),
240 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
241 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
242 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
246 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
250 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out"),
253 SUNXI_FUNCTION(0x2, "nand0")), /* RE */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
258 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
259 SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */
260 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
261 SUNXI_FUNCTION(0x0, "gpio_in"),
262 SUNXI_FUNCTION(0x1, "gpio_out"),
263 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
264 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
265 SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */
266 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
267 SUNXI_FUNCTION(0x0, "gpio_in"),
268 SUNXI_FUNCTION(0x1, "gpio_out"),
269 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
270 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
271 SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */
272 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
273 SUNXI_FUNCTION(0x0, "gpio_in"),
274 SUNXI_FUNCTION(0x1, "gpio_out"),
275 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
276 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
277 SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */
278 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
282 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
283 SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */
284 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
285 SUNXI_FUNCTION(0x0, "gpio_in"),
286 SUNXI_FUNCTION(0x1, "gpio_out"),
287 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
288 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
289 SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */
290 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out"),
293 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
294 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
295 SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */
296 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
297 SUNXI_FUNCTION(0x0, "gpio_in"),
298 SUNXI_FUNCTION(0x1, "gpio_out"),
299 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
300 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
301 SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */
302 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out"),
305 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
306 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
307 SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */
308 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
309 SUNXI_FUNCTION(0x0, "gpio_in"),
310 SUNXI_FUNCTION(0x1, "gpio_out"),
311 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
312 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
313 SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */
314 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
315 SUNXI_FUNCTION(0x0, "gpio_in"),
316 SUNXI_FUNCTION(0x1, "gpio_out"),
317 SUNXI_FUNCTION(0x2, "nand0"), /* DQ8 */
318 SUNXI_FUNCTION(0x3, "nand1")), /* DQ0 */
319 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
320 SUNXI_FUNCTION(0x0, "gpio_in"),
321 SUNXI_FUNCTION(0x1, "gpio_out"),
322 SUNXI_FUNCTION(0x2, "nand0"), /* DQ9 */
323 SUNXI_FUNCTION(0x3, "nand1")), /* DQ1 */
324 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
325 SUNXI_FUNCTION(0x0, "gpio_in"),
326 SUNXI_FUNCTION(0x1, "gpio_out"),
327 SUNXI_FUNCTION(0x2, "nand0"), /* DQ10 */
328 SUNXI_FUNCTION(0x3, "nand1")), /* DQ2 */
329 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
330 SUNXI_FUNCTION(0x0, "gpio_in"),
331 SUNXI_FUNCTION(0x1, "gpio_out"),
332 SUNXI_FUNCTION(0x2, "nand0"), /* DQ11 */
333 SUNXI_FUNCTION(0x3, "nand1")), /* DQ3 */
334 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
335 SUNXI_FUNCTION(0x0, "gpio_in"),
336 SUNXI_FUNCTION(0x1, "gpio_out"),
337 SUNXI_FUNCTION(0x2, "nand0"), /* DQ12 */
338 SUNXI_FUNCTION(0x3, "nand1")), /* DQ4 */
339 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
340 SUNXI_FUNCTION(0x0, "gpio_in"),
341 SUNXI_FUNCTION(0x1, "gpio_out"),
342 SUNXI_FUNCTION(0x2, "nand0"), /* DQ13 */
343 SUNXI_FUNCTION(0x3, "nand1")), /* DQ5 */
344 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
345 SUNXI_FUNCTION(0x0, "gpio_in"),
346 SUNXI_FUNCTION(0x1, "gpio_out"),
347 SUNXI_FUNCTION(0x2, "nand0"), /* DQ14 */
348 SUNXI_FUNCTION(0x3, "nand1")), /* DQ6 */
349 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
350 SUNXI_FUNCTION(0x0, "gpio_in"),
351 SUNXI_FUNCTION(0x1, "gpio_out"),
352 SUNXI_FUNCTION(0x2, "nand0"), /* DQ15 */
353 SUNXI_FUNCTION(0x3, "nand1")), /* DQ7 */
354 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
355 SUNXI_FUNCTION(0x0, "gpio_in"),
356 SUNXI_FUNCTION(0x1, "gpio_out"),
357 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
358 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
359 SUNXI_FUNCTION(0x4, "mmc3")), /* RST */
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
364 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
365 SUNXI_FUNCTION(0x0, "gpio_in"),
366 SUNXI_FUNCTION(0x1, "gpio_out"),
367 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
368 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
369 SUNXI_FUNCTION(0x0, "gpio_in"),
370 SUNXI_FUNCTION(0x1, "gpio_out"),
371 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
372 /* Hole */
373 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
374 SUNXI_FUNCTION(0x0, "gpio_in"),
375 SUNXI_FUNCTION(0x1, "gpio_out"),
376 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
377 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
378 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
379 SUNXI_FUNCTION(0x0, "gpio_in"),
380 SUNXI_FUNCTION(0x1, "gpio_out"),
381 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
382 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
383 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
384 SUNXI_FUNCTION(0x0, "gpio_in"),
385 SUNXI_FUNCTION(0x1, "gpio_out"),
386 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
387 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
388 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
389 SUNXI_FUNCTION(0x0, "gpio_in"),
390 SUNXI_FUNCTION(0x1, "gpio_out"),
391 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
392 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
393 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
394 SUNXI_FUNCTION(0x0, "gpio_in"),
395 SUNXI_FUNCTION(0x1, "gpio_out"),
396 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
397 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
398 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
399 SUNXI_FUNCTION(0x0, "gpio_in"),
400 SUNXI_FUNCTION(0x1, "gpio_out"),
401 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
402 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
403 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
404 SUNXI_FUNCTION(0x0, "gpio_in"),
405 SUNXI_FUNCTION(0x1, "gpio_out"),
406 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
407 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
408 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
409 SUNXI_FUNCTION(0x0, "gpio_in"),
410 SUNXI_FUNCTION(0x1, "gpio_out"),
411 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
412 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
413 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
414 SUNXI_FUNCTION(0x0, "gpio_in"),
415 SUNXI_FUNCTION(0x1, "gpio_out"),
416 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
417 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
419 SUNXI_FUNCTION(0x0, "gpio_in"),
420 SUNXI_FUNCTION(0x1, "gpio_out"),
421 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
422 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
423 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
424 SUNXI_FUNCTION(0x0, "gpio_in"),
425 SUNXI_FUNCTION(0x1, "gpio_out"),
426 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
427 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
428 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
429 SUNXI_FUNCTION(0x0, "gpio_in"),
430 SUNXI_FUNCTION(0x1, "gpio_out"),
431 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
432 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
433 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
434 SUNXI_FUNCTION(0x0, "gpio_in"),
435 SUNXI_FUNCTION(0x1, "gpio_out"),
436 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
437 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
438 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
439 SUNXI_FUNCTION(0x0, "gpio_in"),
440 SUNXI_FUNCTION(0x1, "gpio_out"),
441 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
442 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
443 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
444 SUNXI_FUNCTION(0x0, "gpio_in"),
445 SUNXI_FUNCTION(0x1, "gpio_out"),
446 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
447 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
448 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
449 SUNXI_FUNCTION(0x0, "gpio_in"),
450 SUNXI_FUNCTION(0x1, "gpio_out"),
451 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
452 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
453 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
454 SUNXI_FUNCTION(0x0, "gpio_in"),
455 SUNXI_FUNCTION(0x1, "gpio_out"),
456 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
457 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
458 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
459 SUNXI_FUNCTION(0x0, "gpio_in"),
460 SUNXI_FUNCTION(0x1, "gpio_out"),
461 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
462 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
463 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
464 SUNXI_FUNCTION(0x0, "gpio_in"),
465 SUNXI_FUNCTION(0x1, "gpio_out"),
466 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
467 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
468 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
469 SUNXI_FUNCTION(0x0, "gpio_in"),
470 SUNXI_FUNCTION(0x1, "gpio_out"),
471 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
472 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
473 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
474 SUNXI_FUNCTION(0x0, "gpio_in"),
475 SUNXI_FUNCTION(0x1, "gpio_out"),
476 SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */
477 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */
481 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
482 SUNXI_FUNCTION(0x0, "gpio_in"),
483 SUNXI_FUNCTION(0x1, "gpio_out"),
484 SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */
485 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
486 SUNXI_FUNCTION(0x0, "gpio_in"),
487 SUNXI_FUNCTION(0x1, "gpio_out"),
488 SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */
489 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
490 SUNXI_FUNCTION(0x0, "gpio_in"),
491 SUNXI_FUNCTION(0x1, "gpio_out"),
492 SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */
493 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
494 SUNXI_FUNCTION(0x0, "gpio_in"),
495 SUNXI_FUNCTION(0x1, "gpio_out"),
496 SUNXI_FUNCTION(0x2, "lcd0")), /* DE */
497 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
498 SUNXI_FUNCTION(0x0, "gpio_in"),
499 SUNXI_FUNCTION(0x1, "gpio_out"),
500 SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */
501 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */
505 /* Hole */
506 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out"),
509 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
510 SUNXI_FUNCTION(0x3, "ts")), /* CLK */
511 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
515 SUNXI_FUNCTION(0x3, "ts")), /* ERR */
516 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
517 SUNXI_FUNCTION(0x0, "gpio_in"),
518 SUNXI_FUNCTION(0x1, "gpio_out"),
519 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
520 SUNXI_FUNCTION(0x3, "ts")), /* SYNC */
521 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
522 SUNXI_FUNCTION(0x0, "gpio_in"),
523 SUNXI_FUNCTION(0x1, "gpio_out"),
524 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
525 SUNXI_FUNCTION(0x3, "ts")), /* DVLD */
526 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
527 SUNXI_FUNCTION(0x0, "gpio_in"),
528 SUNXI_FUNCTION(0x1, "gpio_out"),
529 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
530 SUNXI_FUNCTION(0x3, "uart5")), /* TX */
531 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
532 SUNXI_FUNCTION(0x0, "gpio_in"),
533 SUNXI_FUNCTION(0x1, "gpio_out"),
534 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
535 SUNXI_FUNCTION(0x3, "uart5")), /* RX */
536 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
537 SUNXI_FUNCTION(0x0, "gpio_in"),
538 SUNXI_FUNCTION(0x1, "gpio_out"),
539 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
540 SUNXI_FUNCTION(0x3, "uart5")), /* RTS */
541 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
542 SUNXI_FUNCTION(0x0, "gpio_in"),
543 SUNXI_FUNCTION(0x1, "gpio_out"),
544 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
545 SUNXI_FUNCTION(0x3, "uart5")), /* CTS */
546 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
547 SUNXI_FUNCTION(0x0, "gpio_in"),
548 SUNXI_FUNCTION(0x1, "gpio_out"),
549 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
550 SUNXI_FUNCTION(0x3, "ts")), /* D0 */
551 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
552 SUNXI_FUNCTION(0x0, "gpio_in"),
553 SUNXI_FUNCTION(0x1, "gpio_out"),
554 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
555 SUNXI_FUNCTION(0x3, "ts")), /* D1 */
556 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
557 SUNXI_FUNCTION(0x0, "gpio_in"),
558 SUNXI_FUNCTION(0x1, "gpio_out"),
559 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
560 SUNXI_FUNCTION(0x3, "ts")), /* D2 */
561 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
562 SUNXI_FUNCTION(0x0, "gpio_in"),
563 SUNXI_FUNCTION(0x1, "gpio_out"),
564 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
565 SUNXI_FUNCTION(0x3, "ts")), /* D3 */
566 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
567 SUNXI_FUNCTION(0x0, "gpio_in"),
568 SUNXI_FUNCTION(0x1, "gpio_out"),
569 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
570 SUNXI_FUNCTION(0x3, "ts")), /* D4 */
571 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
572 SUNXI_FUNCTION(0x0, "gpio_in"),
573 SUNXI_FUNCTION(0x1, "gpio_out"),
574 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
575 SUNXI_FUNCTION(0x3, "ts")), /* D5 */
576 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
577 SUNXI_FUNCTION(0x0, "gpio_in"),
578 SUNXI_FUNCTION(0x1, "gpio_out"),
579 SUNXI_FUNCTION(0x2, "csi"), /* D10 */
580 SUNXI_FUNCTION(0x3, "ts")), /* D6 */
581 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
582 SUNXI_FUNCTION(0x0, "gpio_in"),
583 SUNXI_FUNCTION(0x1, "gpio_out"),
584 SUNXI_FUNCTION(0x2, "csi"), /* D11 */
585 SUNXI_FUNCTION(0x3, "ts")), /* D7 */
586 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
587 SUNXI_FUNCTION(0x0, "gpio_in"),
588 SUNXI_FUNCTION(0x1, "gpio_out"),
589 SUNXI_FUNCTION(0x2, "csi")), /* MIPI CSI MCLK */
590 /* Hole */
591 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
592 SUNXI_FUNCTION(0x0, "gpio_in"),
593 SUNXI_FUNCTION(0x1, "gpio_out"),
594 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
595 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
596 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
597 SUNXI_FUNCTION(0x0, "gpio_in"),
598 SUNXI_FUNCTION(0x1, "gpio_out"),
599 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
600 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
601 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
602 SUNXI_FUNCTION(0x0, "gpio_in"),
603 SUNXI_FUNCTION(0x1, "gpio_out"),
604 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
605 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
606 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
607 SUNXI_FUNCTION(0x0, "gpio_in"),
608 SUNXI_FUNCTION(0x1, "gpio_out"),
609 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
610 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
611 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
612 SUNXI_FUNCTION(0x0, "gpio_in"),
613 SUNXI_FUNCTION(0x1, "gpio_out"),
614 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
615 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
616 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
617 SUNXI_FUNCTION(0x0, "gpio_in"),
618 SUNXI_FUNCTION(0x1, "gpio_out"),
619 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
620 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
621 /* Hole */
622 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
623 SUNXI_FUNCTION(0x0, "gpio_in"),
624 SUNXI_FUNCTION(0x1, "gpio_out"),
625 SUNXI_FUNCTION(0x2, "mmc1")), /* CLK */
626 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
627 SUNXI_FUNCTION(0x0, "gpio_in"),
628 SUNXI_FUNCTION(0x1, "gpio_out"),
629 SUNXI_FUNCTION(0x2, "mmc1")), /* CMD */
630 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
631 SUNXI_FUNCTION(0x0, "gpio_in"),
632 SUNXI_FUNCTION(0x1, "gpio_out"),
633 SUNXI_FUNCTION(0x2, "mmc1")), /* D0 */
634 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
635 SUNXI_FUNCTION(0x0, "gpio_in"),
636 SUNXI_FUNCTION(0x1, "gpio_out"),
637 SUNXI_FUNCTION(0x2, "mmc1")), /* D1 */
638 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
639 SUNXI_FUNCTION(0x0, "gpio_in"),
640 SUNXI_FUNCTION(0x1, "gpio_out"),
641 SUNXI_FUNCTION(0x2, "mmc1")), /* D2 */
642 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
643 SUNXI_FUNCTION(0x0, "gpio_in"),
644 SUNXI_FUNCTION(0x1, "gpio_out"),
645 SUNXI_FUNCTION(0x2, "mmc1")), /* D3 */
646 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
647 SUNXI_FUNCTION(0x0, "gpio_in"),
648 SUNXI_FUNCTION(0x1, "gpio_out"),
649 SUNXI_FUNCTION(0x2, "uart2")), /* TX */
650 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
651 SUNXI_FUNCTION(0x0, "gpio_in"),
652 SUNXI_FUNCTION(0x1, "gpio_out"),
653 SUNXI_FUNCTION(0x2, "uart2")), /* RX */
654 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
655 SUNXI_FUNCTION(0x0, "gpio_in"),
656 SUNXI_FUNCTION(0x1, "gpio_out"),
657 SUNXI_FUNCTION(0x2, "uart2")), /* RTS */
658 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
659 SUNXI_FUNCTION(0x0, "gpio_in"),
660 SUNXI_FUNCTION(0x1, "gpio_out"),
661 SUNXI_FUNCTION(0x2, "uart2")), /* CTS */
662 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
663 SUNXI_FUNCTION(0x0, "gpio_in"),
664 SUNXI_FUNCTION(0x1, "gpio_out"),
665 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
666 SUNXI_FUNCTION(0x3, "usb")), /* DP3 */
667 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
668 SUNXI_FUNCTION(0x0, "gpio_in"),
669 SUNXI_FUNCTION(0x1, "gpio_out"),
670 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
671 SUNXI_FUNCTION(0x3, "usb")), /* DM3 */
672 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
673 SUNXI_FUNCTION(0x0, "gpio_in"),
674 SUNXI_FUNCTION(0x1, "gpio_out"),
675 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
676 SUNXI_FUNCTION(0x3, "i2s1")), /* MCLK */
677 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
678 SUNXI_FUNCTION(0x0, "gpio_in"),
679 SUNXI_FUNCTION(0x1, "gpio_out"),
680 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
681 SUNXI_FUNCTION(0x3, "i2s1")), /* BCLK */
682 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
683 SUNXI_FUNCTION(0x0, "gpio_in"),
684 SUNXI_FUNCTION(0x1, "gpio_out"),
685 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
686 SUNXI_FUNCTION(0x3, "i2s1")), /* LRCK */
687 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
688 SUNXI_FUNCTION(0x0, "gpio_in"),
689 SUNXI_FUNCTION(0x1, "gpio_out"),
690 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
691 SUNXI_FUNCTION(0x3, "i2s1")), /* DIN */
692 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
693 SUNXI_FUNCTION(0x0, "gpio_in"),
694 SUNXI_FUNCTION(0x1, "gpio_out"),
695 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
696 SUNXI_FUNCTION(0x3, "i2s1")), /* DOUT */
697 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
698 SUNXI_FUNCTION(0x0, "gpio_in"),
699 SUNXI_FUNCTION(0x1, "gpio_out"),
700 SUNXI_FUNCTION(0x2, "uart4")), /* TX */
701 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
702 SUNXI_FUNCTION(0x0, "gpio_in"),
703 SUNXI_FUNCTION(0x1, "gpio_out"),
704 SUNXI_FUNCTION(0x2, "uart4")), /* RX */
705 /* Hole */
706 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
707 SUNXI_FUNCTION(0x0, "gpio_in"),
708 SUNXI_FUNCTION(0x1, "gpio_out"),
709 SUNXI_FUNCTION(0x2, "nand1")), /* WE */
710 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
711 SUNXI_FUNCTION(0x0, "gpio_in"),
712 SUNXI_FUNCTION(0x1, "gpio_out"),
713 SUNXI_FUNCTION(0x2, "nand1")), /* ALE */
714 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
715 SUNXI_FUNCTION(0x0, "gpio_in"),
716 SUNXI_FUNCTION(0x1, "gpio_out"),
717 SUNXI_FUNCTION(0x2, "nand1")), /* CLE */
718 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
719 SUNXI_FUNCTION(0x0, "gpio_in"),
720 SUNXI_FUNCTION(0x1, "gpio_out"),
721 SUNXI_FUNCTION(0x2, "nand1")), /* CE1 */
722 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
723 SUNXI_FUNCTION(0x0, "gpio_in"),
724 SUNXI_FUNCTION(0x1, "gpio_out"),
725 SUNXI_FUNCTION(0x2, "nand1")), /* CE0 */
726 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
727 SUNXI_FUNCTION(0x0, "gpio_in"),
728 SUNXI_FUNCTION(0x1, "gpio_out"),
729 SUNXI_FUNCTION(0x2, "nand1")), /* RE */
730 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
731 SUNXI_FUNCTION(0x0, "gpio_in"),
732 SUNXI_FUNCTION(0x1, "gpio_out"),
733 SUNXI_FUNCTION(0x2, "nand1")), /* RB0 */
734 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
735 SUNXI_FUNCTION(0x0, "gpio_in"),
736 SUNXI_FUNCTION(0x1, "gpio_out"),
737 SUNXI_FUNCTION(0x2, "nand1")), /* RB1 */
738 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
739 SUNXI_FUNCTION(0x0, "gpio_in"),
740 SUNXI_FUNCTION(0x1, "gpio_out"),
741 SUNXI_FUNCTION(0x2, "nand1")), /* DQS */
742 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
743 SUNXI_FUNCTION(0x0, "gpio_in"),
744 SUNXI_FUNCTION(0x1, "gpio_out"),
745 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
746 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
747 SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */
748 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
749 SUNXI_FUNCTION(0x0, "gpio_in"),
750 SUNXI_FUNCTION(0x1, "gpio_out"),
751 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
752 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
753 SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */
754 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
755 SUNXI_FUNCTION(0x0, "gpio_in"),
756 SUNXI_FUNCTION(0x1, "gpio_out"),
757 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
758 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
759 SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */
760 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
761 SUNXI_FUNCTION(0x0, "gpio_in"),
762 SUNXI_FUNCTION(0x1, "gpio_out"),
763 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
764 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
765 SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */
766 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
767 SUNXI_FUNCTION(0x0, "gpio_in"),
768 SUNXI_FUNCTION(0x1, "gpio_out"),
769 SUNXI_FUNCTION(0x2, "pwm0")),
770 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
771 SUNXI_FUNCTION(0x0, "gpio_in"),
772 SUNXI_FUNCTION(0x1, "gpio_out"),
773 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
774 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
775 SUNXI_FUNCTION(0x0, "gpio_in"),
776 SUNXI_FUNCTION(0x1, "gpio_out"),
777 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
778 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
779 SUNXI_FUNCTION(0x0, "gpio_in"),
780 SUNXI_FUNCTION(0x1, "gpio_out"),
781 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
782 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
783 SUNXI_FUNCTION(0x0, "gpio_in"),
784 SUNXI_FUNCTION(0x1, "gpio_out"),
785 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
786 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
787 SUNXI_FUNCTION(0x0, "gpio_in"),
788 SUNXI_FUNCTION(0x1, "gpio_out"),
789 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
790 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
791 SUNXI_FUNCTION(0x0, "gpio_in"),
792 SUNXI_FUNCTION(0x1, "gpio_out"),
793 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
794 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
795 SUNXI_FUNCTION(0x0, "gpio_in"),
796 SUNXI_FUNCTION(0x1, "gpio_out"),
797 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
798 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
799 SUNXI_FUNCTION(0x0, "gpio_in"),
800 SUNXI_FUNCTION(0x1, "gpio_out"),
801 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
802 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
803 SUNXI_FUNCTION(0x0, "gpio_in"),
804 SUNXI_FUNCTION(0x1, "gpio_out")),
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out")),
808 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
809 SUNXI_FUNCTION(0x0, "gpio_in"),
810 SUNXI_FUNCTION(0x1, "gpio_out")),
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out")),
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out")),
817 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
818 SUNXI_FUNCTION(0x0, "gpio_in"),
819 SUNXI_FUNCTION(0x1, "gpio_out")),
820 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
821 SUNXI_FUNCTION(0x0, "gpio_in"),
822 SUNXI_FUNCTION(0x1, "gpio_out")),
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 29),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out"),
826 SUNXI_FUNCTION(0x2, "nand1")), /* CE2 */
827 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 30),
828 SUNXI_FUNCTION(0x0, "gpio_in"),
829 SUNXI_FUNCTION(0x1, "gpio_out"),
830 SUNXI_FUNCTION(0x2, "nand1")), /* CE3 */
831 };
832
833 static const struct sunxi_desc_pin sun6i_a31_r_pins[] = {
834 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 0),
835 SUNXI_FUNCTION(0x0, "gpio_in"),
836 SUNXI_FUNCTION(0x1, "gpio_out"),
837 SUNXI_FUNCTION(0x2, "s_twi"), /* SCK */
838 SUNXI_FUNCTION(0x3, "s_p2wi")), /* SCK */
839 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 1),
840 SUNXI_FUNCTION(0x0, "gpio_in"),
841 SUNXI_FUNCTION(0x1, "gpio_out"),
842 SUNXI_FUNCTION(0x2, "s_twi"), /* SDA */
843 SUNXI_FUNCTION(0x3, "s_p2wi")), /* SDA */
844 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 2),
845 SUNXI_FUNCTION(0x0, "gpio_in"),
846 SUNXI_FUNCTION(0x1, "gpio_out"),
847 SUNXI_FUNCTION(0x2, "s_uart")), /* TX */
848 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 3),
849 SUNXI_FUNCTION(0x0, "gpio_in"),
850 SUNXI_FUNCTION(0x1, "gpio_out"),
851 SUNXI_FUNCTION(0x2, "s_uart")), /* RX */
852 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 4),
853 SUNXI_FUNCTION(0x0, "gpio_in"),
854 SUNXI_FUNCTION(0x1, "gpio_out"),
855 SUNXI_FUNCTION(0x2, "s_ir")), /* RX */
856 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),
857 SUNXI_FUNCTION(0x0, "gpio_in"),
858 SUNXI_FUNCTION(0x1, "gpio_out"),
859 SUNXI_FUNCTION(0x3, "s_jtag")), /* MS */
860 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),
861 SUNXI_FUNCTION(0x0, "gpio_in"),
862 SUNXI_FUNCTION(0x1, "gpio_out"),
863 SUNXI_FUNCTION(0x3, "s_jtag")), /* CK */
864 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),
865 SUNXI_FUNCTION(0x0, "gpio_in"),
866 SUNXI_FUNCTION(0x1, "gpio_out"),
867 SUNXI_FUNCTION(0x3, "s_jtag")), /* DO */
868 SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),
869 SUNXI_FUNCTION(0x0, "gpio_in"),
870 SUNXI_FUNCTION(0x1, "gpio_out"),
871 SUNXI_FUNCTION(0x3, "s_jtag")), /* DI */
872 /* Hole */
873 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),
874 SUNXI_FUNCTION(0x0, "gpio_in"),
875 SUNXI_FUNCTION(0x1, "gpio_out")),
876 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),
877 SUNXI_FUNCTION(0x0, "gpio_in"),
878 SUNXI_FUNCTION(0x1, "gpio_out")),
879 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),
880 SUNXI_FUNCTION(0x0, "gpio_in"),
881 SUNXI_FUNCTION(0x1, "gpio_out"),
882 SUNXI_FUNCTION(0x3, "1wire")),
883 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),
884 SUNXI_FUNCTION(0x0, "gpio_in"),
885 SUNXI_FUNCTION(0x1, "gpio_out")),
886 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),
887 SUNXI_FUNCTION(0x0, "gpio_in"),
888 SUNXI_FUNCTION(0x1, "gpio_out")),
889 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),
890 SUNXI_FUNCTION(0x0, "gpio_in"),
891 SUNXI_FUNCTION(0x1, "gpio_out")),
892 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),
893 SUNXI_FUNCTION(0x0, "gpio_in"),
894 SUNXI_FUNCTION(0x1, "gpio_out")),
895 SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),
896 SUNXI_FUNCTION(0x0, "gpio_in"),
897 SUNXI_FUNCTION(0x1, "gpio_out"),
898 SUNXI_FUNCTION(0x3, "rtc")), /* CLKO */
899 };
900
901 static const struct sunxi_desc_pin sun7i_a20_pins[] = {
902 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
903 SUNXI_FUNCTION(0x0, "gpio_in"),
904 SUNXI_FUNCTION(0x1, "gpio_out"),
905 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
906 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
907 SUNXI_FUNCTION(0x4, "uart2"), /* RTS */
908 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD3 */
909 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
910 SUNXI_FUNCTION(0x0, "gpio_in"),
911 SUNXI_FUNCTION(0x1, "gpio_out"),
912 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
913 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
914 SUNXI_FUNCTION(0x4, "uart2"), /* CTS */
915 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD2 */
916 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
917 SUNXI_FUNCTION(0x0, "gpio_in"),
918 SUNXI_FUNCTION(0x1, "gpio_out"),
919 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
920 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
921 SUNXI_FUNCTION(0x4, "uart2"), /* TX */
922 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD1 */
923 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
924 SUNXI_FUNCTION(0x0, "gpio_in"),
925 SUNXI_FUNCTION(0x1, "gpio_out"),
926 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
927 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
928 SUNXI_FUNCTION(0x4, "uart2"), /* RX */
929 SUNXI_FUNCTION(0x5, "gmac")), /* GRXD0 */
930 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
931 SUNXI_FUNCTION(0x0, "gpio_in"),
932 SUNXI_FUNCTION(0x1, "gpio_out"),
933 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
934 SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */
935 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD3 */
936 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
937 SUNXI_FUNCTION(0x0, "gpio_in"),
938 SUNXI_FUNCTION(0x1, "gpio_out"),
939 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
940 SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */
941 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD2 */
942 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
943 SUNXI_FUNCTION(0x0, "gpio_in"),
944 SUNXI_FUNCTION(0x1, "gpio_out"),
945 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
946 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */
947 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD1 */
948 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
949 SUNXI_FUNCTION(0x0, "gpio_in"),
950 SUNXI_FUNCTION(0x1, "gpio_out"),
951 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
952 SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */
953 SUNXI_FUNCTION(0x5, "gmac")), /* GTXD0 */
954 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
955 SUNXI_FUNCTION(0x0, "gpio_in"),
956 SUNXI_FUNCTION(0x1, "gpio_out"),
957 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
958 SUNXI_FUNCTION(0x3, "spi3"), /* MISO */
959 SUNXI_FUNCTION(0x5, "gmac")), /* GRXCK */
960 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
961 SUNXI_FUNCTION(0x0, "gpio_in"),
962 SUNXI_FUNCTION(0x1, "gpio_out"),
963 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
964 SUNXI_FUNCTION(0x3, "spi3"), /* CS1 */
965 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ERXERR */
966 SUNXI_FUNCTION(0x6, "i2s1")), /* MCLK */
967 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
968 SUNXI_FUNCTION(0x0, "gpio_in"),
969 SUNXI_FUNCTION(0x1, "gpio_out"),
970 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
971 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
972 SUNXI_FUNCTION(0x5, "gmac")), /* GRXCTL / ERXDV */
973 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
974 SUNXI_FUNCTION(0x0, "gpio_in"),
975 SUNXI_FUNCTION(0x1, "gpio_out"),
976 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
977 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
978 SUNXI_FUNCTION(0x5, "gmac")), /* EMDC */
979 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
980 SUNXI_FUNCTION(0x0, "gpio_in"),
981 SUNXI_FUNCTION(0x1, "gpio_out"),
982 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
983 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
984 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
985 SUNXI_FUNCTION(0x5, "gmac")), /* EMDIO */
986 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
987 SUNXI_FUNCTION(0x0, "gpio_in"),
988 SUNXI_FUNCTION(0x1, "gpio_out"),
989 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
990 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
991 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
992 SUNXI_FUNCTION(0x5, "gmac")), /* GTXCTL / ETXEN */
993 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
994 SUNXI_FUNCTION(0x0, "gpio_in"),
995 SUNXI_FUNCTION(0x1, "gpio_out"),
996 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
997 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
998 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
999 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ETXCK */
1000 SUNXI_FUNCTION(0x6, "i2s1")), /* BCLK */
1001 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
1002 SUNXI_FUNCTION(0x0, "gpio_in"),
1003 SUNXI_FUNCTION(0x1, "gpio_out"),
1004 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
1005 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1006 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
1007 SUNXI_FUNCTION(0x5, "gmac"), /* GTXCK / ECRS */
1008 SUNXI_FUNCTION(0x6, "i2s1")), /* LRCK */
1009 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
1010 SUNXI_FUNCTION(0x0, "gpio_in"),
1011 SUNXI_FUNCTION(0x1, "gpio_out"),
1012 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
1013 SUNXI_FUNCTION(0x3, "can"), /* TX */
1014 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
1015 SUNXI_FUNCTION(0x5, "gmac"), /* GCLKIN / ECOL */
1016 SUNXI_FUNCTION(0x6, "i2s1")), /* DO */
1017 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
1018 SUNXI_FUNCTION(0x0, "gpio_in"),
1019 SUNXI_FUNCTION(0x1, "gpio_out"),
1020 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
1021 SUNXI_FUNCTION(0x3, "can"), /* RX */
1022 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
1023 SUNXI_FUNCTION(0x5, "gmac"), /* GNULL / ETXERR */
1024 SUNXI_FUNCTION(0x6, "i2s1")), /* LRCK */
1025 /* Hole */
1026 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
1027 SUNXI_FUNCTION(0x0, "gpio_in"),
1028 SUNXI_FUNCTION(0x1, "gpio_out"),
1029 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
1030 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
1031 SUNXI_FUNCTION(0x0, "gpio_in"),
1032 SUNXI_FUNCTION(0x1, "gpio_out"),
1033 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
1034 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
1035 SUNXI_FUNCTION(0x0, "gpio_in"),
1036 SUNXI_FUNCTION(0x1, "gpio_out"),
1037 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
1038 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
1039 SUNXI_FUNCTION(0x0, "gpio_in"),
1040 SUNXI_FUNCTION(0x1, "gpio_out"),
1041 SUNXI_FUNCTION(0x2, "ir0"), /* TX */
1042 SUNXI_FUNCTION(0x4, "spdif")), /* MCLK */
1043 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
1044 SUNXI_FUNCTION(0x0, "gpio_in"),
1045 SUNXI_FUNCTION(0x1, "gpio_out"),
1046 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
1047 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
1048 SUNXI_FUNCTION(0x0, "gpio_in"),
1049 SUNXI_FUNCTION(0x1, "gpio_out"),
1050 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
1051 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
1052 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
1053 SUNXI_FUNCTION(0x0, "gpio_in"),
1054 SUNXI_FUNCTION(0x1, "gpio_out"),
1055 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
1056 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
1057 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
1058 SUNXI_FUNCTION(0x0, "gpio_in"),
1059 SUNXI_FUNCTION(0x1, "gpio_out"),
1060 SUNXI_FUNCTION(0x2, "i2s0"), /* LRCK */
1061 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
1062 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
1063 SUNXI_FUNCTION(0x0, "gpio_in"),
1064 SUNXI_FUNCTION(0x1, "gpio_out"),
1065 SUNXI_FUNCTION(0x2, "i2s0"), /* DO0 */
1066 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
1067 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
1068 SUNXI_FUNCTION(0x0, "gpio_in"),
1069 SUNXI_FUNCTION(0x1, "gpio_out"),
1070 SUNXI_FUNCTION(0x2, "i2s0")), /* DO1 */
1071 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
1072 SUNXI_FUNCTION(0x0, "gpio_in"),
1073 SUNXI_FUNCTION(0x1, "gpio_out"),
1074 SUNXI_FUNCTION(0x2, "i2s0")), /* DO2 */
1075 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
1076 SUNXI_FUNCTION(0x0, "gpio_in"),
1077 SUNXI_FUNCTION(0x1, "gpio_out"),
1078 SUNXI_FUNCTION(0x2, "i2s0")), /* DO3 */
1079 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
1080 SUNXI_FUNCTION(0x0, "gpio_in"),
1081 SUNXI_FUNCTION(0x1, "gpio_out"),
1082 SUNXI_FUNCTION(0x2, "i2s0"), /* DI */
1083 SUNXI_FUNCTION(0x3, "ac97"), /* DI */
1084 SUNXI_FUNCTION(0x4, "spdif")), /* DI */
1085 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
1086 SUNXI_FUNCTION(0x0, "gpio_in"),
1087 SUNXI_FUNCTION(0x1, "gpio_out"),
1088 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
1089 SUNXI_FUNCTION(0x4, "spdif")), /* DO */
1090 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
1091 SUNXI_FUNCTION(0x0, "gpio_in"),
1092 SUNXI_FUNCTION(0x1, "gpio_out"),
1093 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
1094 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
1095 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
1096 SUNXI_FUNCTION(0x0, "gpio_in"),
1097 SUNXI_FUNCTION(0x1, "gpio_out"),
1098 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
1099 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
1100 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
1101 SUNXI_FUNCTION(0x0, "gpio_in"),
1102 SUNXI_FUNCTION(0x1, "gpio_out"),
1103 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
1104 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
1105 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
1106 SUNXI_FUNCTION(0x0, "gpio_in"),
1107 SUNXI_FUNCTION(0x1, "gpio_out"),
1108 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
1109 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
1110 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
1111 SUNXI_FUNCTION(0x0, "gpio_in"),
1112 SUNXI_FUNCTION(0x1, "gpio_out"),
1113 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
1114 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
1115 SUNXI_FUNCTION(0x0, "gpio_in"),
1116 SUNXI_FUNCTION(0x1, "gpio_out"),
1117 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
1118 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
1119 SUNXI_FUNCTION(0x0, "gpio_in"),
1120 SUNXI_FUNCTION(0x1, "gpio_out"),
1121 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
1122 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
1123 SUNXI_FUNCTION(0x0, "gpio_in"),
1124 SUNXI_FUNCTION(0x1, "gpio_out"),
1125 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
1126 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
1127 SUNXI_FUNCTION(0x0, "gpio_in"),
1128 SUNXI_FUNCTION(0x1, "gpio_out"),
1129 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
1130 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
1131 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
1132 SUNXI_FUNCTION(0x0, "gpio_in"),
1133 SUNXI_FUNCTION(0x1, "gpio_out"),
1134 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
1135 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
1136 /* Hole */
1137 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
1138 SUNXI_FUNCTION(0x0, "gpio_in"),
1139 SUNXI_FUNCTION(0x1, "gpio_out"),
1140 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
1141 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
1142 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
1143 SUNXI_FUNCTION(0x0, "gpio_in"),
1144 SUNXI_FUNCTION(0x1, "gpio_out"),
1145 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
1146 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
1147 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
1148 SUNXI_FUNCTION(0x0, "gpio_in"),
1149 SUNXI_FUNCTION(0x1, "gpio_out"),
1150 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
1151 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
1152 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
1153 SUNXI_FUNCTION(0x0, "gpio_in"),
1154 SUNXI_FUNCTION(0x1, "gpio_out"),
1155 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
1156 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
1157 SUNXI_FUNCTION(0x0, "gpio_in"),
1158 SUNXI_FUNCTION(0x1, "gpio_out"),
1159 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
1160 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
1161 SUNXI_FUNCTION(0x0, "gpio_in"),
1162 SUNXI_FUNCTION(0x1, "gpio_out"),
1163 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
1164 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
1165 SUNXI_FUNCTION(0x0, "gpio_in"),
1166 SUNXI_FUNCTION(0x1, "gpio_out"),
1167 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
1168 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
1169 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
1170 SUNXI_FUNCTION(0x0, "gpio_in"),
1171 SUNXI_FUNCTION(0x1, "gpio_out"),
1172 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
1173 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
1174 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
1175 SUNXI_FUNCTION(0x0, "gpio_in"),
1176 SUNXI_FUNCTION(0x1, "gpio_out"),
1177 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
1178 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
1179 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
1180 SUNXI_FUNCTION(0x0, "gpio_in"),
1181 SUNXI_FUNCTION(0x1, "gpio_out"),
1182 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
1183 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
1184 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
1185 SUNXI_FUNCTION(0x0, "gpio_in"),
1186 SUNXI_FUNCTION(0x1, "gpio_out"),
1187 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
1188 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
1189 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
1190 SUNXI_FUNCTION(0x0, "gpio_in"),
1191 SUNXI_FUNCTION(0x1, "gpio_out"),
1192 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
1193 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
1194 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
1195 SUNXI_FUNCTION(0x0, "gpio_in"),
1196 SUNXI_FUNCTION(0x1, "gpio_out"),
1197 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
1198 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
1199 SUNXI_FUNCTION(0x0, "gpio_in"),
1200 SUNXI_FUNCTION(0x1, "gpio_out"),
1201 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
1202 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
1203 SUNXI_FUNCTION(0x0, "gpio_in"),
1204 SUNXI_FUNCTION(0x1, "gpio_out"),
1205 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
1206 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
1207 SUNXI_FUNCTION(0x0, "gpio_in"),
1208 SUNXI_FUNCTION(0x1, "gpio_out"),
1209 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
1210 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
1211 SUNXI_FUNCTION(0x0, "gpio_in"),
1212 SUNXI_FUNCTION(0x1, "gpio_out"),
1213 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
1214 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
1215 SUNXI_FUNCTION(0x0, "gpio_in"),
1216 SUNXI_FUNCTION(0x1, "gpio_out"),
1217 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
1218 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
1219 SUNXI_FUNCTION(0x0, "gpio_in"),
1220 SUNXI_FUNCTION(0x1, "gpio_out"),
1221 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
1222 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
1223 SUNXI_FUNCTION(0x0, "gpio_in"),
1224 SUNXI_FUNCTION(0x1, "gpio_out"),
1225 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
1226 SUNXI_FUNCTION(0x3, "spi2"), /* CS0 */
1227 SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */
1228 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
1229 SUNXI_FUNCTION(0x0, "gpio_in"),
1230 SUNXI_FUNCTION(0x1, "gpio_out"),
1231 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
1232 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */
1233 SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
1234 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
1235 SUNXI_FUNCTION(0x0, "gpio_in"),
1236 SUNXI_FUNCTION(0x1, "gpio_out"),
1237 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
1238 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */
1239 SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */
1240 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
1241 SUNXI_FUNCTION(0x0, "gpio_in"),
1242 SUNXI_FUNCTION(0x1, "gpio_out"),
1243 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
1244 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */
1245 SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */
1246 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
1247 SUNXI_FUNCTION(0x0, "gpio_in"),
1248 SUNXI_FUNCTION(0x1, "gpio_out"),
1249 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
1250 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
1251 SUNXI_FUNCTION(0x0, "gpio_in"),
1252 SUNXI_FUNCTION(0x1, "gpio_out"),
1253 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
1254 /* Hole */
1255 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
1256 SUNXI_FUNCTION(0x0, "gpio_in"),
1257 SUNXI_FUNCTION(0x1, "gpio_out"),
1258 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
1259 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
1260 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
1261 SUNXI_FUNCTION(0x0, "gpio_in"),
1262 SUNXI_FUNCTION(0x1, "gpio_out"),
1263 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
1264 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
1265 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
1266 SUNXI_FUNCTION(0x0, "gpio_in"),
1267 SUNXI_FUNCTION(0x1, "gpio_out"),
1268 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
1269 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
1270 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
1271 SUNXI_FUNCTION(0x0, "gpio_in"),
1272 SUNXI_FUNCTION(0x1, "gpio_out"),
1273 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
1274 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
1275 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
1276 SUNXI_FUNCTION(0x0, "gpio_in"),
1277 SUNXI_FUNCTION(0x1, "gpio_out"),
1278 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
1279 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
1280 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
1281 SUNXI_FUNCTION(0x0, "gpio_in"),
1282 SUNXI_FUNCTION(0x1, "gpio_out"),
1283 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
1284 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
1285 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
1286 SUNXI_FUNCTION(0x0, "gpio_in"),
1287 SUNXI_FUNCTION(0x1, "gpio_out"),
1288 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
1289 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
1290 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
1291 SUNXI_FUNCTION(0x0, "gpio_in"),
1292 SUNXI_FUNCTION(0x1, "gpio_out"),
1293 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
1294 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
1295 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
1296 SUNXI_FUNCTION(0x0, "gpio_in"),
1297 SUNXI_FUNCTION(0x1, "gpio_out"),
1298 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
1299 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
1300 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
1301 SUNXI_FUNCTION(0x0, "gpio_in"),
1302 SUNXI_FUNCTION(0x1, "gpio_out"),
1303 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
1304 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
1305 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
1306 SUNXI_FUNCTION(0x0, "gpio_in"),
1307 SUNXI_FUNCTION(0x1, "gpio_out"),
1308 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
1309 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
1310 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
1311 SUNXI_FUNCTION(0x0, "gpio_in"),
1312 SUNXI_FUNCTION(0x1, "gpio_out"),
1313 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
1314 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
1315 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
1316 SUNXI_FUNCTION(0x0, "gpio_in"),
1317 SUNXI_FUNCTION(0x1, "gpio_out"),
1318 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
1319 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
1320 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
1321 SUNXI_FUNCTION(0x0, "gpio_in"),
1322 SUNXI_FUNCTION(0x1, "gpio_out"),
1323 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
1324 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
1325 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
1326 SUNXI_FUNCTION(0x0, "gpio_in"),
1327 SUNXI_FUNCTION(0x1, "gpio_out"),
1328 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
1329 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
1330 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
1331 SUNXI_FUNCTION(0x0, "gpio_in"),
1332 SUNXI_FUNCTION(0x1, "gpio_out"),
1333 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
1334 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
1335 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
1336 SUNXI_FUNCTION(0x0, "gpio_in"),
1337 SUNXI_FUNCTION(0x1, "gpio_out"),
1338 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
1339 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
1340 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
1341 SUNXI_FUNCTION(0x0, "gpio_in"),
1342 SUNXI_FUNCTION(0x1, "gpio_out"),
1343 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
1344 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
1345 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
1346 SUNXI_FUNCTION(0x0, "gpio_in"),
1347 SUNXI_FUNCTION(0x1, "gpio_out"),
1348 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
1349 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
1350 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
1351 SUNXI_FUNCTION(0x0, "gpio_in"),
1352 SUNXI_FUNCTION(0x1, "gpio_out"),
1353 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
1354 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
1355 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
1356 SUNXI_FUNCTION(0x0, "gpio_in"),
1357 SUNXI_FUNCTION(0x1, "gpio_out"),
1358 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
1359 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
1360 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
1361 SUNXI_FUNCTION(0x0, "gpio_in"),
1362 SUNXI_FUNCTION(0x1, "gpio_out"),
1363 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
1364 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
1365 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
1366 SUNXI_FUNCTION(0x0, "gpio_in"),
1367 SUNXI_FUNCTION(0x1, "gpio_out"),
1368 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
1369 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
1370 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
1371 SUNXI_FUNCTION(0x0, "gpio_in"),
1372 SUNXI_FUNCTION(0x1, "gpio_out"),
1373 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
1374 SUNXI_FUNCTION(0x3, "sim")), /* DET */
1375 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
1376 SUNXI_FUNCTION(0x0, "gpio_in"),
1377 SUNXI_FUNCTION(0x1, "gpio_out"),
1378 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
1379 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
1380 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
1381 SUNXI_FUNCTION(0x0, "gpio_in"),
1382 SUNXI_FUNCTION(0x1, "gpio_out"),
1383 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
1384 SUNXI_FUNCTION(0x3, "sim")), /* RST */
1385 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
1386 SUNXI_FUNCTION(0x0, "gpio_in"),
1387 SUNXI_FUNCTION(0x1, "gpio_out"),
1388 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
1389 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
1390 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
1391 SUNXI_FUNCTION(0x0, "gpio_in"),
1392 SUNXI_FUNCTION(0x1, "gpio_out"),
1393 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
1394 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
1395 /* Hole */
1396 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
1397 SUNXI_FUNCTION(0x0, "gpio_in"),
1398 SUNXI_FUNCTION(0x1, "gpio_out"),
1399 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
1400 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
1401 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
1402 SUNXI_FUNCTION(0x0, "gpio_in"),
1403 SUNXI_FUNCTION(0x1, "gpio_out"),
1404 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
1405 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
1406 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
1407 SUNXI_FUNCTION(0x0, "gpio_in"),
1408 SUNXI_FUNCTION(0x1, "gpio_out"),
1409 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
1410 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
1411 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
1412 SUNXI_FUNCTION(0x0, "gpio_in"),
1413 SUNXI_FUNCTION(0x1, "gpio_out"),
1414 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
1415 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
1416 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
1417 SUNXI_FUNCTION(0x0, "gpio_in"),
1418 SUNXI_FUNCTION(0x1, "gpio_out"),
1419 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
1420 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
1421 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
1422 SUNXI_FUNCTION(0x0, "gpio_in"),
1423 SUNXI_FUNCTION(0x1, "gpio_out"),
1424 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
1425 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
1426 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
1427 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
1428 SUNXI_FUNCTION(0x0, "gpio_in"),
1429 SUNXI_FUNCTION(0x1, "gpio_out"),
1430 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
1431 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
1432 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
1433 SUNXI_FUNCTION(0x0, "gpio_in"),
1434 SUNXI_FUNCTION(0x1, "gpio_out"),
1435 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
1436 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
1437 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
1438 SUNXI_FUNCTION(0x0, "gpio_in"),
1439 SUNXI_FUNCTION(0x1, "gpio_out"),
1440 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
1441 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
1442 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
1443 SUNXI_FUNCTION(0x0, "gpio_in"),
1444 SUNXI_FUNCTION(0x1, "gpio_out"),
1445 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
1446 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
1447 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
1448 SUNXI_FUNCTION(0x0, "gpio_in"),
1449 SUNXI_FUNCTION(0x1, "gpio_out"),
1450 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
1451 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
1452 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
1453 SUNXI_FUNCTION(0x0, "gpio_in"),
1454 SUNXI_FUNCTION(0x1, "gpio_out"),
1455 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
1456 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
1457 /* Hole */
1458 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
1459 SUNXI_FUNCTION(0x0, "gpio_in"),
1460 SUNXI_FUNCTION(0x1, "gpio_out"),
1461 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
1462 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
1463 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
1464 SUNXI_FUNCTION(0x0, "gpio_in"),
1465 SUNXI_FUNCTION(0x1, "gpio_out"),
1466 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
1467 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
1468 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
1469 SUNXI_FUNCTION(0x0, "gpio_in"),
1470 SUNXI_FUNCTION(0x1, "gpio_out"),
1471 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
1472 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
1473 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
1474 SUNXI_FUNCTION(0x0, "gpio_in"),
1475 SUNXI_FUNCTION(0x1, "gpio_out"),
1476 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
1477 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
1478 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
1479 SUNXI_FUNCTION(0x0, "gpio_in"),
1480 SUNXI_FUNCTION(0x1, "gpio_out"),
1481 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
1482 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
1483 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
1484 SUNXI_FUNCTION(0x0, "gpio_in"),
1485 SUNXI_FUNCTION(0x1, "gpio_out"),
1486 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
1487 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
1488 /* Hole */
1489 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
1490 SUNXI_FUNCTION(0x0, "gpio_in"),
1491 SUNXI_FUNCTION(0x1, "gpio_out"),
1492 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
1493 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
1494 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
1495 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
1496 SUNXI_FUNCTION(0x0, "gpio_in"),
1497 SUNXI_FUNCTION(0x1, "gpio_out"),
1498 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
1499 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
1500 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
1501 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
1502 SUNXI_FUNCTION(0x0, "gpio_in"),
1503 SUNXI_FUNCTION(0x1, "gpio_out"),
1504 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
1505 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
1506 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
1507 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
1508 SUNXI_FUNCTION(0x0, "gpio_in"),
1509 SUNXI_FUNCTION(0x1, "gpio_out"),
1510 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
1511 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
1512 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
1513 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
1514 SUNXI_FUNCTION(0x0, "gpio_in"),
1515 SUNXI_FUNCTION(0x1, "gpio_out"),
1516 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
1517 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
1518 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
1519 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
1520 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
1521 SUNXI_FUNCTION(0x0, "gpio_in"),
1522 SUNXI_FUNCTION(0x1, "gpio_out"),
1523 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
1524 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
1525 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
1526 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
1527 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
1528 SUNXI_FUNCTION(0x0, "gpio_in"),
1529 SUNXI_FUNCTION(0x1, "gpio_out"),
1530 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
1531 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
1532 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
1533 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
1534 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
1535 SUNXI_FUNCTION(0x0, "gpio_in"),
1536 SUNXI_FUNCTION(0x1, "gpio_out"),
1537 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
1538 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
1539 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
1540 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
1541 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
1542 SUNXI_FUNCTION(0x0, "gpio_in"),
1543 SUNXI_FUNCTION(0x1, "gpio_out"),
1544 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
1545 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
1546 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
1547 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
1548 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
1549 SUNXI_FUNCTION(0x0, "gpio_in"),
1550 SUNXI_FUNCTION(0x1, "gpio_out"),
1551 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
1552 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
1553 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
1554 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
1555 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
1556 SUNXI_FUNCTION(0x0, "gpio_in"),
1557 SUNXI_FUNCTION(0x1, "gpio_out"),
1558 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
1559 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
1560 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
1561 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
1562 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
1563 SUNXI_FUNCTION(0x0, "gpio_in"),
1564 SUNXI_FUNCTION(0x1, "gpio_out"),
1565 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
1566 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
1567 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
1568 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
1569 /* Hole */
1570 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
1571 SUNXI_FUNCTION(0x0, "gpio_in"),
1572 SUNXI_FUNCTION(0x1, "gpio_out"),
1573 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
1574 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
1575 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
1576 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
1577 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
1578 SUNXI_FUNCTION(0x0, "gpio_in"),
1579 SUNXI_FUNCTION(0x1, "gpio_out"),
1580 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
1581 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
1582 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
1583 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
1584 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
1585 SUNXI_FUNCTION(0x0, "gpio_in"),
1586 SUNXI_FUNCTION(0x1, "gpio_out"),
1587 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
1588 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
1589 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
1590 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
1591 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
1592 SUNXI_FUNCTION(0x0, "gpio_in"),
1593 SUNXI_FUNCTION(0x1, "gpio_out"),
1594 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
1595 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
1596 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
1597 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
1598 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
1599 SUNXI_FUNCTION(0x0, "gpio_in"),
1600 SUNXI_FUNCTION(0x1, "gpio_out"),
1601 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
1602 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
1603 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
1604 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
1605 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
1606 SUNXI_FUNCTION(0x0, "gpio_in"),
1607 SUNXI_FUNCTION(0x1, "gpio_out"),
1608 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
1609 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
1610 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
1611 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
1612 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
1613 SUNXI_FUNCTION(0x0, "gpio_in"),
1614 SUNXI_FUNCTION(0x1, "gpio_out"),
1615 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
1616 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
1617 SUNXI_FUNCTION(0x5, "ms"), /* BS */
1618 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
1619 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
1620 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
1621 SUNXI_FUNCTION(0x0, "gpio_in"),
1622 SUNXI_FUNCTION(0x1, "gpio_out"),
1623 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
1624 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
1625 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
1626 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
1627 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
1628 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
1629 SUNXI_FUNCTION(0x0, "gpio_in"),
1630 SUNXI_FUNCTION(0x1, "gpio_out"),
1631 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
1632 SUNXI_FUNCTION(0x3, "emac"), /* ERXD3 */
1633 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
1634 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
1635 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
1636 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
1637 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
1638 SUNXI_FUNCTION(0x0, "gpio_in"),
1639 SUNXI_FUNCTION(0x1, "gpio_out"),
1640 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
1641 SUNXI_FUNCTION(0x3, "emac"), /* ERXD2 */
1642 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
1643 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
1644 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
1645 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
1646 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
1647 SUNXI_FUNCTION(0x0, "gpio_in"),
1648 SUNXI_FUNCTION(0x1, "gpio_out"),
1649 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
1650 SUNXI_FUNCTION(0x3, "emac"), /* ERXD1 */
1651 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
1652 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
1653 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
1654 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
1655 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
1656 SUNXI_FUNCTION(0x0, "gpio_in"),
1657 SUNXI_FUNCTION(0x1, "gpio_out"),
1658 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
1659 SUNXI_FUNCTION(0x3, "emac"), /* ERXD0 */
1660 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
1661 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
1662 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
1663 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
1664 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
1665 SUNXI_FUNCTION(0x0, "gpio_in"),
1666 SUNXI_FUNCTION(0x1, "gpio_out"),
1667 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
1668 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
1669 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
1670 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
1671 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
1672 SUNXI_FUNCTION(0x0, "gpio_in"),
1673 SUNXI_FUNCTION(0x1, "gpio_out"),
1674 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
1675 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
1676 SUNXI_FUNCTION(0x5, "sim"), /* RST */
1677 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
1678 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
1679 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
1680 SUNXI_FUNCTION(0x0, "gpio_in"),
1681 SUNXI_FUNCTION(0x1, "gpio_out"),
1682 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
1683 SUNXI_FUNCTION(0x3, "emac"), /* ETXD3 */
1684 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
1685 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
1686 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
1687 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
1688 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
1689 SUNXI_FUNCTION(0x0, "gpio_in"),
1690 SUNXI_FUNCTION(0x1, "gpio_out"),
1691 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
1692 SUNXI_FUNCTION(0x3, "emac"), /* ETXD3 */
1693 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
1694 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
1695 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
1696 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
1697 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
1698 SUNXI_FUNCTION(0x0, "gpio_in"),
1699 SUNXI_FUNCTION(0x1, "gpio_out"),
1700 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
1701 SUNXI_FUNCTION(0x3, "emac"), /* ETXD2 */
1702 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
1703 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
1704 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
1705 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
1706 SUNXI_FUNCTION(0x0, "gpio_in"),
1707 SUNXI_FUNCTION(0x1, "gpio_out"),
1708 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
1709 SUNXI_FUNCTION(0x3, "emac"), /* ETXD1 */
1710 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
1711 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
1712 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
1713 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
1714 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
1715 SUNXI_FUNCTION(0x0, "gpio_in"),
1716 SUNXI_FUNCTION(0x1, "gpio_out"),
1717 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
1718 SUNXI_FUNCTION(0x3, "emac"), /* ETXD0 */
1719 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
1720 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
1721 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
1722 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
1723 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
1724 SUNXI_FUNCTION(0x0, "gpio_in"),
1725 SUNXI_FUNCTION(0x1, "gpio_out"),
1726 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
1727 SUNXI_FUNCTION(0x3, "emac"), /* ERXERR */
1728 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
1729 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
1730 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
1731 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
1732 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
1733 SUNXI_FUNCTION(0x0, "gpio_in"),
1734 SUNXI_FUNCTION(0x1, "gpio_out"),
1735 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
1736 SUNXI_FUNCTION(0x3, "emac"), /* ERXDV */
1737 SUNXI_FUNCTION(0x4, "can"), /* TX */
1738 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
1739 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
1740 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
1741 SUNXI_FUNCTION(0x0, "gpio_in"),
1742 SUNXI_FUNCTION(0x1, "gpio_out"),
1743 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
1744 SUNXI_FUNCTION(0x3, "emac"), /* EMDC */
1745 SUNXI_FUNCTION(0x4, "can"), /* RX */
1746 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
1747 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
1748 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
1749 SUNXI_FUNCTION(0x0, "gpio_in"),
1750 SUNXI_FUNCTION(0x1, "gpio_out"),
1751 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
1752 SUNXI_FUNCTION(0x3, "emac"), /* EMDIO */
1753 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
1754 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
1755 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
1756 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
1757 SUNXI_FUNCTION(0x0, "gpio_in"),
1758 SUNXI_FUNCTION(0x1, "gpio_out"),
1759 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
1760 SUNXI_FUNCTION(0x3, "emac"), /* ETXEN */
1761 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
1762 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
1763 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
1764 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
1765 SUNXI_FUNCTION(0x0, "gpio_in"),
1766 SUNXI_FUNCTION(0x1, "gpio_out"),
1767 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
1768 SUNXI_FUNCTION(0x3, "emac"), /* ETXCK */
1769 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
1770 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
1771 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
1772 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
1773 SUNXI_FUNCTION(0x0, "gpio_in"),
1774 SUNXI_FUNCTION(0x1, "gpio_out"),
1775 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
1776 SUNXI_FUNCTION(0x3, "emac"), /* ECRS */
1777 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
1778 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
1779 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
1780 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
1781 SUNXI_FUNCTION(0x0, "gpio_in"),
1782 SUNXI_FUNCTION(0x1, "gpio_out"),
1783 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
1784 SUNXI_FUNCTION(0x3, "emac"), /* ECOL */
1785 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
1786 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
1787 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
1788 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
1789 SUNXI_FUNCTION(0x0, "gpio_in"),
1790 SUNXI_FUNCTION(0x1, "gpio_out"),
1791 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
1792 SUNXI_FUNCTION(0x3, "emac"), /* ETXERR */
1793 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
1794 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
1795 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
1796 /* Hole */
1797 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
1798 SUNXI_FUNCTION(0x0, "gpio_in"),
1799 SUNXI_FUNCTION(0x1, "gpio_out"),
1800 SUNXI_FUNCTION(0x3, "i2c3")), /* SCK */
1801 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
1802 SUNXI_FUNCTION(0x0, "gpio_in"),
1803 SUNXI_FUNCTION(0x1, "gpio_out"),
1804 SUNXI_FUNCTION(0x3, "i2c3")), /* SDA */
1805 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
1806 SUNXI_FUNCTION(0x0, "gpio_in"),
1807 SUNXI_FUNCTION(0x1, "gpio_out"),
1808 SUNXI_FUNCTION(0x3, "i2c4")), /* SCK */
1809 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
1810 SUNXI_FUNCTION(0x0, "gpio_in"),
1811 SUNXI_FUNCTION(0x1, "gpio_out"),
1812 SUNXI_FUNCTION(0x2, "pwm"), /* PWM1 */
1813 SUNXI_FUNCTION(0x3, "i2c4")), /* SDA */
1814 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
1815 SUNXI_FUNCTION(0x0, "gpio_in"),
1816 SUNXI_FUNCTION(0x1, "gpio_out"),
1817 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
1818 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
1819 SUNXI_FUNCTION(0x0, "gpio_in"),
1820 SUNXI_FUNCTION(0x1, "gpio_out"),
1821 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
1822 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
1823 SUNXI_FUNCTION(0x0, "gpio_in"),
1824 SUNXI_FUNCTION(0x1, "gpio_out"),
1825 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
1826 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
1827 SUNXI_FUNCTION(0x0, "gpio_in"),
1828 SUNXI_FUNCTION(0x1, "gpio_out"),
1829 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
1830 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
1831 SUNXI_FUNCTION(0x0, "gpio_in"),
1832 SUNXI_FUNCTION(0x1, "gpio_out"),
1833 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
1834 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
1835 SUNXI_FUNCTION(0x0, "gpio_in"),
1836 SUNXI_FUNCTION(0x1, "gpio_out"),
1837 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
1838 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
1839 SUNXI_FUNCTION(0x0, "gpio_in"),
1840 SUNXI_FUNCTION(0x1, "gpio_out"),
1841 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
1842 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
1843 SUNXI_FUNCTION_IRQ(0x5, 22)), /* EINT22 */
1844 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
1845 SUNXI_FUNCTION(0x0, "gpio_in"),
1846 SUNXI_FUNCTION(0x1, "gpio_out"),
1847 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
1848 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
1849 SUNXI_FUNCTION_IRQ(0x5, 23)), /* EINT23 */
1850 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
1851 SUNXI_FUNCTION(0x0, "gpio_in"),
1852 SUNXI_FUNCTION(0x1, "gpio_out"),
1853 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
1854 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
1855 SUNXI_FUNCTION(0x4, "clk_out_a"), /* CLK_OUT_A */
1856 SUNXI_FUNCTION_IRQ(0x5, 24)), /* EINT24 */
1857 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
1858 SUNXI_FUNCTION(0x0, "gpio_in"),
1859 SUNXI_FUNCTION(0x1, "gpio_out"),
1860 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
1861 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
1862 SUNXI_FUNCTION(0x4, "clk_out_b"), /* CLK_OUT_B */
1863 SUNXI_FUNCTION_IRQ(0x5, 25)), /* EINT25 */
1864 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
1865 SUNXI_FUNCTION(0x0, "gpio_in"),
1866 SUNXI_FUNCTION(0x1, "gpio_out"),
1867 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
1868 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
1869 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
1870 SUNXI_FUNCTION_IRQ(0x5, 26)), /* EINT26 */
1871 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
1872 SUNXI_FUNCTION(0x0, "gpio_in"),
1873 SUNXI_FUNCTION(0x1, "gpio_out"),
1874 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
1875 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
1876 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
1877 SUNXI_FUNCTION_IRQ(0x5, 27)), /* EINT27 */
1878 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
1879 SUNXI_FUNCTION(0x0, "gpio_in"),
1880 SUNXI_FUNCTION(0x1, "gpio_out"),
1881 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
1882 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
1883 SUNXI_FUNCTION_IRQ(0x5, 28)), /* EINT28 */
1884 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
1885 SUNXI_FUNCTION(0x0, "gpio_in"),
1886 SUNXI_FUNCTION(0x1, "gpio_out"),
1887 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
1888 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
1889 SUNXI_FUNCTION_IRQ(0x5, 29)), /* EINT29 */
1890 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
1891 SUNXI_FUNCTION(0x0, "gpio_in"),
1892 SUNXI_FUNCTION(0x1, "gpio_out"),
1893 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
1894 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
1895 SUNXI_FUNCTION_IRQ(0x5, 30)), /* EINT30 */
1896 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
1897 SUNXI_FUNCTION(0x0, "gpio_in"),
1898 SUNXI_FUNCTION(0x1, "gpio_out"),
1899 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
1900 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
1901 SUNXI_FUNCTION_IRQ(0x5, 31)), /* EINT31 */
1902 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
1903 SUNXI_FUNCTION(0x0, "gpio_in"),
1904 SUNXI_FUNCTION(0x1, "gpio_out"),
1905 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
1906 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
1907 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1908 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1909 SUNXI_FUNCTION(0x0, "gpio_in"),
1910 SUNXI_FUNCTION(0x1, "gpio_out"),
1911 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1912 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1913 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1914 };
1915
1916 static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
1917 .pins = sun6i_a31_pins,
1918 .npins = ARRAY_SIZE(sun6i_a31_pins),
1919 };
1920
1921 static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
1922 .pins = sun6i_a31_r_pins,
1923 .npins = ARRAY_SIZE(sun6i_a31_r_pins),
1924 .pin_base = PL_BASE,
1925 };
1926
1927 static const struct sunxi_pinctrl_desc sun7i_a20_pinctrl_data = {
1928 .pins = sun7i_a20_pins,
1929 .npins = ARRAY_SIZE(sun7i_a20_pins),
1930 };
1931
1932 #endif /* __PINCTRL_SUNXI_PINS_H */
(deprecated) Btrfs devel tree