1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
19 #ifndef _RTL819XU_HTTYPE_H_
20 #define _RTL819XU_HTTYPE_H_
22 #define MIMO_PS_STATIC 0
23 #define MIMO_PS_DYNAMIC 1
24 #define MIMO_PS_NOLIMIT 3
28 enum ht_channel_width
{
29 HT_CHANNEL_WIDTH_20
= 0,
30 HT_CHANNEL_WIDTH_20_40
= 1,
33 enum ht_extchnl_offset
{
34 HT_EXTCHNL_OFFSET_NO_EXT
= 0,
35 HT_EXTCHNL_OFFSET_UPPER
= 1,
36 HT_EXTCHNL_OFFSET_NO_DEF
= 2,
37 HT_EXTCHNL_OFFSET_LOWER
= 3,
57 u8 MaxRxAMPDUFactor
:2;
77 u8 RecommemdedTxWidth
:1;
80 u8 SrvIntGranularity
:3;
92 u8 LSigTxopProtectFull
:1;
101 HT_SPEC_VER_IEEE
= 0,
107 HT_AGG_FORCE_ENABLE
= 1,
108 HT_AGG_FORCE_DISABLE
= 2,
112 struct rt_hi_throughput
{
114 u8 bCurrentHTSupport
;
128 enum ht_spec_ver ePeerHTSpecVer
;
131 struct ht_capab_ele SelfHTCap
;
132 struct ht_info_ele SelfHTInfo
;
135 u8 PeerHTInfoBuf
[32];
140 u8 bCurrent_AMSDU_Support
;
141 u16 nCurrent_AMSDU_MaxSize
;
144 u8 bCurrentAMPDUEnable
;
146 u8 CurrentAMPDUFactor
;
148 u8 CurrentMPDUDensity
;
150 enum ht_aggre_mode ForcedAMPDUMode
;
151 u8 ForcedAMPDUFactor
;
152 u8 ForcedMPDUDensity
;
154 enum ht_aggre_mode ForcedAMSDUMode
;
155 u16 ForcedAMSDUMaxSize
;
164 enum ht_extchnl_offset CurSTAExtChnlOffset
;
171 u8 bRegRT2RTAggregation
;
173 u8 bCurrentRT2RTAggregation
;
174 u8 bCurrentRT2RTLongSlotTime
;
175 u8 szRT2RTAggBuffer
[10];
177 u8 bRegRxReorderEnable
;
178 u8 bCurRxReorderEnable
;
180 u8 RxReorderPendingTime
;
181 u16 RxReorderDropCounter
;
204 enum ht_spec_ver bdHTSpecVer
;
205 enum ht_channel_width bdBandWidth
;
207 u8 bdRT2RTAggregation
;
208 u8 bdRT2RTLongSlotTime
;
213 extern u8 MCS_FILTER_ALL
[16];
214 extern u8 MCS_FILTER_1SS
[16];
216 #define RATE_ADPT_1SS_MASK 0xFF
217 #define RATE_ADPT_2SS_MASK 0xF0
218 #define RATE_ADPT_MCS32_MASK 0x01
228 HT_IOT_PEER_UNKNOWN
= 0,
229 HT_IOT_PEER_REALTEK
= 1,
230 HT_IOT_PEER_REALTEK_92SE
= 2,
231 HT_IOT_PEER_BROADCOM
= 3,
232 HT_IOT_PEER_RALINK
= 4,
233 HT_IOT_PEER_ATHEROS
= 5,
234 HT_IOT_PEER_CISCO
= 6,
235 HT_IOT_PEER_MARVELL
= 7,
236 HT_IOT_PEER_92U_SOFTAP
= 8,
237 HT_IOT_PEER_SELF_SOFTAP
= 9,
238 HT_IOT_PEER_AIRGO
= 10,
239 HT_IOT_PEER_MAX
= 11,
243 HT_IOT_ACT_TX_USE_AMSDU_4K
= 0x00000001,
244 HT_IOT_ACT_TX_USE_AMSDU_8K
= 0x00000002,
245 HT_IOT_ACT_DISABLE_MCS14
= 0x00000004,
246 HT_IOT_ACT_DISABLE_MCS15
= 0x00000008,
247 HT_IOT_ACT_DISABLE_ALL_2SS
= 0x00000010,
248 HT_IOT_ACT_DISABLE_EDCA_TURBO
= 0x00000020,
249 HT_IOT_ACT_MGNT_USE_CCK_6M
= 0x00000040,
250 HT_IOT_ACT_CDD_FSYNC
= 0x00000080,
251 HT_IOT_ACT_PURE_N_MODE
= 0x00000100,
252 HT_IOT_ACT_FORCED_CTS2SELF
= 0x00000200,
253 HT_IOT_ACT_FORCED_RTS
= 0x00000400,
254 HT_IOT_ACT_AMSDU_ENABLE
= 0x00000800,
255 HT_IOT_ACT_REJECT_ADDBA_REQ
= 0x00001000,
256 HT_IOT_ACT_ALLOW_PEER_AGG_ONE_PKT
= 0x00002000,
257 HT_IOT_ACT_EDCA_BIAS_ON_RX
= 0x00004000,
259 HT_IOT_ACT_HYBRID_AGGREGATION
= 0x00010000,
260 HT_IOT_ACT_DISABLE_SHORT_GI
= 0x00020000,
261 HT_IOT_ACT_DISABLE_HIGH_POWER
= 0x00040000,
262 HT_IOT_ACT_DISABLE_TX_40_MHZ
= 0x00080000,
263 HT_IOT_ACT_TX_NO_AGGREGATION
= 0x00100000,
264 HT_IOT_ACT_DISABLE_TX_2SS
= 0x00200000,
266 HT_IOT_ACT_MID_HIGHPOWER
= 0x00400000,
267 HT_IOT_ACT_NULL_DATA_POWER_SAVING
= 0x00800000,
269 HT_IOT_ACT_DISABLE_CCK_RATE
= 0x01000000,
270 HT_IOT_ACT_FORCED_ENABLE_BE_TXOP
= 0x02000000,
271 HT_IOT_ACT_WA_IOT_Broadcom
= 0x04000000,
273 HT_IOT_ACT_DISABLE_RX_40MHZ_SHORT_GI
= 0x08000000,
278 HT_IOT_RAFUNC_DISABLE_ALL
= 0x00,
279 HT_IOT_RAFUNC_PEER_1R
= 0x01,
280 HT_IOT_RAFUNC_TX_AMSDU
= 0x02,
283 enum rt_ht_capability
{
284 RT_HT_CAP_USE_TURBO_AGGR
= 0x01,
285 RT_HT_CAP_USE_LONG_PREAMBLE
= 0x02,
286 RT_HT_CAP_USE_AMPDU
= 0x04,
287 RT_HT_CAP_USE_WOW
= 0x8,
288 RT_HT_CAP_USE_SOFTAP
= 0x10,
289 RT_HT_CAP_USE_92SE
= 0x20,