2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
54 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
56 host
->sdcard_irq_mask
&= ~(i
& TMIO_MASK_IRQ
);
57 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
60 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
62 host
->sdcard_irq_mask
|= (i
& TMIO_MASK_IRQ
);
63 sd_ctrl_write32(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
66 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
68 sd_ctrl_write32(host
, CTL_STATUS
, ~i
);
71 static void tmio_mmc_init_sg(struct tmio_mmc_host
*host
, struct mmc_data
*data
)
73 host
->sg_len
= data
->sg_len
;
74 host
->sg_ptr
= data
->sg
;
75 host
->sg_orig
= data
->sg
;
79 static int tmio_mmc_next_sg(struct tmio_mmc_host
*host
)
81 host
->sg_ptr
= sg_next(host
->sg_ptr
);
83 return --host
->sg_len
;
86 #ifdef CONFIG_MMC_DEBUG
88 #define STATUS_TO_TEXT(a, status, i) \
90 if (status & TMIO_STAT_##a) { \
97 static void pr_debug_status(u32 status
)
100 pr_debug("status: %08x = ", status
);
101 STATUS_TO_TEXT(CARD_REMOVE
, status
, i
);
102 STATUS_TO_TEXT(CARD_INSERT
, status
, i
);
103 STATUS_TO_TEXT(SIGSTATE
, status
, i
);
104 STATUS_TO_TEXT(WRPROTECT
, status
, i
);
105 STATUS_TO_TEXT(CARD_REMOVE_A
, status
, i
);
106 STATUS_TO_TEXT(CARD_INSERT_A
, status
, i
);
107 STATUS_TO_TEXT(SIGSTATE_A
, status
, i
);
108 STATUS_TO_TEXT(CMD_IDX_ERR
, status
, i
);
109 STATUS_TO_TEXT(STOPBIT_ERR
, status
, i
);
110 STATUS_TO_TEXT(ILL_FUNC
, status
, i
);
111 STATUS_TO_TEXT(CMD_BUSY
, status
, i
);
112 STATUS_TO_TEXT(CMDRESPEND
, status
, i
);
113 STATUS_TO_TEXT(DATAEND
, status
, i
);
114 STATUS_TO_TEXT(CRCFAIL
, status
, i
);
115 STATUS_TO_TEXT(DATATIMEOUT
, status
, i
);
116 STATUS_TO_TEXT(CMDTIMEOUT
, status
, i
);
117 STATUS_TO_TEXT(RXOVERFLOW
, status
, i
);
118 STATUS_TO_TEXT(TXUNDERRUN
, status
, i
);
119 STATUS_TO_TEXT(RXRDY
, status
, i
);
120 STATUS_TO_TEXT(TXRQ
, status
, i
);
121 STATUS_TO_TEXT(ILL_ACCESS
, status
, i
);
126 #define pr_debug_status(s) do { } while (0)
129 static void tmio_mmc_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
131 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
133 if (enable
&& !host
->sdio_irq_enabled
) {
134 /* Keep device active while SDIO irq is enabled */
135 pm_runtime_get_sync(mmc_dev(mmc
));
136 host
->sdio_irq_enabled
= true;
138 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
&
139 ~TMIO_SDIO_STAT_IOIRQ
;
140 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0001);
141 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
142 } else if (!enable
&& host
->sdio_irq_enabled
) {
143 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
144 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
145 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0000);
147 host
->sdio_irq_enabled
= false;
148 pm_runtime_mark_last_busy(mmc_dev(mmc
));
149 pm_runtime_put_autosuspend(mmc_dev(mmc
));
153 static void tmio_mmc_set_clock(struct tmio_mmc_host
*host
,
154 unsigned int new_clock
)
159 for (clock
= host
->mmc
->f_min
, clk
= 0x80000080;
160 new_clock
>= (clock
<<1); clk
>>= 1)
163 /* 1/1 clock is option */
164 if ((host
->pdata
->flags
& TMIO_MMC_CLK_ACTUAL
) &&
169 if (host
->set_clk_div
)
170 host
->set_clk_div(host
->pdev
, (clk
>>22) & 1);
172 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, clk
& 0x1ff);
176 static void tmio_mmc_clk_stop(struct tmio_mmc_host
*host
)
178 /* implicit BUG_ON(!res) */
179 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
180 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0000);
184 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~0x0100 &
185 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
189 static void tmio_mmc_clk_start(struct tmio_mmc_host
*host
)
191 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, 0x0100 |
192 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
195 /* implicit BUG_ON(!res) */
196 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
197 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0100);
202 static void tmio_mmc_reset(struct tmio_mmc_host
*host
)
204 /* FIXME - should we set stop clock reg here */
205 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0000);
206 /* implicit BUG_ON(!res) */
207 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
208 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0000);
210 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0001);
211 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
212 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0001);
216 static void tmio_mmc_reset_work(struct work_struct
*work
)
218 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
219 delayed_reset_work
.work
);
220 struct mmc_request
*mrq
;
223 spin_lock_irqsave(&host
->lock
, flags
);
227 * is request already finished? Since we use a non-blocking
228 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
229 * us, so, have to check for IS_ERR(host->mrq)
231 if (IS_ERR_OR_NULL(mrq
)
232 || time_is_after_jiffies(host
->last_req_ts
+
233 msecs_to_jiffies(2000))) {
234 spin_unlock_irqrestore(&host
->lock
, flags
);
238 dev_warn(&host
->pdev
->dev
,
239 "timeout waiting for hardware interrupt (CMD%u)\n",
243 host
->data
->error
= -ETIMEDOUT
;
245 host
->cmd
->error
= -ETIMEDOUT
;
247 mrq
->cmd
->error
= -ETIMEDOUT
;
251 host
->force_pio
= false;
253 spin_unlock_irqrestore(&host
->lock
, flags
);
255 tmio_mmc_reset(host
);
257 /* Ready for new calls */
260 tmio_mmc_abort_dma(host
);
261 mmc_request_done(host
->mmc
, mrq
);
263 pm_runtime_mark_last_busy(mmc_dev(host
->mmc
));
264 pm_runtime_put_autosuspend(mmc_dev(host
->mmc
));
267 /* called with host->lock held, interrupts disabled */
268 static void tmio_mmc_finish_request(struct tmio_mmc_host
*host
)
270 struct mmc_request
*mrq
;
273 spin_lock_irqsave(&host
->lock
, flags
);
276 if (IS_ERR_OR_NULL(mrq
)) {
277 spin_unlock_irqrestore(&host
->lock
, flags
);
283 host
->force_pio
= false;
285 cancel_delayed_work(&host
->delayed_reset_work
);
288 spin_unlock_irqrestore(&host
->lock
, flags
);
290 if (mrq
->cmd
->error
|| (mrq
->data
&& mrq
->data
->error
))
291 tmio_mmc_abort_dma(host
);
293 mmc_request_done(host
->mmc
, mrq
);
295 pm_runtime_mark_last_busy(mmc_dev(host
->mmc
));
296 pm_runtime_put_autosuspend(mmc_dev(host
->mmc
));
299 static void tmio_mmc_done_work(struct work_struct
*work
)
301 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
303 tmio_mmc_finish_request(host
);
306 /* These are the bitmasks the tmio chip requires to implement the MMC response
307 * types. Note that R1 and R6 are the same in this scheme. */
308 #define APP_CMD 0x0040
309 #define RESP_NONE 0x0300
310 #define RESP_R1 0x0400
311 #define RESP_R1B 0x0500
312 #define RESP_R2 0x0600
313 #define RESP_R3 0x0700
314 #define DATA_PRESENT 0x0800
315 #define TRANSFER_READ 0x1000
316 #define TRANSFER_MULTI 0x2000
317 #define SECURITY_CMD 0x4000
318 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
320 static int tmio_mmc_start_command(struct tmio_mmc_host
*host
, struct mmc_command
*cmd
)
322 struct mmc_data
*data
= host
->data
;
324 u32 irq_mask
= TMIO_MASK_CMD
;
326 /* CMD12 is handled by hardware */
327 if (cmd
->opcode
== MMC_STOP_TRANSMISSION
&& !cmd
->arg
) {
328 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x001);
332 switch (mmc_resp_type(cmd
)) {
333 case MMC_RSP_NONE
: c
|= RESP_NONE
; break;
334 case MMC_RSP_R1
: c
|= RESP_R1
; break;
335 case MMC_RSP_R1B
: c
|= RESP_R1B
; break;
336 case MMC_RSP_R2
: c
|= RESP_R2
; break;
337 case MMC_RSP_R3
: c
|= RESP_R3
; break;
339 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd
));
345 /* FIXME - this seems to be ok commented out but the spec suggest this bit
346 * should be set when issuing app commands.
347 * if(cmd->flags & MMC_FLAG_ACMD)
352 if (data
->blocks
> 1) {
353 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x100);
357 * Disable auto CMD12 at IO_RW_EXTENDED when
358 * multiple block transfer
360 if ((host
->pdata
->flags
& TMIO_MMC_HAVE_CMD12_CTRL
) &&
361 (cmd
->opcode
== SD_IO_RW_EXTENDED
))
364 if (data
->flags
& MMC_DATA_READ
)
368 if (!host
->native_hotplug
)
369 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
370 tmio_mmc_enable_mmc_irqs(host
, irq_mask
);
372 /* Fire off the command */
373 sd_ctrl_write32(host
, CTL_ARG_REG
, cmd
->arg
);
374 sd_ctrl_write16(host
, CTL_SD_CMD
, c
);
379 static void tmio_mmc_transfer_data(struct tmio_mmc_host
*host
,
383 int is_read
= host
->data
->flags
& MMC_DATA_READ
;
390 sd_ctrl_read16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
392 sd_ctrl_write16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
394 /* if count was even number */
398 /* if count was odd number */
399 buf8
= (u8
*)(buf
+ (count
>> 1));
404 * driver and this function are assuming that
405 * it is used as little endian
408 *buf8
= sd_ctrl_read16(host
, CTL_SD_DATA_PORT
) & 0xff;
410 sd_ctrl_write16(host
, CTL_SD_DATA_PORT
, *buf8
);
414 * This chip always returns (at least?) as much data as you ask for.
415 * I'm unsure what happens if you ask for less than a block. This should be
416 * looked into to ensure that a funny length read doesn't hose the controller.
418 static void tmio_mmc_pio_irq(struct tmio_mmc_host
*host
)
420 struct mmc_data
*data
= host
->data
;
426 if ((host
->chan_tx
|| host
->chan_rx
) && !host
->force_pio
) {
427 pr_err("PIO IRQ in DMA mode!\n");
430 pr_debug("Spurious PIO IRQ\n");
434 sg_virt
= tmio_mmc_kmap_atomic(host
->sg_ptr
, &flags
);
435 buf
= (unsigned short *)(sg_virt
+ host
->sg_off
);
437 count
= host
->sg_ptr
->length
- host
->sg_off
;
438 if (count
> data
->blksz
)
441 pr_debug("count: %08x offset: %08x flags %08x\n",
442 count
, host
->sg_off
, data
->flags
);
444 /* Transfer the data */
445 tmio_mmc_transfer_data(host
, buf
, count
);
447 host
->sg_off
+= count
;
449 tmio_mmc_kunmap_atomic(host
->sg_ptr
, &flags
, sg_virt
);
451 if (host
->sg_off
== host
->sg_ptr
->length
)
452 tmio_mmc_next_sg(host
);
457 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host
*host
)
459 if (host
->sg_ptr
== &host
->bounce_sg
) {
461 void *sg_vaddr
= tmio_mmc_kmap_atomic(host
->sg_orig
, &flags
);
462 memcpy(sg_vaddr
, host
->bounce_buf
, host
->bounce_sg
.length
);
463 tmio_mmc_kunmap_atomic(host
->sg_orig
, &flags
, sg_vaddr
);
467 /* needs to be called with host->lock held */
468 void tmio_mmc_do_data_irq(struct tmio_mmc_host
*host
)
470 struct mmc_data
*data
= host
->data
;
471 struct mmc_command
*stop
;
476 dev_warn(&host
->pdev
->dev
, "Spurious data end IRQ\n");
481 /* FIXME - return correct transfer count on errors */
483 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
485 data
->bytes_xfered
= 0;
487 pr_debug("Completed data request\n");
490 * FIXME: other drivers allow an optional stop command of any given type
491 * which we dont do, as the chip can auto generate them.
492 * Perhaps we can be smarter about when to use auto CMD12 and
493 * only issue the auto request when we know this is the desired
494 * stop command, allowing fallback to the stop command the
495 * upper layers expect. For now, we do what works.
498 if (data
->flags
& MMC_DATA_READ
) {
499 if (host
->chan_rx
&& !host
->force_pio
)
500 tmio_mmc_check_bounce_buffer(host
);
501 dev_dbg(&host
->pdev
->dev
, "Complete Rx request %p\n",
504 dev_dbg(&host
->pdev
->dev
, "Complete Tx request %p\n",
509 if (stop
->opcode
== MMC_STOP_TRANSMISSION
&& !stop
->arg
)
510 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x000);
515 schedule_work(&host
->done
);
518 static void tmio_mmc_data_irq(struct tmio_mmc_host
*host
)
520 struct mmc_data
*data
;
521 spin_lock(&host
->lock
);
527 if (host
->chan_tx
&& (data
->flags
& MMC_DATA_WRITE
) && !host
->force_pio
) {
528 u32 status
= sd_ctrl_read32(host
, CTL_STATUS
);
532 * Has all data been written out yet? Testing on SuperH showed,
533 * that in most cases the first interrupt comes already with the
534 * BUSY status bit clear, but on some operations, like mount or
535 * in the beginning of a write / sync / umount, there is one
536 * DATAEND interrupt with the BUSY bit set, in this cases
537 * waiting for one more interrupt fixes the problem.
539 if (host
->pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
) {
540 if (status
& TMIO_STAT_ILL_FUNC
)
543 if (!(status
& TMIO_STAT_CMD_BUSY
))
548 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
549 tasklet_schedule(&host
->dma_complete
);
551 } else if (host
->chan_rx
&& (data
->flags
& MMC_DATA_READ
) && !host
->force_pio
) {
552 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
553 tasklet_schedule(&host
->dma_complete
);
555 tmio_mmc_do_data_irq(host
);
556 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_READOP
| TMIO_MASK_WRITEOP
);
559 spin_unlock(&host
->lock
);
562 static void tmio_mmc_cmd_irq(struct tmio_mmc_host
*host
,
565 struct mmc_command
*cmd
= host
->cmd
;
568 spin_lock(&host
->lock
);
571 pr_debug("Spurious CMD irq\n");
577 /* This controller is sicker than the PXA one. Not only do we need to
578 * drop the top 8 bits of the first response word, we also need to
579 * modify the order of the response for short response command types.
582 for (i
= 3, addr
= CTL_RESPONSE
; i
>= 0 ; i
--, addr
+= 4)
583 cmd
->resp
[i
] = sd_ctrl_read32(host
, addr
);
585 if (cmd
->flags
& MMC_RSP_136
) {
586 cmd
->resp
[0] = (cmd
->resp
[0] << 8) | (cmd
->resp
[1] >> 24);
587 cmd
->resp
[1] = (cmd
->resp
[1] << 8) | (cmd
->resp
[2] >> 24);
588 cmd
->resp
[2] = (cmd
->resp
[2] << 8) | (cmd
->resp
[3] >> 24);
590 } else if (cmd
->flags
& MMC_RSP_R3
) {
591 cmd
->resp
[0] = cmd
->resp
[3];
594 if (stat
& TMIO_STAT_CMDTIMEOUT
)
595 cmd
->error
= -ETIMEDOUT
;
596 else if (stat
& TMIO_STAT_CRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
)
597 cmd
->error
= -EILSEQ
;
599 /* If there is data to handle we enable data IRQs here, and
600 * we will ultimatley finish the request in the data_end handler.
601 * If theres no data or we encountered an error, finish now.
603 if (host
->data
&& !cmd
->error
) {
604 if (host
->data
->flags
& MMC_DATA_READ
) {
605 if (host
->force_pio
|| !host
->chan_rx
)
606 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_READOP
);
608 tasklet_schedule(&host
->dma_issue
);
610 if (host
->force_pio
|| !host
->chan_tx
)
611 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_WRITEOP
);
613 tasklet_schedule(&host
->dma_issue
);
616 schedule_work(&host
->done
);
620 spin_unlock(&host
->lock
);
623 static void tmio_mmc_card_irq_status(struct tmio_mmc_host
*host
,
624 int *ireg
, int *status
)
626 *status
= sd_ctrl_read32(host
, CTL_STATUS
);
627 *ireg
= *status
& TMIO_MASK_IRQ
& ~host
->sdcard_irq_mask
;
629 pr_debug_status(*status
);
630 pr_debug_status(*ireg
);
632 /* Clear the status except the interrupt status */
633 sd_ctrl_write32(host
, CTL_STATUS
, TMIO_MASK_IRQ
);
636 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host
*host
,
637 int ireg
, int status
)
639 struct mmc_host
*mmc
= host
->mmc
;
641 /* Card insert / remove attempts */
642 if (ireg
& (TMIO_STAT_CARD_INSERT
| TMIO_STAT_CARD_REMOVE
)) {
643 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_CARD_INSERT
|
644 TMIO_STAT_CARD_REMOVE
);
645 if ((((ireg
& TMIO_STAT_CARD_REMOVE
) && mmc
->card
) ||
646 ((ireg
& TMIO_STAT_CARD_INSERT
) && !mmc
->card
)) &&
647 !work_pending(&mmc
->detect
.work
))
648 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
655 irqreturn_t
tmio_mmc_card_detect_irq(int irq
, void *devid
)
657 unsigned int ireg
, status
;
658 struct tmio_mmc_host
*host
= devid
;
660 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
661 __tmio_mmc_card_detect_irq(host
, ireg
, status
);
665 EXPORT_SYMBOL(tmio_mmc_card_detect_irq
);
667 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host
*host
,
668 int ireg
, int status
)
670 /* Command completion */
671 if (ireg
& (TMIO_STAT_CMDRESPEND
| TMIO_STAT_CMDTIMEOUT
)) {
672 tmio_mmc_ack_mmc_irqs(host
,
673 TMIO_STAT_CMDRESPEND
|
674 TMIO_STAT_CMDTIMEOUT
);
675 tmio_mmc_cmd_irq(host
, status
);
680 if (ireg
& (TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
)) {
681 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
);
682 tmio_mmc_pio_irq(host
);
686 /* Data transfer completion */
687 if (ireg
& TMIO_STAT_DATAEND
) {
688 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_DATAEND
);
689 tmio_mmc_data_irq(host
);
696 irqreturn_t
tmio_mmc_sdcard_irq(int irq
, void *devid
)
698 unsigned int ireg
, status
;
699 struct tmio_mmc_host
*host
= devid
;
701 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
702 __tmio_mmc_sdcard_irq(host
, ireg
, status
);
706 EXPORT_SYMBOL(tmio_mmc_sdcard_irq
);
708 irqreturn_t
tmio_mmc_sdio_irq(int irq
, void *devid
)
710 struct tmio_mmc_host
*host
= devid
;
711 struct mmc_host
*mmc
= host
->mmc
;
712 struct tmio_mmc_data
*pdata
= host
->pdata
;
713 unsigned int ireg
, status
;
714 unsigned int sdio_status
;
716 if (!(pdata
->flags
& TMIO_MMC_SDIO_IRQ
))
719 status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
);
720 ireg
= status
& TMIO_SDIO_MASK_ALL
& ~host
->sdcard_irq_mask
;
722 sdio_status
= status
& ~TMIO_SDIO_MASK_ALL
;
723 if (pdata
->flags
& TMIO_MMC_SDIO_STATUS_QUIRK
)
726 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, sdio_status
);
728 if (mmc
->caps
& MMC_CAP_SDIO_IRQ
&& ireg
& TMIO_SDIO_STAT_IOIRQ
)
729 mmc_signal_sdio_irq(mmc
);
733 EXPORT_SYMBOL(tmio_mmc_sdio_irq
);
735 irqreturn_t
tmio_mmc_irq(int irq
, void *devid
)
737 struct tmio_mmc_host
*host
= devid
;
738 unsigned int ireg
, status
;
740 pr_debug("MMC IRQ begin\n");
742 tmio_mmc_card_irq_status(host
, &ireg
, &status
);
743 if (__tmio_mmc_card_detect_irq(host
, ireg
, status
))
745 if (__tmio_mmc_sdcard_irq(host
, ireg
, status
))
748 tmio_mmc_sdio_irq(irq
, devid
);
752 EXPORT_SYMBOL(tmio_mmc_irq
);
754 static int tmio_mmc_start_data(struct tmio_mmc_host
*host
,
755 struct mmc_data
*data
)
757 struct tmio_mmc_data
*pdata
= host
->pdata
;
759 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
760 data
->blksz
, data
->blocks
);
762 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
763 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
) {
764 int blksz_2bytes
= pdata
->flags
& TMIO_MMC_BLKSZ_2BYTES
;
766 if (data
->blksz
< 2 || (data
->blksz
< 4 && !blksz_2bytes
)) {
767 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
768 mmc_hostname(host
->mmc
), data
->blksz
);
773 tmio_mmc_init_sg(host
, data
);
776 /* Set transfer length / blocksize */
777 sd_ctrl_write16(host
, CTL_SD_XFER_LEN
, data
->blksz
);
778 sd_ctrl_write16(host
, CTL_XFER_BLK_COUNT
, data
->blocks
);
780 tmio_mmc_start_dma(host
, data
);
785 /* Process requests from the MMC layer */
786 static void tmio_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
788 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
792 spin_lock_irqsave(&host
->lock
, flags
);
795 pr_debug("request not null\n");
796 if (IS_ERR(host
->mrq
)) {
797 spin_unlock_irqrestore(&host
->lock
, flags
);
798 mrq
->cmd
->error
= -EAGAIN
;
799 mmc_request_done(mmc
, mrq
);
804 host
->last_req_ts
= jiffies
;
808 spin_unlock_irqrestore(&host
->lock
, flags
);
810 pm_runtime_get_sync(mmc_dev(mmc
));
813 ret
= tmio_mmc_start_data(host
, mrq
->data
);
818 ret
= tmio_mmc_start_command(host
, mrq
->cmd
);
820 schedule_delayed_work(&host
->delayed_reset_work
,
821 msecs_to_jiffies(2000));
826 host
->force_pio
= false;
828 mrq
->cmd
->error
= ret
;
829 mmc_request_done(mmc
, mrq
);
831 pm_runtime_mark_last_busy(mmc_dev(mmc
));
832 pm_runtime_put_autosuspend(mmc_dev(mmc
));
835 static int tmio_mmc_clk_update(struct tmio_mmc_host
*host
)
837 struct mmc_host
*mmc
= host
->mmc
;
840 if (!host
->clk_enable
)
843 ret
= host
->clk_enable(host
->pdev
, &mmc
->f_max
);
845 mmc
->f_min
= mmc
->f_max
/ 512;
850 static void tmio_mmc_power_on(struct tmio_mmc_host
*host
, unsigned short vdd
)
852 struct mmc_host
*mmc
= host
->mmc
;
855 /* .set_ios() is returning void, so, no chance to report an error */
858 host
->set_pwr(host
->pdev
, 1);
860 if (!IS_ERR(mmc
->supply
.vmmc
)) {
861 ret
= mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, vdd
);
863 * Attention: empiric value. With a b43 WiFi SDIO card this
864 * delay proved necessary for reliable card-insertion probing.
865 * 100us were not enough. Is this the same 140us delay, as in
866 * tmio_mmc_set_ios()?
871 * It seems, VccQ should be switched on after Vcc, this is also what the
872 * omap_hsmmc.c driver does.
874 if (!IS_ERR(mmc
->supply
.vqmmc
) && !ret
) {
875 ret
= regulator_enable(mmc
->supply
.vqmmc
);
880 dev_dbg(&host
->pdev
->dev
, "Regulators failed to power up: %d\n",
884 static void tmio_mmc_power_off(struct tmio_mmc_host
*host
)
886 struct mmc_host
*mmc
= host
->mmc
;
888 if (!IS_ERR(mmc
->supply
.vqmmc
))
889 regulator_disable(mmc
->supply
.vqmmc
);
891 if (!IS_ERR(mmc
->supply
.vmmc
))
892 mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, 0);
895 host
->set_pwr(host
->pdev
, 0);
898 static void tmio_mmc_set_bus_width(struct tmio_mmc_host
*host
,
899 unsigned char bus_width
)
902 case MMC_BUS_WIDTH_1
:
903 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x80e0);
905 case MMC_BUS_WIDTH_4
:
906 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, 0x00e0);
911 /* Set MMC clock / power.
912 * Note: This controller uses a simple divider scheme therefore it cannot
913 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
914 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
917 static void tmio_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
919 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
920 struct device
*dev
= &host
->pdev
->dev
;
923 pm_runtime_get_sync(mmc_dev(mmc
));
925 mutex_lock(&host
->ios_lock
);
927 spin_lock_irqsave(&host
->lock
, flags
);
929 if (IS_ERR(host
->mrq
)) {
931 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
932 current
->comm
, task_pid_nr(current
),
933 ios
->clock
, ios
->power_mode
);
934 host
->mrq
= ERR_PTR(-EINTR
);
937 "%s.%d: CMD%u active since %lu, now %lu!\n",
938 current
->comm
, task_pid_nr(current
),
939 host
->mrq
->cmd
->opcode
, host
->last_req_ts
, jiffies
);
941 spin_unlock_irqrestore(&host
->lock
, flags
);
943 mutex_unlock(&host
->ios_lock
);
947 host
->mrq
= ERR_PTR(-EBUSY
);
949 spin_unlock_irqrestore(&host
->lock
, flags
);
951 switch (ios
->power_mode
) {
953 tmio_mmc_power_off(host
);
954 tmio_mmc_clk_stop(host
);
957 tmio_mmc_set_clock(host
, ios
->clock
);
958 tmio_mmc_power_on(host
, ios
->vdd
);
959 tmio_mmc_clk_start(host
);
960 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
963 tmio_mmc_set_clock(host
, ios
->clock
);
964 tmio_mmc_clk_start(host
);
965 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
969 /* Let things settle. delay taken from winCE driver */
971 if (PTR_ERR(host
->mrq
) == -EINTR
)
972 dev_dbg(&host
->pdev
->dev
,
973 "%s.%d: IOS interrupted: clk %u, mode %u",
974 current
->comm
, task_pid_nr(current
),
975 ios
->clock
, ios
->power_mode
);
978 host
->clk_cache
= ios
->clock
;
980 mutex_unlock(&host
->ios_lock
);
982 pm_runtime_mark_last_busy(mmc_dev(mmc
));
983 pm_runtime_put_autosuspend(mmc_dev(mmc
));
986 static int tmio_mmc_get_ro(struct mmc_host
*mmc
)
988 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
989 struct tmio_mmc_data
*pdata
= host
->pdata
;
990 int ret
= mmc_gpio_get_ro(mmc
);
994 pm_runtime_get_sync(mmc_dev(mmc
));
995 ret
= !((pdata
->flags
& TMIO_MMC_WRPROTECT_DISABLE
) ||
996 (sd_ctrl_read32(host
, CTL_STATUS
) & TMIO_STAT_WRPROTECT
));
997 pm_runtime_mark_last_busy(mmc_dev(mmc
));
998 pm_runtime_put_autosuspend(mmc_dev(mmc
));
1003 static int tmio_multi_io_quirk(struct mmc_card
*card
,
1004 unsigned int direction
, int blk_size
)
1006 struct tmio_mmc_host
*host
= mmc_priv(card
->host
);
1008 if (host
->multi_io_quirk
)
1009 return host
->multi_io_quirk(card
, direction
, blk_size
);
1014 static const struct mmc_host_ops tmio_mmc_ops
= {
1015 .request
= tmio_mmc_request
,
1016 .set_ios
= tmio_mmc_set_ios
,
1017 .get_ro
= tmio_mmc_get_ro
,
1018 .get_cd
= mmc_gpio_get_cd
,
1019 .enable_sdio_irq
= tmio_mmc_enable_sdio_irq
,
1020 .multi_io_quirk
= tmio_multi_io_quirk
,
1023 static int tmio_mmc_init_ocr(struct tmio_mmc_host
*host
)
1025 struct tmio_mmc_data
*pdata
= host
->pdata
;
1026 struct mmc_host
*mmc
= host
->mmc
;
1028 mmc_regulator_get_supply(mmc
);
1030 /* use ocr_mask if no regulator */
1031 if (!mmc
->ocr_avail
)
1032 mmc
->ocr_avail
= pdata
->ocr_mask
;
1036 * There is possibility that regulator has not been probed
1038 if (!mmc
->ocr_avail
)
1039 return -EPROBE_DEFER
;
1044 static void tmio_mmc_of_parse(struct platform_device
*pdev
,
1045 struct tmio_mmc_data
*pdata
)
1047 const struct device_node
*np
= pdev
->dev
.of_node
;
1051 if (of_get_property(np
, "toshiba,mmc-wrprotect-disable", NULL
))
1052 pdata
->flags
|= TMIO_MMC_WRPROTECT_DISABLE
;
1055 struct tmio_mmc_host
*
1056 tmio_mmc_host_alloc(struct platform_device
*pdev
)
1058 struct tmio_mmc_host
*host
;
1059 struct mmc_host
*mmc
;
1061 mmc
= mmc_alloc_host(sizeof(struct tmio_mmc_host
), &pdev
->dev
);
1065 host
= mmc_priv(mmc
);
1071 EXPORT_SYMBOL(tmio_mmc_host_alloc
);
1073 void tmio_mmc_host_free(struct tmio_mmc_host
*host
)
1075 mmc_free_host(host
->mmc
);
1077 EXPORT_SYMBOL(tmio_mmc_host_free
);
1079 int tmio_mmc_host_probe(struct tmio_mmc_host
*_host
,
1080 struct tmio_mmc_data
*pdata
)
1082 struct platform_device
*pdev
= _host
->pdev
;
1083 struct mmc_host
*mmc
= _host
->mmc
;
1084 struct resource
*res_ctl
;
1086 u32 irq_mask
= TMIO_MASK_CMD
;
1088 tmio_mmc_of_parse(pdev
, pdata
);
1090 if (!(pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
))
1091 _host
->write16_hook
= NULL
;
1093 res_ctl
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1097 ret
= mmc_of_parse(mmc
);
1101 _host
->pdata
= pdata
;
1102 platform_set_drvdata(pdev
, mmc
);
1104 _host
->set_pwr
= pdata
->set_pwr
;
1105 _host
->set_clk_div
= pdata
->set_clk_div
;
1107 ret
= tmio_mmc_init_ocr(_host
);
1111 _host
->ctl
= devm_ioremap(&pdev
->dev
,
1112 res_ctl
->start
, resource_size(res_ctl
));
1118 mmc
->ops
= &tmio_mmc_ops
;
1119 mmc
->caps
|= MMC_CAP_4_BIT_DATA
| pdata
->capabilities
;
1120 mmc
->caps2
|= pdata
->capabilities2
;
1122 mmc
->max_blk_size
= 512;
1123 mmc
->max_blk_count
= (PAGE_CACHE_SIZE
/ mmc
->max_blk_size
) *
1125 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
1126 mmc
->max_seg_size
= mmc
->max_req_size
;
1128 _host
->native_hotplug
= !(pdata
->flags
& TMIO_MMC_USE_GPIO_CD
||
1129 mmc
->caps
& MMC_CAP_NEEDS_POLL
||
1130 mmc
->caps
& MMC_CAP_NONREMOVABLE
||
1131 mmc
->slot
.cd_irq
>= 0);
1133 if (tmio_mmc_clk_update(_host
) < 0) {
1134 mmc
->f_max
= pdata
->hclk
;
1135 mmc
->f_min
= mmc
->f_max
/ 512;
1139 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1140 * looping forever...
1142 if (mmc
->f_min
== 0) {
1148 * While using internal tmio hardware logic for card detection, we need
1149 * to ensure it stays powered for it to work.
1151 if (_host
->native_hotplug
)
1152 pm_runtime_get_noresume(&pdev
->dev
);
1154 tmio_mmc_clk_stop(_host
);
1155 tmio_mmc_reset(_host
);
1157 _host
->sdcard_irq_mask
= sd_ctrl_read32(_host
, CTL_IRQ_MASK
);
1158 tmio_mmc_disable_mmc_irqs(_host
, TMIO_MASK_ALL
);
1160 /* Unmask the IRQs we want to know about */
1161 if (!_host
->chan_rx
)
1162 irq_mask
|= TMIO_MASK_READOP
;
1163 if (!_host
->chan_tx
)
1164 irq_mask
|= TMIO_MASK_WRITEOP
;
1165 if (!_host
->native_hotplug
)
1166 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
1168 _host
->sdcard_irq_mask
&= ~irq_mask
;
1170 _host
->sdio_irq_enabled
= false;
1171 if (pdata
->flags
& TMIO_MMC_SDIO_IRQ
) {
1172 _host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
1173 sd_ctrl_write16(_host
, CTL_SDIO_IRQ_MASK
, _host
->sdio_irq_mask
);
1174 sd_ctrl_write16(_host
, CTL_TRANSACTION_CTL
, 0x0000);
1177 spin_lock_init(&_host
->lock
);
1178 mutex_init(&_host
->ios_lock
);
1180 /* Init delayed work for request timeouts */
1181 INIT_DELAYED_WORK(&_host
->delayed_reset_work
, tmio_mmc_reset_work
);
1182 INIT_WORK(&_host
->done
, tmio_mmc_done_work
);
1184 /* See if we also get DMA */
1185 tmio_mmc_request_dma(_host
, pdata
);
1187 pm_runtime_set_active(&pdev
->dev
);
1188 pm_runtime_set_autosuspend_delay(&pdev
->dev
, 50);
1189 pm_runtime_use_autosuspend(&pdev
->dev
);
1190 pm_runtime_enable(&pdev
->dev
);
1192 ret
= mmc_add_host(mmc
);
1194 tmio_mmc_host_remove(_host
);
1198 dev_pm_qos_expose_latency_limit(&pdev
->dev
, 100);
1200 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
) {
1201 ret
= mmc_gpio_request_cd(mmc
, pdata
->cd_gpio
, 0);
1203 tmio_mmc_host_remove(_host
);
1206 mmc_gpiod_request_cd_irq(mmc
);
1215 EXPORT_SYMBOL(tmio_mmc_host_probe
);
1217 void tmio_mmc_host_remove(struct tmio_mmc_host
*host
)
1219 struct platform_device
*pdev
= host
->pdev
;
1220 struct mmc_host
*mmc
= host
->mmc
;
1222 if (!host
->native_hotplug
)
1223 pm_runtime_get_sync(&pdev
->dev
);
1225 dev_pm_qos_hide_latency_limit(&pdev
->dev
);
1227 mmc_remove_host(mmc
);
1228 cancel_work_sync(&host
->done
);
1229 cancel_delayed_work_sync(&host
->delayed_reset_work
);
1230 tmio_mmc_release_dma(host
);
1232 pm_runtime_put_sync(&pdev
->dev
);
1233 pm_runtime_disable(&pdev
->dev
);
1235 EXPORT_SYMBOL(tmio_mmc_host_remove
);
1238 int tmio_mmc_host_runtime_suspend(struct device
*dev
)
1240 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1241 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1243 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_ALL
);
1245 if (host
->clk_cache
)
1246 tmio_mmc_clk_stop(host
);
1248 if (host
->clk_disable
)
1249 host
->clk_disable(host
->pdev
);
1253 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend
);
1255 int tmio_mmc_host_runtime_resume(struct device
*dev
)
1257 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1258 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1260 tmio_mmc_reset(host
);
1261 tmio_mmc_clk_update(host
);
1263 if (host
->clk_cache
) {
1264 tmio_mmc_set_clock(host
, host
->clk_cache
);
1265 tmio_mmc_clk_start(host
);
1268 tmio_mmc_enable_dma(host
, true);
1272 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume
);
1275 MODULE_LICENSE("GPL v2");