ARM: 7642/1: netx: bump IRQ offset to 64
[linux-2.6/btrfs-unstable.git] / arch / arm / mach-netx / generic.c
blob1504b68f4c6672d132628307d97ee0aab534800f
1 /*
2 * arch/arm/mach-netx/generic.c
4 * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/device.h>
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/io.h>
26 #include <linux/irqchip/arm-vic.h>
27 #include <mach/hardware.h>
28 #include <asm/mach/map.h>
29 #include <mach/netx-regs.h>
30 #include <asm/mach/irq.h>
32 static struct map_desc netx_io_desc[] __initdata = {
34 .virtual = NETX_IO_VIRT,
35 .pfn = __phys_to_pfn(NETX_IO_PHYS),
36 .length = NETX_IO_SIZE,
37 .type = MT_DEVICE
41 void __init netx_map_io(void)
43 iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc));
46 static struct resource netx_rtc_resources[] = {
47 [0] = {
48 .start = 0x00101200,
49 .end = 0x00101220,
50 .flags = IORESOURCE_MEM,
54 static struct platform_device netx_rtc_device = {
55 .name = "netx-rtc",
56 .id = 0,
57 .num_resources = ARRAY_SIZE(netx_rtc_resources),
58 .resource = netx_rtc_resources,
61 static struct platform_device *devices[] __initdata = {
62 &netx_rtc_device,
65 #if 0
66 #define DEBUG_IRQ(fmt...) printk(fmt)
67 #else
68 #define DEBUG_IRQ(fmt...) while (0) {}
69 #endif
71 static void
72 netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc)
74 unsigned int irq = NETX_IRQ_HIF_CHAINED(0);
75 unsigned int stat;
77 stat = ((readl(NETX_DPMAS_INT_EN) &
78 readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f;
80 while (stat) {
81 if (stat & 1) {
82 DEBUG_IRQ("handling irq %d\n", irq);
83 generic_handle_irq(irq);
85 irq++;
86 stat >>= 1;
90 static int
91 netx_hif_irq_type(struct irq_data *d, unsigned int type)
93 unsigned int val, irq;
95 val = readl(NETX_DPMAS_IF_CONF1);
97 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
99 if (type & IRQ_TYPE_EDGE_RISING) {
100 DEBUG_IRQ("rising edges\n");
101 val |= (1 << 26) << irq;
103 if (type & IRQ_TYPE_EDGE_FALLING) {
104 DEBUG_IRQ("falling edges\n");
105 val &= ~((1 << 26) << irq);
107 if (type & IRQ_TYPE_LEVEL_LOW) {
108 DEBUG_IRQ("low level\n");
109 val &= ~((1 << 26) << irq);
111 if (type & IRQ_TYPE_LEVEL_HIGH) {
112 DEBUG_IRQ("high level\n");
113 val |= (1 << 26) << irq;
116 writel(val, NETX_DPMAS_IF_CONF1);
118 return 0;
121 static void
122 netx_hif_ack_irq(struct irq_data *d)
124 unsigned int val, irq;
126 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
127 writel((1 << 24) << irq, NETX_DPMAS_INT_STAT);
129 val = readl(NETX_DPMAS_INT_EN);
130 val &= ~((1 << 24) << irq);
131 writel(val, NETX_DPMAS_INT_EN);
133 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
136 static void
137 netx_hif_mask_irq(struct irq_data *d)
139 unsigned int val, irq;
141 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
142 val = readl(NETX_DPMAS_INT_EN);
143 val &= ~((1 << 24) << irq);
144 writel(val, NETX_DPMAS_INT_EN);
145 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
148 static void
149 netx_hif_unmask_irq(struct irq_data *d)
151 unsigned int val, irq;
153 irq = d->irq - NETX_IRQ_HIF_CHAINED(0);
154 val = readl(NETX_DPMAS_INT_EN);
155 val |= (1 << 24) << irq;
156 writel(val, NETX_DPMAS_INT_EN);
157 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq);
160 static struct irq_chip netx_hif_chip = {
161 .irq_ack = netx_hif_ack_irq,
162 .irq_mask = netx_hif_mask_irq,
163 .irq_unmask = netx_hif_unmask_irq,
164 .irq_set_type = netx_hif_irq_type,
167 void __init netx_init_irq(void)
169 int irq;
171 vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0);
173 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) {
174 irq_set_chip_and_handler(irq, &netx_hif_chip,
175 handle_level_irq);
176 set_irq_flags(irq, IRQF_VALID);
179 writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN);
180 irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler);
183 static int __init netx_init(void)
185 return platform_add_devices(devices, ARRAY_SIZE(devices));
188 subsys_initcall(netx_init);
190 void netx_restart(char mode, const char *cmd)
192 writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
193 NETX_SYSTEM_RES_CR);