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powerpc: In HV mode, use HSPRG0 for PACA
[linux-2.6/btrfs-unstable.git] / arch / powerpc / include / asm / exception-64s.h
blob337b6fa2f8cd6db48a6b72115d860e09cd532f33
1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
3 /*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
15 *
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18 *
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 */
27 /*
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
32 *
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
36 */
37
38 #define EX_R9 0
39 #define EX_R10 8
40 #define EX_R11 16
41 #define EX_R12 24
42 #define EX_R13 32
43 #define EX_SRR0 40
44 #define EX_DAR 48
45 #define EX_DSISR 56
46 #define EX_CCR 60
47 #define EX_R3 64
48 #define EX_LR 72
49
50 /*
51 * We're short on space and time in the exception prolog, so we can't
52 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
53 * low halfword of the address, but for Kdump we need the whole low
54 * word.
55 */
56 #define LOAD_HANDLER(reg, label) \
57 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
58
59 #define EXCEPTION_PROLOG_1(area) \
60 GET_PACA(r13); \
61 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
62 std r10,area+EX_R10(r13); \
63 std r11,area+EX_R11(r13); \
64 std r12,area+EX_R12(r13); \
65 mfspr r9,SPRN_SPRG_SCRATCH0; \
66 std r9,area+EX_R13(r13); \
67 mfcr r9
68
69 #define EXCEPTION_PROLOG_PSERIES_1(label) \
70 ld r12,PACAKBASE(r13); /* get high part of &label */ \
71 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
72 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
73 LOAD_HANDLER(r12,label) \
74 mtspr SPRN_SRR0,r12; \
75 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
76 mtspr SPRN_SRR1,r10; \
77 rfid; \
78 b . /* prevent speculative execution */
79
80 #define EXCEPTION_PROLOG_PSERIES(area, label) \
81 EXCEPTION_PROLOG_1(area); \
82 EXCEPTION_PROLOG_PSERIES_1(label);
83
84 /*
85 * The common exception prolog is used for all except a few exceptions
86 * such as a segment miss on a kernel address. We have to be prepared
87 * to take another exception from the point where we first touch the
88 * kernel stack onwards.
89 *
90 * On entry r13 points to the paca, r9-r13 are saved in the paca,
91 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
92 * SRR1, and relocation is on.
93 */
94 #define EXCEPTION_PROLOG_COMMON(n, area) \
95 andi. r10,r12,MSR_PR; /* See if coming from user */ \
96 mr r10,r1; /* Save r1 */ \
97 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
98 beq- 1f; \
99 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
100 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
101 bge- cr1,2f; /* abort if it is */ \
102 b 3f; \
103 2: li r1,(n); /* will be reloaded later */ \
104 sth r1,PACA_TRAP_SAVE(r13); \
105 b bad_stack; \
106 3: std r9,_CCR(r1); /* save CR in stackframe */ \
107 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
108 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
109 std r10,0(r1); /* make stack chain pointer */ \
110 std r0,GPR0(r1); /* save r0 in stackframe */ \
111 std r10,GPR1(r1); /* save r1 in stackframe */ \
112 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
113 std r2,GPR2(r1); /* save r2 in stackframe */ \
114 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
115 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
116 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
117 ld r10,area+EX_R10(r13); \
118 std r9,GPR9(r1); \
119 std r10,GPR10(r1); \
120 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
121 ld r10,area+EX_R12(r13); \
122 ld r11,area+EX_R13(r13); \
123 std r9,GPR11(r1); \
124 std r10,GPR12(r1); \
125 std r11,GPR13(r1); \
126 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
127 mflr r9; /* save LR in stackframe */ \
128 std r9,_LINK(r1); \
129 mfctr r10; /* save CTR in stackframe */ \
130 std r10,_CTR(r1); \
131 lbz r10,PACASOFTIRQEN(r13); \
132 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
133 std r10,SOFTE(r1); \
134 std r11,_XER(r1); \
135 li r9,(n)+1; \
136 std r9,_TRAP(r1); /* set trap number */ \
137 li r10,0; \
138 ld r11,exception_marker@toc(r2); \
139 std r10,RESULT(r1); /* clear regs->result */ \
140 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
141 ACCOUNT_STOLEN_TIME
142
143 /*
144 * Exception vectors.
145 */
146 #define STD_EXCEPTION_PSERIES(n, label) \
147 . = n; \
148 .globl label##_pSeries; \
149 label##_pSeries: \
150 HMT_MEDIUM; \
151 DO_KVM n; \
152 mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
153 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
154
155 #define HSTD_EXCEPTION_PSERIES(n, label) \
156 . = n; \
157 .globl label##_pSeries; \
158 label##_pSeries: \
159 HMT_MEDIUM; \
160 mtspr SPRN_SPRG_SCRATCH0,r20; /* save r20 */ \
161 mfspr r20,SPRN_HSRR0; /* copy HSRR0 to SRR0 */ \
162 mtspr SPRN_SRR0,r20; \
163 mfspr r20,SPRN_HSRR1; /* copy HSRR0 to SRR0 */ \
164 mtspr SPRN_SRR1,r20; \
165 mfspr r20,SPRN_SPRG_SCRATCH0; /* restore r20 */ \
166 mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
167 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
168
169
170 #define MASKABLE_EXCEPTION_PSERIES(n, label) \
171 . = n; \
172 .globl label##_pSeries; \
173 label##_pSeries: \
174 HMT_MEDIUM; \
175 DO_KVM n; \
176 mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \
177 GET_PACA(r13); \
178 std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
179 std r10,PACA_EXGEN+EX_R10(r13); \
180 lbz r10,PACASOFTIRQEN(r13); \
181 mfcr r9; \
182 cmpwi r10,0; \
183 beq masked_interrupt; \
184 mfspr r10,SPRN_SPRG_SCRATCH0; \
185 std r10,PACA_EXGEN+EX_R13(r13); \
186 std r11,PACA_EXGEN+EX_R11(r13); \
187 std r12,PACA_EXGEN+EX_R12(r13); \
188 ld r12,PACAKBASE(r13); /* get high part of &label */ \
189 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
190 mfspr r11,SPRN_SRR0; /* save SRR0 */ \
191 LOAD_HANDLER(r12,label##_common) \
192 mtspr SPRN_SRR0,r12; \
193 mfspr r12,SPRN_SRR1; /* and SRR1 */ \
194 mtspr SPRN_SRR1,r10; \
195 rfid; \
196 b . /* prevent speculative execution */
197
198 #ifdef CONFIG_PPC_ISERIES
199 #define DISABLE_INTS \
200 li r11,0; \
201 stb r11,PACASOFTIRQEN(r13); \
202 BEGIN_FW_FTR_SECTION; \
203 stb r11,PACAHARDIRQEN(r13); \
204 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
205 TRACE_DISABLE_INTS; \
206 BEGIN_FW_FTR_SECTION; \
207 mfmsr r10; \
208 ori r10,r10,MSR_EE; \
209 mtmsrd r10,1; \
210 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
211 #else
212 #define DISABLE_INTS \
213 li r11,0; \
214 stb r11,PACASOFTIRQEN(r13); \
215 stb r11,PACAHARDIRQEN(r13); \
216 TRACE_DISABLE_INTS
217 #endif /* CONFIG_PPC_ISERIES */
218
219 #define ENABLE_INTS \
220 ld r12,_MSR(r1); \
221 mfmsr r11; \
222 rlwimi r11,r12,0,MSR_EE; \
223 mtmsrd r11,1
224
225 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
226 .align 7; \
227 .globl label##_common; \
228 label##_common: \
229 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
230 DISABLE_INTS; \
231 bl .save_nvgprs; \
232 addi r3,r1,STACK_FRAME_OVERHEAD; \
233 bl hdlr; \
234 b .ret_from_except
235
236 /*
237 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
238 * in the idle task and therefore need the special idle handling.
239 */
240 #define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
241 .align 7; \
242 .globl label##_common; \
243 label##_common: \
244 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
245 FINISH_NAP; \
246 DISABLE_INTS; \
247 bl .save_nvgprs; \
248 addi r3,r1,STACK_FRAME_OVERHEAD; \
249 bl hdlr; \
250 b .ret_from_except
251
252 #define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
253 .align 7; \
254 .globl label##_common; \
255 label##_common: \
256 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
257 FINISH_NAP; \
258 DISABLE_INTS; \
259 BEGIN_FTR_SECTION \
260 bl .ppc64_runlatch_on; \
261 END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
262 addi r3,r1,STACK_FRAME_OVERHEAD; \
263 bl hdlr; \
264 b .ret_from_except_lite
265
266 /*
267 * When the idle code in power4_idle puts the CPU into NAP mode,
268 * it has to do so in a loop, and relies on the external interrupt
269 * and decrementer interrupt entry code to get it out of the loop.
270 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
271 * to signal that it is in the loop and needs help to get out.
272 */
273 #ifdef CONFIG_PPC_970_NAP
274 #define FINISH_NAP \
275 BEGIN_FTR_SECTION \
276 clrrdi r11,r1,THREAD_SHIFT; \
277 ld r9,TI_LOCAL_FLAGS(r11); \
278 andi. r10,r9,_TLF_NAPPING; \
279 bnel power4_fixup_nap; \
280 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
281 #else
282 #define FINISH_NAP
283 #endif
284
285 #endif /* _ASM_POWERPC_EXCEPTION_H */
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