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scsi: lpfc: NVME Target: Receive buffer updates
[linux-2.6/btrfs-unstable.git] / drivers / scsi / lpfc / lpfc.h
blob8a4090c6771c8f3431f9d264a29e16c5d71766ef
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
6 * www.emulex.com *
7 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
8 * *
9 * This program is free software; you can redistribute it and/or *
10 * modify it under the terms of version 2 of the GNU General *
11 * Public License as published by the Free Software Foundation. *
12 * This program is distributed in the hope that it will be useful. *
13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
17 * TO BE LEGALLY INVALID. See the GNU General Public License for *
18 * more details, a copy of which can be found in the file COPYING *
19 * included with this package. *
20 *******************************************************************/
21
22 #include <scsi/scsi_host.h>
23 #include <linux/ktime.h>
24
25 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
26 #define CONFIG_SCSI_LPFC_DEBUG_FS
27 #endif
28
29 struct lpfc_sli2_slim;
30
31 #define ELX_MODEL_NAME_SIZE 80
32
33 #define LPFC_PCI_DEV_LP 0x1
34 #define LPFC_PCI_DEV_OC 0x2
35
36 #define LPFC_SLI_REV2 2
37 #define LPFC_SLI_REV3 3
38 #define LPFC_SLI_REV4 4
39
40 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
41 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
42 requests */
43 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
44 the NameServer before giving up. */
45 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
46 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
47 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
48 cmnd for menlo needs nearly twice as for firmware
49 downloads using bsg */
50
51 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
52 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
53 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
54 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
55 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
56 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
57 #define LPFC_MIN_NVME_SEG_CNT 254
58
59 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
60 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
61 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
62 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
63 #define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
64 queue depth change in millisecs */
65 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
66 #define LPFC_MIN_TGT_QDEPTH 10
67 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
68
69 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
70 collection. */
71 /*
72 * Following time intervals are used of adjusting SCSI device
73 * queue depths when there are driver resource error or Firmware
74 * resource error.
75 */
76 /* 1 Second */
77 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
78
79 /* Number of exchanges reserved for discovery to complete */
80 #define LPFC_DISC_IOCB_BUFF_COUNT 20
81
82 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
83 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
84
85 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
86
87 /* Error Attention event polling interval */
88 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
89
90 /* Define macros for 64 bit support */
91 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
92 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
93 #define getPaddr(high, low) ((dma_addr_t)( \
94 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
95 /* Provide maximum configuration definitions. */
96 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
97 #define FC_MAX_ADPTMSG 64
98
99 #define MAX_HBAEVT 32
100
101 /* Number of MSI-X vectors the driver uses */
102 #define LPFC_MSIX_VECTORS 2
103
104 /* lpfc wait event data ready flag */
105 #define LPFC_DATA_READY (1<<0)
106
107 /* queue dump line buffer size */
108 #define LPFC_LBUF_SZ 128
109
110 /* mailbox system shutdown options */
111 #define LPFC_MBX_NO_WAIT 0
112 #define LPFC_MBX_WAIT 1
113
114 enum lpfc_polling_flags {
115 ENABLE_FCP_RING_POLLING = 0x1,
116 DISABLE_FCP_RING_INT = 0x2
117 };
118
119 struct perf_prof {
120 uint16_t cmd_cpu[40];
121 uint16_t rsp_cpu[40];
122 uint16_t qh_cpu[40];
123 uint16_t wqidx[40];
124 };
125
126 /*
127 * Provide for FC4 TYPE x28 - NVME. The
128 * bit mask for FCP and NVME is 0x8 identically
129 * because they are 32 bit positions distance.
130 */
131 #define LPFC_FC4_TYPE_BITMASK 0x00000100
132
133 /* Provide DMA memory definitions the driver uses per port instance. */
134 struct lpfc_dmabuf {
135 struct list_head list;
136 void *virt; /* virtual address ptr */
137 dma_addr_t phys; /* mapped address */
138 uint32_t buffer_tag; /* used for tagged queue ring */
139 };
140
141 struct lpfc_dma_pool {
142 struct lpfc_dmabuf *elements;
143 uint32_t max_count;
144 uint32_t current_count;
145 };
146
147 struct hbq_dmabuf {
148 struct lpfc_dmabuf hbuf;
149 struct lpfc_dmabuf dbuf;
150 uint16_t total_size;
151 uint16_t bytes_recv;
152 uint32_t tag;
153 struct lpfc_cq_event cq_event;
154 unsigned long time_stamp;
155 void *context;
156 };
157
158 struct rqb_dmabuf {
159 struct lpfc_dmabuf hbuf;
160 struct lpfc_dmabuf dbuf;
161 uint16_t total_size;
162 uint16_t bytes_recv;
163 void *context;
164 struct lpfc_iocbq *iocbq;
165 struct lpfc_sglq *sglq;
166 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
167 struct lpfc_queue *drq; /* ptr to associated Data RQ */
168 };
169
170 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
171 #define MEM_PRI 0x100
172
173
174 /****************************************************************************/
175 /* Device VPD save area */
176 /****************************************************************************/
177 typedef struct lpfc_vpd {
178 uint32_t status; /* vpd status value */
179 uint32_t length; /* number of bytes actually returned */
180 struct {
181 uint32_t rsvd1; /* Revision numbers */
182 uint32_t biuRev;
183 uint32_t smRev;
184 uint32_t smFwRev;
185 uint32_t endecRev;
186 uint16_t rBit;
187 uint8_t fcphHigh;
188 uint8_t fcphLow;
189 uint8_t feaLevelHigh;
190 uint8_t feaLevelLow;
191 uint32_t postKernRev;
192 uint32_t opFwRev;
193 uint8_t opFwName[16];
194 uint32_t sli1FwRev;
195 uint8_t sli1FwName[16];
196 uint32_t sli2FwRev;
197 uint8_t sli2FwName[16];
198 } rev;
199 struct {
200 #ifdef __BIG_ENDIAN_BITFIELD
201 uint32_t rsvd3 :19; /* Reserved */
202 uint32_t cdss : 1; /* Configure Data Security SLI */
203 uint32_t rsvd2 : 3; /* Reserved */
204 uint32_t cbg : 1; /* Configure BlockGuard */
205 uint32_t cmv : 1; /* Configure Max VPIs */
206 uint32_t ccrp : 1; /* Config Command Ring Polling */
207 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
208 uint32_t chbs : 1; /* Cofigure Host Backing store */
209 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
210 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
211 uint32_t cmx : 1; /* Configure Max XRIs */
212 uint32_t cmr : 1; /* Configure Max RPIs */
213 #else /* __LITTLE_ENDIAN */
214 uint32_t cmr : 1; /* Configure Max RPIs */
215 uint32_t cmx : 1; /* Configure Max XRIs */
216 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
217 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
218 uint32_t chbs : 1; /* Cofigure Host Backing store */
219 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
220 uint32_t ccrp : 1; /* Config Command Ring Polling */
221 uint32_t cmv : 1; /* Configure Max VPIs */
222 uint32_t cbg : 1; /* Configure BlockGuard */
223 uint32_t rsvd2 : 3; /* Reserved */
224 uint32_t cdss : 1; /* Configure Data Security SLI */
225 uint32_t rsvd3 :19; /* Reserved */
226 #endif
227 } sli3Feat;
228 } lpfc_vpd_t;
229
230 struct lpfc_scsi_buf;
231
232
233 /*
234 * lpfc stat counters
235 */
236 struct lpfc_stats {
237 /* Statistics for ELS commands */
238 uint32_t elsLogiCol;
239 uint32_t elsRetryExceeded;
240 uint32_t elsXmitRetry;
241 uint32_t elsDelayRetry;
242 uint32_t elsRcvDrop;
243 uint32_t elsRcvFrame;
244 uint32_t elsRcvRSCN;
245 uint32_t elsRcvRNID;
246 uint32_t elsRcvFARP;
247 uint32_t elsRcvFARPR;
248 uint32_t elsRcvFLOGI;
249 uint32_t elsRcvPLOGI;
250 uint32_t elsRcvADISC;
251 uint32_t elsRcvPDISC;
252 uint32_t elsRcvFAN;
253 uint32_t elsRcvLOGO;
254 uint32_t elsRcvPRLO;
255 uint32_t elsRcvPRLI;
256 uint32_t elsRcvLIRR;
257 uint32_t elsRcvRLS;
258 uint32_t elsRcvRPS;
259 uint32_t elsRcvRPL;
260 uint32_t elsRcvRRQ;
261 uint32_t elsRcvRTV;
262 uint32_t elsRcvECHO;
263 uint32_t elsRcvLCB;
264 uint32_t elsRcvRDP;
265 uint32_t elsXmitFLOGI;
266 uint32_t elsXmitFDISC;
267 uint32_t elsXmitPLOGI;
268 uint32_t elsXmitPRLI;
269 uint32_t elsXmitADISC;
270 uint32_t elsXmitLOGO;
271 uint32_t elsXmitSCR;
272 uint32_t elsXmitRNID;
273 uint32_t elsXmitFARP;
274 uint32_t elsXmitFARPR;
275 uint32_t elsXmitACC;
276 uint32_t elsXmitLSRJT;
277
278 uint32_t frameRcvBcast;
279 uint32_t frameRcvMulti;
280 uint32_t strayXmitCmpl;
281 uint32_t frameXmitDelay;
282 uint32_t xriCmdCmpl;
283 uint32_t xriStatErr;
284 uint32_t LinkUp;
285 uint32_t LinkDown;
286 uint32_t LinkMultiEvent;
287 uint32_t NoRcvBuf;
288 uint32_t fcpCmd;
289 uint32_t fcpCmpl;
290 uint32_t fcpRspErr;
291 uint32_t fcpRemoteStop;
292 uint32_t fcpPortRjt;
293 uint32_t fcpPortBusy;
294 uint32_t fcpError;
295 uint32_t fcpLocalErr;
296 };
297
298 struct lpfc_hba;
299
300
301 enum discovery_state {
302 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
303 LPFC_VPORT_FAILED = 1, /* vport has failed */
304 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
305 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
306 LPFC_FDISC = 8, /* FDISC sent for vport */
307 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
308 * configured */
309 LPFC_NS_REG = 10, /* Register with NameServer */
310 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
311 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
312 * device authentication / discovery */
313 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
314 LPFC_VPORT_READY = 32,
315 };
316
317 enum hba_state {
318 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
319 LPFC_WARM_START = 1, /* HBA state after selective reset */
320 LPFC_INIT_START = 2, /* Initial state after board reset */
321 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
322 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
323 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
324 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
325 * CLEAR_LA */
326 LPFC_HBA_READY = 32,
327 LPFC_HBA_ERROR = -1
328 };
329
330 struct lpfc_vport {
331 struct lpfc_hba *phba;
332 struct list_head listentry;
333 uint8_t port_type;
334 #define LPFC_PHYSICAL_PORT 1
335 #define LPFC_NPIV_PORT 2
336 #define LPFC_FABRIC_PORT 3
337 enum discovery_state port_state;
338
339 uint16_t vpi;
340 uint16_t vfi;
341 uint8_t vpi_state;
342 #define LPFC_VPI_REGISTERED 0x1
343
344 uint32_t fc_flag; /* FC flags */
345 /* Several of these flags are HBA centric and should be moved to
346 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
347 */
348 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
349 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
350 #define FC_DISC_TMO 0x4 /* Discovery timer running */
351 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
352 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
353 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
354 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
355 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
356 #define FC_FABRIC 0x100 /* We are fabric attached */
357 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
358 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
359 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
360 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
361 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
362 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
363 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
364 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
365 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
366 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
367 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
368 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
369 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
370 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
371
372 uint32_t ct_flags;
373 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
374 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
375 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
376 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
377 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
378
379 struct list_head fc_nodes;
380
381 /* Keep counters for the number of entries in each list. */
382 uint16_t fc_plogi_cnt;
383 uint16_t fc_adisc_cnt;
384 uint16_t fc_reglogin_cnt;
385 uint16_t fc_prli_cnt;
386 uint16_t fc_unmap_cnt;
387 uint16_t fc_map_cnt;
388 uint16_t fc_npr_cnt;
389 uint16_t fc_unused_cnt;
390 struct serv_parm fc_sparam; /* buffer for our service parameters */
391
392 uint32_t fc_myDID; /* fibre channel S_ID */
393 uint32_t fc_prevDID; /* previous fibre channel S_ID */
394 struct lpfc_name fabric_portname;
395 struct lpfc_name fabric_nodename;
396
397 int32_t stopped; /* HBA has not been restarted since last ERATT */
398 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
399
400 uint32_t num_disc_nodes; /* in addition to hba_state */
401 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
402
403 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
404 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
405 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
406 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
407 struct lpfc_name fc_nodename; /* fc nodename */
408 struct lpfc_name fc_portname; /* fc portname */
409
410 struct lpfc_work_evt disc_timeout_evt;
411
412 struct timer_list fc_disctmo; /* Discovery rescue timer */
413 uint8_t fc_ns_retry; /* retries for fabric nameserver */
414 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
415
416 spinlock_t work_port_lock;
417 uint32_t work_port_events; /* Timeout to be handled */
418 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
419 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
420 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
421
422 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
423 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
424 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
425 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
426 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
427 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
428
429 struct timer_list els_tmofunc;
430 struct timer_list delayed_disc_tmo;
431
432 int unreg_vpi_cmpl;
433
434 uint8_t load_flag;
435 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
436 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
437 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
438 /* Vport Config Parameters */
439 uint32_t cfg_scan_down;
440 uint32_t cfg_lun_queue_depth;
441 uint32_t cfg_nodev_tmo;
442 uint32_t cfg_devloss_tmo;
443 uint32_t cfg_restrict_login;
444 uint32_t cfg_peer_port_login;
445 uint32_t cfg_fcp_class;
446 uint32_t cfg_use_adisc;
447 uint32_t cfg_discovery_threads;
448 uint32_t cfg_log_verbose;
449 uint32_t cfg_max_luns;
450 uint32_t cfg_enable_da_id;
451 uint32_t cfg_max_scsicmpl_time;
452 uint32_t cfg_tgt_queue_depth;
453 uint32_t cfg_first_burst_size;
454 uint32_t dev_loss_tmo_changed;
455
456 struct fc_vport *fc_vport;
457
458 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
459 struct dentry *debug_disc_trc;
460 struct dentry *debug_nodelist;
461 struct dentry *debug_nvmestat;
462 struct dentry *debug_nvmektime;
463 struct dentry *debug_cpucheck;
464 struct dentry *vport_debugfs_root;
465 struct lpfc_debugfs_trc *disc_trc;
466 atomic_t disc_trc_cnt;
467 #endif
468 uint8_t stat_data_enabled;
469 uint8_t stat_data_blocked;
470 struct list_head rcv_buffer_list;
471 unsigned long rcv_buffer_time_stamp;
472 uint32_t vport_flag;
473 #define STATIC_VPORT 1
474
475 uint16_t fdmi_num_disc;
476 uint32_t fdmi_hba_mask;
477 uint32_t fdmi_port_mask;
478
479 /* There is a single nvme instance per vport. */
480 struct nvme_fc_local_port *localport;
481 uint8_t nvmei_support; /* driver supports NVME Initiator */
482 uint32_t last_fcp_wqidx;
483 };
484
485 struct hbq_s {
486 uint16_t entry_count; /* Current number of HBQ slots */
487 uint16_t buffer_count; /* Current number of buffers posted */
488 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
489 uint32_t hbqPutIdx; /* HBQ slot to use */
490 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
491 void *hbq_virt; /* Virtual ptr to this hbq */
492 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
493 /* Callback for HBQ buffer allocation */
494 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
495 /* Callback for HBQ buffer free */
496 void (*hbq_free_buffer) (struct lpfc_hba *,
497 struct hbq_dmabuf *);
498 };
499
500 /* this matches the position in the lpfc_hbq_defs array */
501 #define LPFC_ELS_HBQ 0
502 #define LPFC_MAX_HBQS 1
503
504 enum hba_temp_state {
505 HBA_NORMAL_TEMP,
506 HBA_OVER_TEMP
507 };
508
509 enum intr_type_t {
510 NONE = 0,
511 INTx,
512 MSI,
513 MSIX,
514 };
515
516 #define LPFC_CT_CTX_MAX 64
517 struct unsol_rcv_ct_ctx {
518 uint32_t ctxt_id;
519 uint32_t SID;
520 uint32_t valid;
521 #define UNSOL_INVALID 0
522 #define UNSOL_VALID 1
523 uint16_t oxid;
524 uint16_t rxid;
525 };
526
527 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
528 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
529 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
530 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
531 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
532 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
533 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
534 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
535 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G
536 #define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \
537 (1 << LPFC_USER_LINK_SPEED_16G) | \
538 (1 << LPFC_USER_LINK_SPEED_10G) | \
539 (1 << LPFC_USER_LINK_SPEED_8G) | \
540 (1 << LPFC_USER_LINK_SPEED_4G) | \
541 (1 << LPFC_USER_LINK_SPEED_2G) | \
542 (1 << LPFC_USER_LINK_SPEED_1G) | \
543 (1 << LPFC_USER_LINK_SPEED_AUTO))
544 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32"
545
546 enum nemb_type {
547 nemb_mse = 1,
548 nemb_hbd
549 };
550
551 enum mbox_type {
552 mbox_rd = 1,
553 mbox_wr
554 };
555
556 enum dma_type {
557 dma_mbox = 1,
558 dma_ebuf
559 };
560
561 enum sta_type {
562 sta_pre_addr = 1,
563 sta_pos_addr
564 };
565
566 struct lpfc_mbox_ext_buf_ctx {
567 uint32_t state;
568 #define LPFC_BSG_MBOX_IDLE 0
569 #define LPFC_BSG_MBOX_HOST 1
570 #define LPFC_BSG_MBOX_PORT 2
571 #define LPFC_BSG_MBOX_DONE 3
572 #define LPFC_BSG_MBOX_ABTS 4
573 enum nemb_type nembType;
574 enum mbox_type mboxType;
575 uint32_t numBuf;
576 uint32_t mbxTag;
577 uint32_t seqNum;
578 struct lpfc_dmabuf *mbx_dmabuf;
579 struct list_head ext_dmabuf_list;
580 };
581
582 struct lpfc_hba {
583 /* SCSI interface function jump table entries */
584 int (*lpfc_new_scsi_buf)
585 (struct lpfc_vport *, int);
586 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
587 (struct lpfc_hba *, struct lpfc_nodelist *);
588 int (*lpfc_scsi_prep_dma_buf)
589 (struct lpfc_hba *, struct lpfc_scsi_buf *);
590 void (*lpfc_scsi_unprep_dma_buf)
591 (struct lpfc_hba *, struct lpfc_scsi_buf *);
592 void (*lpfc_release_scsi_buf)
593 (struct lpfc_hba *, struct lpfc_scsi_buf *);
594 void (*lpfc_rampdown_queue_depth)
595 (struct lpfc_hba *);
596 void (*lpfc_scsi_prep_cmnd)
597 (struct lpfc_vport *, struct lpfc_scsi_buf *,
598 struct lpfc_nodelist *);
599
600 /* IOCB interface function jump table entries */
601 int (*__lpfc_sli_issue_iocb)
602 (struct lpfc_hba *, uint32_t,
603 struct lpfc_iocbq *, uint32_t);
604 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
605 struct lpfc_iocbq *);
606 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
607 IOCB_t * (*lpfc_get_iocb_from_iocbq)
608 (struct lpfc_iocbq *);
609 void (*lpfc_scsi_cmd_iocb_cmpl)
610 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
611
612 /* MBOX interface function jump table entries */
613 int (*lpfc_sli_issue_mbox)
614 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
615
616 /* Slow-path IOCB process function jump table entries */
617 void (*lpfc_sli_handle_slow_ring_event)
618 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
619 uint32_t mask);
620
621 /* INIT device interface function jump table entries */
622 int (*lpfc_sli_hbq_to_firmware)
623 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
624 int (*lpfc_sli_brdrestart)
625 (struct lpfc_hba *);
626 int (*lpfc_sli_brdready)
627 (struct lpfc_hba *, uint32_t);
628 void (*lpfc_handle_eratt)
629 (struct lpfc_hba *);
630 void (*lpfc_stop_port)
631 (struct lpfc_hba *);
632 int (*lpfc_hba_init_link)
633 (struct lpfc_hba *, uint32_t);
634 int (*lpfc_hba_down_link)
635 (struct lpfc_hba *, uint32_t);
636 int (*lpfc_selective_reset)
637 (struct lpfc_hba *);
638
639 int (*lpfc_bg_scsi_prep_dma_buf)
640 (struct lpfc_hba *, struct lpfc_scsi_buf *);
641 /* Add new entries here */
642
643 /* SLI4 specific HBA data structure */
644 struct lpfc_sli4_hba sli4_hba;
645
646 struct lpfc_sli sli;
647 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
648 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
649 uint32_t sli3_options; /* Mask of enabled SLI3 options */
650 #define LPFC_SLI3_HBQ_ENABLED 0x01
651 #define LPFC_SLI3_NPIV_ENABLED 0x02
652 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
653 #define LPFC_SLI3_CRP_ENABLED 0x08
654 #define LPFC_SLI3_BG_ENABLED 0x20
655 #define LPFC_SLI3_DSS_ENABLED 0x40
656 #define LPFC_SLI4_PERFH_ENABLED 0x80
657 #define LPFC_SLI4_PHWQ_ENABLED 0x100
658 uint32_t iocb_cmd_size;
659 uint32_t iocb_rsp_size;
660
661 enum hba_state link_state;
662 uint32_t link_flag; /* link state flags */
663 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
664 /* This flag is set while issuing */
665 /* INIT_LINK mailbox command */
666 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
667 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
668
669 uint32_t hba_flag; /* hba generic flags */
670 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
671 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
672 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
673 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
674 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
675 #define FCP_XRI_ABORT_EVENT 0x20
676 #define ELS_XRI_ABORT_EVENT 0x40
677 #define ASYNC_EVENT 0x80
678 #define LINK_DISABLED 0x100 /* Link disabled by user */
679 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
680 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
681 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
682 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
683 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
684 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
685 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
686 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
687 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
688 #define HBA_FORCED_LINK_SPEED 0x40000 /*
689 * Firmware supports Forced Link Speed
690 * capability
691 */
692 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
693
694 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
695 struct lpfc_dmabuf slim2p;
696
697 MAILBOX_t *mbox;
698 uint32_t *mbox_ext;
699 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
700 uint32_t ha_copy;
701 struct _PCB *pcb;
702 struct _IOCB *IOCBs;
703
704 struct lpfc_dmabuf hbqslimp;
705
706 uint16_t pci_cfg_value;
707
708 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
709
710 uint32_t fc_eventTag; /* event tag for link attention */
711 uint32_t link_events;
712
713 /* These fields used to be binfo */
714 uint32_t fc_pref_DID; /* preferred D_ID */
715 uint8_t fc_pref_ALPA; /* preferred AL_PA */
716 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
717 uint32_t fc_edtov; /* E_D_TOV timer value */
718 uint32_t fc_arbtov; /* ARB_TOV timer value */
719 uint32_t fc_ratov; /* R_A_TOV timer value */
720 uint32_t fc_rttov; /* R_T_TOV timer value */
721 uint32_t fc_altov; /* AL_TOV timer value */
722 uint32_t fc_crtov; /* C_R_TOV timer value */
723 uint32_t fc_citov; /* C_I_TOV timer value */
724
725 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
726 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
727
728 uint32_t lmt;
729
730 uint32_t fc_topology; /* link topology, from LINK INIT */
731 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
732
733 struct lpfc_stats fc_stat;
734
735 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
736 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
737
738 uint8_t wwnn[8];
739 uint8_t wwpn[8];
740 uint32_t RandomData[7];
741 uint8_t fcp_embed_io;
742 uint8_t nvme_support; /* Firmware supports NVME */
743 uint8_t nvmet_support; /* driver supports NVMET */
744 #define LPFC_NVMET_MAX_PORTS 32
745 uint8_t mds_diags_support;
746
747 /* HBA Config Parameters */
748 uint32_t cfg_ack0;
749 uint32_t cfg_enable_npiv;
750 uint32_t cfg_enable_rrq;
751 uint32_t cfg_topology;
752 uint32_t cfg_link_speed;
753 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
754 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
755 uint32_t cfg_fcf_failover_policy;
756 uint32_t cfg_fcp_io_sched;
757 uint32_t cfg_fcp2_no_tgt_reset;
758 uint32_t cfg_cr_delay;
759 uint32_t cfg_cr_count;
760 uint32_t cfg_multi_ring_support;
761 uint32_t cfg_multi_ring_rctl;
762 uint32_t cfg_multi_ring_type;
763 uint32_t cfg_poll;
764 uint32_t cfg_poll_tmo;
765 uint32_t cfg_task_mgmt_tmo;
766 uint32_t cfg_use_msi;
767 uint32_t cfg_fcp_imax;
768 uint32_t cfg_fcp_cpu_map;
769 uint32_t cfg_fcp_io_channel;
770 uint32_t cfg_suppress_rsp;
771 uint32_t cfg_nvme_oas;
772 uint32_t cfg_nvme_io_channel;
773 uint32_t cfg_nvmet_mrq;
774 uint32_t cfg_nvmet_mrq_post;
775 uint32_t cfg_enable_nvmet;
776 uint32_t cfg_nvme_enable_fb;
777 uint32_t cfg_nvmet_fb_size;
778 uint32_t cfg_total_seg_cnt;
779 uint32_t cfg_sg_seg_cnt;
780 uint32_t cfg_sg_dma_buf_size;
781 uint64_t cfg_soft_wwnn;
782 uint64_t cfg_soft_wwpn;
783 uint32_t cfg_hba_queue_depth;
784 uint32_t cfg_enable_hba_reset;
785 uint32_t cfg_enable_hba_heartbeat;
786 uint32_t cfg_fof;
787 uint32_t cfg_EnableXLane;
788 uint8_t cfg_oas_tgt_wwpn[8];
789 uint8_t cfg_oas_vpt_wwpn[8];
790 uint32_t cfg_oas_lun_state;
791 #define OAS_LUN_ENABLE 1
792 #define OAS_LUN_DISABLE 0
793 uint32_t cfg_oas_lun_status;
794 #define OAS_LUN_STATUS_EXISTS 0x01
795 uint32_t cfg_oas_flags;
796 #define OAS_FIND_ANY_VPORT 0x01
797 #define OAS_FIND_ANY_TARGET 0x02
798 #define OAS_LUN_VALID 0x04
799 uint32_t cfg_oas_priority;
800 uint32_t cfg_XLanePriority;
801 uint32_t cfg_enable_bg;
802 uint32_t cfg_prot_mask;
803 uint32_t cfg_prot_guard;
804 uint32_t cfg_hostmem_hgp;
805 uint32_t cfg_log_verbose;
806 uint32_t cfg_aer_support;
807 uint32_t cfg_sriov_nr_virtfn;
808 uint32_t cfg_request_firmware_upgrade;
809 uint32_t cfg_iocb_cnt;
810 uint32_t cfg_suppress_link_up;
811 uint32_t cfg_rrq_xri_bitmap_sz;
812 uint32_t cfg_delay_discovery;
813 uint32_t cfg_sli_mode;
814 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
815 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
816 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
817 uint32_t cfg_enable_dss;
818 uint32_t cfg_fdmi_on;
819 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
820 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
821 uint32_t cfg_enable_SmartSAN;
822 uint32_t cfg_enable_mds_diags;
823 uint32_t cfg_enable_fc4_type;
824 uint32_t cfg_xri_split;
825 #define LPFC_ENABLE_FCP 1
826 #define LPFC_ENABLE_NVME 2
827 #define LPFC_ENABLE_BOTH 3
828 uint32_t io_channel_irqs; /* number of irqs for io channels */
829 struct nvmet_fc_target_port *targetport;
830 lpfc_vpd_t vpd; /* vital product data */
831
832 struct pci_dev *pcidev;
833 struct list_head work_list;
834 uint32_t work_ha; /* Host Attention Bits for WT */
835 uint32_t work_ha_mask; /* HA Bits owned by WT */
836 uint32_t work_hs; /* HS stored in case of ERRAT */
837 uint32_t work_status[2]; /* Extra status from SLIM */
838
839 wait_queue_head_t work_waitq;
840 struct task_struct *worker_thread;
841 unsigned long data_flags;
842
843 uint32_t hbq_in_use; /* HBQs in use flag */
844 uint32_t hbq_count; /* Count of configured HBQs */
845 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
846
847 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
848 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
849
850 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
851 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
852 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
853 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
854 PCI BAR0 */
855 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
856 PCI BAR2 */
857
858 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
859 PCI BAR0 with dual-ULP support */
860 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
861 PCI BAR2 with dual-ULP support */
862 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
863 PCI BAR4 with dual-ULP support */
864 #define PCI_64BIT_BAR0 0
865 #define PCI_64BIT_BAR2 2
866 #define PCI_64BIT_BAR4 4
867 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
868 void __iomem *HAregaddr; /* virtual address for host attn reg */
869 void __iomem *CAregaddr; /* virtual address for chip attn reg */
870 void __iomem *HSregaddr; /* virtual address for host status
871 reg */
872 void __iomem *HCregaddr; /* virtual address for host ctl reg */
873
874 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
875 struct lpfc_pgp *port_gp;
876 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
877 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
878
879 int brd_no; /* FC board number */
880 char SerialNumber[32]; /* adapter Serial Number */
881 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
882 char ModelDesc[256]; /* Model Description */
883 char ModelName[80]; /* Model Name */
884 char ProgramType[256]; /* Program Type */
885 char Port[20]; /* Port No */
886 uint8_t vpd_flag; /* VPD data flag */
887
888 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
889 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
890 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
891 #define VPD_PORT 0x8 /* valid vpd port data */
892 #define VPD_MASK 0xf /* mask for any vpd data */
893
894 uint8_t soft_wwn_enable;
895
896 struct timer_list fcp_poll_timer;
897 struct timer_list eratt_poll;
898 uint32_t eratt_poll_interval;
899
900 /*
901 * stat counters
902 */
903 uint64_t fc4ScsiInputRequests;
904 uint64_t fc4ScsiOutputRequests;
905 uint64_t fc4ScsiControlRequests;
906 uint64_t fc4ScsiIoCmpls;
907 uint64_t fc4NvmeInputRequests;
908 uint64_t fc4NvmeOutputRequests;
909 uint64_t fc4NvmeControlRequests;
910 uint64_t fc4NvmeIoCmpls;
911 uint64_t fc4NvmeLsRequests;
912 uint64_t fc4NvmeLsCmpls;
913
914 uint64_t bg_guard_err_cnt;
915 uint64_t bg_apptag_err_cnt;
916 uint64_t bg_reftag_err_cnt;
917
918 /* fastpath list. */
919 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
920 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
921 struct list_head lpfc_scsi_buf_list_get;
922 struct list_head lpfc_scsi_buf_list_put;
923 uint32_t total_scsi_bufs;
924 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
925 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
926 struct list_head lpfc_nvme_buf_list_get;
927 struct list_head lpfc_nvme_buf_list_put;
928 uint32_t total_nvme_bufs;
929 struct list_head lpfc_iocb_list;
930 uint32_t total_iocbq_bufs;
931 struct list_head active_rrq_list;
932 spinlock_t hbalock;
933
934 /* pci_mem_pools */
935 struct pci_pool *lpfc_sg_dma_buf_pool;
936 struct pci_pool *lpfc_mbuf_pool;
937 struct pci_pool *lpfc_hrb_pool; /* header receive buffer pool */
938 struct pci_pool *lpfc_drb_pool; /* data receive buffer pool */
939 struct pci_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
940 struct pci_pool *txrdy_payload_pool;
941 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
942
943 mempool_t *mbox_mem_pool;
944 mempool_t *nlp_mem_pool;
945 mempool_t *rrq_pool;
946 mempool_t *active_rrq_pool;
947
948 struct fc_host_statistics link_stats;
949 enum intr_type_t intr_type;
950 uint32_t intr_mode;
951 #define LPFC_INTR_ERROR 0xFFFFFFFF
952 struct list_head port_list;
953 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
954 uint16_t max_vpi; /* Maximum virtual nports */
955 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
956 uint16_t max_vports; /*
957 * For IOV HBAs max_vpi can change
958 * after a reset. max_vports is max
959 * number of vports present. This can
960 * be greater than max_vpi.
961 */
962 uint16_t vpi_base;
963 uint16_t vfi_base;
964 unsigned long *vpi_bmask; /* vpi allocation table */
965 uint16_t *vpi_ids;
966 uint16_t vpi_count;
967 struct list_head lpfc_vpi_blk_list;
968
969 /* Data structure used by fabric iocb scheduler */
970 struct list_head fabric_iocb_list;
971 atomic_t fabric_iocb_count;
972 struct timer_list fabric_block_timer;
973 unsigned long bit_flags;
974 #define FABRIC_COMANDS_BLOCKED 0
975 atomic_t num_rsrc_err;
976 atomic_t num_cmd_success;
977 unsigned long last_rsrc_error_time;
978 unsigned long last_ramp_down_time;
979 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
980 struct dentry *hba_debugfs_root;
981 atomic_t debugfs_vport_count;
982 struct dentry *debug_hbqinfo;
983 struct dentry *debug_dumpHostSlim;
984 struct dentry *debug_dumpHBASlim;
985 struct dentry *debug_dumpData; /* BlockGuard BPL */
986 struct dentry *debug_dumpDif; /* BlockGuard BPL */
987 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
988 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
989 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
990 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
991 struct dentry *debug_writeApp; /* inject write app_tag errors */
992 struct dentry *debug_writeRef; /* inject write ref_tag errors */
993 struct dentry *debug_readGuard; /* inject read guard_tag errors */
994 struct dentry *debug_readApp; /* inject read app_tag errors */
995 struct dentry *debug_readRef; /* inject read ref_tag errors */
996
997 struct dentry *debug_nvmeio_trc;
998 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
999 atomic_t nvmeio_trc_cnt;
1000 uint32_t nvmeio_trc_size;
1001 uint32_t nvmeio_trc_output_idx;
1002
1003 /* T10 DIF error injection */
1004 uint32_t lpfc_injerr_wgrd_cnt;
1005 uint32_t lpfc_injerr_wapp_cnt;
1006 uint32_t lpfc_injerr_wref_cnt;
1007 uint32_t lpfc_injerr_rgrd_cnt;
1008 uint32_t lpfc_injerr_rapp_cnt;
1009 uint32_t lpfc_injerr_rref_cnt;
1010 uint32_t lpfc_injerr_nportid;
1011 struct lpfc_name lpfc_injerr_wwpn;
1012 sector_t lpfc_injerr_lba;
1013 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1014
1015 struct dentry *debug_slow_ring_trc;
1016 struct lpfc_debugfs_trc *slow_ring_trc;
1017 atomic_t slow_ring_trc_cnt;
1018 /* iDiag debugfs sub-directory */
1019 struct dentry *idiag_root;
1020 struct dentry *idiag_pci_cfg;
1021 struct dentry *idiag_bar_acc;
1022 struct dentry *idiag_que_info;
1023 struct dentry *idiag_que_acc;
1024 struct dentry *idiag_drb_acc;
1025 struct dentry *idiag_ctl_acc;
1026 struct dentry *idiag_mbx_acc;
1027 struct dentry *idiag_ext_acc;
1028 uint8_t lpfc_idiag_last_eq;
1029 #endif
1030 uint16_t nvmeio_trc_on;
1031
1032 /* Used for deferred freeing of ELS data buffers */
1033 struct list_head elsbuf;
1034 int elsbuf_cnt;
1035 int elsbuf_prev_cnt;
1036
1037 uint8_t temp_sensor_support;
1038 /* Fields used for heart beat. */
1039 unsigned long last_completion_time;
1040 unsigned long skipped_hb;
1041 struct timer_list hb_tmofunc;
1042 uint8_t hb_outstanding;
1043 struct timer_list rrq_tmr;
1044 enum hba_temp_state over_temp_state;
1045 /* ndlp reference management */
1046 spinlock_t ndlp_lock;
1047 /*
1048 * Following bit will be set for all buffer tags which are not
1049 * associated with any HBQ.
1050 */
1051 #define QUE_BUFTAG_BIT (1<<31)
1052 uint32_t buffer_tag_count;
1053 int wait_4_mlo_maint_flg;
1054 wait_queue_head_t wait_4_mlo_m_q;
1055 /* data structure used for latency data collection */
1056 #define LPFC_NO_BUCKET 0
1057 #define LPFC_LINEAR_BUCKET 1
1058 #define LPFC_POWER2_BUCKET 2
1059 uint8_t bucket_type;
1060 uint32_t bucket_base;
1061 uint32_t bucket_step;
1062
1063 /* Maximum number of events that can be outstanding at any time*/
1064 #define LPFC_MAX_EVT_COUNT 512
1065 atomic_t fast_event_count;
1066 uint32_t fcoe_eventtag;
1067 uint32_t fcoe_eventtag_at_fcf_scan;
1068 uint32_t fcoe_cvl_eventtag;
1069 uint32_t fcoe_cvl_eventtag_attn;
1070 struct lpfc_fcf fcf;
1071 uint8_t fc_map[3];
1072 uint8_t valid_vlan;
1073 uint16_t vlan_id;
1074 struct list_head fcf_conn_rec_list;
1075
1076 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1077 struct list_head ct_ev_waiters;
1078 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1079 uint32_t ctx_idx;
1080
1081 uint8_t menlo_flag; /* menlo generic flags */
1082 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1083 uint32_t iocb_cnt;
1084 uint32_t iocb_max;
1085 atomic_t sdev_cnt;
1086 uint8_t fips_spec_rev;
1087 uint8_t fips_level;
1088 spinlock_t devicelock; /* lock for luns list */
1089 mempool_t *device_data_mem_pool;
1090 struct list_head luns;
1091 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1092 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1093 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1094 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1095 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1096 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1097 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1098 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1099 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1100 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1101 uint16_t sfp_alarm;
1102 uint16_t sfp_warning;
1103
1104 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1105 #define LPFC_CHECK_CPU_CNT 32
1106 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1107 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1108 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1109 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1110 uint16_t cpucheck_on;
1111 #define LPFC_CHECK_OFF 0
1112 #define LPFC_CHECK_NVME_IO 1
1113 #define LPFC_CHECK_NVMET_RCV 2
1114 #define LPFC_CHECK_NVMET_IO 4
1115 uint16_t ktime_on;
1116 uint64_t ktime_data_samples;
1117 uint64_t ktime_status_samples;
1118 uint64_t ktime_last_cmd;
1119 uint64_t ktime_seg1_total;
1120 uint64_t ktime_seg1_min;
1121 uint64_t ktime_seg1_max;
1122 uint64_t ktime_seg2_total;
1123 uint64_t ktime_seg2_min;
1124 uint64_t ktime_seg2_max;
1125 uint64_t ktime_seg3_total;
1126 uint64_t ktime_seg3_min;
1127 uint64_t ktime_seg3_max;
1128 uint64_t ktime_seg4_total;
1129 uint64_t ktime_seg4_min;
1130 uint64_t ktime_seg4_max;
1131 uint64_t ktime_seg5_total;
1132 uint64_t ktime_seg5_min;
1133 uint64_t ktime_seg5_max;
1134 uint64_t ktime_seg6_total;
1135 uint64_t ktime_seg6_min;
1136 uint64_t ktime_seg6_max;
1137 uint64_t ktime_seg7_total;
1138 uint64_t ktime_seg7_min;
1139 uint64_t ktime_seg7_max;
1140 uint64_t ktime_seg8_total;
1141 uint64_t ktime_seg8_min;
1142 uint64_t ktime_seg8_max;
1143 uint64_t ktime_seg9_total;
1144 uint64_t ktime_seg9_min;
1145 uint64_t ktime_seg9_max;
1146 uint64_t ktime_seg10_total;
1147 uint64_t ktime_seg10_min;
1148 uint64_t ktime_seg10_max;
1149 #endif
1150 };
1151
1152 static inline struct Scsi_Host *
1153 lpfc_shost_from_vport(struct lpfc_vport *vport)
1154 {
1155 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1156 }
1157
1158 static inline void
1159 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1160 {
1161 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1162 phba->link_flag |= LS_LOOPBACK_MODE;
1163 else
1164 phba->link_flag &= ~LS_LOOPBACK_MODE;
1165 }
1166
1167 static inline int
1168 lpfc_is_link_up(struct lpfc_hba *phba)
1169 {
1170 return phba->link_state == LPFC_LINK_UP ||
1171 phba->link_state == LPFC_CLEAR_LA ||
1172 phba->link_state == LPFC_HBA_READY;
1173 }
1174
1175 static inline void
1176 lpfc_worker_wake_up(struct lpfc_hba *phba)
1177 {
1178 /* Set the lpfc data pending flag */
1179 set_bit(LPFC_DATA_READY, &phba->data_flags);
1180
1181 /* Wake up worker thread */
1182 wake_up(&phba->work_waitq);
1183 return;
1184 }
1185
1186 static inline int
1187 lpfc_readl(void __iomem *addr, uint32_t *data)
1188 {
1189 uint32_t temp;
1190 temp = readl(addr);
1191 if (temp == 0xffffffff)
1192 return -EIO;
1193 *data = temp;
1194 return 0;
1195 }
1196
1197 static inline int
1198 lpfc_sli_read_hs(struct lpfc_hba *phba)
1199 {
1200 /*
1201 * There was a link/board error. Read the status register to retrieve
1202 * the error event and process it.
1203 */
1204 phba->sli.slistat.err_attn_event++;
1205
1206 /* Save status info and check for unplug error */
1207 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1208 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1209 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1210 return -EIO;
1211 }
1212
1213 /* Clear chip Host Attention error bit */
1214 writel(HA_ERATT, phba->HAregaddr);
1215 readl(phba->HAregaddr); /* flush */
1216 phba->pport->stopped = 1;
1217
1218 return 0;
1219 }
1220
1221 static inline struct lpfc_sli_ring *
1222 lpfc_phba_elsring(struct lpfc_hba *phba)
1223 {
1224 if (phba->sli_rev == LPFC_SLI_REV4)
1225 return phba->sli4_hba.els_wq->pring;
1226 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1227 }
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