arch/sh/mm/tlb-sh3.c

   1 /*
   2  * arch/sh/mm/tlb-sh3.c
   3  *
   4  * SH-3 specific TLB operations
   5  *
   6  * Copyright (C) 1999  Niibe Yutaka
   7  * Copyright (C) 2002  Paul Mundt
   8  *
   9  * Released under the terms of the GNU GPL v2.0.
  10  */
  11 #include <linux/io.h>
  12 #include <asm/system.h>
  13 #include <asm/mmu_context.h>
  14
  15 void __flush_tlb_page(unsigned long asid, unsigned long page)
  16 {
  17         unsigned long addr, data;
  18         int i, ways = MMU_NTLB_WAYS;
  19
  20         /*
  21          * NOTE: PTEH.ASID should be set to this MM
  22          *       _AND_ we need to write ASID to the array.
  23          *
  24          * It would be simple if we didn't need to set PTEH.ASID...
  25          */
  26         addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
  27         data = (page & 0xfffe0000) | asid; /* VALID bit is off */
  28
  29         if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
  30                 addr |= MMU_PAGE_ASSOC_BIT;
  31                 ways = 1;       /* we already know the way .. */
  32         }
  33
  34         for (i = 0; i < ways; i++)
  35                 ctrl_outl(data, addr + (i << 8));
  36 }