crypto: crct10dif - Add fallback for broken initrds
[linux-2.6/btrfs-unstable.git] / drivers / cpufreq / cris-artpec3-cpufreq.c
blobcb8276dd19caee0a5e2756883148a2d70a7132f2
1 #include <linux/init.h>
2 #include <linux/module.h>
3 #include <linux/cpufreq.h>
4 #include <hwregs/reg_map.h>
5 #include <hwregs/reg_rdwr.h>
6 #include <hwregs/clkgen_defs.h>
7 #include <hwregs/ddr2_defs.h>
9 static int
10 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
11 void *data);
13 static struct notifier_block cris_sdram_freq_notifier_block = {
14 .notifier_call = cris_sdram_freq_notifier
17 static struct cpufreq_frequency_table cris_freq_table[] = {
18 {0x01, 6000},
19 {0x02, 200000},
20 {0, CPUFREQ_TABLE_END},
23 static unsigned int cris_freq_get_cpu_frequency(unsigned int cpu)
25 reg_clkgen_rw_clk_ctrl clk_ctrl;
26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
27 return clk_ctrl.pll ? 200000 : 6000;
30 static void cris_freq_set_cpu_state(struct cpufreq_policy *policy,
31 unsigned int state)
33 struct cpufreq_freqs freqs;
34 reg_clkgen_rw_clk_ctrl clk_ctrl;
35 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
37 freqs.old = cris_freq_get_cpu_frequency(policy->cpu);
38 freqs.new = cris_freq_table[state].frequency;
40 cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
42 local_irq_disable();
44 /* Even though we may be SMP they will share the same clock
45 * so all settings are made on CPU0. */
46 if (cris_freq_table[state].frequency == 200000)
47 clk_ctrl.pll = 1;
48 else
49 clk_ctrl.pll = 0;
50 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
52 local_irq_enable();
54 cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
57 static int cris_freq_verify(struct cpufreq_policy *policy)
59 return cpufreq_frequency_table_verify(policy, &cris_freq_table[0]);
62 static int cris_freq_target(struct cpufreq_policy *policy,
63 unsigned int target_freq,
64 unsigned int relation)
66 unsigned int newstate = 0;
68 if (cpufreq_frequency_table_target(policy, cris_freq_table,
69 target_freq, relation, &newstate))
70 return -EINVAL;
72 cris_freq_set_cpu_state(policy, newstate);
74 return 0;
77 static int cris_freq_cpu_init(struct cpufreq_policy *policy)
79 int result;
81 /* cpuinfo and default policy values */
82 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
83 policy->cur = cris_freq_get_cpu_frequency(0);
85 result = cpufreq_frequency_table_cpuinfo(policy, cris_freq_table);
86 if (result)
87 return (result);
89 cpufreq_frequency_table_get_attr(cris_freq_table, policy->cpu);
91 return 0;
95 static int cris_freq_cpu_exit(struct cpufreq_policy *policy)
97 cpufreq_frequency_table_put_attr(policy->cpu);
98 return 0;
102 static struct freq_attr *cris_freq_attr[] = {
103 &cpufreq_freq_attr_scaling_available_freqs,
104 NULL,
107 static struct cpufreq_driver cris_freq_driver = {
108 .get = cris_freq_get_cpu_frequency,
109 .verify = cris_freq_verify,
110 .target = cris_freq_target,
111 .init = cris_freq_cpu_init,
112 .exit = cris_freq_cpu_exit,
113 .name = "cris_freq",
114 .attr = cris_freq_attr,
117 static int __init cris_freq_init(void)
119 int ret;
120 ret = cpufreq_register_driver(&cris_freq_driver);
121 cpufreq_register_notifier(&cris_sdram_freq_notifier_block,
122 CPUFREQ_TRANSITION_NOTIFIER);
123 return ret;
126 static int
127 cris_sdram_freq_notifier(struct notifier_block *nb, unsigned long val,
128 void *data)
130 int i;
131 struct cpufreq_freqs *freqs = data;
132 if (val == CPUFREQ_PRECHANGE) {
133 reg_ddr2_rw_cfg cfg =
134 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
135 cfg.ref_interval = (freqs->new == 200000 ? 1560 : 46);
137 if (freqs->new == 200000)
138 for (i = 0; i < 50000; i++);
139 REG_WR(bif_core, regi_bif_core, rw_sdram_timing, timing);
141 return 0;
145 module_init(cris_freq_init);