?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
qla2xxx: Incorrect linked list semantic in qlafx00_get_fcport().
[linux-2.6/btrfs-unstable.git] / drivers / scsi / qla2xxx / qla_mr.c
blob620e60a7a0eeee66ec32951fa6d216f441cb3890
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include <linux/delay.h>
9 #include <linux/pci.h>
10 #include <linux/ratelimit.h>
11 #include <linux/vmalloc.h>
12 #include <scsi/scsi_tcq.h>
13 #include <linux/utsname.h>
14
15
16 /* QLAFX00 specific Mailbox implementation functions */
17
18 /*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37 static int
38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40 {
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)&reg->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268 premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282 }
283
284 /*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
297 int
298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299 {
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326 }
327
328 /*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343 static int
344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345 {
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371 }
372
373 /*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390 int
391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392 {
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422 }
423
424 /*
425 * qlafx00_mbx_reg_test
426 */
427 static int
428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429 {
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487 }
488
489 /**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495 int
496 qlafx00_pci_config(scsi_qla_host_t *vha)
497 {
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
510 if (pci_is_pcie(ha->pdev))
511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516 }
517
518 /**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523 static inline void
524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525 {
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530 uint32_t reg_val;
531
532 spin_lock_irqsave(&ha->hardware_lock, flags);
533
534 QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
535 QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
536
537 /* stop the XOR DMA engines */
538 QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
539 QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
540 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
541 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
542
543 /* stop the IDMA engines */
544 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
545 reg_val &= ~(1<<12);
546 QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
547
548 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
549 reg_val &= ~(1<<12);
550 QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
551
552 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
553 reg_val &= ~(1<<12);
554 QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
555
556 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
557 reg_val &= ~(1<<12);
558 QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
559
560 for (i = 0; i < 100000; i++) {
561 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
562 (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
563 break;
564 udelay(100);
565 }
566
567 /* Set all 4 cores in reset */
568 for (i = 0; i < 4; i++) {
569 QLAFX00_SET_HBA_SOC_REG(ha,
570 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
571 QLAFX00_SET_HBA_SOC_REG(ha,
572 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
573 }
574
575 /* Reset all units in Fabric */
576 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
577
578 /* */
579 QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
580 QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
581
582 /* Set all 4 core Memory Power Down Registers */
583 for (i = 0; i < 5; i++) {
584 QLAFX00_SET_HBA_SOC_REG(ha,
585 (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
586 }
587
588 /* Reset all interrupt control registers */
589 for (i = 0; i < 115; i++) {
590 QLAFX00_SET_HBA_SOC_REG(ha,
591 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
592 }
593
594 /* Reset Timers control registers. per core */
595 for (core = 0; core < 4; core++)
596 for (i = 0; i < 8; i++)
597 QLAFX00_SET_HBA_SOC_REG(ha,
598 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
599
600 /* Reset per core IRQ ack register */
601 for (core = 0; core < 4; core++)
602 QLAFX00_SET_HBA_SOC_REG(ha,
603 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
604
605 /* Set Fabric control and config to defaults */
606 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
607 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
608
609 /* Kick in Fabric units */
610 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
611
612 /* Kick in Core0 to start boot process */
613 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
614
615 spin_unlock_irqrestore(&ha->hardware_lock, flags);
616
617 /* Wait 10secs for soft-reset to complete. */
618 for (cnt = 10; cnt; cnt--) {
619 msleep(1000);
620 barrier();
621 }
622 }
623
624 /**
625 * qlafx00_soft_reset() - Soft Reset ISPFx00.
626 * @ha: HA context
627 *
628 * Returns 0 on success.
629 */
630 void
631 qlafx00_soft_reset(scsi_qla_host_t *vha)
632 {
633 struct qla_hw_data *ha = vha->hw;
634
635 if (unlikely(pci_channel_offline(ha->pdev) &&
636 ha->flags.pci_channel_io_perm_failure))
637 return;
638
639 ha->isp_ops->disable_intrs(ha);
640 qlafx00_soc_cpu_reset(vha);
641 }
642
643 /**
644 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
645 * @ha: HA context
646 *
647 * Returns 0 on success.
648 */
649 int
650 qlafx00_chip_diag(scsi_qla_host_t *vha)
651 {
652 int rval = 0;
653 struct qla_hw_data *ha = vha->hw;
654 struct req_que *req = ha->req_q_map[0];
655
656 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
657
658 rval = qlafx00_mbx_reg_test(vha);
659 if (rval) {
660 ql_log(ql_log_warn, vha, 0x1165,
661 "Failed mailbox send register test\n");
662 } else {
663 /* Flag a successful rval */
664 rval = QLA_SUCCESS;
665 }
666 return rval;
667 }
668
669 void
670 qlafx00_config_rings(struct scsi_qla_host *vha)
671 {
672 struct qla_hw_data *ha = vha->hw;
673 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
674
675 WRT_REG_DWORD(&reg->req_q_in, 0);
676 WRT_REG_DWORD(&reg->req_q_out, 0);
677
678 WRT_REG_DWORD(&reg->rsp_q_in, 0);
679 WRT_REG_DWORD(&reg->rsp_q_out, 0);
680
681 /* PCI posting */
682 RD_REG_DWORD(&reg->rsp_q_out);
683 }
684
685 char *
686 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
687 {
688 struct qla_hw_data *ha = vha->hw;
689
690 if (pci_is_pcie(ha->pdev)) {
691 strcpy(str, "PCIe iSA");
692 return str;
693 }
694 return str;
695 }
696
697 char *
698 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str)
699 {
700 struct qla_hw_data *ha = vha->hw;
701
702 sprintf(str, "%s", ha->mr.fw_version);
703 return str;
704 }
705
706 void
707 qlafx00_enable_intrs(struct qla_hw_data *ha)
708 {
709 unsigned long flags = 0;
710
711 spin_lock_irqsave(&ha->hardware_lock, flags);
712 ha->interrupts_on = 1;
713 QLAFX00_ENABLE_ICNTRL_REG(ha);
714 spin_unlock_irqrestore(&ha->hardware_lock, flags);
715 }
716
717 void
718 qlafx00_disable_intrs(struct qla_hw_data *ha)
719 {
720 unsigned long flags = 0;
721
722 spin_lock_irqsave(&ha->hardware_lock, flags);
723 ha->interrupts_on = 0;
724 QLAFX00_DISABLE_ICNTRL_REG(ha);
725 spin_unlock_irqrestore(&ha->hardware_lock, flags);
726 }
727
728 int
729 qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
730 {
731 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
732 }
733
734 int
735 qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
736 {
737 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
738 }
739
740 int
741 qlafx00_loop_reset(scsi_qla_host_t *vha)
742 {
743 int ret;
744 struct fc_port *fcport;
745 struct qla_hw_data *ha = vha->hw;
746
747 if (ql2xtargetreset) {
748 list_for_each_entry(fcport, &vha->vp_fcports, list) {
749 if (fcport->port_type != FCT_TARGET)
750 continue;
751
752 ret = ha->isp_ops->target_reset(fcport, 0, 0);
753 if (ret != QLA_SUCCESS) {
754 ql_dbg(ql_dbg_taskm, vha, 0x803d,
755 "Bus Reset failed: Reset=%d "
756 "d_id=%x.\n", ret, fcport->d_id.b24);
757 }
758 }
759 }
760 return QLA_SUCCESS;
761 }
762
763 int
764 qlafx00_iospace_config(struct qla_hw_data *ha)
765 {
766 if (pci_request_selected_regions(ha->pdev, ha->bars,
767 QLA2XXX_DRIVER_NAME)) {
768 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
769 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
770 pci_name(ha->pdev));
771 goto iospace_error_exit;
772 }
773
774 /* Use MMIO operations for all accesses. */
775 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
776 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
777 "Invalid pci I/O region size (%s).\n",
778 pci_name(ha->pdev));
779 goto iospace_error_exit;
780 }
781 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
782 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
783 "Invalid PCI mem BAR0 region size (%s), aborting\n",
784 pci_name(ha->pdev));
785 goto iospace_error_exit;
786 }
787
788 ha->cregbase =
789 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
790 if (!ha->cregbase) {
791 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
792 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
793 goto iospace_error_exit;
794 }
795
796 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
797 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
798 "region #2 not an MMIO resource (%s), aborting\n",
799 pci_name(ha->pdev));
800 goto iospace_error_exit;
801 }
802 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
803 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
804 "Invalid PCI mem BAR2 region size (%s), aborting\n",
805 pci_name(ha->pdev));
806 goto iospace_error_exit;
807 }
808
809 ha->iobase =
810 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
811 if (!ha->iobase) {
812 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
813 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
814 goto iospace_error_exit;
815 }
816
817 /* Determine queue resources */
818 ha->max_req_queues = ha->max_rsp_queues = 1;
819
820 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
821 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
822 ha->bars, ha->cregbase, ha->iobase);
823
824 return 0;
825
826 iospace_error_exit:
827 return -ENOMEM;
828 }
829
830 static void
831 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
832 {
833 struct qla_hw_data *ha = vha->hw;
834 struct req_que *req = ha->req_q_map[0];
835 struct rsp_que *rsp = ha->rsp_q_map[0];
836
837 req->length_fx00 = req->length;
838 req->ring_fx00 = req->ring;
839 req->dma_fx00 = req->dma;
840
841 rsp->length_fx00 = rsp->length;
842 rsp->ring_fx00 = rsp->ring;
843 rsp->dma_fx00 = rsp->dma;
844
845 ql_dbg(ql_dbg_init, vha, 0x012d,
846 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
847 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
848 req->length_fx00, (u64)req->dma_fx00);
849
850 ql_dbg(ql_dbg_init, vha, 0x012e,
851 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
852 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
853 rsp->length_fx00, (u64)rsp->dma_fx00);
854 }
855
856 static int
857 qlafx00_config_queues(struct scsi_qla_host *vha)
858 {
859 struct qla_hw_data *ha = vha->hw;
860 struct req_que *req = ha->req_q_map[0];
861 struct rsp_que *rsp = ha->rsp_q_map[0];
862 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
863
864 req->length = ha->req_que_len;
865 req->ring = (void *)ha->iobase + ha->req_que_off;
866 req->dma = bar2_hdl + ha->req_que_off;
867 if ((!req->ring) || (req->length == 0)) {
868 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
869 "Unable to allocate memory for req_ring\n");
870 return QLA_FUNCTION_FAILED;
871 }
872
873 ql_dbg(ql_dbg_init, vha, 0x0130,
874 "req: %p req_ring pointer %p req len 0x%x "
875 "req off 0x%x\n, req->dma: 0x%llx",
876 req, req->ring, req->length,
877 ha->req_que_off, (u64)req->dma);
878
879 rsp->length = ha->rsp_que_len;
880 rsp->ring = (void *)ha->iobase + ha->rsp_que_off;
881 rsp->dma = bar2_hdl + ha->rsp_que_off;
882 if ((!rsp->ring) || (rsp->length == 0)) {
883 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
884 "Unable to allocate memory for rsp_ring\n");
885 return QLA_FUNCTION_FAILED;
886 }
887
888 ql_dbg(ql_dbg_init, vha, 0x0132,
889 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
890 "rsp off 0x%x, rsp->dma: 0x%llx\n",
891 rsp, rsp->ring, rsp->length,
892 ha->rsp_que_off, (u64)rsp->dma);
893
894 return QLA_SUCCESS;
895 }
896
897 static int
898 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
899 {
900 int rval = 0;
901 unsigned long wtime;
902 uint16_t wait_time; /* Wait time */
903 struct qla_hw_data *ha = vha->hw;
904 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
905 uint32_t aenmbx, aenmbx7 = 0;
906 uint32_t pseudo_aen;
907 uint32_t state[5];
908 bool done = false;
909
910 /* 30 seconds wait - Adjust if required */
911 wait_time = 30;
912
913 pseudo_aen = RD_REG_DWORD(&reg->pseudoaen);
914 if (pseudo_aen == 1) {
915 aenmbx7 = RD_REG_DWORD(&reg->initval7);
916 ha->mbx_intr_code = MSW(aenmbx7);
917 ha->rqstq_intr_code = LSW(aenmbx7);
918 rval = qlafx00_driver_shutdown(vha, 10);
919 if (rval != QLA_SUCCESS)
920 qlafx00_soft_reset(vha);
921 }
922
923 /* wait time before firmware ready */
924 wtime = jiffies + (wait_time * HZ);
925 do {
926 aenmbx = RD_REG_DWORD(&reg->aenmailbox0);
927 barrier();
928 ql_dbg(ql_dbg_mbx, vha, 0x0133,
929 "aenmbx: 0x%x\n", aenmbx);
930
931 switch (aenmbx) {
932 case MBA_FW_NOT_STARTED:
933 case MBA_FW_STARTING:
934 break;
935
936 case MBA_SYSTEM_ERR:
937 case MBA_REQ_TRANSFER_ERR:
938 case MBA_RSP_TRANSFER_ERR:
939 case MBA_FW_INIT_FAILURE:
940 qlafx00_soft_reset(vha);
941 break;
942
943 case MBA_FW_RESTART_CMPLT:
944 /* Set the mbx and rqstq intr code */
945 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
946 ha->mbx_intr_code = MSW(aenmbx7);
947 ha->rqstq_intr_code = LSW(aenmbx7);
948 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
949 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
950 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
951 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
952 WRT_REG_DWORD(&reg->aenmailbox0, 0);
953 RD_REG_DWORD_RELAXED(&reg->aenmailbox0);
954 ql_dbg(ql_dbg_init, vha, 0x0134,
955 "f/w returned mbx_intr_code: 0x%x, "
956 "rqstq_intr_code: 0x%x\n",
957 ha->mbx_intr_code, ha->rqstq_intr_code);
958 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
959 rval = QLA_SUCCESS;
960 done = true;
961 break;
962
963 default:
964 if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
965 break;
966
967 /* If fw is apparently not ready. In order to continue,
968 * we might need to issue Mbox cmd, but the problem is
969 * that the DoorBell vector values that come with the
970 * 8060 AEN are most likely gone by now (and thus no
971 * bell would be rung on the fw side when mbox cmd is
972 * issued). We have to therefore grab the 8060 AEN
973 * shadow regs (filled in by FW when the last 8060
974 * AEN was being posted).
975 * Do the following to determine what is needed in
976 * order to get the FW ready:
977 * 1. reload the 8060 AEN values from the shadow regs
978 * 2. clear int status to get rid of possible pending
979 * interrupts
980 * 3. issue Get FW State Mbox cmd to determine fw state
981 * Set the mbx and rqstq intr code from Shadow Regs
982 */
983 aenmbx7 = RD_REG_DWORD(&reg->initval7);
984 ha->mbx_intr_code = MSW(aenmbx7);
985 ha->rqstq_intr_code = LSW(aenmbx7);
986 ha->req_que_off = RD_REG_DWORD(&reg->initval1);
987 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3);
988 ha->req_que_len = RD_REG_DWORD(&reg->initval5);
989 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6);
990 ql_dbg(ql_dbg_init, vha, 0x0135,
991 "f/w returned mbx_intr_code: 0x%x, "
992 "rqstq_intr_code: 0x%x\n",
993 ha->mbx_intr_code, ha->rqstq_intr_code);
994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
995
996 /* Get the FW state */
997 rval = qlafx00_get_firmware_state(vha, state);
998 if (rval != QLA_SUCCESS) {
999 /* Retry if timer has not expired */
1000 break;
1001 }
1002
1003 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
1004 /* Firmware is waiting to be
1005 * initialized by driver
1006 */
1007 rval = QLA_SUCCESS;
1008 done = true;
1009 break;
1010 }
1011
1012 /* Issue driver shutdown and wait until f/w recovers.
1013 * Driver should continue to poll until 8060 AEN is
1014 * received indicating firmware recovery.
1015 */
1016 ql_dbg(ql_dbg_init, vha, 0x0136,
1017 "Sending Driver shutdown fw_state 0x%x\n",
1018 state[0]);
1019
1020 rval = qlafx00_driver_shutdown(vha, 10);
1021 if (rval != QLA_SUCCESS) {
1022 rval = QLA_FUNCTION_FAILED;
1023 break;
1024 }
1025 msleep(500);
1026
1027 wtime = jiffies + (wait_time * HZ);
1028 break;
1029 }
1030
1031 if (!done) {
1032 if (time_after_eq(jiffies, wtime)) {
1033 ql_dbg(ql_dbg_init, vha, 0x0137,
1034 "Init f/w failed: aen[7]: 0x%x\n",
1035 RD_REG_DWORD(&reg->aenmailbox7));
1036 rval = QLA_FUNCTION_FAILED;
1037 done = true;
1038 break;
1039 }
1040 /* Delay for a while */
1041 msleep(500);
1042 }
1043 } while (!done);
1044
1045 if (rval)
1046 ql_dbg(ql_dbg_init, vha, 0x0138,
1047 "%s **** FAILED ****.\n", __func__);
1048 else
1049 ql_dbg(ql_dbg_init, vha, 0x0139,
1050 "%s **** SUCCESS ****.\n", __func__);
1051
1052 return rval;
1053 }
1054
1055 /*
1056 * qlafx00_fw_ready() - Waits for firmware ready.
1057 * @ha: HA context
1058 *
1059 * Returns 0 on success.
1060 */
1061 int
1062 qlafx00_fw_ready(scsi_qla_host_t *vha)
1063 {
1064 int rval;
1065 unsigned long wtime;
1066 uint16_t wait_time; /* Wait time if loop is coming ready */
1067 uint32_t state[5];
1068
1069 rval = QLA_SUCCESS;
1070
1071 wait_time = 10;
1072
1073 /* wait time before firmware ready */
1074 wtime = jiffies + (wait_time * HZ);
1075
1076 /* Wait for ISP to finish init */
1077 if (!vha->flags.init_done)
1078 ql_dbg(ql_dbg_init, vha, 0x013a,
1079 "Waiting for init to complete...\n");
1080
1081 do {
1082 rval = qlafx00_get_firmware_state(vha, state);
1083
1084 if (rval == QLA_SUCCESS) {
1085 if (state[0] == FSTATE_FX00_INITIALIZED) {
1086 ql_dbg(ql_dbg_init, vha, 0x013b,
1087 "fw_state=%x\n", state[0]);
1088 rval = QLA_SUCCESS;
1089 break;
1090 }
1091 }
1092 rval = QLA_FUNCTION_FAILED;
1093
1094 if (time_after_eq(jiffies, wtime))
1095 break;
1096
1097 /* Delay for a while */
1098 msleep(500);
1099
1100 ql_dbg(ql_dbg_init, vha, 0x013c,
1101 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1102 } while (1);
1103
1104
1105 if (rval)
1106 ql_dbg(ql_dbg_init, vha, 0x013d,
1107 "Firmware ready **** FAILED ****.\n");
1108 else
1109 ql_dbg(ql_dbg_init, vha, 0x013e,
1110 "Firmware ready **** SUCCESS ****.\n");
1111
1112 return rval;
1113 }
1114
1115 static int
1116 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1117 struct list_head *new_fcports)
1118 {
1119 int rval;
1120 uint16_t tgt_id;
1121 fc_port_t *fcport, *new_fcport;
1122 int found;
1123 struct qla_hw_data *ha = vha->hw;
1124
1125 rval = QLA_SUCCESS;
1126
1127 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1128 return QLA_FUNCTION_FAILED;
1129
1130 if ((atomic_read(&vha->loop_down_timer) ||
1131 STATE_TRANSITION(vha))) {
1132 atomic_set(&vha->loop_down_timer, 0);
1133 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1134 return QLA_FUNCTION_FAILED;
1135 }
1136
1137 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1138 "Listing Target bit map...\n");
1139 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1140 0x2089, (uint8_t *)ha->gid_list, 32);
1141
1142 /* Allocate temporary rmtport for any new rmtports discovered. */
1143 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1144 if (new_fcport == NULL)
1145 return QLA_MEMORY_ALLOC_FAILED;
1146
1147 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1148 QLAFX00_TGT_NODE_LIST_SIZE) {
1149
1150 /* Send get target node info */
1151 new_fcport->tgt_id = tgt_id;
1152 rval = qlafx00_fx_disc(vha, new_fcport,
1153 FXDISC_GET_TGT_NODE_INFO);
1154 if (rval != QLA_SUCCESS) {
1155 ql_log(ql_log_warn, vha, 0x208a,
1156 "Target info scan failed -- assuming zero-entry "
1157 "result...\n");
1158 continue;
1159 }
1160
1161 /* Locate matching device in database. */
1162 found = 0;
1163 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1164 if (memcmp(new_fcport->port_name,
1165 fcport->port_name, WWN_SIZE))
1166 continue;
1167
1168 found++;
1169
1170 /*
1171 * If tgt_id is same and state FCS_ONLINE, nothing
1172 * changed.
1173 */
1174 if (fcport->tgt_id == new_fcport->tgt_id &&
1175 atomic_read(&fcport->state) == FCS_ONLINE)
1176 break;
1177
1178 /*
1179 * Tgt ID changed or device was marked to be updated.
1180 */
1181 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1182 "TGT-ID Change(%s): Present tgt id: "
1183 "0x%x state: 0x%x "
1184 "wwnn = %llx wwpn = %llx.\n",
1185 __func__, fcport->tgt_id,
1186 atomic_read(&fcport->state),
1187 (unsigned long long)wwn_to_u64(fcport->node_name),
1188 (unsigned long long)wwn_to_u64(fcport->port_name));
1189
1190 ql_log(ql_log_info, vha, 0x208c,
1191 "TGT-ID Announce(%s): Discovered tgt "
1192 "id 0x%x wwnn = %llx "
1193 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1194 (unsigned long long)
1195 wwn_to_u64(new_fcport->node_name),
1196 (unsigned long long)
1197 wwn_to_u64(new_fcport->port_name));
1198
1199 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1200 fcport->old_tgt_id = fcport->tgt_id;
1201 fcport->tgt_id = new_fcport->tgt_id;
1202 ql_log(ql_log_info, vha, 0x208d,
1203 "TGT-ID: New fcport Added: %p\n", fcport);
1204 qla2x00_update_fcport(vha, fcport);
1205 } else {
1206 ql_log(ql_log_info, vha, 0x208e,
1207 " Existing TGT-ID %x did not get "
1208 " offline event from firmware.\n",
1209 fcport->old_tgt_id);
1210 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1211 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1212 kfree(new_fcport);
1213 return rval;
1214 }
1215 break;
1216 }
1217
1218 if (found)
1219 continue;
1220
1221 /* If device was not in our fcports list, then add it. */
1222 list_add_tail(&new_fcport->list, new_fcports);
1223
1224 /* Allocate a new replacement fcport. */
1225 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1226 if (new_fcport == NULL)
1227 return QLA_MEMORY_ALLOC_FAILED;
1228 }
1229
1230 kfree(new_fcport);
1231 return rval;
1232 }
1233
1234 /*
1235 * qlafx00_configure_all_targets
1236 * Setup target devices with node ID's.
1237 *
1238 * Input:
1239 * ha = adapter block pointer.
1240 *
1241 * Returns:
1242 * 0 = success.
1243 * BIT_0 = error
1244 */
1245 static int
1246 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1247 {
1248 int rval;
1249 fc_port_t *fcport, *rmptemp;
1250 LIST_HEAD(new_fcports);
1251
1252 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1253 FXDISC_GET_TGT_NODE_LIST);
1254 if (rval != QLA_SUCCESS) {
1255 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1256 return rval;
1257 }
1258
1259 rval = qlafx00_find_all_targets(vha, &new_fcports);
1260 if (rval != QLA_SUCCESS) {
1261 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1262 return rval;
1263 }
1264
1265 /*
1266 * Delete all previous devices marked lost.
1267 */
1268 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1269 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1270 break;
1271
1272 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1273 if (fcport->port_type != FCT_INITIATOR)
1274 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1275 }
1276 }
1277
1278 /*
1279 * Add the new devices to our devices list.
1280 */
1281 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1282 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1283 break;
1284
1285 qla2x00_update_fcport(vha, fcport);
1286 list_move_tail(&fcport->list, &vha->vp_fcports);
1287 ql_log(ql_log_info, vha, 0x208f,
1288 "Attach new target id 0x%x wwnn = %llx "
1289 "wwpn = %llx.\n",
1290 fcport->tgt_id,
1291 (unsigned long long)wwn_to_u64(fcport->node_name),
1292 (unsigned long long)wwn_to_u64(fcport->port_name));
1293 }
1294
1295 /* Free all new device structures not processed. */
1296 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1297 list_del(&fcport->list);
1298 kfree(fcport);
1299 }
1300
1301 return rval;
1302 }
1303
1304 /*
1305 * qlafx00_configure_devices
1306 * Updates Fibre Channel Device Database with what is actually on loop.
1307 *
1308 * Input:
1309 * ha = adapter block pointer.
1310 *
1311 * Returns:
1312 * 0 = success.
1313 * 1 = error.
1314 * 2 = database was full and device was not configured.
1315 */
1316 int
1317 qlafx00_configure_devices(scsi_qla_host_t *vha)
1318 {
1319 int rval;
1320 unsigned long flags, save_flags;
1321 rval = QLA_SUCCESS;
1322
1323 save_flags = flags = vha->dpc_flags;
1324
1325 ql_dbg(ql_dbg_disc, vha, 0x2090,
1326 "Configure devices -- dpc flags =0x%lx\n", flags);
1327
1328 rval = qlafx00_configure_all_targets(vha);
1329
1330 if (rval == QLA_SUCCESS) {
1331 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1332 rval = QLA_FUNCTION_FAILED;
1333 } else {
1334 atomic_set(&vha->loop_state, LOOP_READY);
1335 ql_log(ql_log_info, vha, 0x2091,
1336 "Device Ready\n");
1337 }
1338 }
1339
1340 if (rval) {
1341 ql_dbg(ql_dbg_disc, vha, 0x2092,
1342 "%s *** FAILED ***.\n", __func__);
1343 } else {
1344 ql_dbg(ql_dbg_disc, vha, 0x2093,
1345 "%s: exiting normally.\n", __func__);
1346 }
1347 return rval;
1348 }
1349
1350 static void
1351 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1352 {
1353 struct qla_hw_data *ha = vha->hw;
1354 fc_port_t *fcport;
1355
1356 vha->flags.online = 0;
1357 ha->mr.fw_hbt_en = 0;
1358
1359 if (!critemp) {
1360 ha->flags.chip_reset_done = 0;
1361 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1362 vha->qla_stats.total_isp_aborts++;
1363 ql_log(ql_log_info, vha, 0x013f,
1364 "Performing ISP error recovery - ha = %p.\n", ha);
1365 ha->isp_ops->reset_chip(vha);
1366 }
1367
1368 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1369 atomic_set(&vha->loop_state, LOOP_DOWN);
1370 atomic_set(&vha->loop_down_timer,
1371 QLAFX00_LOOP_DOWN_TIME);
1372 } else {
1373 if (!atomic_read(&vha->loop_down_timer))
1374 atomic_set(&vha->loop_down_timer,
1375 QLAFX00_LOOP_DOWN_TIME);
1376 }
1377
1378 /* Clear all async request states across all VPs. */
1379 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1380 fcport->flags = 0;
1381 if (atomic_read(&fcport->state) == FCS_ONLINE)
1382 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1383 }
1384
1385 if (!ha->flags.eeh_busy) {
1386 if (critemp) {
1387 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1388 } else {
1389 /* Requeue all commands in outstanding command list. */
1390 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1391 }
1392 }
1393
1394 qla2x00_free_irqs(vha);
1395 if (critemp)
1396 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1397 else
1398 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1399
1400 /* Clear the Interrupts */
1401 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1402
1403 ql_log(ql_log_info, vha, 0x0140,
1404 "%s Done done - ha=%p.\n", __func__, ha);
1405 }
1406
1407 /**
1408 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1409 * @ha: HA context
1410 *
1411 * Beginning of request ring has initialization control block already built
1412 * by nvram config routine.
1413 *
1414 * Returns 0 on success.
1415 */
1416 void
1417 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1418 {
1419 uint16_t cnt;
1420 response_t *pkt;
1421
1422 rsp->ring_ptr = rsp->ring;
1423 rsp->ring_index = 0;
1424 rsp->status_srb = NULL;
1425 pkt = rsp->ring_ptr;
1426 for (cnt = 0; cnt < rsp->length; cnt++) {
1427 pkt->signature = RESPONSE_PROCESSED;
1428 WRT_REG_DWORD((void __iomem *)&pkt->signature,
1429 RESPONSE_PROCESSED);
1430 pkt++;
1431 }
1432 }
1433
1434 int
1435 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1436 {
1437 uint32_t status = QLA_FUNCTION_FAILED;
1438 struct qla_hw_data *ha = vha->hw;
1439 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1440 uint32_t aenmbx7;
1441
1442 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1443
1444 aenmbx7 = RD_REG_DWORD(&reg->aenmailbox7);
1445 ha->mbx_intr_code = MSW(aenmbx7);
1446 ha->rqstq_intr_code = LSW(aenmbx7);
1447 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1);
1448 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3);
1449 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5);
1450 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6);
1451
1452 ql_dbg(ql_dbg_disc, vha, 0x2094,
1453 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1454 " Req que offset 0x%x Rsp que offset 0x%x\n",
1455 ha->mbx_intr_code, ha->rqstq_intr_code,
1456 ha->req_que_off, ha->rsp_que_len);
1457
1458 /* Clear the Interrupts */
1459 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1460
1461 status = qla2x00_init_rings(vha);
1462 if (!status) {
1463 vha->flags.online = 1;
1464
1465 /* if no cable then assume it's good */
1466 if ((vha->device_flags & DFLG_NO_CABLE))
1467 status = 0;
1468 /* Register system information */
1469 if (qlafx00_fx_disc(vha,
1470 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1471 ql_dbg(ql_dbg_disc, vha, 0x2095,
1472 "failed to register host info\n");
1473 }
1474 scsi_unblock_requests(vha->host);
1475 return status;
1476 }
1477
1478 void
1479 qlafx00_timer_routine(scsi_qla_host_t *vha)
1480 {
1481 struct qla_hw_data *ha = vha->hw;
1482 uint32_t fw_heart_beat;
1483 uint32_t aenmbx0;
1484 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1485 uint32_t tempc;
1486
1487 /* Check firmware health */
1488 if (ha->mr.fw_hbt_cnt)
1489 ha->mr.fw_hbt_cnt--;
1490 else {
1491 if ((!ha->flags.mr_reset_hdlr_active) &&
1492 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1493 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1494 (ha->mr.fw_hbt_en)) {
1495 fw_heart_beat = RD_REG_DWORD(&reg->fwheartbeat);
1496 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1497 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1498 ha->mr.fw_hbt_miss_cnt = 0;
1499 } else {
1500 ha->mr.fw_hbt_miss_cnt++;
1501 if (ha->mr.fw_hbt_miss_cnt ==
1502 QLAFX00_HEARTBEAT_MISS_CNT) {
1503 set_bit(ISP_ABORT_NEEDED,
1504 &vha->dpc_flags);
1505 qla2xxx_wake_dpc(vha);
1506 ha->mr.fw_hbt_miss_cnt = 0;
1507 }
1508 }
1509 }
1510 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1511 }
1512
1513 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1514 /* Reset recovery to be performed in timer routine */
1515 aenmbx0 = RD_REG_DWORD(&reg->aenmailbox0);
1516 if (ha->mr.fw_reset_timer_exp) {
1517 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1518 qla2xxx_wake_dpc(vha);
1519 ha->mr.fw_reset_timer_exp = 0;
1520 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1521 /* Wake up DPC to rescan the targets */
1522 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1523 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1524 qla2xxx_wake_dpc(vha);
1525 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1526 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1527 (!ha->mr.fw_hbt_en)) {
1528 ha->mr.fw_hbt_en = 1;
1529 } else if (!ha->mr.fw_reset_timer_tick) {
1530 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1531 ha->mr.fw_reset_timer_exp = 1;
1532 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1533 } else if (aenmbx0 == 0xFFFFFFFF) {
1534 uint32_t data0, data1;
1535
1536 data0 = QLAFX00_RD_REG(ha,
1537 QLAFX00_BAR1_BASE_ADDR_REG);
1538 data1 = QLAFX00_RD_REG(ha,
1539 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1540
1541 data0 &= 0xffff0000;
1542 data1 &= 0x0000ffff;
1543
1544 QLAFX00_WR_REG(ha,
1545 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1546 (data0 | data1));
1547 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1548 ha->mr.fw_reset_timer_tick =
1549 QLAFX00_MAX_RESET_INTERVAL;
1550 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1551 ha->mr.fw_reset_timer_tick =
1552 QLAFX00_MAX_RESET_INTERVAL;
1553 }
1554 ha->mr.old_aenmbx0_state = aenmbx0;
1555 ha->mr.fw_reset_timer_tick--;
1556 }
1557 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1558 /*
1559 * Critical temperature recovery to be
1560 * performed in timer routine
1561 */
1562 if (ha->mr.fw_critemp_timer_tick == 0) {
1563 tempc = QLAFX00_GET_TEMPERATURE(ha);
1564 ql_dbg(ql_dbg_timer, vha, 0x6012,
1565 "ISPFx00(%s): Critical temp timer, "
1566 "current SOC temperature: %d\n",
1567 __func__, tempc);
1568 if (tempc < ha->mr.critical_temperature) {
1569 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1570 clear_bit(FX00_CRITEMP_RECOVERY,
1571 &vha->dpc_flags);
1572 qla2xxx_wake_dpc(vha);
1573 }
1574 ha->mr.fw_critemp_timer_tick =
1575 QLAFX00_CRITEMP_INTERVAL;
1576 } else {
1577 ha->mr.fw_critemp_timer_tick--;
1578 }
1579 }
1580 if (ha->mr.host_info_resend) {
1581 /*
1582 * Incomplete host info might be sent to firmware
1583 * durinng system boot - info should be resend
1584 */
1585 if (ha->mr.hinfo_resend_timer_tick == 0) {
1586 ha->mr.host_info_resend = false;
1587 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1588 ha->mr.hinfo_resend_timer_tick =
1589 QLAFX00_HINFO_RESEND_INTERVAL;
1590 qla2xxx_wake_dpc(vha);
1591 } else {
1592 ha->mr.hinfo_resend_timer_tick--;
1593 }
1594 }
1595
1596 }
1597
1598 /*
1599 * qlfx00a_reset_initialize
1600 * Re-initialize after a iSA device reset.
1601 *
1602 * Input:
1603 * ha = adapter block pointer.
1604 *
1605 * Returns:
1606 * 0 = success
1607 */
1608 int
1609 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1610 {
1611 struct qla_hw_data *ha = vha->hw;
1612
1613 if (vha->device_flags & DFLG_DEV_FAILED) {
1614 ql_dbg(ql_dbg_init, vha, 0x0142,
1615 "Device in failed state\n");
1616 return QLA_SUCCESS;
1617 }
1618
1619 ha->flags.mr_reset_hdlr_active = 1;
1620
1621 if (vha->flags.online) {
1622 scsi_block_requests(vha->host);
1623 qlafx00_abort_isp_cleanup(vha, false);
1624 }
1625
1626 ql_log(ql_log_info, vha, 0x0143,
1627 "(%s): succeeded.\n", __func__);
1628 ha->flags.mr_reset_hdlr_active = 0;
1629 return QLA_SUCCESS;
1630 }
1631
1632 /*
1633 * qlafx00_abort_isp
1634 * Resets ISP and aborts all outstanding commands.
1635 *
1636 * Input:
1637 * ha = adapter block pointer.
1638 *
1639 * Returns:
1640 * 0 = success
1641 */
1642 int
1643 qlafx00_abort_isp(scsi_qla_host_t *vha)
1644 {
1645 struct qla_hw_data *ha = vha->hw;
1646
1647 if (vha->flags.online) {
1648 if (unlikely(pci_channel_offline(ha->pdev) &&
1649 ha->flags.pci_channel_io_perm_failure)) {
1650 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1651 return QLA_SUCCESS;
1652 }
1653
1654 scsi_block_requests(vha->host);
1655 qlafx00_abort_isp_cleanup(vha, false);
1656 } else {
1657 scsi_block_requests(vha->host);
1658 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1659 vha->qla_stats.total_isp_aborts++;
1660 ha->isp_ops->reset_chip(vha);
1661 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1662 /* Clear the Interrupts */
1663 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1664 }
1665
1666 ql_log(ql_log_info, vha, 0x0145,
1667 "(%s): succeeded.\n", __func__);
1668
1669 return QLA_SUCCESS;
1670 }
1671
1672 static inline fc_port_t*
1673 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1674 {
1675 fc_port_t *fcport;
1676
1677 /* Check for matching device in remote port list. */
1678 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1679 if (fcport->tgt_id == tgt_id) {
1680 ql_dbg(ql_dbg_async, vha, 0x5072,
1681 "Matching fcport(%p) found with TGT-ID: 0x%x "
1682 "and Remote TGT_ID: 0x%x\n",
1683 fcport, fcport->tgt_id, tgt_id);
1684 return fcport;
1685 }
1686 }
1687 return NULL;
1688 }
1689
1690 static void
1691 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1692 {
1693 fc_port_t *fcport;
1694
1695 ql_log(ql_log_info, vha, 0x5073,
1696 "Detach TGT-ID: 0x%x\n", tgt_id);
1697
1698 fcport = qlafx00_get_fcport(vha, tgt_id);
1699 if (!fcport)
1700 return;
1701
1702 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1703
1704 return;
1705 }
1706
1707 int
1708 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1709 {
1710 int rval = 0;
1711 uint32_t aen_code, aen_data;
1712
1713 aen_code = FCH_EVT_VENDOR_UNIQUE;
1714 aen_data = evt->u.aenfx.evtcode;
1715
1716 switch (evt->u.aenfx.evtcode) {
1717 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1718 if (evt->u.aenfx.mbx[1] == 0) {
1719 if (evt->u.aenfx.mbx[2] == 1) {
1720 if (!vha->flags.fw_tgt_reported)
1721 vha->flags.fw_tgt_reported = 1;
1722 atomic_set(&vha->loop_down_timer, 0);
1723 atomic_set(&vha->loop_state, LOOP_UP);
1724 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1725 qla2xxx_wake_dpc(vha);
1726 } else if (evt->u.aenfx.mbx[2] == 2) {
1727 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1728 }
1729 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1730 if (evt->u.aenfx.mbx[2] == 1) {
1731 if (!vha->flags.fw_tgt_reported)
1732 vha->flags.fw_tgt_reported = 1;
1733 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1734 } else if (evt->u.aenfx.mbx[2] == 2) {
1735 vha->device_flags |= DFLG_NO_CABLE;
1736 qla2x00_mark_all_devices_lost(vha, 1);
1737 }
1738 }
1739 break;
1740 case QLAFX00_MBA_LINK_UP:
1741 aen_code = FCH_EVT_LINKUP;
1742 aen_data = 0;
1743 break;
1744 case QLAFX00_MBA_LINK_DOWN:
1745 aen_code = FCH_EVT_LINKDOWN;
1746 aen_data = 0;
1747 break;
1748 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1749 ql_log(ql_log_info, vha, 0x5082,
1750 "Process critical temperature event "
1751 "aenmb[0]: %x\n",
1752 evt->u.aenfx.evtcode);
1753 scsi_block_requests(vha->host);
1754 qlafx00_abort_isp_cleanup(vha, true);
1755 scsi_unblock_requests(vha->host);
1756 break;
1757 }
1758
1759 fc_host_post_event(vha->host, fc_get_event_number(),
1760 aen_code, aen_data);
1761
1762 return rval;
1763 }
1764
1765 static void
1766 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1767 {
1768 u64 port_name = 0, node_name = 0;
1769
1770 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1771 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1772
1773 fc_host_node_name(vha->host) = node_name;
1774 fc_host_port_name(vha->host) = port_name;
1775 if (!pinfo->port_type)
1776 vha->hw->current_topology = ISP_CFG_F;
1777 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1778 atomic_set(&vha->loop_state, LOOP_READY);
1779 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1780 atomic_set(&vha->loop_state, LOOP_DOWN);
1781 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1782 }
1783
1784 static void
1785 qla2x00_fxdisc_iocb_timeout(void *data)
1786 {
1787 srb_t *sp = (srb_t *)data;
1788 struct srb_iocb *lio = &sp->u.iocb_cmd;
1789
1790 complete(&lio->u.fxiocb.fxiocb_comp);
1791 }
1792
1793 static void
1794 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1795 {
1796 srb_t *sp = (srb_t *)ptr;
1797 struct srb_iocb *lio = &sp->u.iocb_cmd;
1798
1799 complete(&lio->u.fxiocb.fxiocb_comp);
1800 }
1801
1802 int
1803 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1804 {
1805 srb_t *sp;
1806 struct srb_iocb *fdisc;
1807 int rval = QLA_FUNCTION_FAILED;
1808 struct qla_hw_data *ha = vha->hw;
1809 struct host_system_info *phost_info;
1810 struct register_host_info *preg_hsi;
1811 struct new_utsname *p_sysid = NULL;
1812 struct timeval tv;
1813
1814 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1815 if (!sp)
1816 goto done;
1817
1818 fdisc = &sp->u.iocb_cmd;
1819 switch (fx_type) {
1820 case FXDISC_GET_CONFIG_INFO:
1821 fdisc->u.fxiocb.flags =
1822 SRB_FXDISC_RESP_DMA_VALID;
1823 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1824 break;
1825 case FXDISC_GET_PORT_INFO:
1826 fdisc->u.fxiocb.flags =
1827 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1828 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1829 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1830 break;
1831 case FXDISC_GET_TGT_NODE_INFO:
1832 fdisc->u.fxiocb.flags =
1833 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1834 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1835 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1836 break;
1837 case FXDISC_GET_TGT_NODE_LIST:
1838 fdisc->u.fxiocb.flags =
1839 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1840 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1841 break;
1842 case FXDISC_REG_HOST_INFO:
1843 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1844 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1845 p_sysid = utsname();
1846 if (!p_sysid) {
1847 ql_log(ql_log_warn, vha, 0x303c,
1848 "Not able to get the system information\n");
1849 goto done_free_sp;
1850 }
1851 break;
1852 case FXDISC_ABORT_IOCTL:
1853 default:
1854 break;
1855 }
1856
1857 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1858 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1859 fdisc->u.fxiocb.req_len,
1860 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1861 if (!fdisc->u.fxiocb.req_addr)
1862 goto done_free_sp;
1863
1864 if (fx_type == FXDISC_REG_HOST_INFO) {
1865 preg_hsi = (struct register_host_info *)
1866 fdisc->u.fxiocb.req_addr;
1867 phost_info = &preg_hsi->hsi;
1868 memset(preg_hsi, 0, sizeof(struct register_host_info));
1869 phost_info->os_type = OS_TYPE_LINUX;
1870 strncpy(phost_info->sysname,
1871 p_sysid->sysname, SYSNAME_LENGTH);
1872 strncpy(phost_info->nodename,
1873 p_sysid->nodename, NODENAME_LENGTH);
1874 if (!strcmp(phost_info->nodename, "(none)"))
1875 ha->mr.host_info_resend = true;
1876 strncpy(phost_info->release,
1877 p_sysid->release, RELEASE_LENGTH);
1878 strncpy(phost_info->version,
1879 p_sysid->version, VERSION_LENGTH);
1880 strncpy(phost_info->machine,
1881 p_sysid->machine, MACHINE_LENGTH);
1882 strncpy(phost_info->domainname,
1883 p_sysid->domainname, DOMNAME_LENGTH);
1884 strncpy(phost_info->hostdriver,
1885 QLA2XXX_VERSION, VERSION_LENGTH);
1886 do_gettimeofday(&tv);
1887 preg_hsi->utc = (uint64_t)tv.tv_sec;
1888 ql_dbg(ql_dbg_init, vha, 0x0149,
1889 "ISP%04X: Host registration with firmware\n",
1890 ha->pdev->device);
1891 ql_dbg(ql_dbg_init, vha, 0x014a,
1892 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1893 phost_info->os_type,
1894 phost_info->sysname,
1895 phost_info->nodename);
1896 ql_dbg(ql_dbg_init, vha, 0x014b,
1897 "release = '%s', version = '%s'\n",
1898 phost_info->release,
1899 phost_info->version);
1900 ql_dbg(ql_dbg_init, vha, 0x014c,
1901 "machine = '%s' "
1902 "domainname = '%s', hostdriver = '%s'\n",
1903 phost_info->machine,
1904 phost_info->domainname,
1905 phost_info->hostdriver);
1906 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1907 (uint8_t *)phost_info,
1908 sizeof(struct host_system_info));
1909 }
1910 }
1911
1912 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1913 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1914 fdisc->u.fxiocb.rsp_len,
1915 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1916 if (!fdisc->u.fxiocb.rsp_addr)
1917 goto done_unmap_req;
1918 }
1919
1920 sp->type = SRB_FXIOCB_DCMD;
1921 sp->name = "fxdisc";
1922 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1923 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1924 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1925 sp->done = qla2x00_fxdisc_sp_done;
1926
1927 rval = qla2x00_start_sp(sp);
1928 if (rval != QLA_SUCCESS)
1929 goto done_unmap_dma;
1930
1931 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1932
1933 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1934 struct config_info_data *pinfo =
1935 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1936 strcpy(vha->hw->model_number, pinfo->model_num);
1937 strcpy(vha->hw->model_desc, pinfo->model_description);
1938 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1939 sizeof(vha->hw->mr.symbolic_name));
1940 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1941 sizeof(vha->hw->mr.serial_num));
1942 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1943 sizeof(vha->hw->mr.hw_version));
1944 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1945 sizeof(vha->hw->mr.fw_version));
1946 strim(vha->hw->mr.fw_version);
1947 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1948 sizeof(vha->hw->mr.uboot_version));
1949 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1950 sizeof(vha->hw->mr.fru_serial_num));
1951 vha->hw->mr.critical_temperature =
1952 (pinfo->nominal_temp_value) ?
1953 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1954 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1955 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1956 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1957 struct port_info_data *pinfo =
1958 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1959 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1960 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1961 vha->d_id.b.domain = pinfo->port_id[0];
1962 vha->d_id.b.area = pinfo->port_id[1];
1963 vha->d_id.b.al_pa = pinfo->port_id[2];
1964 qlafx00_update_host_attr(vha, pinfo);
1965 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1966 (uint8_t *)pinfo, 16);
1967 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1968 struct qlafx00_tgt_node_info *pinfo =
1969 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1970 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1971 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1972 fcport->port_type = FCT_TARGET;
1973 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1974 (uint8_t *)pinfo, 16);
1975 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1976 struct qlafx00_tgt_node_info *pinfo =
1977 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1978 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1979 (uint8_t *)pinfo, 16);
1980 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1981 } else if (fx_type == FXDISC_ABORT_IOCTL)
1982 fdisc->u.fxiocb.result =
1983 (fdisc->u.fxiocb.result ==
1984 cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1985 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1986
1987 rval = le32_to_cpu(fdisc->u.fxiocb.result);
1988
1989 done_unmap_dma:
1990 if (fdisc->u.fxiocb.rsp_addr)
1991 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1992 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1993
1994 done_unmap_req:
1995 if (fdisc->u.fxiocb.req_addr)
1996 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1997 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1998 done_free_sp:
1999 sp->free(vha, sp);
2000 done:
2001 return rval;
2002 }
2003
2004 /*
2005 * qlafx00_initialize_adapter
2006 * Initialize board.
2007 *
2008 * Input:
2009 * ha = adapter block pointer.
2010 *
2011 * Returns:
2012 * 0 = success
2013 */
2014 int
2015 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
2016 {
2017 int rval;
2018 struct qla_hw_data *ha = vha->hw;
2019 uint32_t tempc;
2020
2021 /* Clear adapter flags. */
2022 vha->flags.online = 0;
2023 ha->flags.chip_reset_done = 0;
2024 vha->flags.reset_active = 0;
2025 ha->flags.pci_channel_io_perm_failure = 0;
2026 ha->flags.eeh_busy = 0;
2027 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2028 atomic_set(&vha->loop_state, LOOP_DOWN);
2029 vha->device_flags = DFLG_NO_CABLE;
2030 vha->dpc_flags = 0;
2031 vha->flags.management_server_logged_in = 0;
2032 ha->isp_abort_cnt = 0;
2033 ha->beacon_blink_led = 0;
2034
2035 set_bit(0, ha->req_qid_map);
2036 set_bit(0, ha->rsp_qid_map);
2037
2038 ql_dbg(ql_dbg_init, vha, 0x0147,
2039 "Configuring PCI space...\n");
2040
2041 rval = ha->isp_ops->pci_config(vha);
2042 if (rval) {
2043 ql_log(ql_log_warn, vha, 0x0148,
2044 "Unable to configure PCI space.\n");
2045 return rval;
2046 }
2047
2048 rval = qlafx00_init_fw_ready(vha);
2049 if (rval != QLA_SUCCESS)
2050 return rval;
2051
2052 qlafx00_save_queue_ptrs(vha);
2053
2054 rval = qlafx00_config_queues(vha);
2055 if (rval != QLA_SUCCESS)
2056 return rval;
2057
2058 /*
2059 * Allocate the array of outstanding commands
2060 * now that we know the firmware resources.
2061 */
2062 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2063 if (rval != QLA_SUCCESS)
2064 return rval;
2065
2066 rval = qla2x00_init_rings(vha);
2067 ha->flags.chip_reset_done = 1;
2068
2069 tempc = QLAFX00_GET_TEMPERATURE(ha);
2070 ql_dbg(ql_dbg_init, vha, 0x0152,
2071 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2072 __func__, tempc);
2073
2074 return rval;
2075 }
2076
2077 uint32_t
2078 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2079 char *buf)
2080 {
2081 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2082 int rval = QLA_FUNCTION_FAILED;
2083 uint32_t state[1];
2084
2085 if (qla2x00_reset_active(vha))
2086 ql_log(ql_log_warn, vha, 0x70ce,
2087 "ISP reset active.\n");
2088 else if (!vha->hw->flags.eeh_busy) {
2089 rval = qlafx00_get_firmware_state(vha, state);
2090 }
2091 if (rval != QLA_SUCCESS)
2092 memset(state, -1, sizeof(state));
2093
2094 return state[0];
2095 }
2096
2097 void
2098 qlafx00_get_host_speed(struct Scsi_Host *shost)
2099 {
2100 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2101 (shost_priv(shost)))->hw;
2102 u32 speed = FC_PORTSPEED_UNKNOWN;
2103
2104 switch (ha->link_data_rate) {
2105 case QLAFX00_PORT_SPEED_2G:
2106 speed = FC_PORTSPEED_2GBIT;
2107 break;
2108 case QLAFX00_PORT_SPEED_4G:
2109 speed = FC_PORTSPEED_4GBIT;
2110 break;
2111 case QLAFX00_PORT_SPEED_8G:
2112 speed = FC_PORTSPEED_8GBIT;
2113 break;
2114 case QLAFX00_PORT_SPEED_10G:
2115 speed = FC_PORTSPEED_10GBIT;
2116 break;
2117 }
2118 fc_host_speed(shost) = speed;
2119 }
2120
2121 /** QLAFX00 specific ISR implementation functions */
2122
2123 static inline void
2124 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2125 uint32_t sense_len, struct rsp_que *rsp, int res)
2126 {
2127 struct scsi_qla_host *vha = sp->fcport->vha;
2128 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2129 uint32_t track_sense_len;
2130
2131 SET_FW_SENSE_LEN(sp, sense_len);
2132
2133 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2134 sense_len = SCSI_SENSE_BUFFERSIZE;
2135
2136 SET_CMD_SENSE_LEN(sp, sense_len);
2137 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2138 track_sense_len = sense_len;
2139
2140 if (sense_len > par_sense_len)
2141 sense_len = par_sense_len;
2142
2143 memcpy(cp->sense_buffer, sense_data, sense_len);
2144
2145 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2146
2147 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2148 track_sense_len -= sense_len;
2149 SET_CMD_SENSE_LEN(sp, track_sense_len);
2150
2151 ql_dbg(ql_dbg_io, vha, 0x304d,
2152 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2153 sense_len, par_sense_len, track_sense_len);
2154 if (GET_FW_SENSE_LEN(sp) > 0) {
2155 rsp->status_srb = sp;
2156 cp->result = res;
2157 }
2158
2159 if (sense_len) {
2160 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2161 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2162 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2163 cp);
2164 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2165 cp->sense_buffer, sense_len);
2166 }
2167 }
2168
2169 static void
2170 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2171 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2172 __le16 sstatus, __le16 cpstatus)
2173 {
2174 struct srb_iocb *tmf;
2175
2176 tmf = &sp->u.iocb_cmd;
2177 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2178 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2179 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2180 tmf->u.tmf.comp_status = cpstatus;
2181 sp->done(vha, sp, 0);
2182 }
2183
2184 static void
2185 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2186 struct abort_iocb_entry_fx00 *pkt)
2187 {
2188 const char func[] = "ABT_IOCB";
2189 srb_t *sp;
2190 struct srb_iocb *abt;
2191
2192 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2193 if (!sp)
2194 return;
2195
2196 abt = &sp->u.iocb_cmd;
2197 abt->u.abt.comp_status = pkt->tgt_id_sts;
2198 sp->done(vha, sp, 0);
2199 }
2200
2201 static void
2202 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2203 struct ioctl_iocb_entry_fx00 *pkt)
2204 {
2205 const char func[] = "IOSB_IOCB";
2206 srb_t *sp;
2207 struct fc_bsg_job *bsg_job;
2208 struct srb_iocb *iocb_job;
2209 int res;
2210 struct qla_mt_iocb_rsp_fx00 fstatus;
2211 uint8_t *fw_sts_ptr;
2212
2213 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2214 if (!sp)
2215 return;
2216
2217 if (sp->type == SRB_FXIOCB_DCMD) {
2218 iocb_job = &sp->u.iocb_cmd;
2219 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2220 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2221 iocb_job->u.fxiocb.result = pkt->status;
2222 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2223 iocb_job->u.fxiocb.req_data =
2224 pkt->dataword_r;
2225 } else {
2226 bsg_job = sp->u.bsg_job;
2227
2228 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2229
2230 fstatus.reserved_1 = pkt->reserved_0;
2231 fstatus.func_type = pkt->comp_func_num;
2232 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2233 fstatus.ioctl_data = pkt->dataword_r;
2234 fstatus.adapid = pkt->adapid;
2235 fstatus.reserved_2 = pkt->dataword_r_extra;
2236 fstatus.res_count = pkt->residuallen;
2237 fstatus.status = pkt->status;
2238 fstatus.seq_number = pkt->seq_no;
2239 memcpy(fstatus.reserved_3,
2240 pkt->reserved_2, 20 * sizeof(uint8_t));
2241
2242 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2243 sizeof(struct fc_bsg_reply);
2244
2245 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2246 sizeof(struct qla_mt_iocb_rsp_fx00));
2247 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2248 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2249
2250 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2251 sp->fcport->vha, 0x5080,
2252 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2253
2254 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2255 sp->fcport->vha, 0x5074,
2256 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2257
2258 res = bsg_job->reply->result = DID_OK << 16;
2259 bsg_job->reply->reply_payload_rcv_len =
2260 bsg_job->reply_payload.payload_len;
2261 }
2262 sp->done(vha, sp, res);
2263 }
2264
2265 /**
2266 * qlafx00_status_entry() - Process a Status IOCB entry.
2267 * @ha: SCSI driver HA context
2268 * @pkt: Entry pointer
2269 */
2270 static void
2271 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2272 {
2273 srb_t *sp;
2274 fc_port_t *fcport;
2275 struct scsi_cmnd *cp;
2276 struct sts_entry_fx00 *sts;
2277 __le16 comp_status;
2278 __le16 scsi_status;
2279 uint16_t ox_id;
2280 __le16 lscsi_status;
2281 int32_t resid;
2282 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2283 fw_resid_len;
2284 uint8_t *rsp_info = NULL, *sense_data = NULL;
2285 struct qla_hw_data *ha = vha->hw;
2286 uint32_t hindex, handle;
2287 uint16_t que;
2288 struct req_que *req;
2289 int logit = 1;
2290 int res = 0;
2291
2292 sts = (struct sts_entry_fx00 *) pkt;
2293
2294 comp_status = sts->comp_status;
2295 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2296 hindex = sts->handle;
2297 handle = LSW(hindex);
2298
2299 que = MSW(hindex);
2300 req = ha->req_q_map[que];
2301
2302 /* Validate handle. */
2303 if (handle < req->num_outstanding_cmds)
2304 sp = req->outstanding_cmds[handle];
2305 else
2306 sp = NULL;
2307
2308 if (sp == NULL) {
2309 ql_dbg(ql_dbg_io, vha, 0x3034,
2310 "Invalid status handle (0x%x).\n", handle);
2311
2312 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2313 qla2xxx_wake_dpc(vha);
2314 return;
2315 }
2316
2317 if (sp->type == SRB_TM_CMD) {
2318 req->outstanding_cmds[handle] = NULL;
2319 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2320 scsi_status, comp_status);
2321 return;
2322 }
2323
2324 /* Fast path completion. */
2325 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2326 qla2x00_process_completed_request(vha, req, handle);
2327 return;
2328 }
2329
2330 req->outstanding_cmds[handle] = NULL;
2331 cp = GET_CMD_SP(sp);
2332 if (cp == NULL) {
2333 ql_dbg(ql_dbg_io, vha, 0x3048,
2334 "Command already returned (0x%x/%p).\n",
2335 handle, sp);
2336
2337 return;
2338 }
2339
2340 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2341
2342 fcport = sp->fcport;
2343
2344 ox_id = 0;
2345 sense_len = par_sense_len = rsp_info_len = resid_len =
2346 fw_resid_len = 0;
2347 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2348 sense_len = sts->sense_len;
2349 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2350 | (uint16_t)SS_RESIDUAL_OVER)))
2351 resid_len = le32_to_cpu(sts->residual_len);
2352 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2353 fw_resid_len = le32_to_cpu(sts->residual_len);
2354 rsp_info = sense_data = sts->data;
2355 par_sense_len = sizeof(sts->data);
2356
2357 /* Check for overrun. */
2358 if (comp_status == CS_COMPLETE &&
2359 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2360 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2361
2362 /*
2363 * Based on Host and scsi status generate status code for Linux
2364 */
2365 switch (le16_to_cpu(comp_status)) {
2366 case CS_COMPLETE:
2367 case CS_QUEUE_FULL:
2368 if (scsi_status == 0) {
2369 res = DID_OK << 16;
2370 break;
2371 }
2372 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2373 | (uint16_t)SS_RESIDUAL_OVER))) {
2374 resid = resid_len;
2375 scsi_set_resid(cp, resid);
2376
2377 if (!lscsi_status &&
2378 ((unsigned)(scsi_bufflen(cp) - resid) <
2379 cp->underflow)) {
2380 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2381 "Mid-layer underflow "
2382 "detected (0x%x of 0x%x bytes).\n",
2383 resid, scsi_bufflen(cp));
2384
2385 res = DID_ERROR << 16;
2386 break;
2387 }
2388 }
2389 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2390
2391 if (lscsi_status ==
2392 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2393 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2394 "QUEUE FULL detected.\n");
2395 break;
2396 }
2397 logit = 0;
2398 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2399 break;
2400
2401 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2402 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2403 break;
2404
2405 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2406 rsp, res);
2407 break;
2408
2409 case CS_DATA_UNDERRUN:
2410 /* Use F/W calculated residual length. */
2411 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2412 resid = fw_resid_len;
2413 else
2414 resid = resid_len;
2415 scsi_set_resid(cp, resid);
2416 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2417 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2418 && fw_resid_len != resid_len) {
2419 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2420 "Dropped frame(s) detected "
2421 "(0x%x of 0x%x bytes).\n",
2422 resid, scsi_bufflen(cp));
2423
2424 res = DID_ERROR << 16 |
2425 le16_to_cpu(lscsi_status);
2426 goto check_scsi_status;
2427 }
2428
2429 if (!lscsi_status &&
2430 ((unsigned)(scsi_bufflen(cp) - resid) <
2431 cp->underflow)) {
2432 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2433 "Mid-layer underflow "
2434 "detected (0x%x of 0x%x bytes, "
2435 "cp->underflow: 0x%x).\n",
2436 resid, scsi_bufflen(cp), cp->underflow);
2437
2438 res = DID_ERROR << 16;
2439 break;
2440 }
2441 } else if (lscsi_status !=
2442 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2443 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2444 /*
2445 * scsi status of task set and busy are considered
2446 * to be task not completed.
2447 */
2448
2449 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2450 "Dropped frame(s) detected (0x%x "
2451 "of 0x%x bytes).\n", resid,
2452 scsi_bufflen(cp));
2453
2454 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2455 goto check_scsi_status;
2456 } else {
2457 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2458 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2459 scsi_status, lscsi_status);
2460 }
2461
2462 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2463 logit = 0;
2464
2465 check_scsi_status:
2466 /*
2467 * Check to see if SCSI Status is non zero. If so report SCSI
2468 * Status.
2469 */
2470 if (lscsi_status != 0) {
2471 if (lscsi_status ==
2472 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2473 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2474 "QUEUE FULL detected.\n");
2475 logit = 1;
2476 break;
2477 }
2478 if (lscsi_status !=
2479 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2480 break;
2481
2482 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2483 if (!(scsi_status &
2484 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2485 break;
2486
2487 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2488 sense_len, rsp, res);
2489 }
2490 break;
2491
2492 case CS_PORT_LOGGED_OUT:
2493 case CS_PORT_CONFIG_CHG:
2494 case CS_PORT_BUSY:
2495 case CS_INCOMPLETE:
2496 case CS_PORT_UNAVAILABLE:
2497 case CS_TIMEOUT:
2498 case CS_RESET:
2499
2500 /*
2501 * We are going to have the fc class block the rport
2502 * while we try to recover so instruct the mid layer
2503 * to requeue until the class decides how to handle this.
2504 */
2505 res = DID_TRANSPORT_DISRUPTED << 16;
2506
2507 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2508 "Port down status: port-state=0x%x.\n",
2509 atomic_read(&fcport->state));
2510
2511 if (atomic_read(&fcport->state) == FCS_ONLINE)
2512 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2513 break;
2514
2515 case CS_ABORTED:
2516 res = DID_RESET << 16;
2517 break;
2518
2519 default:
2520 res = DID_ERROR << 16;
2521 break;
2522 }
2523
2524 if (logit)
2525 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2526 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2527 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2528 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2529 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2530 comp_status, scsi_status, res, vha->host_no,
2531 cp->device->id, cp->device->lun, fcport->tgt_id,
2532 lscsi_status, cp->cmnd, scsi_bufflen(cp),
2533 rsp_info_len, resid_len, fw_resid_len, sense_len,
2534 par_sense_len, rsp_info_len);
2535
2536 if (rsp->status_srb == NULL)
2537 sp->done(ha, sp, res);
2538 }
2539
2540 /**
2541 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2542 * @ha: SCSI driver HA context
2543 * @pkt: Entry pointer
2544 *
2545 * Extended sense data.
2546 */
2547 static void
2548 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2549 {
2550 uint8_t sense_sz = 0;
2551 struct qla_hw_data *ha = rsp->hw;
2552 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2553 srb_t *sp = rsp->status_srb;
2554 struct scsi_cmnd *cp;
2555 uint32_t sense_len;
2556 uint8_t *sense_ptr;
2557
2558 if (!sp) {
2559 ql_dbg(ql_dbg_io, vha, 0x3037,
2560 "no SP, sp = %p\n", sp);
2561 return;
2562 }
2563
2564 if (!GET_FW_SENSE_LEN(sp)) {
2565 ql_dbg(ql_dbg_io, vha, 0x304b,
2566 "no fw sense data, sp = %p\n", sp);
2567 return;
2568 }
2569 cp = GET_CMD_SP(sp);
2570 if (cp == NULL) {
2571 ql_log(ql_log_warn, vha, 0x303b,
2572 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2573
2574 rsp->status_srb = NULL;
2575 return;
2576 }
2577
2578 if (!GET_CMD_SENSE_LEN(sp)) {
2579 ql_dbg(ql_dbg_io, vha, 0x304c,
2580 "no sense data, sp = %p\n", sp);
2581 } else {
2582 sense_len = GET_CMD_SENSE_LEN(sp);
2583 sense_ptr = GET_CMD_SENSE_PTR(sp);
2584 ql_dbg(ql_dbg_io, vha, 0x304f,
2585 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2586 sp, sense_len, sense_ptr);
2587
2588 if (sense_len > sizeof(pkt->data))
2589 sense_sz = sizeof(pkt->data);
2590 else
2591 sense_sz = sense_len;
2592
2593 /* Move sense data. */
2594 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2595 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2596 memcpy(sense_ptr, pkt->data, sense_sz);
2597 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2598 sense_ptr, sense_sz);
2599
2600 sense_len -= sense_sz;
2601 sense_ptr += sense_sz;
2602
2603 SET_CMD_SENSE_PTR(sp, sense_ptr);
2604 SET_CMD_SENSE_LEN(sp, sense_len);
2605 }
2606 sense_len = GET_FW_SENSE_LEN(sp);
2607 sense_len = (sense_len > sizeof(pkt->data)) ?
2608 (sense_len - sizeof(pkt->data)) : 0;
2609 SET_FW_SENSE_LEN(sp, sense_len);
2610
2611 /* Place command on done queue. */
2612 if (sense_len == 0) {
2613 rsp->status_srb = NULL;
2614 sp->done(ha, sp, cp->result);
2615 }
2616 }
2617
2618 /**
2619 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2620 * @ha: SCSI driver HA context
2621 */
2622 static void
2623 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2624 struct rsp_que *rsp, void *pkt)
2625 {
2626 srb_t *sp;
2627 struct multi_sts_entry_fx00 *stsmfx;
2628 struct qla_hw_data *ha = vha->hw;
2629 uint32_t handle, hindex, handle_count, i;
2630 uint16_t que;
2631 struct req_que *req;
2632 __le32 *handle_ptr;
2633
2634 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2635
2636 handle_count = stsmfx->handle_count;
2637
2638 if (handle_count > MAX_HANDLE_COUNT) {
2639 ql_dbg(ql_dbg_io, vha, 0x3035,
2640 "Invalid handle count (0x%x).\n", handle_count);
2641 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2642 qla2xxx_wake_dpc(vha);
2643 return;
2644 }
2645
2646 handle_ptr = &stsmfx->handles[0];
2647
2648 for (i = 0; i < handle_count; i++) {
2649 hindex = le32_to_cpu(*handle_ptr);
2650 handle = LSW(hindex);
2651 que = MSW(hindex);
2652 req = ha->req_q_map[que];
2653
2654 /* Validate handle. */
2655 if (handle < req->num_outstanding_cmds)
2656 sp = req->outstanding_cmds[handle];
2657 else
2658 sp = NULL;
2659
2660 if (sp == NULL) {
2661 ql_dbg(ql_dbg_io, vha, 0x3044,
2662 "Invalid status handle (0x%x).\n", handle);
2663 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2664 qla2xxx_wake_dpc(vha);
2665 return;
2666 }
2667 qla2x00_process_completed_request(vha, req, handle);
2668 handle_ptr++;
2669 }
2670 }
2671
2672 /**
2673 * qlafx00_error_entry() - Process an error entry.
2674 * @ha: SCSI driver HA context
2675 * @pkt: Entry pointer
2676 */
2677 static void
2678 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2679 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2680 {
2681 srb_t *sp;
2682 struct qla_hw_data *ha = vha->hw;
2683 const char func[] = "ERROR-IOCB";
2684 uint16_t que = 0;
2685 struct req_que *req = NULL;
2686 int res = DID_ERROR << 16;
2687
2688 ql_dbg(ql_dbg_async, vha, 0x507f,
2689 "type of error status in response: 0x%x\n", estatus);
2690
2691 req = ha->req_q_map[que];
2692
2693 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2694 if (sp) {
2695 sp->done(ha, sp, res);
2696 return;
2697 }
2698
2699 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2700 qla2xxx_wake_dpc(vha);
2701 }
2702
2703 /**
2704 * qlafx00_process_response_queue() - Process response queue entries.
2705 * @ha: SCSI driver HA context
2706 */
2707 static void
2708 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2709 struct rsp_que *rsp)
2710 {
2711 struct sts_entry_fx00 *pkt;
2712 response_t *lptr;
2713 uint16_t lreq_q_in = 0;
2714 uint16_t lreq_q_out = 0;
2715
2716 lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2717 lreq_q_out = rsp->ring_index;
2718
2719 while (lreq_q_in != lreq_q_out) {
2720 lptr = rsp->ring_ptr;
2721 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2722 sizeof(rsp->rsp_pkt));
2723 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2724
2725 rsp->ring_index++;
2726 lreq_q_out++;
2727 if (rsp->ring_index == rsp->length) {
2728 lreq_q_out = 0;
2729 rsp->ring_index = 0;
2730 rsp->ring_ptr = rsp->ring;
2731 } else {
2732 rsp->ring_ptr++;
2733 }
2734
2735 if (pkt->entry_status != 0 &&
2736 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2737 qlafx00_error_entry(vha, rsp,
2738 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2739 pkt->entry_type);
2740 continue;
2741 }
2742
2743 switch (pkt->entry_type) {
2744 case STATUS_TYPE_FX00:
2745 qlafx00_status_entry(vha, rsp, pkt);
2746 break;
2747
2748 case STATUS_CONT_TYPE_FX00:
2749 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2750 break;
2751
2752 case MULTI_STATUS_TYPE_FX00:
2753 qlafx00_multistatus_entry(vha, rsp, pkt);
2754 break;
2755
2756 case ABORT_IOCB_TYPE_FX00:
2757 qlafx00_abort_iocb_entry(vha, rsp->req,
2758 (struct abort_iocb_entry_fx00 *)pkt);
2759 break;
2760
2761 case IOCTL_IOSB_TYPE_FX00:
2762 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2763 (struct ioctl_iocb_entry_fx00 *)pkt);
2764 break;
2765 default:
2766 /* Type Not Supported. */
2767 ql_dbg(ql_dbg_async, vha, 0x5081,
2768 "Received unknown response pkt type %x "
2769 "entry status=%x.\n",
2770 pkt->entry_type, pkt->entry_status);
2771 break;
2772 }
2773 }
2774
2775 /* Adjust ring index */
2776 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2777 }
2778
2779 /**
2780 * qlafx00_async_event() - Process aynchronous events.
2781 * @ha: SCSI driver HA context
2782 */
2783 static void
2784 qlafx00_async_event(scsi_qla_host_t *vha)
2785 {
2786 struct qla_hw_data *ha = vha->hw;
2787 struct device_reg_fx00 __iomem *reg;
2788 int data_size = 1;
2789
2790 reg = &ha->iobase->ispfx00;
2791 /* Setup to process RIO completion. */
2792 switch (ha->aenmb[0]) {
2793 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2794 ql_log(ql_log_warn, vha, 0x5079,
2795 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2796 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2797 break;
2798
2799 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2800 ql_dbg(ql_dbg_async, vha, 0x5076,
2801 "Asynchronous FW shutdown requested.\n");
2802 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2803 qla2xxx_wake_dpc(vha);
2804 break;
2805
2806 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2807 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
2808 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
2809 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
2810 ql_dbg(ql_dbg_async, vha, 0x5077,
2811 "Asynchronous port Update received "
2812 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2813 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2814 data_size = 4;
2815 break;
2816
2817 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
2818 ql_log(ql_log_info, vha, 0x5085,
2819 "Asynchronous over temperature event received "
2820 "aenmb[0]: %x\n",
2821 ha->aenmb[0]);
2822 break;
2823
2824 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2825 ql_log(ql_log_info, vha, 0x5086,
2826 "Asynchronous normal temperature event received "
2827 "aenmb[0]: %x\n",
2828 ha->aenmb[0]);
2829 break;
2830
2831 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2832 ql_log(ql_log_info, vha, 0x5083,
2833 "Asynchronous critical temperature event received "
2834 "aenmb[0]: %x\n",
2835 ha->aenmb[0]);
2836 break;
2837
2838 default:
2839 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
2840 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
2841 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
2842 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
2843 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
2844 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
2845 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
2846 ql_dbg(ql_dbg_async, vha, 0x5078,
2847 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2848 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2849 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2850 break;
2851 }
2852 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2853 (uint32_t *)ha->aenmb, data_size);
2854 }
2855
2856 /**
2857 *
2858 * qlafx00x_mbx_completion() - Process mailbox command completions.
2859 * @ha: SCSI driver HA context
2860 * @mb16: Mailbox16 register
2861 */
2862 static void
2863 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2864 {
2865 uint16_t cnt;
2866 uint32_t __iomem *wptr;
2867 struct qla_hw_data *ha = vha->hw;
2868 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2869
2870 if (!ha->mcp32)
2871 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2872
2873 /* Load return mailbox registers. */
2874 ha->flags.mbox_int = 1;
2875 ha->mailbox_out32[0] = mb0;
2876 wptr = (uint32_t __iomem *)&reg->mailbox17;
2877
2878 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2879 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2880 wptr++;
2881 }
2882 }
2883
2884 /**
2885 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2886 * @irq:
2887 * @dev_id: SCSI driver HA context
2888 *
2889 * Called by system whenever the host adapter generates an interrupt.
2890 *
2891 * Returns handled flag.
2892 */
2893 irqreturn_t
2894 qlafx00_intr_handler(int irq, void *dev_id)
2895 {
2896 scsi_qla_host_t *vha;
2897 struct qla_hw_data *ha;
2898 struct device_reg_fx00 __iomem *reg;
2899 int status;
2900 unsigned long iter;
2901 uint32_t stat;
2902 uint32_t mb[8];
2903 struct rsp_que *rsp;
2904 unsigned long flags;
2905 uint32_t clr_intr = 0;
2906 uint32_t intr_stat = 0;
2907
2908 rsp = (struct rsp_que *) dev_id;
2909 if (!rsp) {
2910 ql_log(ql_log_info, NULL, 0x507d,
2911 "%s: NULL response queue pointer.\n", __func__);
2912 return IRQ_NONE;
2913 }
2914
2915 ha = rsp->hw;
2916 reg = &ha->iobase->ispfx00;
2917 status = 0;
2918
2919 if (unlikely(pci_channel_offline(ha->pdev)))
2920 return IRQ_HANDLED;
2921
2922 spin_lock_irqsave(&ha->hardware_lock, flags);
2923 vha = pci_get_drvdata(ha->pdev);
2924 for (iter = 50; iter--; clr_intr = 0) {
2925 stat = QLAFX00_RD_INTR_REG(ha);
2926 if (qla2x00_check_reg32_for_disconnect(vha, stat))
2927 break;
2928 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2929 if (!intr_stat)
2930 break;
2931
2932 if (stat & QLAFX00_INTR_MB_CMPLT) {
2933 mb[0] = RD_REG_WORD(&reg->mailbox16);
2934 qlafx00_mbx_completion(vha, mb[0]);
2935 status |= MBX_INTERRUPT;
2936 clr_intr |= QLAFX00_INTR_MB_CMPLT;
2937 }
2938 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2939 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0);
2940 qlafx00_async_event(vha);
2941 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2942 }
2943 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2944 qlafx00_process_response_queue(vha, rsp);
2945 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2946 }
2947
2948 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2949 QLAFX00_RD_INTR_REG(ha);
2950 }
2951
2952 qla2x00_handle_mbx_completion(ha, status);
2953 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2954
2955 return IRQ_HANDLED;
2956 }
2957
2958 /** QLAFX00 specific IOCB implementation functions */
2959
2960 static inline cont_a64_entry_t *
2961 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2962 cont_a64_entry_t *lcont_pkt)
2963 {
2964 cont_a64_entry_t *cont_pkt;
2965
2966 /* Adjust ring index. */
2967 req->ring_index++;
2968 if (req->ring_index == req->length) {
2969 req->ring_index = 0;
2970 req->ring_ptr = req->ring;
2971 } else {
2972 req->ring_ptr++;
2973 }
2974
2975 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2976
2977 /* Load packet defaults. */
2978 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2979
2980 return cont_pkt;
2981 }
2982
2983 static inline void
2984 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2985 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2986 {
2987 uint16_t avail_dsds;
2988 __le32 *cur_dsd;
2989 scsi_qla_host_t *vha;
2990 struct scsi_cmnd *cmd;
2991 struct scatterlist *sg;
2992 int i, cont;
2993 struct req_que *req;
2994 cont_a64_entry_t lcont_pkt;
2995 cont_a64_entry_t *cont_pkt;
2996
2997 vha = sp->fcport->vha;
2998 req = vha->req;
2999
3000 cmd = GET_CMD_SP(sp);
3001 cont = 0;
3002 cont_pkt = NULL;
3003
3004 /* Update entry type to indicate Command Type 3 IOCB */
3005 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
3006
3007 /* No data transfer */
3008 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
3009 lcmd_pkt->byte_count = __constant_cpu_to_le32(0);
3010 return;
3011 }
3012
3013 /* Set transfer direction */
3014 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
3015 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
3016 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
3017 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
3018 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
3019 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
3020 }
3021
3022 /* One DSD is available in the Command Type 3 IOCB */
3023 avail_dsds = 1;
3024 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
3025
3026 /* Load data segments */
3027 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3028 dma_addr_t sle_dma;
3029
3030 /* Allocate additional continuation packets? */
3031 if (avail_dsds == 0) {
3032 /*
3033 * Five DSDs are available in the Continuation
3034 * Type 1 IOCB.
3035 */
3036 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3037 cont_pkt =
3038 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3039 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
3040 avail_dsds = 5;
3041 cont = 1;
3042 }
3043
3044 sle_dma = sg_dma_address(sg);
3045 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3046 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3047 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3048 avail_dsds--;
3049 if (avail_dsds == 0 && cont == 1) {
3050 cont = 0;
3051 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3052 REQUEST_ENTRY_SIZE);
3053 }
3054
3055 }
3056 if (avail_dsds != 0 && cont == 1) {
3057 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3058 REQUEST_ENTRY_SIZE);
3059 }
3060 }
3061
3062 /**
3063 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3064 * @sp: command to send to the ISP
3065 *
3066 * Returns non-zero if a failure occurred, else zero.
3067 */
3068 int
3069 qlafx00_start_scsi(srb_t *sp)
3070 {
3071 int ret, nseg;
3072 unsigned long flags;
3073 uint32_t index;
3074 uint32_t handle;
3075 uint16_t cnt;
3076 uint16_t req_cnt;
3077 uint16_t tot_dsds;
3078 struct req_que *req = NULL;
3079 struct rsp_que *rsp = NULL;
3080 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3081 struct scsi_qla_host *vha = sp->fcport->vha;
3082 struct qla_hw_data *ha = vha->hw;
3083 struct cmd_type_7_fx00 *cmd_pkt;
3084 struct cmd_type_7_fx00 lcmd_pkt;
3085 struct scsi_lun llun;
3086 char tag[2];
3087
3088 /* Setup device pointers. */
3089 ret = 0;
3090
3091 rsp = ha->rsp_q_map[0];
3092 req = vha->req;
3093
3094 /* So we know we haven't pci_map'ed anything yet */
3095 tot_dsds = 0;
3096
3097 /* Acquire ring specific lock */
3098 spin_lock_irqsave(&ha->hardware_lock, flags);
3099
3100 /* Check for room in outstanding command list. */
3101 handle = req->current_outstanding_cmd;
3102 for (index = 1; index < req->num_outstanding_cmds; index++) {
3103 handle++;
3104 if (handle == req->num_outstanding_cmds)
3105 handle = 1;
3106 if (!req->outstanding_cmds[handle])
3107 break;
3108 }
3109 if (index == req->num_outstanding_cmds)
3110 goto queuing_error;
3111
3112 /* Map the sg table so we have an accurate count of sg entries needed */
3113 if (scsi_sg_count(cmd)) {
3114 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3115 scsi_sg_count(cmd), cmd->sc_data_direction);
3116 if (unlikely(!nseg))
3117 goto queuing_error;
3118 } else
3119 nseg = 0;
3120
3121 tot_dsds = nseg;
3122 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3123 if (req->cnt < (req_cnt + 2)) {
3124 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3125
3126 if (req->ring_index < cnt)
3127 req->cnt = cnt - req->ring_index;
3128 else
3129 req->cnt = req->length -
3130 (req->ring_index - cnt);
3131 if (req->cnt < (req_cnt + 2))
3132 goto queuing_error;
3133 }
3134
3135 /* Build command packet. */
3136 req->current_outstanding_cmd = handle;
3137 req->outstanding_cmds[handle] = sp;
3138 sp->handle = handle;
3139 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3140 req->cnt -= req_cnt;
3141
3142 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3143
3144 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3145
3146 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3147 lcmd_pkt.reserved_0 = 0;
3148 lcmd_pkt.port_path_ctrl = 0;
3149 lcmd_pkt.reserved_1 = 0;
3150 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3151 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3152
3153 int_to_scsilun(cmd->device->lun, &llun);
3154 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3155 sizeof(lcmd_pkt.lun));
3156
3157 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
3158 if (scsi_populate_tag_msg(cmd, tag)) {
3159 switch (tag[0]) {
3160 case HEAD_OF_QUEUE_TAG:
3161 lcmd_pkt.task = TSK_HEAD_OF_QUEUE;
3162 break;
3163 case ORDERED_QUEUE_TAG:
3164 lcmd_pkt.task = TSK_ORDERED;
3165 break;
3166 }
3167 }
3168
3169 /* Load SCSI command packet. */
3170 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3171 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3172
3173 /* Build IOCB segments */
3174 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3175
3176 /* Set total data segment count. */
3177 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3178
3179 /* Specify response queue number where completion should happen */
3180 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3181
3182 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3183 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3184 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3185 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3186
3187 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3188 wmb();
3189
3190 /* Adjust ring index. */
3191 req->ring_index++;
3192 if (req->ring_index == req->length) {
3193 req->ring_index = 0;
3194 req->ring_ptr = req->ring;
3195 } else
3196 req->ring_ptr++;
3197
3198 sp->flags |= SRB_DMA_VALID;
3199
3200 /* Set chip new ring index. */
3201 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3202 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3203
3204 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3205 return QLA_SUCCESS;
3206
3207 queuing_error:
3208 if (tot_dsds)
3209 scsi_dma_unmap(cmd);
3210
3211 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3212
3213 return QLA_FUNCTION_FAILED;
3214 }
3215
3216 void
3217 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3218 {
3219 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3220 scsi_qla_host_t *vha = sp->fcport->vha;
3221 struct req_que *req = vha->req;
3222 struct tsk_mgmt_entry_fx00 tm_iocb;
3223 struct scsi_lun llun;
3224
3225 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3226 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3227 tm_iocb.entry_count = 1;
3228 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3229 tm_iocb.reserved_0 = 0;
3230 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3231 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3232 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3233 int_to_scsilun(fxio->u.tmf.lun, &llun);
3234 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3235 sizeof(struct scsi_lun));
3236 }
3237
3238 memcpy((void *)ptm_iocb, &tm_iocb,
3239 sizeof(struct tsk_mgmt_entry_fx00));
3240 wmb();
3241 }
3242
3243 void
3244 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3245 {
3246 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3247 scsi_qla_host_t *vha = sp->fcport->vha;
3248 struct req_que *req = vha->req;
3249 struct abort_iocb_entry_fx00 abt_iocb;
3250
3251 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3252 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3253 abt_iocb.entry_count = 1;
3254 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3255 abt_iocb.abort_handle =
3256 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3257 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3258 abt_iocb.req_que_no = cpu_to_le16(req->id);
3259
3260 memcpy((void *)pabt_iocb, &abt_iocb,
3261 sizeof(struct abort_iocb_entry_fx00));
3262 wmb();
3263 }
3264
3265 void
3266 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3267 {
3268 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3269 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3270 struct fc_bsg_job *bsg_job;
3271 struct fxdisc_entry_fx00 fx_iocb;
3272 uint8_t entry_cnt = 1;
3273
3274 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3275 fx_iocb.entry_type = FX00_IOCB_TYPE;
3276 fx_iocb.handle = cpu_to_le32(sp->handle);
3277 fx_iocb.entry_count = entry_cnt;
3278
3279 if (sp->type == SRB_FXIOCB_DCMD) {
3280 fx_iocb.func_num =
3281 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3282 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3283 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3284 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3285 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3286 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3287
3288 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3289 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3290 fx_iocb.req_xfrcnt =
3291 cpu_to_le16(fxio->u.fxiocb.req_len);
3292 fx_iocb.dseg_rq_address[0] =
3293 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3294 fx_iocb.dseg_rq_address[1] =
3295 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3296 fx_iocb.dseg_rq_len =
3297 cpu_to_le32(fxio->u.fxiocb.req_len);
3298 }
3299
3300 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3301 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3302 fx_iocb.rsp_xfrcnt =
3303 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3304 fx_iocb.dseg_rsp_address[0] =
3305 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3306 fx_iocb.dseg_rsp_address[1] =
3307 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3308 fx_iocb.dseg_rsp_len =
3309 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3310 }
3311
3312 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3313 fx_iocb.dataword = fxio->u.fxiocb.req_data;
3314 }
3315 fx_iocb.flags = fxio->u.fxiocb.flags;
3316 } else {
3317 struct scatterlist *sg;
3318 bsg_job = sp->u.bsg_job;
3319 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3320 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3321
3322 fx_iocb.func_num = piocb_rqst->func_type;
3323 fx_iocb.adapid = piocb_rqst->adapid;
3324 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3325 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3326 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3327 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3328 fx_iocb.dataword = piocb_rqst->dataword;
3329 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3330 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3331
3332 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3333 int avail_dsds, tot_dsds;
3334 cont_a64_entry_t lcont_pkt;
3335 cont_a64_entry_t *cont_pkt = NULL;
3336 __le32 *cur_dsd;
3337 int index = 0, cont = 0;
3338
3339 fx_iocb.req_dsdcnt =
3340 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3341 tot_dsds =
3342 bsg_job->request_payload.sg_cnt;
3343 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
3344 avail_dsds = 1;
3345 for_each_sg(bsg_job->request_payload.sg_list, sg,
3346 tot_dsds, index) {
3347 dma_addr_t sle_dma;
3348
3349 /* Allocate additional continuation packets? */
3350 if (avail_dsds == 0) {
3351 /*
3352 * Five DSDs are available in the Cont.
3353 * Type 1 IOCB.
3354 */
3355 memset(&lcont_pkt, 0,
3356 REQUEST_ENTRY_SIZE);
3357 cont_pkt =
3358 qlafx00_prep_cont_type1_iocb(
3359 sp->fcport->vha->req,
3360 &lcont_pkt);
3361 cur_dsd = (__le32 *)
3362 lcont_pkt.dseg_0_address;
3363 avail_dsds = 5;
3364 cont = 1;
3365 entry_cnt++;
3366 }
3367
3368 sle_dma = sg_dma_address(sg);
3369 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3370 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3371 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3372 avail_dsds--;
3373
3374 if (avail_dsds == 0 && cont == 1) {
3375 cont = 0;
3376 memcpy_toio(
3377 (void __iomem *)cont_pkt,
3378 &lcont_pkt, REQUEST_ENTRY_SIZE);
3379 ql_dump_buffer(
3380 ql_dbg_user + ql_dbg_verbose,
3381 sp->fcport->vha, 0x3042,
3382 (uint8_t *)&lcont_pkt,
3383 REQUEST_ENTRY_SIZE);
3384 }
3385 }
3386 if (avail_dsds != 0 && cont == 1) {
3387 memcpy_toio((void __iomem *)cont_pkt,
3388 &lcont_pkt, REQUEST_ENTRY_SIZE);
3389 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3390 sp->fcport->vha, 0x3043,
3391 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3392 }
3393 }
3394
3395 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3396 int avail_dsds, tot_dsds;
3397 cont_a64_entry_t lcont_pkt;
3398 cont_a64_entry_t *cont_pkt = NULL;
3399 __le32 *cur_dsd;
3400 int index = 0, cont = 0;
3401
3402 fx_iocb.rsp_dsdcnt =
3403 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3404 tot_dsds = bsg_job->reply_payload.sg_cnt;
3405 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
3406 avail_dsds = 1;
3407
3408 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3409 tot_dsds, index) {
3410 dma_addr_t sle_dma;
3411
3412 /* Allocate additional continuation packets? */
3413 if (avail_dsds == 0) {
3414 /*
3415 * Five DSDs are available in the Cont.
3416 * Type 1 IOCB.
3417 */
3418 memset(&lcont_pkt, 0,
3419 REQUEST_ENTRY_SIZE);
3420 cont_pkt =
3421 qlafx00_prep_cont_type1_iocb(
3422 sp->fcport->vha->req,
3423 &lcont_pkt);
3424 cur_dsd = (__le32 *)
3425 lcont_pkt.dseg_0_address;
3426 avail_dsds = 5;
3427 cont = 1;
3428 entry_cnt++;
3429 }
3430
3431 sle_dma = sg_dma_address(sg);
3432 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3433 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3434 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3435 avail_dsds--;
3436
3437 if (avail_dsds == 0 && cont == 1) {
3438 cont = 0;
3439 memcpy_toio((void __iomem *)cont_pkt,
3440 &lcont_pkt,
3441 REQUEST_ENTRY_SIZE);
3442 ql_dump_buffer(
3443 ql_dbg_user + ql_dbg_verbose,
3444 sp->fcport->vha, 0x3045,
3445 (uint8_t *)&lcont_pkt,
3446 REQUEST_ENTRY_SIZE);
3447 }
3448 }
3449 if (avail_dsds != 0 && cont == 1) {
3450 memcpy_toio((void __iomem *)cont_pkt,
3451 &lcont_pkt, REQUEST_ENTRY_SIZE);
3452 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3453 sp->fcport->vha, 0x3046,
3454 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3455 }
3456 }
3457
3458 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3459 fx_iocb.dataword = piocb_rqst->dataword;
3460 fx_iocb.flags = piocb_rqst->flags;
3461 fx_iocb.entry_count = entry_cnt;
3462 }
3463
3464 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3465 sp->fcport->vha, 0x3047,
3466 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3467
3468 memcpy_toio((void __iomem *)pfxiocb, &fx_iocb,
3469 sizeof(struct fxdisc_entry_fx00));
3470 wmb();
3471 }
(deprecated) Btrfs devel tree