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V4L/DVB (12305): cx23885: Convert existing HVR1800 GPIO calls into new format
[linux-2.6/btrfs-unstable.git] / drivers / media / video / cx23885 / cx23885-cards.c
blob2bf8ed604d6b8547b70b949d9d769f73f80c79bc
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31
32 /* ------------------------------------------------------------------ */
33 /* board config info */
34
35 struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
43 }, {
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
46 }, {
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
49 }, {
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
52 } },
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
61 }, {
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
69 }, {
70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
73 } },
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
77 .porta = CX23885_ANALOG_VIDEO,
78 .portb = CX23885_MPEG_ENCODER,
79 .portc = CX23885_MPEG_DVB,
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
88 }, {
89 .type = CX23885_VMUX_COMPOSITE1,
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
94 }, {
95 .type = CX23885_VMUX_SVIDEO,
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
101 } },
102 },
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
110 }, {
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
114 }, {
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
118 }, {
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
122 } },
123 },
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
126 .portb = CX23885_MPEG_DVB,
127 },
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
150 .portb = CX23885_MPEG_DVB,
151 .portc = CX23885_MPEG_DVB,
152 },
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
186 .portc = CX23885_MPEG_DVB,
187 },
188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
200 [CX23885_BOARD_MYGICA_X8506] = {
201 .name = "Mygica X8506 DMB-TH",
202 .portb = CX23885_MPEG_DVB,
203 },
204 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
205 .name = "Magic-Pro ProHDTV Extreme 2",
206 .portb = CX23885_MPEG_DVB,
207 },
208 };
209 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
210
211 /* ------------------------------------------------------------------ */
212 /* PCI subsystem IDs */
213
214 struct cx23885_subid cx23885_subids[] = {
215 {
216 .subvendor = 0x0070,
217 .subdevice = 0x3400,
218 .card = CX23885_BOARD_UNKNOWN,
219 }, {
220 .subvendor = 0x0070,
221 .subdevice = 0x7600,
222 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
223 }, {
224 .subvendor = 0x0070,
225 .subdevice = 0x7800,
226 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
227 }, {
228 .subvendor = 0x0070,
229 .subdevice = 0x7801,
230 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
231 }, {
232 .subvendor = 0x0070,
233 .subdevice = 0x7809,
234 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
235 }, {
236 .subvendor = 0x0070,
237 .subdevice = 0x7911,
238 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
239 }, {
240 .subvendor = 0x18ac,
241 .subdevice = 0xd500,
242 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
243 }, {
244 .subvendor = 0x0070,
245 .subdevice = 0x7790,
246 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
247 }, {
248 .subvendor = 0x0070,
249 .subdevice = 0x7797,
250 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
251 }, {
252 .subvendor = 0x0070,
253 .subdevice = 0x7710,
254 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
255 }, {
256 .subvendor = 0x0070,
257 .subdevice = 0x7717,
258 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
259 }, {
260 .subvendor = 0x0070,
261 .subdevice = 0x71d1,
262 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
263 }, {
264 .subvendor = 0x0070,
265 .subdevice = 0x71d3,
266 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
267 }, {
268 .subvendor = 0x0070,
269 .subdevice = 0x8101,
270 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
271 }, {
272 .subvendor = 0x0070,
273 .subdevice = 0x8010,
274 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
275 }, {
276 .subvendor = 0x18ac,
277 .subdevice = 0xd618,
278 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
279 }, {
280 .subvendor = 0x18ac,
281 .subdevice = 0xdb78,
282 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
283 }, {
284 .subvendor = 0x107d,
285 .subdevice = 0x6681,
286 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
287 }, {
288 .subvendor = 0x185b,
289 .subdevice = 0xe800,
290 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
291 }, {
292 .subvendor = 0x6920,
293 .subdevice = 0x8888,
294 .card = CX23885_BOARD_TBS_6920,
295 }, {
296 .subvendor = 0xd470,
297 .subdevice = 0x9022,
298 .card = CX23885_BOARD_TEVII_S470,
299 }, {
300 .subvendor = 0x0001,
301 .subdevice = 0x2005,
302 .card = CX23885_BOARD_DVBWORLD_2005,
303 }, {
304 .subvendor = 0x1b55,
305 .subdevice = 0x2a2c,
306 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
307 }, {
308 .subvendor = 0x0070,
309 .subdevice = 0x2211,
310 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
311 }, {
312 .subvendor = 0x0070,
313 .subdevice = 0x2215,
314 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
315 }, {
316 .subvendor = 0x0070,
317 .subdevice = 0x2251,
318 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
319 }, {
320 .subvendor = 0x0070,
321 .subdevice = 0x2291,
322 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
323 }, {
324 .subvendor = 0x0070,
325 .subdevice = 0x2295,
326 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
327 }, {
328 .subvendor = 0x14f1,
329 .subdevice = 0x8651,
330 .card = CX23885_BOARD_MYGICA_X8506,
331 }, {
332 .subvendor = 0x14f1,
333 .subdevice = 0x8657,
334 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
335 },
336 };
337 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
338
339 void cx23885_card_list(struct cx23885_dev *dev)
340 {
341 int i;
342
343 if (0 == dev->pci->subsystem_vendor &&
344 0 == dev->pci->subsystem_device) {
345 printk(KERN_INFO
346 "%s: Board has no valid PCIe Subsystem ID and can't\n"
347 "%s: be autodetected. Pass card=<n> insmod option\n"
348 "%s: to workaround that. Redirect complaints to the\n"
349 "%s: vendor of the TV card. Best regards,\n"
350 "%s: -- tux\n",
351 dev->name, dev->name, dev->name, dev->name, dev->name);
352 } else {
353 printk(KERN_INFO
354 "%s: Your board isn't known (yet) to the driver.\n"
355 "%s: Try to pick one of the existing card configs via\n"
356 "%s: card=<n> insmod option. Updating to the latest\n"
357 "%s: version might help as well.\n",
358 dev->name, dev->name, dev->name, dev->name);
359 }
360 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
361 dev->name);
362 for (i = 0; i < cx23885_bcount; i++)
363 printk(KERN_INFO "%s: card=%d -> %s\n",
364 dev->name, i, cx23885_boards[i].name);
365 }
366
367 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
368 {
369 struct tveeprom tv;
370
371 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
372 eeprom_data);
373
374 /* Make sure we support the board model */
375 switch (tv.model) {
376 case 22001:
377 /* WinTV-HVR1270 (PCIe, Retail, half height)
378 * ATSC/QAM and basic analog, IR Blast */
379 case 22009:
380 /* WinTV-HVR1210 (PCIe, Retail, half height)
381 * DVB-T and basic analog, IR Blast */
382 case 22011:
383 /* WinTV-HVR1270 (PCIe, Retail, half height)
384 * ATSC/QAM and basic analog, IR Recv */
385 case 22019:
386 /* WinTV-HVR1210 (PCIe, Retail, half height)
387 * DVB-T and basic analog, IR Recv */
388 case 22021:
389 /* WinTV-HVR1275 (PCIe, Retail, half height)
390 * ATSC/QAM and basic analog, IR Recv */
391 case 22029:
392 /* WinTV-HVR1210 (PCIe, Retail, half height)
393 * DVB-T and basic analog, IR Recv */
394 case 22101:
395 /* WinTV-HVR1270 (PCIe, Retail, full height)
396 * ATSC/QAM and basic analog, IR Blast */
397 case 22109:
398 /* WinTV-HVR1210 (PCIe, Retail, full height)
399 * DVB-T and basic analog, IR Blast */
400 case 22111:
401 /* WinTV-HVR1270 (PCIe, Retail, full height)
402 * ATSC/QAM and basic analog, IR Recv */
403 case 22119:
404 /* WinTV-HVR1210 (PCIe, Retail, full height)
405 * DVB-T and basic analog, IR Recv */
406 case 22121:
407 /* WinTV-HVR1275 (PCIe, Retail, full height)
408 * ATSC/QAM and basic analog, IR Recv */
409 case 22129:
410 /* WinTV-HVR1210 (PCIe, Retail, full height)
411 * DVB-T and basic analog, IR Recv */
412 case 71009:
413 /* WinTV-HVR1200 (PCIe, Retail, full height)
414 * DVB-T and basic analog */
415 case 71359:
416 /* WinTV-HVR1200 (PCIe, OEM, half height)
417 * DVB-T and basic analog */
418 case 71439:
419 /* WinTV-HVR1200 (PCIe, OEM, half height)
420 * DVB-T and basic analog */
421 case 71449:
422 /* WinTV-HVR1200 (PCIe, OEM, full height)
423 * DVB-T and basic analog */
424 case 71939:
425 /* WinTV-HVR1200 (PCIe, OEM, half height)
426 * DVB-T and basic analog */
427 case 71949:
428 /* WinTV-HVR1200 (PCIe, OEM, full height)
429 * DVB-T and basic analog */
430 case 71959:
431 /* WinTV-HVR1200 (PCIe, OEM, full height)
432 * DVB-T and basic analog */
433 case 71979:
434 /* WinTV-HVR1200 (PCIe, OEM, half height)
435 * DVB-T and basic analog */
436 case 71999:
437 /* WinTV-HVR1200 (PCIe, OEM, full height)
438 * DVB-T and basic analog */
439 case 76601:
440 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
441 channel ATSC and MPEG2 HW Encoder */
442 case 77001:
443 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
444 and Basic analog */
445 case 77011:
446 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
447 and Basic analog */
448 case 77041:
449 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
450 and Basic analog */
451 case 77051:
452 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
453 and Basic analog */
454 case 78011:
455 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
456 Dual channel ATSC and MPEG2 HW Encoder */
457 case 78501:
458 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
459 Dual channel ATSC and MPEG2 HW Encoder */
460 case 78521:
461 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
462 Dual channel ATSC and MPEG2 HW Encoder */
463 case 78531:
464 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
465 Dual channel ATSC and MPEG2 HW Encoder */
466 case 78631:
467 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
468 Dual channel ATSC and MPEG2 HW Encoder */
469 case 79001:
470 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
471 ATSC and Basic analog */
472 case 79101:
473 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
474 ATSC and Basic analog */
475 case 79561:
476 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
477 ATSC and Basic analog */
478 case 79571:
479 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
480 ATSC and Basic analog */
481 case 79671:
482 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
483 ATSC and Basic analog */
484 case 80019:
485 /* WinTV-HVR1400 (Express Card, Retail, IR,
486 * DVB-T and Basic analog */
487 case 81509:
488 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
489 * DVB-T and MPEG2 HW Encoder */
490 case 81519:
491 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
492 * DVB-T and MPEG2 HW Encoder */
493 break;
494 default:
495 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
496 dev->name, tv.model);
497 break;
498 }
499
500 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
501 dev->name, tv.model);
502 }
503
504 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
505 {
506 struct cx23885_tsport *port = priv;
507 struct cx23885_dev *dev = port->dev;
508 u32 bitmask = 0;
509
510 if (command == XC2028_RESET_CLK)
511 return 0;
512
513 if (command != 0) {
514 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
515 __func__, command);
516 return -EINVAL;
517 }
518
519 switch (dev->board) {
520 case CX23885_BOARD_HAUPPAUGE_HVR1400:
521 case CX23885_BOARD_HAUPPAUGE_HVR1500:
522 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
523 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
524 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
525 /* Tuner Reset Command */
526 bitmask = 0x04;
527 break;
528 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
529 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
530 /* Two identical tuners on two different i2c buses,
531 * we need to reset the correct gpio. */
532 if (port->nr == 1)
533 bitmask = 0x01;
534 else if (port->nr == 2)
535 bitmask = 0x04;
536 break;
537 }
538
539 if (bitmask) {
540 /* Drive the tuner into reset and back out */
541 cx_clear(GP0_IO, bitmask);
542 mdelay(200);
543 cx_set(GP0_IO, bitmask);
544 }
545
546 return 0;
547 }
548
549 void cx23885_gpio_setup(struct cx23885_dev *dev)
550 {
551 switch (dev->board) {
552 case CX23885_BOARD_HAUPPAUGE_HVR1250:
553 /* GPIO-0 cx24227 demodulator reset */
554 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
555 break;
556 case CX23885_BOARD_HAUPPAUGE_HVR1500:
557 /* GPIO-0 cx24227 demodulator */
558 /* GPIO-2 xc3028 tuner */
559
560 /* Put the parts into reset */
561 cx_set(GP0_IO, 0x00050000);
562 cx_clear(GP0_IO, 0x00000005);
563 msleep(5);
564
565 /* Bring the parts out of reset */
566 cx_set(GP0_IO, 0x00050005);
567 break;
568 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
569 /* GPIO-0 cx24227 demodulator reset */
570 /* GPIO-2 xc5000 tuner reset */
571 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
572 break;
573 case CX23885_BOARD_HAUPPAUGE_HVR1800:
574 /* GPIO-0 656_CLK */
575 /* GPIO-1 656_D0 */
576 /* GPIO-2 8295A Reset */
577 /* GPIO-3-10 cx23417 data0-7 */
578 /* GPIO-11-14 cx23417 addr0-3 */
579 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
580 /* GPIO-19 IR_RX */
581
582 /* CX23417 GPIO's */
583 /* EIO15 Zilog Reset */
584 /* EIO14 S5H1409/CX24227 Reset */
585 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
586
587 /* Put the demod into reset and protect the eeprom */
588 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
589 mdelay(100);
590
591 /* Bring the demod and blaster out of reset */
592 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
593 mdelay(100);
594
595 /* Force the TDA8295A into reset and back */
596 cx23885_gpio_enable(dev, GPIO_2, 1);
597 cx23885_gpio_set(dev, GPIO_2);
598 mdelay(20);
599 cx23885_gpio_clear(dev, GPIO_2);
600 mdelay(20);
601 cx23885_gpio_set(dev, GPIO_2);
602 mdelay(20);
603 break;
604 case CX23885_BOARD_HAUPPAUGE_HVR1200:
605 /* GPIO-0 tda10048 demodulator reset */
606 /* GPIO-2 tda18271 tuner reset */
607
608 /* Put the parts into reset and back */
609 cx_set(GP0_IO, 0x00050000);
610 mdelay(20);
611 cx_clear(GP0_IO, 0x00000005);
612 mdelay(20);
613 cx_set(GP0_IO, 0x00050005);
614 break;
615 case CX23885_BOARD_HAUPPAUGE_HVR1700:
616 /* GPIO-0 TDA10048 demodulator reset */
617 /* GPIO-2 TDA8295A Reset */
618 /* GPIO-3-10 cx23417 data0-7 */
619 /* GPIO-11-14 cx23417 addr0-3 */
620 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
621
622 /* The following GPIO's are on the interna AVCore (cx25840) */
623 /* GPIO-19 IR_RX */
624 /* GPIO-20 IR_TX 416/DVBT Select */
625 /* GPIO-21 IIS DAT */
626 /* GPIO-22 IIS WCLK */
627 /* GPIO-23 IIS BCLK */
628
629 /* Put the parts into reset and back */
630 cx_set(GP0_IO, 0x00050000);
631 mdelay(20);
632 cx_clear(GP0_IO, 0x00000005);
633 mdelay(20);
634 cx_set(GP0_IO, 0x00050005);
635 break;
636 case CX23885_BOARD_HAUPPAUGE_HVR1400:
637 /* GPIO-0 Dibcom7000p demodulator reset */
638 /* GPIO-2 xc3028L tuner reset */
639 /* GPIO-13 LED */
640
641 /* Put the parts into reset and back */
642 cx_set(GP0_IO, 0x00050000);
643 mdelay(20);
644 cx_clear(GP0_IO, 0x00000005);
645 mdelay(20);
646 cx_set(GP0_IO, 0x00050005);
647 break;
648 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
649 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
650 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
651 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
652 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
653
654 /* Put the parts into reset and back */
655 cx_set(GP0_IO, 0x000f0000);
656 mdelay(20);
657 cx_clear(GP0_IO, 0x0000000f);
658 mdelay(20);
659 cx_set(GP0_IO, 0x000f000f);
660 break;
661 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
662 /* GPIO-0 portb xc3028 reset */
663 /* GPIO-1 portb zl10353 reset */
664 /* GPIO-2 portc xc3028 reset */
665 /* GPIO-3 portc zl10353 reset */
666
667 /* Put the parts into reset and back */
668 cx_set(GP0_IO, 0x000f0000);
669 mdelay(20);
670 cx_clear(GP0_IO, 0x0000000f);
671 mdelay(20);
672 cx_set(GP0_IO, 0x000f000f);
673 break;
674 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
675 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
676 /* GPIO-2 xc3028 tuner reset */
677
678 /* The following GPIO's are on the internal AVCore (cx25840) */
679 /* GPIO-? zl10353 demod reset */
680
681 /* Put the parts into reset and back */
682 cx_set(GP0_IO, 0x00040000);
683 mdelay(20);
684 cx_clear(GP0_IO, 0x00000004);
685 mdelay(20);
686 cx_set(GP0_IO, 0x00040004);
687 break;
688 case CX23885_BOARD_TBS_6920:
689 case CX23885_BOARD_TEVII_S470:
690 cx_write(MC417_CTL, 0x00000036);
691 cx_write(MC417_OEN, 0x00001000);
692 cx_write(MC417_RWD, 0x00001800);
693 break;
694 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
695 /* GPIO-0 INTA from CiMax1
696 GPIO-1 INTB from CiMax2
697 GPIO-2 reset chips
698 GPIO-3 to GPIO-10 data/addr for CA
699 GPIO-11 ~CS0 to CiMax1
700 GPIO-12 ~CS1 to CiMax2
701 GPIO-13 ADL0 load LSB addr
702 GPIO-14 ADL1 load MSB addr
703 GPIO-15 ~RDY from CiMax
704 GPIO-17 ~RD to CiMax
705 GPIO-18 ~WR to CiMax
706 */
707 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
708 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
709 cx_clear(GP0_IO, 0x00030004);
710 mdelay(100);/* reset delay */
711 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
712 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
713 /* GPIO-15 IN as ~ACK, rest as OUT */
714 cx_write(MC417_OEN, 0x00001000);
715 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
716 cx_write(MC417_RWD, 0x0000c300);
717 /* enable irq */
718 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
719 break;
720 case CX23885_BOARD_HAUPPAUGE_HVR1270:
721 case CX23885_BOARD_HAUPPAUGE_HVR1275:
722 case CX23885_BOARD_HAUPPAUGE_HVR1255:
723 case CX23885_BOARD_HAUPPAUGE_HVR1210:
724 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
725 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
726 /* GPIO-9 Demod reset */
727
728 /* Put the parts into reset and back */
729 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
730 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
731 cx23885_gpio_clear(dev, GPIO_9);
732 mdelay(20);
733 cx23885_gpio_set(dev, GPIO_9);
734 break;
735 case CX23885_BOARD_MYGICA_X8506:
736 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
737 /* GPIO-1 reset XC5000 */
738 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
739 cx_set(GP0_IO, 0x00060000);
740 cx_clear(GP0_IO, 0x00000006);
741 mdelay(100);
742 cx_set(GP0_IO, 0x00060006);
743 mdelay(100);
744 break;
745 }
746 }
747
748 int cx23885_ir_init(struct cx23885_dev *dev)
749 {
750 switch (dev->board) {
751 case CX23885_BOARD_HAUPPAUGE_HVR1250:
752 case CX23885_BOARD_HAUPPAUGE_HVR1500:
753 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
754 case CX23885_BOARD_HAUPPAUGE_HVR1800:
755 case CX23885_BOARD_HAUPPAUGE_HVR1200:
756 case CX23885_BOARD_HAUPPAUGE_HVR1400:
757 case CX23885_BOARD_HAUPPAUGE_HVR1270:
758 case CX23885_BOARD_HAUPPAUGE_HVR1275:
759 case CX23885_BOARD_HAUPPAUGE_HVR1255:
760 case CX23885_BOARD_HAUPPAUGE_HVR1210:
761 /* FIXME: Implement me */
762 break;
763 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
764 request_module("ir-kbd-i2c");
765 break;
766 }
767
768 return 0;
769 }
770
771 void cx23885_card_setup(struct cx23885_dev *dev)
772 {
773 struct cx23885_tsport *ts1 = &dev->ts1;
774 struct cx23885_tsport *ts2 = &dev->ts2;
775
776 static u8 eeprom[256];
777
778 if (dev->i2c_bus[0].i2c_rc == 0) {
779 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
780 tveeprom_read(&dev->i2c_bus[0].i2c_client,
781 eeprom, sizeof(eeprom));
782 }
783
784 switch (dev->board) {
785 case CX23885_BOARD_HAUPPAUGE_HVR1250:
786 case CX23885_BOARD_HAUPPAUGE_HVR1500:
787 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
788 case CX23885_BOARD_HAUPPAUGE_HVR1400:
789 if (dev->i2c_bus[0].i2c_rc == 0)
790 hauppauge_eeprom(dev, eeprom+0x80);
791 break;
792 case CX23885_BOARD_HAUPPAUGE_HVR1800:
793 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
794 case CX23885_BOARD_HAUPPAUGE_HVR1200:
795 case CX23885_BOARD_HAUPPAUGE_HVR1700:
796 case CX23885_BOARD_HAUPPAUGE_HVR1270:
797 case CX23885_BOARD_HAUPPAUGE_HVR1275:
798 case CX23885_BOARD_HAUPPAUGE_HVR1255:
799 case CX23885_BOARD_HAUPPAUGE_HVR1210:
800 if (dev->i2c_bus[0].i2c_rc == 0)
801 hauppauge_eeprom(dev, eeprom+0xc0);
802 break;
803 }
804
805 switch (dev->board) {
806 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
807 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
808 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
809 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
810 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
811 /* break omitted intentionally */
812 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
813 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
814 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
815 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
816 break;
817 case CX23885_BOARD_HAUPPAUGE_HVR1800:
818 /* Defaults for VID B - Analog encoder */
819 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
820 ts1->gen_ctrl_val = 0x10e;
821 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
822 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
823
824 /* APB_TSVALERR_POL (active low)*/
825 ts1->vld_misc_val = 0x2000;
826 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
827
828 /* Defaults for VID C */
829 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
830 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
831 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
832 break;
833 case CX23885_BOARD_TEVII_S470:
834 case CX23885_BOARD_TBS_6920:
835 case CX23885_BOARD_DVBWORLD_2005:
836 ts1->gen_ctrl_val = 0x5; /* Parallel */
837 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
838 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
839 break;
840 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
841 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
842 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
843 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
844 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
845 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
846 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
847 break;
848 case CX23885_BOARD_MYGICA_X8506:
849 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
850 ts1->gen_ctrl_val = 0x5; /* Parallel */
851 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
852 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
853 break;
854 case CX23885_BOARD_HAUPPAUGE_HVR1250:
855 case CX23885_BOARD_HAUPPAUGE_HVR1500:
856 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
857 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
858 case CX23885_BOARD_HAUPPAUGE_HVR1200:
859 case CX23885_BOARD_HAUPPAUGE_HVR1700:
860 case CX23885_BOARD_HAUPPAUGE_HVR1400:
861 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
862 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
863 case CX23885_BOARD_HAUPPAUGE_HVR1270:
864 case CX23885_BOARD_HAUPPAUGE_HVR1275:
865 case CX23885_BOARD_HAUPPAUGE_HVR1255:
866 case CX23885_BOARD_HAUPPAUGE_HVR1210:
867 default:
868 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
869 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
870 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
871 }
872
873 /* Certain boards support analog, or require the avcore to be
874 * loaded, ensure this happens.
875 */
876 switch (dev->board) {
877 case CX23885_BOARD_HAUPPAUGE_HVR1800:
878 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
879 case CX23885_BOARD_HAUPPAUGE_HVR1700:
880 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
881 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
882 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
883 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
884 &dev->i2c_bus[2].i2c_adap,
885 "cx25840", "cx25840", 0x88 >> 1);
886 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
887 break;
888 }
889
890 /* AUX-PLL 27MHz CLK */
891 switch (dev->board) {
892 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
893 netup_initialize(dev);
894 break;
895 }
896 }
897
898 /* ------------------------------------------------------------------ */
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