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fjes: Enhance ethtool -S for fjes driver
[linux-2.6/btrfs-unstable.git] / drivers / net / fjes / fjes_hw.c
blob82b56e8170bc51788daf360eeaa1a63ebe10920f
1 /*
2 * FUJITSU Extended Socket Network Device driver
3 * Copyright (c) 2015 FUJITSU LIMITED
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, see <http://www.gnu.org/licenses/>.
16 *
17 * The full GNU General Public License is included in this distribution in
18 * the file called "COPYING".
19 *
20 */
21
22 #include "fjes_hw.h"
23 #include "fjes.h"
24
25 static void fjes_hw_update_zone_task(struct work_struct *);
26 static void fjes_hw_epstop_task(struct work_struct *);
27
28 /* supported MTU list */
29 const u32 fjes_support_mtu[] = {
30 FJES_MTU_DEFINE(8 * 1024),
31 FJES_MTU_DEFINE(16 * 1024),
32 FJES_MTU_DEFINE(32 * 1024),
33 FJES_MTU_DEFINE(64 * 1024),
34 0
35 };
36
37 u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
38 {
39 u8 *base = hw->base;
40 u32 value = 0;
41
42 value = readl(&base[reg]);
43
44 return value;
45 }
46
47 static u8 *fjes_hw_iomap(struct fjes_hw *hw)
48 {
49 u8 *base;
50
51 if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
52 fjes_driver_name)) {
53 pr_err("request_mem_region failed\n");
54 return NULL;
55 }
56
57 base = (u8 *)ioremap_nocache(hw->hw_res.start, hw->hw_res.size);
58
59 return base;
60 }
61
62 static void fjes_hw_iounmap(struct fjes_hw *hw)
63 {
64 iounmap(hw->base);
65 release_mem_region(hw->hw_res.start, hw->hw_res.size);
66 }
67
68 int fjes_hw_reset(struct fjes_hw *hw)
69 {
70 union REG_DCTL dctl;
71 int timeout;
72
73 dctl.reg = 0;
74 dctl.bits.reset = 1;
75 wr32(XSCT_DCTL, dctl.reg);
76
77 timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
78 dctl.reg = rd32(XSCT_DCTL);
79 while ((dctl.bits.reset == 1) && (timeout > 0)) {
80 msleep(1000);
81 dctl.reg = rd32(XSCT_DCTL);
82 timeout -= 1000;
83 }
84
85 return timeout > 0 ? 0 : -EIO;
86 }
87
88 static int fjes_hw_get_max_epid(struct fjes_hw *hw)
89 {
90 union REG_MAX_EP info;
91
92 info.reg = rd32(XSCT_MAX_EP);
93
94 return info.bits.maxep;
95 }
96
97 static int fjes_hw_get_my_epid(struct fjes_hw *hw)
98 {
99 union REG_OWNER_EPID info;
100
101 info.reg = rd32(XSCT_OWNER_EPID);
102
103 return info.bits.epid;
104 }
105
106 static int fjes_hw_alloc_shared_status_region(struct fjes_hw *hw)
107 {
108 size_t size;
109
110 size = sizeof(struct fjes_device_shared_info) +
111 (sizeof(u8) * hw->max_epid);
112 hw->hw_info.share = kzalloc(size, GFP_KERNEL);
113 if (!hw->hw_info.share)
114 return -ENOMEM;
115
116 hw->hw_info.share->epnum = hw->max_epid;
117
118 return 0;
119 }
120
121 static void fjes_hw_free_shared_status_region(struct fjes_hw *hw)
122 {
123 kfree(hw->hw_info.share);
124 hw->hw_info.share = NULL;
125 }
126
127 static int fjes_hw_alloc_epbuf(struct epbuf_handler *epbh)
128 {
129 void *mem;
130
131 mem = vzalloc(EP_BUFFER_SIZE);
132 if (!mem)
133 return -ENOMEM;
134
135 epbh->buffer = mem;
136 epbh->size = EP_BUFFER_SIZE;
137
138 epbh->info = (union ep_buffer_info *)mem;
139 epbh->ring = (u8 *)(mem + sizeof(union ep_buffer_info));
140
141 return 0;
142 }
143
144 static void fjes_hw_free_epbuf(struct epbuf_handler *epbh)
145 {
146 vfree(epbh->buffer);
147 epbh->buffer = NULL;
148 epbh->size = 0;
149
150 epbh->info = NULL;
151 epbh->ring = NULL;
152 }
153
154 void fjes_hw_setup_epbuf(struct epbuf_handler *epbh, u8 *mac_addr, u32 mtu)
155 {
156 union ep_buffer_info *info = epbh->info;
157 u16 vlan_id[EP_BUFFER_SUPPORT_VLAN_MAX];
158 int i;
159
160 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
161 vlan_id[i] = info->v1i.vlan_id[i];
162
163 memset(info, 0, sizeof(union ep_buffer_info));
164
165 info->v1i.version = 0; /* version 0 */
166
167 for (i = 0; i < ETH_ALEN; i++)
168 info->v1i.mac_addr[i] = mac_addr[i];
169
170 info->v1i.head = 0;
171 info->v1i.tail = 1;
172
173 info->v1i.info_size = sizeof(union ep_buffer_info);
174 info->v1i.buffer_size = epbh->size - info->v1i.info_size;
175
176 info->v1i.frame_max = FJES_MTU_TO_FRAME_SIZE(mtu);
177 info->v1i.count_max =
178 EP_RING_NUM(info->v1i.buffer_size, info->v1i.frame_max);
179
180 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++)
181 info->v1i.vlan_id[i] = vlan_id[i];
182
183 info->v1i.rx_status |= FJES_RX_MTU_CHANGING_DONE;
184 }
185
186 void
187 fjes_hw_init_command_registers(struct fjes_hw *hw,
188 struct fjes_device_command_param *param)
189 {
190 /* Request Buffer length */
191 wr32(XSCT_REQBL, (__le32)(param->req_len));
192 /* Response Buffer Length */
193 wr32(XSCT_RESPBL, (__le32)(param->res_len));
194
195 /* Request Buffer Address */
196 wr32(XSCT_REQBAL,
197 (__le32)(param->req_start & GENMASK_ULL(31, 0)));
198 wr32(XSCT_REQBAH,
199 (__le32)((param->req_start & GENMASK_ULL(63, 32)) >> 32));
200
201 /* Response Buffer Address */
202 wr32(XSCT_RESPBAL,
203 (__le32)(param->res_start & GENMASK_ULL(31, 0)));
204 wr32(XSCT_RESPBAH,
205 (__le32)((param->res_start & GENMASK_ULL(63, 32)) >> 32));
206
207 /* Share status address */
208 wr32(XSCT_SHSTSAL,
209 (__le32)(param->share_start & GENMASK_ULL(31, 0)));
210 wr32(XSCT_SHSTSAH,
211 (__le32)((param->share_start & GENMASK_ULL(63, 32)) >> 32));
212 }
213
214 static int fjes_hw_setup(struct fjes_hw *hw)
215 {
216 u8 mac[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
217 struct fjes_device_command_param param;
218 struct ep_share_mem_info *buf_pair;
219 unsigned long flags;
220 size_t mem_size;
221 int result;
222 int epidx;
223 void *buf;
224
225 hw->hw_info.max_epid = &hw->max_epid;
226 hw->hw_info.my_epid = &hw->my_epid;
227
228 buf = kcalloc(hw->max_epid, sizeof(struct ep_share_mem_info),
229 GFP_KERNEL);
230 if (!buf)
231 return -ENOMEM;
232
233 hw->ep_shm_info = (struct ep_share_mem_info *)buf;
234
235 mem_size = FJES_DEV_REQ_BUF_SIZE(hw->max_epid);
236 hw->hw_info.req_buf = kzalloc(mem_size, GFP_KERNEL);
237 if (!(hw->hw_info.req_buf))
238 return -ENOMEM;
239
240 hw->hw_info.req_buf_size = mem_size;
241
242 mem_size = FJES_DEV_RES_BUF_SIZE(hw->max_epid);
243 hw->hw_info.res_buf = kzalloc(mem_size, GFP_KERNEL);
244 if (!(hw->hw_info.res_buf))
245 return -ENOMEM;
246
247 hw->hw_info.res_buf_size = mem_size;
248
249 result = fjes_hw_alloc_shared_status_region(hw);
250 if (result)
251 return result;
252
253 hw->hw_info.buffer_share_bit = 0;
254 hw->hw_info.buffer_unshare_reserve_bit = 0;
255
256 for (epidx = 0; epidx < hw->max_epid; epidx++) {
257 if (epidx != hw->my_epid) {
258 buf_pair = &hw->ep_shm_info[epidx];
259
260 result = fjes_hw_alloc_epbuf(&buf_pair->tx);
261 if (result)
262 return result;
263
264 result = fjes_hw_alloc_epbuf(&buf_pair->rx);
265 if (result)
266 return result;
267
268 spin_lock_irqsave(&hw->rx_status_lock, flags);
269 fjes_hw_setup_epbuf(&buf_pair->tx, mac,
270 fjes_support_mtu[0]);
271 fjes_hw_setup_epbuf(&buf_pair->rx, mac,
272 fjes_support_mtu[0]);
273 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
274 }
275 }
276
277 memset(&param, 0, sizeof(param));
278
279 param.req_len = hw->hw_info.req_buf_size;
280 param.req_start = __pa(hw->hw_info.req_buf);
281 param.res_len = hw->hw_info.res_buf_size;
282 param.res_start = __pa(hw->hw_info.res_buf);
283
284 param.share_start = __pa(hw->hw_info.share->ep_status);
285
286 fjes_hw_init_command_registers(hw, &param);
287
288 return 0;
289 }
290
291 static void fjes_hw_cleanup(struct fjes_hw *hw)
292 {
293 int epidx;
294
295 if (!hw->ep_shm_info)
296 return;
297
298 fjes_hw_free_shared_status_region(hw);
299
300 kfree(hw->hw_info.req_buf);
301 hw->hw_info.req_buf = NULL;
302
303 kfree(hw->hw_info.res_buf);
304 hw->hw_info.res_buf = NULL;
305
306 for (epidx = 0; epidx < hw->max_epid ; epidx++) {
307 if (epidx == hw->my_epid)
308 continue;
309 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].tx);
310 fjes_hw_free_epbuf(&hw->ep_shm_info[epidx].rx);
311 }
312
313 kfree(hw->ep_shm_info);
314 hw->ep_shm_info = NULL;
315 }
316
317 int fjes_hw_init(struct fjes_hw *hw)
318 {
319 int ret;
320
321 hw->base = fjes_hw_iomap(hw);
322 if (!hw->base)
323 return -EIO;
324
325 ret = fjes_hw_reset(hw);
326 if (ret)
327 return ret;
328
329 fjes_hw_set_irqmask(hw, REG_ICTL_MASK_ALL, true);
330
331 INIT_WORK(&hw->update_zone_task, fjes_hw_update_zone_task);
332 INIT_WORK(&hw->epstop_task, fjes_hw_epstop_task);
333
334 mutex_init(&hw->hw_info.lock);
335 spin_lock_init(&hw->rx_status_lock);
336
337 hw->max_epid = fjes_hw_get_max_epid(hw);
338 hw->my_epid = fjes_hw_get_my_epid(hw);
339
340 if ((hw->max_epid == 0) || (hw->my_epid >= hw->max_epid))
341 return -ENXIO;
342
343 ret = fjes_hw_setup(hw);
344
345 return ret;
346 }
347
348 void fjes_hw_exit(struct fjes_hw *hw)
349 {
350 int ret;
351
352 if (hw->base) {
353 ret = fjes_hw_reset(hw);
354 if (ret)
355 pr_err("%s: reset error", __func__);
356
357 fjes_hw_iounmap(hw);
358 hw->base = NULL;
359 }
360
361 fjes_hw_cleanup(hw);
362
363 cancel_work_sync(&hw->update_zone_task);
364 cancel_work_sync(&hw->epstop_task);
365 }
366
367 static enum fjes_dev_command_response_e
368 fjes_hw_issue_request_command(struct fjes_hw *hw,
369 enum fjes_dev_command_request_type type)
370 {
371 enum fjes_dev_command_response_e ret = FJES_CMD_STATUS_UNKNOWN;
372 union REG_CR cr;
373 union REG_CS cs;
374 int timeout;
375
376 cr.reg = 0;
377 cr.bits.req_start = 1;
378 cr.bits.req_code = type;
379 wr32(XSCT_CR, cr.reg);
380 cr.reg = rd32(XSCT_CR);
381
382 if (cr.bits.error == 0) {
383 timeout = FJES_COMMAND_REQ_TIMEOUT * 1000;
384 cs.reg = rd32(XSCT_CS);
385
386 while ((cs.bits.complete != 1) && timeout > 0) {
387 msleep(1000);
388 cs.reg = rd32(XSCT_CS);
389 timeout -= 1000;
390 }
391
392 if (cs.bits.complete == 1)
393 ret = FJES_CMD_STATUS_NORMAL;
394 else if (timeout <= 0)
395 ret = FJES_CMD_STATUS_TIMEOUT;
396
397 } else {
398 switch (cr.bits.err_info) {
399 case FJES_CMD_REQ_ERR_INFO_PARAM:
400 ret = FJES_CMD_STATUS_ERROR_PARAM;
401 break;
402 case FJES_CMD_REQ_ERR_INFO_STATUS:
403 ret = FJES_CMD_STATUS_ERROR_STATUS;
404 break;
405 default:
406 ret = FJES_CMD_STATUS_UNKNOWN;
407 break;
408 }
409 }
410
411 return ret;
412 }
413
414 int fjes_hw_request_info(struct fjes_hw *hw)
415 {
416 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
417 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
418 enum fjes_dev_command_response_e ret;
419 int result;
420
421 memset(req_buf, 0, hw->hw_info.req_buf_size);
422 memset(res_buf, 0, hw->hw_info.res_buf_size);
423
424 req_buf->info.length = FJES_DEV_COMMAND_INFO_REQ_LEN;
425
426 res_buf->info.length = 0;
427 res_buf->info.code = 0;
428
429 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_INFO);
430
431 result = 0;
432
433 if (FJES_DEV_COMMAND_INFO_RES_LEN((*hw->hw_info.max_epid)) !=
434 res_buf->info.length) {
435 result = -ENOMSG;
436 } else if (ret == FJES_CMD_STATUS_NORMAL) {
437 switch (res_buf->info.code) {
438 case FJES_CMD_REQ_RES_CODE_NORMAL:
439 result = 0;
440 break;
441 default:
442 result = -EPERM;
443 break;
444 }
445 } else {
446 switch (ret) {
447 case FJES_CMD_STATUS_UNKNOWN:
448 result = -EPERM;
449 break;
450 case FJES_CMD_STATUS_TIMEOUT:
451 result = -EBUSY;
452 break;
453 case FJES_CMD_STATUS_ERROR_PARAM:
454 result = -EPERM;
455 break;
456 case FJES_CMD_STATUS_ERROR_STATUS:
457 result = -EPERM;
458 break;
459 default:
460 result = -EPERM;
461 break;
462 }
463 }
464
465 return result;
466 }
467
468 int fjes_hw_register_buff_addr(struct fjes_hw *hw, int dest_epid,
469 struct ep_share_mem_info *buf_pair)
470 {
471 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
472 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
473 enum fjes_dev_command_response_e ret;
474 int page_count;
475 int timeout;
476 int i, idx;
477 void *addr;
478 int result;
479
480 if (test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
481 return 0;
482
483 memset(req_buf, 0, hw->hw_info.req_buf_size);
484 memset(res_buf, 0, hw->hw_info.res_buf_size);
485
486 req_buf->share_buffer.length = FJES_DEV_COMMAND_SHARE_BUFFER_REQ_LEN(
487 buf_pair->tx.size,
488 buf_pair->rx.size);
489 req_buf->share_buffer.epid = dest_epid;
490
491 idx = 0;
492 req_buf->share_buffer.buffer[idx++] = buf_pair->tx.size;
493 page_count = buf_pair->tx.size / EP_BUFFER_INFO_SIZE;
494 for (i = 0; i < page_count; i++) {
495 addr = ((u8 *)(buf_pair->tx.buffer)) +
496 (i * EP_BUFFER_INFO_SIZE);
497 req_buf->share_buffer.buffer[idx++] =
498 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
499 offset_in_page(addr));
500 }
501
502 req_buf->share_buffer.buffer[idx++] = buf_pair->rx.size;
503 page_count = buf_pair->rx.size / EP_BUFFER_INFO_SIZE;
504 for (i = 0; i < page_count; i++) {
505 addr = ((u8 *)(buf_pair->rx.buffer)) +
506 (i * EP_BUFFER_INFO_SIZE);
507 req_buf->share_buffer.buffer[idx++] =
508 (__le64)(page_to_phys(vmalloc_to_page(addr)) +
509 offset_in_page(addr));
510 }
511
512 res_buf->share_buffer.length = 0;
513 res_buf->share_buffer.code = 0;
514
515 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_SHARE_BUFFER);
516
517 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
518 while ((ret == FJES_CMD_STATUS_NORMAL) &&
519 (res_buf->share_buffer.length ==
520 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN) &&
521 (res_buf->share_buffer.code == FJES_CMD_REQ_RES_CODE_BUSY) &&
522 (timeout > 0)) {
523 msleep(200 + hw->my_epid * 20);
524 timeout -= (200 + hw->my_epid * 20);
525
526 res_buf->share_buffer.length = 0;
527 res_buf->share_buffer.code = 0;
528
529 ret = fjes_hw_issue_request_command(
530 hw, FJES_CMD_REQ_SHARE_BUFFER);
531 }
532
533 result = 0;
534
535 if (res_buf->share_buffer.length !=
536 FJES_DEV_COMMAND_SHARE_BUFFER_RES_LEN)
537 result = -ENOMSG;
538 else if (ret == FJES_CMD_STATUS_NORMAL) {
539 switch (res_buf->share_buffer.code) {
540 case FJES_CMD_REQ_RES_CODE_NORMAL:
541 result = 0;
542 set_bit(dest_epid, &hw->hw_info.buffer_share_bit);
543 break;
544 case FJES_CMD_REQ_RES_CODE_BUSY:
545 result = -EBUSY;
546 break;
547 default:
548 result = -EPERM;
549 break;
550 }
551 } else {
552 switch (ret) {
553 case FJES_CMD_STATUS_UNKNOWN:
554 result = -EPERM;
555 break;
556 case FJES_CMD_STATUS_TIMEOUT:
557 result = -EBUSY;
558 break;
559 case FJES_CMD_STATUS_ERROR_PARAM:
560 case FJES_CMD_STATUS_ERROR_STATUS:
561 default:
562 result = -EPERM;
563 break;
564 }
565 }
566
567 return result;
568 }
569
570 int fjes_hw_unregister_buff_addr(struct fjes_hw *hw, int dest_epid)
571 {
572 union fjes_device_command_req *req_buf = hw->hw_info.req_buf;
573 union fjes_device_command_res *res_buf = hw->hw_info.res_buf;
574 struct fjes_device_shared_info *share = hw->hw_info.share;
575 enum fjes_dev_command_response_e ret;
576 int timeout;
577 int result;
578
579 if (!hw->base)
580 return -EPERM;
581
582 if (!req_buf || !res_buf || !share)
583 return -EPERM;
584
585 if (!test_bit(dest_epid, &hw->hw_info.buffer_share_bit))
586 return 0;
587
588 memset(req_buf, 0, hw->hw_info.req_buf_size);
589 memset(res_buf, 0, hw->hw_info.res_buf_size);
590
591 req_buf->unshare_buffer.length =
592 FJES_DEV_COMMAND_UNSHARE_BUFFER_REQ_LEN;
593 req_buf->unshare_buffer.epid = dest_epid;
594
595 res_buf->unshare_buffer.length = 0;
596 res_buf->unshare_buffer.code = 0;
597
598 ret = fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
599
600 timeout = FJES_COMMAND_REQ_BUFF_TIMEOUT * 1000;
601 while ((ret == FJES_CMD_STATUS_NORMAL) &&
602 (res_buf->unshare_buffer.length ==
603 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) &&
604 (res_buf->unshare_buffer.code ==
605 FJES_CMD_REQ_RES_CODE_BUSY) &&
606 (timeout > 0)) {
607 msleep(200 + hw->my_epid * 20);
608 timeout -= (200 + hw->my_epid * 20);
609
610 res_buf->unshare_buffer.length = 0;
611 res_buf->unshare_buffer.code = 0;
612
613 ret =
614 fjes_hw_issue_request_command(hw, FJES_CMD_REQ_UNSHARE_BUFFER);
615 }
616
617 result = 0;
618
619 if (res_buf->unshare_buffer.length !=
620 FJES_DEV_COMMAND_UNSHARE_BUFFER_RES_LEN) {
621 result = -ENOMSG;
622 } else if (ret == FJES_CMD_STATUS_NORMAL) {
623 switch (res_buf->unshare_buffer.code) {
624 case FJES_CMD_REQ_RES_CODE_NORMAL:
625 result = 0;
626 clear_bit(dest_epid, &hw->hw_info.buffer_share_bit);
627 break;
628 case FJES_CMD_REQ_RES_CODE_BUSY:
629 result = -EBUSY;
630 break;
631 default:
632 result = -EPERM;
633 break;
634 }
635 } else {
636 switch (ret) {
637 case FJES_CMD_STATUS_UNKNOWN:
638 result = -EPERM;
639 break;
640 case FJES_CMD_STATUS_TIMEOUT:
641 result = -EBUSY;
642 break;
643 case FJES_CMD_STATUS_ERROR_PARAM:
644 case FJES_CMD_STATUS_ERROR_STATUS:
645 default:
646 result = -EPERM;
647 break;
648 }
649 }
650
651 return result;
652 }
653
654 int fjes_hw_raise_interrupt(struct fjes_hw *hw, int dest_epid,
655 enum REG_ICTL_MASK mask)
656 {
657 u32 ig = mask | dest_epid;
658
659 wr32(XSCT_IG, cpu_to_le32(ig));
660
661 return 0;
662 }
663
664 u32 fjes_hw_capture_interrupt_status(struct fjes_hw *hw)
665 {
666 u32 cur_is;
667
668 cur_is = rd32(XSCT_IS);
669
670 return cur_is;
671 }
672
673 void fjes_hw_set_irqmask(struct fjes_hw *hw,
674 enum REG_ICTL_MASK intr_mask, bool mask)
675 {
676 if (mask)
677 wr32(XSCT_IMS, intr_mask);
678 else
679 wr32(XSCT_IMC, intr_mask);
680 }
681
682 bool fjes_hw_epid_is_same_zone(struct fjes_hw *hw, int epid)
683 {
684 if (epid >= hw->max_epid)
685 return false;
686
687 if ((hw->ep_shm_info[epid].es_status !=
688 FJES_ZONING_STATUS_ENABLE) ||
689 (hw->ep_shm_info[hw->my_epid].zone ==
690 FJES_ZONING_ZONE_TYPE_NONE))
691 return false;
692 else
693 return (hw->ep_shm_info[epid].zone ==
694 hw->ep_shm_info[hw->my_epid].zone);
695 }
696
697 int fjes_hw_epid_is_shared(struct fjes_device_shared_info *share,
698 int dest_epid)
699 {
700 int value = false;
701
702 if (dest_epid < share->epnum)
703 value = share->ep_status[dest_epid];
704
705 return value;
706 }
707
708 static bool fjes_hw_epid_is_stop_requested(struct fjes_hw *hw, int src_epid)
709 {
710 return test_bit(src_epid, &hw->txrx_stop_req_bit);
711 }
712
713 static bool fjes_hw_epid_is_stop_process_done(struct fjes_hw *hw, int src_epid)
714 {
715 return (hw->ep_shm_info[src_epid].tx.info->v1i.rx_status &
716 FJES_RX_STOP_REQ_DONE);
717 }
718
719 enum ep_partner_status
720 fjes_hw_get_partner_ep_status(struct fjes_hw *hw, int epid)
721 {
722 enum ep_partner_status status;
723
724 if (fjes_hw_epid_is_shared(hw->hw_info.share, epid)) {
725 if (fjes_hw_epid_is_stop_requested(hw, epid)) {
726 status = EP_PARTNER_WAITING;
727 } else {
728 if (fjes_hw_epid_is_stop_process_done(hw, epid))
729 status = EP_PARTNER_COMPLETE;
730 else
731 status = EP_PARTNER_SHARED;
732 }
733 } else {
734 status = EP_PARTNER_UNSHARE;
735 }
736
737 return status;
738 }
739
740 void fjes_hw_raise_epstop(struct fjes_hw *hw)
741 {
742 enum ep_partner_status status;
743 unsigned long flags;
744 int epidx;
745
746 for (epidx = 0; epidx < hw->max_epid; epidx++) {
747 if (epidx == hw->my_epid)
748 continue;
749
750 status = fjes_hw_get_partner_ep_status(hw, epidx);
751 switch (status) {
752 case EP_PARTNER_SHARED:
753 fjes_hw_raise_interrupt(hw, epidx,
754 REG_ICTL_MASK_TXRX_STOP_REQ);
755 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
756 break;
757 default:
758 break;
759 }
760
761 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
762 set_bit(epidx, &hw->txrx_stop_req_bit);
763
764 spin_lock_irqsave(&hw->rx_status_lock, flags);
765 hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
766 FJES_RX_STOP_REQ_REQUEST;
767 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
768 }
769 }
770
771 int fjes_hw_wait_epstop(struct fjes_hw *hw)
772 {
773 enum ep_partner_status status;
774 union ep_buffer_info *info;
775 int wait_time = 0;
776 int epidx;
777
778 while (hw->hw_info.buffer_unshare_reserve_bit &&
779 (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)) {
780 for (epidx = 0; epidx < hw->max_epid; epidx++) {
781 if (epidx == hw->my_epid)
782 continue;
783 status = fjes_hw_epid_is_shared(hw->hw_info.share,
784 epidx);
785 info = hw->ep_shm_info[epidx].rx.info;
786 if ((!status ||
787 (info->v1i.rx_status &
788 FJES_RX_STOP_REQ_DONE)) &&
789 test_bit(epidx,
790 &hw->hw_info.buffer_unshare_reserve_bit)) {
791 clear_bit(epidx,
792 &hw->hw_info.buffer_unshare_reserve_bit);
793 }
794 }
795
796 msleep(100);
797 wait_time += 100;
798 }
799
800 for (epidx = 0; epidx < hw->max_epid; epidx++) {
801 if (epidx == hw->my_epid)
802 continue;
803 if (test_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit))
804 clear_bit(epidx,
805 &hw->hw_info.buffer_unshare_reserve_bit);
806 }
807
808 return (wait_time < FJES_COMMAND_EPSTOP_WAIT_TIMEOUT * 1000)
809 ? 0 : -EBUSY;
810 }
811
812 bool fjes_hw_check_epbuf_version(struct epbuf_handler *epbh, u32 version)
813 {
814 union ep_buffer_info *info = epbh->info;
815
816 return (info->common.version == version);
817 }
818
819 bool fjes_hw_check_mtu(struct epbuf_handler *epbh, u32 mtu)
820 {
821 union ep_buffer_info *info = epbh->info;
822
823 return ((info->v1i.frame_max == FJES_MTU_TO_FRAME_SIZE(mtu)) &&
824 info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE);
825 }
826
827 bool fjes_hw_check_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
828 {
829 union ep_buffer_info *info = epbh->info;
830 bool ret = false;
831 int i;
832
833 if (vlan_id == 0) {
834 ret = true;
835 } else {
836 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
837 if (vlan_id == info->v1i.vlan_id[i]) {
838 ret = true;
839 break;
840 }
841 }
842 }
843 return ret;
844 }
845
846 bool fjes_hw_set_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
847 {
848 union ep_buffer_info *info = epbh->info;
849 int i;
850
851 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
852 if (info->v1i.vlan_id[i] == 0) {
853 info->v1i.vlan_id[i] = vlan_id;
854 return true;
855 }
856 }
857 return false;
858 }
859
860 void fjes_hw_del_vlan_id(struct epbuf_handler *epbh, u16 vlan_id)
861 {
862 union ep_buffer_info *info = epbh->info;
863 int i;
864
865 if (0 != vlan_id) {
866 for (i = 0; i < EP_BUFFER_SUPPORT_VLAN_MAX; i++) {
867 if (vlan_id == info->v1i.vlan_id[i])
868 info->v1i.vlan_id[i] = 0;
869 }
870 }
871 }
872
873 bool fjes_hw_epbuf_rx_is_empty(struct epbuf_handler *epbh)
874 {
875 union ep_buffer_info *info = epbh->info;
876
877 if (!(info->v1i.rx_status & FJES_RX_MTU_CHANGING_DONE))
878 return true;
879
880 if (info->v1i.count_max == 0)
881 return true;
882
883 return EP_RING_EMPTY(info->v1i.head, info->v1i.tail,
884 info->v1i.count_max);
885 }
886
887 void *fjes_hw_epbuf_rx_curpkt_get_addr(struct epbuf_handler *epbh,
888 size_t *psize)
889 {
890 union ep_buffer_info *info = epbh->info;
891 struct esmem_frame *ring_frame;
892 void *frame;
893
894 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
895 (info->v1i.head,
896 info->v1i.count_max) *
897 info->v1i.frame_max]);
898
899 *psize = (size_t)ring_frame->frame_size;
900
901 frame = ring_frame->frame_data;
902
903 return frame;
904 }
905
906 void fjes_hw_epbuf_rx_curpkt_drop(struct epbuf_handler *epbh)
907 {
908 union ep_buffer_info *info = epbh->info;
909
910 if (fjes_hw_epbuf_rx_is_empty(epbh))
911 return;
912
913 EP_RING_INDEX_INC(epbh->info->v1i.head, info->v1i.count_max);
914 }
915
916 int fjes_hw_epbuf_tx_pkt_send(struct epbuf_handler *epbh,
917 void *frame, size_t size)
918 {
919 union ep_buffer_info *info = epbh->info;
920 struct esmem_frame *ring_frame;
921
922 if (EP_RING_FULL(info->v1i.head, info->v1i.tail, info->v1i.count_max))
923 return -ENOBUFS;
924
925 ring_frame = (struct esmem_frame *)&(epbh->ring[EP_RING_INDEX
926 (info->v1i.tail - 1,
927 info->v1i.count_max) *
928 info->v1i.frame_max]);
929
930 ring_frame->frame_size = size;
931 memcpy((void *)(ring_frame->frame_data), (void *)frame, size);
932
933 EP_RING_INDEX_INC(epbh->info->v1i.tail, info->v1i.count_max);
934
935 return 0;
936 }
937
938 static void fjes_hw_update_zone_task(struct work_struct *work)
939 {
940 struct fjes_hw *hw = container_of(work,
941 struct fjes_hw, update_zone_task);
942
943 struct my_s {u8 es_status; u8 zone; } *info;
944 union fjes_device_command_res *res_buf;
945 enum ep_partner_status pstatus;
946
947 struct fjes_adapter *adapter;
948 struct net_device *netdev;
949 unsigned long flags;
950
951 ulong unshare_bit = 0;
952 ulong share_bit = 0;
953 ulong irq_bit = 0;
954
955 int epidx;
956 int ret;
957
958 adapter = (struct fjes_adapter *)hw->back;
959 netdev = adapter->netdev;
960 res_buf = hw->hw_info.res_buf;
961 info = (struct my_s *)&res_buf->info.info;
962
963 mutex_lock(&hw->hw_info.lock);
964
965 ret = fjes_hw_request_info(hw);
966 switch (ret) {
967 case -ENOMSG:
968 case -EBUSY:
969 default:
970 if (!work_pending(&adapter->force_close_task)) {
971 adapter->force_reset = true;
972 schedule_work(&adapter->force_close_task);
973 }
974 break;
975
976 case 0:
977
978 for (epidx = 0; epidx < hw->max_epid; epidx++) {
979 if (epidx == hw->my_epid) {
980 hw->ep_shm_info[epidx].es_status =
981 info[epidx].es_status;
982 hw->ep_shm_info[epidx].zone =
983 info[epidx].zone;
984 continue;
985 }
986
987 pstatus = fjes_hw_get_partner_ep_status(hw, epidx);
988 switch (pstatus) {
989 case EP_PARTNER_UNSHARE:
990 default:
991 if ((info[epidx].zone !=
992 FJES_ZONING_ZONE_TYPE_NONE) &&
993 (info[epidx].es_status ==
994 FJES_ZONING_STATUS_ENABLE) &&
995 (info[epidx].zone ==
996 info[hw->my_epid].zone))
997 set_bit(epidx, &share_bit);
998 else
999 set_bit(epidx, &unshare_bit);
1000 break;
1001
1002 case EP_PARTNER_COMPLETE:
1003 case EP_PARTNER_WAITING:
1004 if ((info[epidx].zone ==
1005 FJES_ZONING_ZONE_TYPE_NONE) ||
1006 (info[epidx].es_status !=
1007 FJES_ZONING_STATUS_ENABLE) ||
1008 (info[epidx].zone !=
1009 info[hw->my_epid].zone)) {
1010 set_bit(epidx,
1011 &adapter->unshare_watch_bitmask);
1012 set_bit(epidx,
1013 &hw->hw_info.buffer_unshare_reserve_bit);
1014 }
1015 break;
1016
1017 case EP_PARTNER_SHARED:
1018 if ((info[epidx].zone ==
1019 FJES_ZONING_ZONE_TYPE_NONE) ||
1020 (info[epidx].es_status !=
1021 FJES_ZONING_STATUS_ENABLE) ||
1022 (info[epidx].zone !=
1023 info[hw->my_epid].zone))
1024 set_bit(epidx, &irq_bit);
1025 break;
1026 }
1027
1028 hw->ep_shm_info[epidx].es_status =
1029 info[epidx].es_status;
1030 hw->ep_shm_info[epidx].zone = info[epidx].zone;
1031 }
1032 break;
1033 }
1034
1035 mutex_unlock(&hw->hw_info.lock);
1036
1037 for (epidx = 0; epidx < hw->max_epid; epidx++) {
1038 if (epidx == hw->my_epid)
1039 continue;
1040
1041 if (test_bit(epidx, &share_bit)) {
1042 spin_lock_irqsave(&hw->rx_status_lock, flags);
1043 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1044 netdev->dev_addr, netdev->mtu);
1045 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1046
1047 mutex_lock(&hw->hw_info.lock);
1048
1049 ret = fjes_hw_register_buff_addr(
1050 hw, epidx, &hw->ep_shm_info[epidx]);
1051
1052 switch (ret) {
1053 case 0:
1054 break;
1055 case -ENOMSG:
1056 case -EBUSY:
1057 default:
1058 if (!work_pending(&adapter->force_close_task)) {
1059 adapter->force_reset = true;
1060 schedule_work(
1061 &adapter->force_close_task);
1062 }
1063 break;
1064 }
1065 mutex_unlock(&hw->hw_info.lock);
1066
1067 hw->ep_shm_info[epidx].ep_stats
1068 .com_regist_buf_exec += 1;
1069 }
1070
1071 if (test_bit(epidx, &unshare_bit)) {
1072 mutex_lock(&hw->hw_info.lock);
1073
1074 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1075
1076 switch (ret) {
1077 case 0:
1078 break;
1079 case -ENOMSG:
1080 case -EBUSY:
1081 default:
1082 if (!work_pending(&adapter->force_close_task)) {
1083 adapter->force_reset = true;
1084 schedule_work(
1085 &adapter->force_close_task);
1086 }
1087 break;
1088 }
1089
1090 mutex_unlock(&hw->hw_info.lock);
1091
1092 hw->ep_shm_info[epidx].ep_stats
1093 .com_unregist_buf_exec += 1;
1094
1095 if (ret == 0) {
1096 spin_lock_irqsave(&hw->rx_status_lock, flags);
1097 fjes_hw_setup_epbuf(
1098 &hw->ep_shm_info[epidx].tx,
1099 netdev->dev_addr, netdev->mtu);
1100 spin_unlock_irqrestore(&hw->rx_status_lock,
1101 flags);
1102 }
1103 }
1104
1105 if (test_bit(epidx, &irq_bit)) {
1106 fjes_hw_raise_interrupt(hw, epidx,
1107 REG_ICTL_MASK_TXRX_STOP_REQ);
1108
1109 hw->ep_shm_info[epidx].ep_stats.send_intr_unshare += 1;
1110
1111 set_bit(epidx, &hw->txrx_stop_req_bit);
1112 spin_lock_irqsave(&hw->rx_status_lock, flags);
1113 hw->ep_shm_info[epidx].tx.
1114 info->v1i.rx_status |=
1115 FJES_RX_STOP_REQ_REQUEST;
1116 spin_unlock_irqrestore(&hw->rx_status_lock, flags);
1117 set_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1118 }
1119 }
1120
1121 if (irq_bit || adapter->unshare_watch_bitmask) {
1122 if (!work_pending(&adapter->unshare_watch_task))
1123 queue_work(adapter->control_wq,
1124 &adapter->unshare_watch_task);
1125 }
1126 }
1127
1128 static void fjes_hw_epstop_task(struct work_struct *work)
1129 {
1130 struct fjes_hw *hw = container_of(work, struct fjes_hw, epstop_task);
1131 struct fjes_adapter *adapter = (struct fjes_adapter *)hw->back;
1132 unsigned long flags;
1133
1134 ulong remain_bit;
1135 int epid_bit;
1136
1137 while ((remain_bit = hw->epstop_req_bit)) {
1138 for (epid_bit = 0; remain_bit; remain_bit >>= 1, epid_bit++) {
1139 if (remain_bit & 1) {
1140 spin_lock_irqsave(&hw->rx_status_lock, flags);
1141 hw->ep_shm_info[epid_bit].
1142 tx.info->v1i.rx_status |=
1143 FJES_RX_STOP_REQ_DONE;
1144 spin_unlock_irqrestore(&hw->rx_status_lock,
1145 flags);
1146
1147 clear_bit(epid_bit, &hw->epstop_req_bit);
1148 set_bit(epid_bit,
1149 &adapter->unshare_watch_bitmask);
1150
1151 if (!work_pending(&adapter->unshare_watch_task))
1152 queue_work(
1153 adapter->control_wq,
1154 &adapter->unshare_watch_task);
1155 }
1156 }
1157 }
1158 }
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