drivers/misc/eeprom/at24.c

   1 /*
   2  * at24.c - handle most I2C EEPROMs
   3  *
   4  * Copyright (C) 2005-2007 David Brownell
   5  * Copyright (C) 2008 Wolfram Sang, Pengutronix
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/slab.h>
  16 #include <linux/delay.h>
  17 #include <linux/mutex.h>
  18 #include <linux/mod_devicetable.h>
  19 #include <linux/log2.h>
  20 #include <linux/bitops.h>
  21 #include <linux/jiffies.h>
  22 #include <linux/of.h>
  23 #include <linux/acpi.h>
  24 #include <linux/i2c.h>
  25 #include <linux/nvmem-provider.h>
  26 #include <linux/regmap.h>
  27 #include <linux/platform_data/at24.h>
  28
  29 /*
  30  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
  31  * Differences between different vendor product lines (like Atmel AT24C or
  32  * MicroChip 24LC, etc) won't much matter for typical read/write access.
  33  * There are also I2C RAM chips, likewise interchangeable. One example
  34  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
  35  *
  36  * However, misconfiguration can lose data. "Set 16-bit memory address"
  37  * to a part with 8-bit addressing will overwrite data. Writing with too
  38  * big a page size also loses data. And it's not safe to assume that the
  39  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
  40  * uses 0x51, for just one example.
  41  *
  42  * Accordingly, explicit board-specific configuration data should be used
  43  * in almost all cases. (One partial exception is an SMBus used to access
  44  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
  45  *
  46  * So this driver uses "new style" I2C driver binding, expecting to be
  47  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
  48  * similar kernel-resident tables; or, configuration data coming from
  49  * a bootloader.
  50  *
  51  * Other than binding model, current differences from "eeprom" driver are
  52  * that this one handles write access and isn't restricted to 24c02 devices.
  53  * It also handles larger devices (32 kbit and up) with two-byte addresses,
  54  * which won't work on pure SMBus systems.
  55  */
  56
  57 struct at24_data {
  58         struct at24_platform_data chip;
  59         int use_smbus;
  60         int use_smbus_write;
  61
  62         /*
  63          * Lock protects against activities from other Linux tasks,
  64          * but not from changes by other I2C masters.
  65          */
  66         struct mutex lock;
  67
  68         u8 *writebuf;
  69         unsigned write_max;
  70         unsigned num_addresses;
  71
  72         struct regmap_config regmap_config;
  73         struct nvmem_config nvmem_config;
  74         struct nvmem_device *nvmem;
  75
  76         /*
  77          * Some chips tie up multiple I2C addresses; dummy devices reserve
  78          * them for us, and we'll use them with SMBus calls.
  79          */
  80         struct i2c_client *client[];
  81 };
  82
  83 /*
  84  * This parameter is to help this driver avoid blocking other drivers out
  85  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
  86  * clock, one 256 byte read takes about 1/43 second which is excessive;
  87  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
  88  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
  89  *
  90  * This value is forced to be a power of two so that writes align on pages.
  91  */
  92 static unsigned io_limit = 128;
  93 module_param(io_limit, uint, 0);
  94 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
  95
  96 /*
  97  * Specs often allow 5 msec for a page write, sometimes 20 msec;
  98  * it's important to recover from write timeouts.
  99  */
 100 static unsigned write_timeout = 25;
 101 module_param(write_timeout, uint, 0);
 102 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
 103
 104 #define AT24_SIZE_BYTELEN 5
 105 #define AT24_SIZE_FLAGS 8
 106
 107 #define AT24_BITMASK(x) (BIT(x) - 1)
 108
 109 /* create non-zero magic value for given eeprom parameters */
 110 #define AT24_DEVICE_MAGIC(_len, _flags)                 \
 111         ((1 << AT24_SIZE_FLAGS | (_flags))              \
 112             << AT24_SIZE_BYTELEN | ilog2(_len))
 113
 114 static const struct i2c_device_id at24_ids[] = {
 115         /* needs 8 addresses as A0-A2 are ignored */
 116         { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
 117         /* old variants can't be handled with this generic entry! */
 118         { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
 119         { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
 120         /* spd is a 24c02 in memory DIMMs */
 121         { "spd", AT24_DEVICE_MAGIC(2048 / 8,
 122                 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
 123         { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
 124         /* 24rf08 quirk is handled at i2c-core */
 125         { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
 126         { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
 127         { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
 128         { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
 129         { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
 130         { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
 131         { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
 132         { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
 133         { "at24", 0 },
 134         { /* END OF LIST */ }
 135 };
 136 MODULE_DEVICE_TABLE(i2c, at24_ids);
 137
 138 static const struct acpi_device_id at24_acpi_ids[] = {
 139         { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
 140         { }
 141 };
 142 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
 143
 144 /*-------------------------------------------------------------------------*/
 145
 146 /*
 147  * This routine supports chips which consume multiple I2C addresses. It
 148  * computes the addressing information to be used for a given r/w request.
 149  * Assumes that sanity checks for offset happened at sysfs-layer.
 150  */
 151 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
 152                 unsigned *offset)
 153 {
 154         unsigned i;
 155
 156         if (at24->chip.flags & AT24_FLAG_ADDR16) {
 157                 i = *offset >> 16;
 158                 *offset &= 0xffff;
 159         } else {
 160                 i = *offset >> 8;
 161                 *offset &= 0xff;
 162         }
 163
 164         return at24->client[i];
 165 }
 166
 167 static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
 168                 unsigned offset, size_t count)
 169 {
 170         struct i2c_msg msg[2];
 171         u8 msgbuf[2];
 172         struct i2c_client *client;
 173         unsigned long timeout, read_time;
 174         int status, i;
 175
 176         memset(msg, 0, sizeof(msg));
 177
 178         /*
 179          * REVISIT some multi-address chips don't rollover page reads to
 180          * the next slave address, so we may need to truncate the count.
 181          * Those chips might need another quirk flag.
 182          *
 183          * If the real hardware used four adjacent 24c02 chips and that
 184          * were misconfigured as one 24c08, that would be a similar effect:
 185          * one "eeprom" file not four, but larger reads would fail when
 186          * they crossed certain pages.
 187          */
 188
 189         /*
 190          * Slave address and byte offset derive from the offset. Always
 191          * set the byte address; on a multi-master board, another master
 192          * may have changed the chip's "current" address pointer.
 193          */
 194         client = at24_translate_offset(at24, &offset);
 195
 196         if (count > io_limit)
 197                 count = io_limit;
 198
 199         if (at24->use_smbus) {
 200                 /* Smaller eeproms can work given some SMBus extension calls */
 201                 if (count > I2C_SMBUS_BLOCK_MAX)
 202                         count = I2C_SMBUS_BLOCK_MAX;
 203         } else {
 204                 /*
 205                  * When we have a better choice than SMBus calls, use a
 206                  * combined I2C message. Write address; then read up to
 207                  * io_limit data bytes. Note that read page rollover helps us
 208                  * here (unlike writes). msgbuf is u8 and will cast to our
 209                  * needs.
 210                  */
 211                 i = 0;
 212                 if (at24->chip.flags & AT24_FLAG_ADDR16)
 213                         msgbuf[i++] = offset >> 8;
 214                 msgbuf[i++] = offset;
 215
 216                 msg[0].addr = client->addr;
 217                 msg[0].buf = msgbuf;
 218                 msg[0].len = i;
 219
 220                 msg[1].addr = client->addr;
 221                 msg[1].flags = I2C_M_RD;
 222                 msg[1].buf = buf;
 223                 msg[1].len = count;
 224         }
 225
 226         /*
 227          * Reads fail if the previous write didn't complete yet. We may
 228          * loop a few times until this one succeeds, waiting at least
 229          * long enough for one entire page write to work.
 230          */
 231         timeout = jiffies + msecs_to_jiffies(write_timeout);
 232         do {
 233                 read_time = jiffies;
 234                 if (at24->use_smbus) {
 235                         status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset,
 236                                                                            count, buf);
 237                 } else {
 238                         status = i2c_transfer(client->adapter, msg, 2);
 239                         if (status == 2)
 240                                 status = count;
 241                 }
 242                 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
 243                                 count, offset, status, jiffies);
 244
 245                 if (status == count)
 246                         return count;
 247
 248                 usleep_range(1000, 1500);
 249         } while (time_before(read_time, timeout));
 250
 251         return -ETIMEDOUT;
 252 }
 253
 254 static ssize_t at24_read(struct at24_data *at24,
 255                 char *buf, loff_t off, size_t count)
 256 {
 257         ssize_t retval = 0;
 258
 259         if (unlikely(!count))
 260                 return count;
 261
 262         /*
 263          * Read data from chip, protecting against concurrent updates
 264          * from this host, but not from other I2C masters.
 265          */
 266         mutex_lock(&at24->lock);
 267
 268         while (count) {
 269                 ssize_t status;
 270
 271                 status = at24_eeprom_read(at24, buf, off, count);
 272                 if (status <= 0) {
 273                         if (retval == 0)
 274                                 retval = status;
 275                         break;
 276                 }
 277                 buf += status;
 278                 off += status;
 279                 count -= status;
 280                 retval += status;
 281         }
 282
 283         mutex_unlock(&at24->lock);
 284
 285         return retval;
 286 }
 287
 288 /*
 289  * Note that if the hardware write-protect pin is pulled high, the whole
 290  * chip is normally write protected. But there are plenty of product
 291  * variants here, including OTP fuses and partial chip protect.
 292  *
 293  * We only use page mode writes; the alternative is sloooow. This routine
 294  * writes at most one page.
 295  */
 296 static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
 297                 unsigned offset, size_t count)
 298 {
 299         struct i2c_client *client;
 300         struct i2c_msg msg;
 301         ssize_t status = 0;
 302         unsigned long timeout, write_time;
 303         unsigned next_page;
 304
 305         /* Get corresponding I2C address and adjust offset */
 306         client = at24_translate_offset(at24, &offset);
 307
 308         /* write_max is at most a page */
 309         if (count > at24->write_max)
 310                 count = at24->write_max;
 311
 312         /* Never roll over backwards, to the start of this page */
 313         next_page = roundup(offset + 1, at24->chip.page_size);
 314         if (offset + count > next_page)
 315                 count = next_page - offset;
 316
 317         /* If we'll use I2C calls for I/O, set up the message */
 318         if (!at24->use_smbus) {
 319                 int i = 0;
 320
 321                 msg.addr = client->addr;
 322                 msg.flags = 0;
 323
 324                 /* msg.buf is u8 and casts will mask the values */
 325                 msg.buf = at24->writebuf;
 326                 if (at24->chip.flags & AT24_FLAG_ADDR16)
 327                         msg.buf[i++] = offset >> 8;
 328
 329                 msg.buf[i++] = offset;
 330                 memcpy(&msg.buf[i], buf, count);
 331                 msg.len = i + count;
 332         }
 333
 334         /*
 335          * Writes fail if the previous one didn't complete yet. We may
 336          * loop a few times until this one succeeds, waiting at least
 337          * long enough for one entire page write to work.
 338          */
 339         timeout = jiffies + msecs_to_jiffies(write_timeout);
 340         do {
 341                 write_time = jiffies;
 342                 if (at24->use_smbus_write) {
 343                         switch (at24->use_smbus_write) {
 344                         case I2C_SMBUS_I2C_BLOCK_DATA:
 345                                 status = i2c_smbus_write_i2c_block_data(client,
 346                                                 offset, count, buf);
 347                                 break;
 348                         case I2C_SMBUS_BYTE_DATA:
 349                                 status = i2c_smbus_write_byte_data(client,
 350                                                 offset, buf[0]);
 351                                 break;
 352                         }
 353
 354                         if (status == 0)
 355                                 status = count;
 356                 } else {
 357                         status = i2c_transfer(client->adapter, &msg, 1);
 358                         if (status == 1)
 359                                 status = count;
 360                 }
 361                 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
 362                                 count, offset, status, jiffies);
 363
 364                 if (status == count)
 365                         return count;
 366
 367                 usleep_range(1000, 1500);
 368         } while (time_before(write_time, timeout));
 369
 370         return -ETIMEDOUT;
 371 }
 372
 373 static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
 374                           size_t count)
 375 {
 376         ssize_t retval = 0;
 377
 378         if (unlikely(!count))
 379                 return count;
 380
 381         /*
 382          * Write data to chip, protecting against concurrent updates
 383          * from this host, but not from other I2C masters.
 384          */
 385         mutex_lock(&at24->lock);
 386
 387         while (count) {
 388                 ssize_t status;
 389
 390                 status = at24_eeprom_write(at24, buf, off, count);
 391                 if (status <= 0) {
 392                         if (retval == 0)
 393                                 retval = status;
 394                         break;
 395                 }
 396                 buf += status;
 397                 off += status;
 398                 count -= status;
 399                 retval += status;
 400         }
 401
 402         mutex_unlock(&at24->lock);
 403
 404         return retval;
 405 }
 406
 407 /*-------------------------------------------------------------------------*/
 408
 409 /*
 410  * Provide a regmap interface, which is registered with the NVMEM
 411  * framework
 412 */
 413 static int at24_regmap_read(void *context, const void *reg, size_t reg_size,
 414                             void *val, size_t val_size)
 415 {
 416         struct at24_data *at24 = context;
 417         off_t offset = *(u32 *)reg;
 418         int err;
 419
 420         err = at24_read(at24, val, offset, val_size);
 421         if (err)
 422                 return err;
 423         return 0;
 424 }
 425
 426 static int at24_regmap_write(void *context, const void *data, size_t count)
 427 {
 428         struct at24_data *at24 = context;
 429         const char *buf;
 430         u32 offset;
 431         size_t len;
 432         int err;
 433
 434         memcpy(&offset, data, sizeof(offset));
 435         buf = (const char *)data + sizeof(offset);
 436         len = count - sizeof(offset);
 437
 438         err = at24_write(at24, buf, offset, len);
 439         if (err)
 440                 return err;
 441         return 0;
 442 }
 443
 444 static const struct regmap_bus at24_regmap_bus = {
 445         .read = at24_regmap_read,
 446         .write = at24_regmap_write,
 447         .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
 448 };
 449
 450 /*-------------------------------------------------------------------------*/
 451
 452 #ifdef CONFIG_OF
 453 static void at24_get_ofdata(struct i2c_client *client,
 454                 struct at24_platform_data *chip)
 455 {
 456         const __be32 *val;
 457         struct device_node *node = client->dev.of_node;
 458
 459         if (node) {
 460                 if (of_get_property(node, "read-only", NULL))
 461                         chip->flags |= AT24_FLAG_READONLY;
 462                 val = of_get_property(node, "pagesize", NULL);
 463                 if (val)
 464                         chip->page_size = be32_to_cpup(val);
 465         }
 466 }
 467 #else
 468 static void at24_get_ofdata(struct i2c_client *client,
 469                 struct at24_platform_data *chip)
 470 { }
 471 #endif /* CONFIG_OF */
 472
 473 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
 474 {
 475         struct at24_platform_data chip;
 476         kernel_ulong_t magic = 0;
 477         bool writable;
 478         int use_smbus = 0;
 479         int use_smbus_write = 0;
 480         struct at24_data *at24;
 481         int err;
 482         unsigned i, num_addresses;
 483         struct regmap *regmap;
 484
 485         if (client->dev.platform_data) {
 486                 chip = *(struct at24_platform_data *)client->dev.platform_data;
 487         } else {
 488                 if (id) {
 489                         magic = id->driver_data;
 490                 } else {
 491                         const struct acpi_device_id *aid;
 492
 493                         aid = acpi_match_device(at24_acpi_ids, &client->dev);
 494                         if (aid)
 495                                 magic = aid->driver_data;
 496                 }
 497                 if (!magic)
 498                         return -ENODEV;
 499
 500                 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
 501                 magic >>= AT24_SIZE_BYTELEN;
 502                 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
 503                 /*
 504                  * This is slow, but we can't know all eeproms, so we better
 505                  * play safe. Specifying custom eeprom-types via platform_data
 506                  * is recommended anyhow.
 507                  */
 508                 chip.page_size = 1;
 509
 510                 /* update chipdata if OF is present */
 511                 at24_get_ofdata(client, &chip);
 512
 513                 chip.setup = NULL;
 514                 chip.context = NULL;
 515         }
 516
 517         if (!is_power_of_2(chip.byte_len))
 518                 dev_warn(&client->dev,
 519                         "byte_len looks suspicious (no power of 2)!\n");
 520         if (!chip.page_size) {
 521                 dev_err(&client->dev, "page_size must not be 0!\n");
 522                 return -EINVAL;
 523         }
 524         if (!is_power_of_2(chip.page_size))
 525                 dev_warn(&client->dev,
 526                         "page_size looks suspicious (no power of 2)!\n");
 527
 528         /* Use I2C operations unless we're stuck with SMBus extensions. */
 529         if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
 530                 if (chip.flags & AT24_FLAG_ADDR16)
 531                         return -EPFNOSUPPORT;
 532
 533                 if (i2c_check_functionality(client->adapter,
 534                                 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
 535                         use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
 536                 } else if (i2c_check_functionality(client->adapter,
 537                                 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
 538                         use_smbus = I2C_SMBUS_WORD_DATA;
 539                 } else if (i2c_check_functionality(client->adapter,
 540                                 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
 541                         use_smbus = I2C_SMBUS_BYTE_DATA;
 542                 } else {
 543                         return -EPFNOSUPPORT;
 544                 }
 545
 546                 if (i2c_check_functionality(client->adapter,
 547                                 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
 548                         use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
 549                 } else if (i2c_check_functionality(client->adapter,
 550                                 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
 551                         use_smbus_write = I2C_SMBUS_BYTE_DATA;
 552                         chip.page_size = 1;
 553                 }
 554         }
 555
 556         if (chip.flags & AT24_FLAG_TAKE8ADDR)
 557                 num_addresses = 8;
 558         else
 559                 num_addresses = DIV_ROUND_UP(chip.byte_len,
 560                         (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
 561
 562         at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
 563                 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
 564         if (!at24)
 565                 return -ENOMEM;
 566
 567         mutex_init(&at24->lock);
 568         at24->use_smbus = use_smbus;
 569         at24->use_smbus_write = use_smbus_write;
 570         at24->chip = chip;
 571         at24->num_addresses = num_addresses;
 572
 573         writable = !(chip.flags & AT24_FLAG_READONLY);
 574         if (writable) {
 575                 if (!use_smbus || use_smbus_write) {
 576
 577                         unsigned write_max = chip.page_size;
 578
 579                         if (write_max > io_limit)
 580                                 write_max = io_limit;
 581                         if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
 582                                 write_max = I2C_SMBUS_BLOCK_MAX;
 583                         at24->write_max = write_max;
 584
 585                         /* buffer (data + address at the beginning) */
 586                         at24->writebuf = devm_kzalloc(&client->dev,
 587                                 write_max + 2, GFP_KERNEL);
 588                         if (!at24->writebuf)
 589                                 return -ENOMEM;
 590                 } else {
 591                         dev_warn(&client->dev,
 592                                 "cannot write due to controller restrictions.");
 593                 }
 594         }
 595
 596         at24->client[0] = client;
 597
 598         /* use dummy devices for multiple-address chips */
 599         for (i = 1; i < num_addresses; i++) {
 600                 at24->client[i] = i2c_new_dummy(client->adapter,
 601                                         client->addr + i);
 602                 if (!at24->client[i]) {
 603                         dev_err(&client->dev, "address 0x%02x unavailable\n",
 604                                         client->addr + i);
 605                         err = -EADDRINUSE;
 606                         goto err_clients;
 607                 }
 608         }
 609
 610         at24->regmap_config.reg_bits = 32;
 611         at24->regmap_config.val_bits = 8;
 612         at24->regmap_config.reg_stride = 1;
 613         at24->regmap_config.max_register = chip.byte_len - 1;
 614
 615         regmap = devm_regmap_init(&client->dev, &at24_regmap_bus, at24,
 616                                   &at24->regmap_config);
 617         if (IS_ERR(regmap)) {
 618                 dev_err(&client->dev, "regmap init failed\n");
 619                 err = PTR_ERR(regmap);
 620                 goto err_clients;
 621         }
 622
 623         at24->nvmem_config.name = dev_name(&client->dev);
 624         at24->nvmem_config.dev = &client->dev;
 625         at24->nvmem_config.read_only = !writable;
 626         at24->nvmem_config.root_only = true;
 627         at24->nvmem_config.owner = THIS_MODULE;
 628         at24->nvmem_config.compat = true;
 629         at24->nvmem_config.base_dev = &client->dev;
 630
 631         at24->nvmem = nvmem_register(&at24->nvmem_config);
 632
 633         if (IS_ERR(at24->nvmem)) {
 634                 err = PTR_ERR(at24->nvmem);
 635                 goto err_clients;
 636         }
 637
 638         i2c_set_clientdata(client, at24);
 639
 640         dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
 641                 chip.byte_len, client->name,
 642                 writable ? "writable" : "read-only", at24->write_max);
 643         if (use_smbus == I2C_SMBUS_WORD_DATA ||
 644             use_smbus == I2C_SMBUS_BYTE_DATA) {
 645                 dev_notice(&client->dev, "Falling back to %s reads, "
 646                            "performance will suffer\n", use_smbus ==
 647                            I2C_SMBUS_WORD_DATA ? "word" : "byte");
 648         }
 649
 650         /* export data to kernel code */
 651         if (chip.setup)
 652                 chip.setup(at24->nvmem, chip.context);
 653
 654         return 0;
 655
 656 err_clients:
 657         for (i = 1; i < num_addresses; i++)
 658                 if (at24->client[i])
 659                         i2c_unregister_device(at24->client[i]);
 660
 661         return err;
 662 }
 663
 664 static int at24_remove(struct i2c_client *client)
 665 {
 666         struct at24_data *at24;
 667         int i;
 668
 669         at24 = i2c_get_clientdata(client);
 670
 671         nvmem_unregister(at24->nvmem);
 672
 673         for (i = 1; i < at24->num_addresses; i++)
 674                 i2c_unregister_device(at24->client[i]);
 675
 676         return 0;
 677 }
 678
 679 /*-------------------------------------------------------------------------*/
 680
 681 static struct i2c_driver at24_driver = {
 682         .driver = {
 683                 .name = "at24",
 684                 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
 685         },
 686         .probe = at24_probe,
 687         .remove = at24_remove,
 688         .id_table = at24_ids,
 689 };
 690
 691 static int __init at24_init(void)
 692 {
 693         if (!io_limit) {
 694                 pr_err("at24: io_limit must not be 0!\n");
 695                 return -EINVAL;
 696         }
 697
 698         io_limit = rounddown_pow_of_two(io_limit);
 699         return i2c_add_driver(&at24_driver);
 700 }
 701 module_init(at24_init);
 702
 703 static void __exit at24_exit(void)
 704 {
 705         i2c_del_driver(&at24_driver);
 706 }
 707 module_exit(at24_exit);
 708
 709 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
 710 MODULE_AUTHOR("David Brownell and Wolfram Sang");
 711 MODULE_LICENSE("GPL");