1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25 Documentation available at:
26 http://www.stlinux.com
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
50 #define STMMAC_RESOURCE_NAME "stmmaceth"
51 #define PHY_RESOURCE_NAME "stmmacphy"
54 /*#define STMMAC_DEBUG*/
56 #define DBG(nlevel, klevel, fmt, args...) \
57 ((void)(netif_msg_##nlevel(priv) && \
58 printk(KERN_##klevel fmt, ## args)))
60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
63 #undef STMMAC_RX_DEBUG
64 /*#define STMMAC_RX_DEBUG*/
65 #ifdef STMMAC_RX_DEBUG
66 #define RX_DBG(fmt, args...) printk(fmt, ## args)
68 #define RX_DBG(fmt, args...) do { } while (0)
71 #undef STMMAC_XMIT_DEBUG
72 /*#define STMMAC_XMIT_DEBUG*/
73 #ifdef STMMAC_TX_DEBUG
74 #define TX_DBG(fmt, args...) printk(fmt, ## args)
76 #define TX_DBG(fmt, args...) do { } while (0)
79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
80 #define JUMBO_LEN 9000
82 /* Module parameters */
83 #define TX_TIMEO 5000 /* default 5 seconds */
84 static int watchdog
= TX_TIMEO
;
85 module_param(watchdog
, int, S_IRUGO
| S_IWUSR
);
86 MODULE_PARM_DESC(watchdog
, "Transmit timeout in milliseconds");
88 static int debug
= -1; /* -1: default, 0: no output, 16: all */
89 module_param(debug
, int, S_IRUGO
| S_IWUSR
);
90 MODULE_PARM_DESC(debug
, "Message Level (0: no output, 16: all)");
92 static int phyaddr
= -1;
93 module_param(phyaddr
, int, S_IRUGO
);
94 MODULE_PARM_DESC(phyaddr
, "Physical device address");
96 #define DMA_TX_SIZE 256
97 static int dma_txsize
= DMA_TX_SIZE
;
98 module_param(dma_txsize
, int, S_IRUGO
| S_IWUSR
);
99 MODULE_PARM_DESC(dma_txsize
, "Number of descriptors in the TX list");
101 #define DMA_RX_SIZE 256
102 static int dma_rxsize
= DMA_RX_SIZE
;
103 module_param(dma_rxsize
, int, S_IRUGO
| S_IWUSR
);
104 MODULE_PARM_DESC(dma_rxsize
, "Number of descriptors in the RX list");
106 static int flow_ctrl
= FLOW_OFF
;
107 module_param(flow_ctrl
, int, S_IRUGO
| S_IWUSR
);
108 MODULE_PARM_DESC(flow_ctrl
, "Flow control ability [on/off]");
110 static int pause
= PAUSE_TIME
;
111 module_param(pause
, int, S_IRUGO
| S_IWUSR
);
112 MODULE_PARM_DESC(pause
, "Flow Control Pause Time");
114 #define TC_DEFAULT 64
115 static int tc
= TC_DEFAULT
;
116 module_param(tc
, int, S_IRUGO
| S_IWUSR
);
117 MODULE_PARM_DESC(tc
, "DMA threshold control value");
119 #define RX_NO_COALESCE 1 /* Always interrupt on completion */
120 #define TX_NO_COALESCE -1 /* No moderation by default */
122 /* Pay attention to tune this parameter; take care of both
123 * hardware capability and network stabitily/performance impact.
124 * Many tests showed that ~4ms latency seems to be good enough. */
125 #ifdef CONFIG_STMMAC_TIMER
126 #define DEFAULT_PERIODIC_RATE 256
127 static int tmrate
= DEFAULT_PERIODIC_RATE
;
128 module_param(tmrate
, int, S_IRUGO
| S_IWUSR
);
129 MODULE_PARM_DESC(tmrate
, "External timer freq. (default: 256Hz)");
132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
133 static int buf_sz
= DMA_BUFFER_SIZE
;
134 module_param(buf_sz
, int, S_IRUGO
| S_IWUSR
);
135 MODULE_PARM_DESC(buf_sz
, "DMA buffer size");
137 static const u32 default_msg_level
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
138 NETIF_MSG_LINK
| NETIF_MSG_IFUP
|
139 NETIF_MSG_IFDOWN
| NETIF_MSG_TIMER
);
141 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
);
144 * stmmac_verify_args - verify the driver parameters.
145 * Description: it verifies if some wrong parameter is passed to the driver.
146 * Note that wrong parameters are replaced with the default values.
148 static void stmmac_verify_args(void)
150 if (unlikely(watchdog
< 0))
152 if (unlikely(dma_rxsize
< 0))
153 dma_rxsize
= DMA_RX_SIZE
;
154 if (unlikely(dma_txsize
< 0))
155 dma_txsize
= DMA_TX_SIZE
;
156 if (unlikely((buf_sz
< DMA_BUFFER_SIZE
) || (buf_sz
> BUF_SIZE_16KiB
)))
157 buf_sz
= DMA_BUFFER_SIZE
;
158 if (unlikely(flow_ctrl
> 1))
159 flow_ctrl
= FLOW_AUTO
;
160 else if (likely(flow_ctrl
< 0))
161 flow_ctrl
= FLOW_OFF
;
162 if (unlikely((pause
< 0) || (pause
> 0xffff)))
166 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
167 static void print_pkt(unsigned char *buf
, int len
)
170 pr_info("len = %d byte, buf addr: 0x%p", len
, buf
);
171 for (j
= 0; j
< len
; j
++) {
173 pr_info("\n %03x:", j
);
174 pr_info(" %02x", buf
[j
]);
180 /* minimum number of free TX descriptors required to wake up TX process */
181 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
183 static inline u32
stmmac_tx_avail(struct stmmac_priv
*priv
)
185 return priv
->dirty_tx
+ priv
->dma_tx_size
- priv
->cur_tx
- 1;
188 /* On some ST platforms, some HW system configuraton registers have to be
189 * set according to the link speed negotiated.
191 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv
*priv
)
193 struct phy_device
*phydev
= priv
->phydev
;
195 if (likely(priv
->plat
->fix_mac_speed
))
196 priv
->plat
->fix_mac_speed(priv
->plat
->bsp_priv
,
202 * @dev: net device structure
203 * Description: it adjusts the link parameters.
205 static void stmmac_adjust_link(struct net_device
*dev
)
207 struct stmmac_priv
*priv
= netdev_priv(dev
);
208 struct phy_device
*phydev
= priv
->phydev
;
211 unsigned int fc
= priv
->flow_ctrl
, pause_time
= priv
->pause
;
216 DBG(probe
, DEBUG
, "stmmac_adjust_link: called. address %d link %d\n",
217 phydev
->addr
, phydev
->link
);
219 spin_lock_irqsave(&priv
->lock
, flags
);
221 u32 ctrl
= readl(priv
->ioaddr
+ MAC_CTRL_REG
);
223 /* Now we make sure that we can be in full duplex mode.
224 * If not, we operate in half-duplex mode. */
225 if (phydev
->duplex
!= priv
->oldduplex
) {
227 if (!(phydev
->duplex
))
228 ctrl
&= ~priv
->hw
->link
.duplex
;
230 ctrl
|= priv
->hw
->link
.duplex
;
231 priv
->oldduplex
= phydev
->duplex
;
233 /* Flow Control operation */
235 priv
->hw
->mac
->flow_ctrl(priv
->ioaddr
, phydev
->duplex
,
238 if (phydev
->speed
!= priv
->speed
) {
240 switch (phydev
->speed
) {
242 if (likely(priv
->plat
->has_gmac
))
243 ctrl
&= ~priv
->hw
->link
.port
;
244 stmmac_hw_fix_mac_speed(priv
);
248 if (priv
->plat
->has_gmac
) {
249 ctrl
|= priv
->hw
->link
.port
;
250 if (phydev
->speed
== SPEED_100
) {
251 ctrl
|= priv
->hw
->link
.speed
;
253 ctrl
&= ~(priv
->hw
->link
.speed
);
256 ctrl
&= ~priv
->hw
->link
.port
;
258 stmmac_hw_fix_mac_speed(priv
);
261 if (netif_msg_link(priv
))
262 pr_warning("%s: Speed (%d) is not 10"
263 " or 100!\n", dev
->name
, phydev
->speed
);
267 priv
->speed
= phydev
->speed
;
270 writel(ctrl
, priv
->ioaddr
+ MAC_CTRL_REG
);
272 if (!priv
->oldlink
) {
276 } else if (priv
->oldlink
) {
280 priv
->oldduplex
= -1;
283 if (new_state
&& netif_msg_link(priv
))
284 phy_print_status(phydev
);
286 spin_unlock_irqrestore(&priv
->lock
, flags
);
288 DBG(probe
, DEBUG
, "stmmac_adjust_link: exiting\n");
292 * stmmac_init_phy - PHY initialization
293 * @dev: net device structure
294 * Description: it initializes the driver's PHY state, and attaches the PHY
299 static int stmmac_init_phy(struct net_device
*dev
)
301 struct stmmac_priv
*priv
= netdev_priv(dev
);
302 struct phy_device
*phydev
;
303 char phy_id
[MII_BUS_ID_SIZE
+ 3];
304 char bus_id
[MII_BUS_ID_SIZE
];
308 priv
->oldduplex
= -1;
310 if (priv
->phy_addr
== -1) {
311 /* We don't have a PHY, so do nothing */
315 snprintf(bus_id
, MII_BUS_ID_SIZE
, "%x", priv
->plat
->bus_id
);
316 snprintf(phy_id
, MII_BUS_ID_SIZE
+ 3, PHY_ID_FMT
, bus_id
,
318 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id
);
320 phydev
= phy_connect(dev
, phy_id
, &stmmac_adjust_link
, 0,
321 priv
->phy_interface
);
323 if (IS_ERR(phydev
)) {
324 pr_err("%s: Could not attach to PHY\n", dev
->name
);
325 return PTR_ERR(phydev
);
329 * Broken HW is sometimes missing the pull-up resistor on the
330 * MDIO line, which results in reads to non-existent devices returning
331 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
333 * Note: phydev->phy_id is the result of reading the UID PHY registers.
335 if (phydev
->phy_id
== 0) {
336 phy_disconnect(phydev
);
339 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
340 " Link = %d\n", dev
->name
, phydev
->phy_id
, phydev
->link
);
342 priv
->phydev
= phydev
;
347 static inline void stmmac_enable_mac(void __iomem
*ioaddr
)
349 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
351 value
|= MAC_RNABLE_RX
| MAC_ENABLE_TX
;
352 writel(value
, ioaddr
+ MAC_CTRL_REG
);
355 static inline void stmmac_disable_mac(void __iomem
*ioaddr
)
357 u32 value
= readl(ioaddr
+ MAC_CTRL_REG
);
359 value
&= ~(MAC_ENABLE_TX
| MAC_RNABLE_RX
);
360 writel(value
, ioaddr
+ MAC_CTRL_REG
);
365 * @p: pointer to the ring.
366 * @size: size of the ring.
367 * Description: display all the descriptors within the ring.
369 static void display_ring(struct dma_desc
*p
, int size
)
377 for (i
= 0; i
< size
; i
++) {
378 struct tmp_s
*x
= (struct tmp_s
*)(p
+ i
);
379 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
380 i
, (unsigned int)virt_to_phys(&p
[i
]),
381 (unsigned int)(x
->a
), (unsigned int)((x
->a
) >> 32),
388 * init_dma_desc_rings - init the RX/TX descriptor rings
389 * @dev: net device structure
390 * Description: this function initializes the DMA RX/TX descriptors
391 * and allocates the socket buffers.
393 static void init_dma_desc_rings(struct net_device
*dev
)
396 struct stmmac_priv
*priv
= netdev_priv(dev
);
398 unsigned int txsize
= priv
->dma_tx_size
;
399 unsigned int rxsize
= priv
->dma_rx_size
;
400 unsigned int bfsize
= priv
->dma_buf_sz
;
401 int buff2_needed
= 0, dis_ic
= 0;
403 /* Set the Buffer size according to the MTU;
404 * indeed, in case of jumbo we need to bump-up the buffer sizes.
406 if (unlikely(dev
->mtu
>= BUF_SIZE_8KiB
))
407 bfsize
= BUF_SIZE_16KiB
;
408 else if (unlikely(dev
->mtu
>= BUF_SIZE_4KiB
))
409 bfsize
= BUF_SIZE_8KiB
;
410 else if (unlikely(dev
->mtu
>= BUF_SIZE_2KiB
))
411 bfsize
= BUF_SIZE_4KiB
;
412 else if (unlikely(dev
->mtu
>= DMA_BUFFER_SIZE
))
413 bfsize
= BUF_SIZE_2KiB
;
415 bfsize
= DMA_BUFFER_SIZE
;
417 #ifdef CONFIG_STMMAC_TIMER
418 /* Disable interrupts on completion for the reception if timer is on */
419 if (likely(priv
->tm
->enable
))
422 /* If the MTU exceeds 8k so use the second buffer in the chain */
423 if (bfsize
>= BUF_SIZE_8KiB
)
426 DBG(probe
, INFO
, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
427 txsize
, rxsize
, bfsize
);
429 priv
->rx_skbuff_dma
= kmalloc(rxsize
* sizeof(dma_addr_t
), GFP_KERNEL
);
431 kmalloc(sizeof(struct sk_buff
*) * rxsize
, GFP_KERNEL
);
433 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
435 sizeof(struct dma_desc
),
438 priv
->tx_skbuff
= kmalloc(sizeof(struct sk_buff
*) * txsize
,
441 (struct dma_desc
*)dma_alloc_coherent(priv
->device
,
443 sizeof(struct dma_desc
),
447 if ((priv
->dma_rx
== NULL
) || (priv
->dma_tx
== NULL
)) {
448 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__
);
452 DBG(probe
, INFO
, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
453 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
454 dev
->name
, priv
->dma_rx
, priv
->dma_tx
,
455 (unsigned int)priv
->dma_rx_phy
, (unsigned int)priv
->dma_tx_phy
);
457 /* RX INITIALIZATION */
458 DBG(probe
, INFO
, "stmmac: SKB addresses:\n"
459 "skb\t\tskb data\tdma data\n");
461 for (i
= 0; i
< rxsize
; i
++) {
462 struct dma_desc
*p
= priv
->dma_rx
+ i
;
464 skb
= netdev_alloc_skb_ip_align(dev
, bfsize
);
465 if (unlikely(skb
== NULL
)) {
466 pr_err("%s: Rx init fails; skb is NULL\n", __func__
);
469 priv
->rx_skbuff
[i
] = skb
;
470 priv
->rx_skbuff_dma
[i
] = dma_map_single(priv
->device
, skb
->data
,
471 bfsize
, DMA_FROM_DEVICE
);
473 p
->des2
= priv
->rx_skbuff_dma
[i
];
474 if (unlikely(buff2_needed
))
475 p
->des3
= p
->des2
+ BUF_SIZE_8KiB
;
476 DBG(probe
, INFO
, "[%p]\t[%p]\t[%x]\n", priv
->rx_skbuff
[i
],
477 priv
->rx_skbuff
[i
]->data
, priv
->rx_skbuff_dma
[i
]);
480 priv
->dirty_rx
= (unsigned int)(i
- rxsize
);
481 priv
->dma_buf_sz
= bfsize
;
484 /* TX INITIALIZATION */
485 for (i
= 0; i
< txsize
; i
++) {
486 priv
->tx_skbuff
[i
] = NULL
;
487 priv
->dma_tx
[i
].des2
= 0;
492 /* Clear the Rx/Tx descriptors */
493 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, rxsize
, dis_ic
);
494 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, txsize
);
496 if (netif_msg_hw(priv
)) {
497 pr_info("RX descriptor ring:\n");
498 display_ring(priv
->dma_rx
, rxsize
);
499 pr_info("TX descriptor ring:\n");
500 display_ring(priv
->dma_tx
, txsize
);
504 static void dma_free_rx_skbufs(struct stmmac_priv
*priv
)
508 for (i
= 0; i
< priv
->dma_rx_size
; i
++) {
509 if (priv
->rx_skbuff
[i
]) {
510 dma_unmap_single(priv
->device
, priv
->rx_skbuff_dma
[i
],
511 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
512 dev_kfree_skb_any(priv
->rx_skbuff
[i
]);
514 priv
->rx_skbuff
[i
] = NULL
;
518 static void dma_free_tx_skbufs(struct stmmac_priv
*priv
)
522 for (i
= 0; i
< priv
->dma_tx_size
; i
++) {
523 if (priv
->tx_skbuff
[i
] != NULL
) {
524 struct dma_desc
*p
= priv
->dma_tx
+ i
;
526 dma_unmap_single(priv
->device
, p
->des2
,
527 priv
->hw
->desc
->get_tx_len(p
),
529 dev_kfree_skb_any(priv
->tx_skbuff
[i
]);
530 priv
->tx_skbuff
[i
] = NULL
;
535 static void free_dma_desc_resources(struct stmmac_priv
*priv
)
537 /* Release the DMA TX/RX socket buffers */
538 dma_free_rx_skbufs(priv
);
539 dma_free_tx_skbufs(priv
);
541 /* Free the region of consistent memory previously allocated for
543 dma_free_coherent(priv
->device
,
544 priv
->dma_tx_size
* sizeof(struct dma_desc
),
545 priv
->dma_tx
, priv
->dma_tx_phy
);
546 dma_free_coherent(priv
->device
,
547 priv
->dma_rx_size
* sizeof(struct dma_desc
),
548 priv
->dma_rx
, priv
->dma_rx_phy
);
549 kfree(priv
->rx_skbuff_dma
);
550 kfree(priv
->rx_skbuff
);
551 kfree(priv
->tx_skbuff
);
555 * stmmac_dma_operation_mode - HW DMA operation mode
556 * @priv : pointer to the private device structure.
557 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
558 * or Store-And-Forward capability.
560 static void stmmac_dma_operation_mode(struct stmmac_priv
*priv
)
562 if (likely((priv
->plat
->tx_coe
) && (!priv
->no_csum_insertion
))) {
563 /* In case of GMAC, SF mode has to be enabled
564 * to perform the TX COE. This depends on:
565 * 1) TX COE if actually supported
566 * 2) There is no bugged Jumbo frame support
567 * that needs to not insert csum in the TDES.
569 priv
->hw
->dma
->dma_mode(priv
->ioaddr
,
570 SF_DMA_MODE
, SF_DMA_MODE
);
573 priv
->hw
->dma
->dma_mode(priv
->ioaddr
, tc
, SF_DMA_MODE
);
578 * @priv: private driver structure
579 * Description: it reclaims resources after transmission completes.
581 static void stmmac_tx(struct stmmac_priv
*priv
)
583 unsigned int txsize
= priv
->dma_tx_size
;
585 while (priv
->dirty_tx
!= priv
->cur_tx
) {
587 unsigned int entry
= priv
->dirty_tx
% txsize
;
588 struct sk_buff
*skb
= priv
->tx_skbuff
[entry
];
589 struct dma_desc
*p
= priv
->dma_tx
+ entry
;
591 /* Check if the descriptor is owned by the DMA. */
592 if (priv
->hw
->desc
->get_tx_owner(p
))
595 /* Verify tx error by looking at the last segment */
596 last
= priv
->hw
->desc
->get_tx_ls(p
);
599 priv
->hw
->desc
->tx_status(&priv
->dev
->stats
,
602 if (likely(tx_error
== 0)) {
603 priv
->dev
->stats
.tx_packets
++;
604 priv
->xstats
.tx_pkt_n
++;
606 priv
->dev
->stats
.tx_errors
++;
608 TX_DBG("%s: curr %d, dirty %d\n", __func__
,
609 priv
->cur_tx
, priv
->dirty_tx
);
612 dma_unmap_single(priv
->device
, p
->des2
,
613 priv
->hw
->desc
->get_tx_len(p
),
615 if (unlikely(p
->des3
))
618 if (likely(skb
!= NULL
)) {
620 * If there's room in the queue (limit it to size)
621 * we add this skb back into the pool,
622 * if it's the right size.
624 if ((skb_queue_len(&priv
->rx_recycle
) <
625 priv
->dma_rx_size
) &&
626 skb_recycle_check(skb
, priv
->dma_buf_sz
))
627 __skb_queue_head(&priv
->rx_recycle
, skb
);
631 priv
->tx_skbuff
[entry
] = NULL
;
634 priv
->hw
->desc
->release_tx_desc(p
);
636 entry
= (++priv
->dirty_tx
) % txsize
;
638 if (unlikely(netif_queue_stopped(priv
->dev
) &&
639 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
))) {
640 netif_tx_lock(priv
->dev
);
641 if (netif_queue_stopped(priv
->dev
) &&
642 stmmac_tx_avail(priv
) > STMMAC_TX_THRESH(priv
)) {
643 TX_DBG("%s: restart transmit\n", __func__
);
644 netif_wake_queue(priv
->dev
);
646 netif_tx_unlock(priv
->dev
);
650 static inline void stmmac_enable_irq(struct stmmac_priv
*priv
)
652 #ifdef CONFIG_STMMAC_TIMER
653 if (likely(priv
->tm
->enable
))
654 priv
->tm
->timer_start(tmrate
);
657 priv
->hw
->dma
->enable_dma_irq(priv
->ioaddr
);
660 static inline void stmmac_disable_irq(struct stmmac_priv
*priv
)
662 #ifdef CONFIG_STMMAC_TIMER
663 if (likely(priv
->tm
->enable
))
664 priv
->tm
->timer_stop();
667 priv
->hw
->dma
->disable_dma_irq(priv
->ioaddr
);
670 static int stmmac_has_work(struct stmmac_priv
*priv
)
672 unsigned int has_work
= 0;
673 int rxret
, tx_work
= 0;
675 rxret
= priv
->hw
->desc
->get_rx_owner(priv
->dma_rx
+
676 (priv
->cur_rx
% priv
->dma_rx_size
));
678 if (priv
->dirty_tx
!= priv
->cur_tx
)
681 if (likely(!rxret
|| tx_work
))
687 static inline void _stmmac_schedule(struct stmmac_priv
*priv
)
689 if (likely(stmmac_has_work(priv
))) {
690 stmmac_disable_irq(priv
);
691 napi_schedule(&priv
->napi
);
695 #ifdef CONFIG_STMMAC_TIMER
696 void stmmac_schedule(struct net_device
*dev
)
698 struct stmmac_priv
*priv
= netdev_priv(dev
);
700 priv
->xstats
.sched_timer_n
++;
702 _stmmac_schedule(priv
);
705 static void stmmac_no_timer_started(unsigned int x
)
709 static void stmmac_no_timer_stopped(void)
716 * @priv: pointer to the private device structure
717 * Description: it cleans the descriptors and restarts the transmission
720 static void stmmac_tx_err(struct stmmac_priv
*priv
)
723 netif_stop_queue(priv
->dev
);
725 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
726 dma_free_tx_skbufs(priv
);
727 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
730 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
732 priv
->dev
->stats
.tx_errors
++;
733 netif_wake_queue(priv
->dev
);
737 static void stmmac_dma_interrupt(struct stmmac_priv
*priv
)
741 status
= priv
->hw
->dma
->dma_interrupt(priv
->ioaddr
, &priv
->xstats
);
742 if (likely(status
== handle_tx_rx
))
743 _stmmac_schedule(priv
);
745 else if (unlikely(status
== tx_hard_error_bump_tc
)) {
746 /* Try to bump up the dma threshold on this failure */
747 if (unlikely(tc
!= SF_DMA_MODE
) && (tc
<= 256)) {
749 priv
->hw
->dma
->dma_mode(priv
->ioaddr
, tc
, SF_DMA_MODE
);
750 priv
->xstats
.threshold
= tc
;
752 } else if (unlikely(status
== tx_hard_error
))
757 * stmmac_open - open entry point of the driver
758 * @dev : pointer to the device structure.
760 * This function is the open entry point of the driver.
762 * 0 on success and an appropriate (-)ve integer as defined in errno.h
765 static int stmmac_open(struct net_device
*dev
)
767 struct stmmac_priv
*priv
= netdev_priv(dev
);
770 /* Check that the MAC address is valid. If its not, refuse
771 * to bring the device up. The user must specify an
772 * address using the following linux command:
773 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
774 if (!is_valid_ether_addr(dev
->dev_addr
)) {
775 random_ether_addr(dev
->dev_addr
);
776 pr_warning("%s: generated random MAC address %pM\n", dev
->name
,
780 stmmac_verify_args();
782 #ifdef CONFIG_STMMAC_TIMER
783 priv
->tm
= kzalloc(sizeof(struct stmmac_timer
*), GFP_KERNEL
);
784 if (unlikely(priv
->tm
== NULL
)) {
785 pr_err("%s: ERROR: timer memory alloc failed\n", __func__
);
788 priv
->tm
->freq
= tmrate
;
790 /* Test if the external timer can be actually used.
791 * In case of failure continue without timer. */
792 if (unlikely((stmmac_open_ext_timer(dev
, priv
->tm
)) < 0)) {
793 pr_warning("stmmaceth: cannot attach the external timer.\n");
795 priv
->tm
->timer_start
= stmmac_no_timer_started
;
796 priv
->tm
->timer_stop
= stmmac_no_timer_stopped
;
798 priv
->tm
->enable
= 1;
800 ret
= stmmac_init_phy(dev
);
802 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__
, ret
);
806 /* Create and initialize the TX/RX descriptors chains. */
807 priv
->dma_tx_size
= STMMAC_ALIGN(dma_txsize
);
808 priv
->dma_rx_size
= STMMAC_ALIGN(dma_rxsize
);
809 priv
->dma_buf_sz
= STMMAC_ALIGN(buf_sz
);
810 init_dma_desc_rings(dev
);
812 /* DMA initialization and SW reset */
813 ret
= priv
->hw
->dma
->init(priv
->ioaddr
, priv
->plat
->pbl
,
814 priv
->dma_tx_phy
, priv
->dma_rx_phy
);
816 pr_err("%s: DMA initialization failed\n", __func__
);
820 /* Copy the MAC addr into the HW */
821 priv
->hw
->mac
->set_umac_addr(priv
->ioaddr
, dev
->dev_addr
, 0);
822 /* If required, perform hw setup of the bus. */
823 if (priv
->plat
->bus_setup
)
824 priv
->plat
->bus_setup(priv
->ioaddr
);
825 /* Initialize the MAC Core */
826 priv
->hw
->mac
->core_init(priv
->ioaddr
);
828 priv
->rx_coe
= priv
->hw
->mac
->rx_coe(priv
->ioaddr
);
830 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
831 if (priv
->plat
->tx_coe
)
832 pr_info("\tTX Checksum insertion supported\n");
833 netdev_update_features(dev
);
835 /* Initialise the MMC (if present) to disable all interrupts. */
836 writel(0xffffffff, priv
->ioaddr
+ MMC_HIGH_INTR_MASK
);
837 writel(0xffffffff, priv
->ioaddr
+ MMC_LOW_INTR_MASK
);
839 /* Request the IRQ lines */
840 ret
= request_irq(dev
->irq
, stmmac_interrupt
,
841 IRQF_SHARED
, dev
->name
, dev
);
842 if (unlikely(ret
< 0)) {
843 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
844 __func__
, dev
->irq
, ret
);
848 /* Enable the MAC Rx/Tx */
849 stmmac_enable_mac(priv
->ioaddr
);
851 /* Set the HW DMA mode and the COE */
852 stmmac_dma_operation_mode(priv
);
854 /* Extra statistics */
855 memset(&priv
->xstats
, 0, sizeof(struct stmmac_extra_stats
));
856 priv
->xstats
.threshold
= tc
;
858 /* Start the ball rolling... */
859 DBG(probe
, DEBUG
, "%s: DMA RX/TX processes started...\n", dev
->name
);
860 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
861 priv
->hw
->dma
->start_rx(priv
->ioaddr
);
863 #ifdef CONFIG_STMMAC_TIMER
864 priv
->tm
->timer_start(tmrate
);
866 /* Dump DMA/MAC registers */
867 if (netif_msg_hw(priv
)) {
868 priv
->hw
->mac
->dump_regs(priv
->ioaddr
);
869 priv
->hw
->dma
->dump_regs(priv
->ioaddr
);
873 phy_start(priv
->phydev
);
875 napi_enable(&priv
->napi
);
876 skb_queue_head_init(&priv
->rx_recycle
);
877 netif_start_queue(dev
);
882 #ifdef CONFIG_STMMAC_TIMER
886 phy_disconnect(priv
->phydev
);
892 * stmmac_release - close entry point of the driver
893 * @dev : device pointer.
895 * This is the stop entry point of the driver.
897 static int stmmac_release(struct net_device
*dev
)
899 struct stmmac_priv
*priv
= netdev_priv(dev
);
901 /* Stop and disconnect the PHY */
903 phy_stop(priv
->phydev
);
904 phy_disconnect(priv
->phydev
);
908 netif_stop_queue(dev
);
910 #ifdef CONFIG_STMMAC_TIMER
911 /* Stop and release the timer */
912 stmmac_close_ext_timer();
913 if (priv
->tm
!= NULL
)
916 napi_disable(&priv
->napi
);
917 skb_queue_purge(&priv
->rx_recycle
);
919 /* Free the IRQ lines */
920 free_irq(dev
->irq
, dev
);
922 /* Stop TX/RX DMA and clear the descriptors */
923 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
924 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
926 /* Release and free the Rx/Tx resources */
927 free_dma_desc_resources(priv
);
929 /* Disable the MAC Rx/Tx */
930 stmmac_disable_mac(priv
->ioaddr
);
932 netif_carrier_off(dev
);
937 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff
*skb
,
938 struct net_device
*dev
,
941 struct stmmac_priv
*priv
= netdev_priv(dev
);
942 unsigned int nopaged_len
= skb_headlen(skb
);
943 unsigned int txsize
= priv
->dma_tx_size
;
944 unsigned int entry
= priv
->cur_tx
% txsize
;
945 struct dma_desc
*desc
= priv
->dma_tx
+ entry
;
947 if (nopaged_len
> BUF_SIZE_8KiB
) {
949 int buf2_size
= nopaged_len
- BUF_SIZE_8KiB
;
951 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
952 BUF_SIZE_8KiB
, DMA_TO_DEVICE
);
953 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
954 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, BUF_SIZE_8KiB
,
957 entry
= (++priv
->cur_tx
) % txsize
;
958 desc
= priv
->dma_tx
+ entry
;
960 desc
->des2
= dma_map_single(priv
->device
,
961 skb
->data
+ BUF_SIZE_8KiB
,
962 buf2_size
, DMA_TO_DEVICE
);
963 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
964 priv
->hw
->desc
->prepare_tx_desc(desc
, 0, buf2_size
,
966 priv
->hw
->desc
->set_tx_owner(desc
);
967 priv
->tx_skbuff
[entry
] = NULL
;
969 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
970 nopaged_len
, DMA_TO_DEVICE
);
971 desc
->des3
= desc
->des2
+ BUF_SIZE_4KiB
;
972 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, nopaged_len
,
980 * @skb : the socket buffer
981 * @dev : device pointer
982 * Description : Tx entry point of the driver.
984 static netdev_tx_t
stmmac_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
986 struct stmmac_priv
*priv
= netdev_priv(dev
);
987 unsigned int txsize
= priv
->dma_tx_size
;
989 int i
, csum_insertion
= 0;
990 int nfrags
= skb_shinfo(skb
)->nr_frags
;
991 struct dma_desc
*desc
, *first
;
993 if (unlikely(stmmac_tx_avail(priv
) < nfrags
+ 1)) {
994 if (!netif_queue_stopped(dev
)) {
995 netif_stop_queue(dev
);
996 /* This is a hard error, log it. */
997 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1000 return NETDEV_TX_BUSY
;
1003 entry
= priv
->cur_tx
% txsize
;
1005 #ifdef STMMAC_XMIT_DEBUG
1006 if ((skb
->len
> ETH_FRAME_LEN
) || nfrags
)
1007 pr_info("stmmac xmit:\n"
1008 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1009 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1010 skb
, skb
->len
, skb_headlen(skb
), nfrags
, skb
->ip_summed
,
1011 !skb_is_gso(skb
) ? "isn't" : "is");
1014 csum_insertion
= (skb
->ip_summed
== CHECKSUM_PARTIAL
);
1016 desc
= priv
->dma_tx
+ entry
;
1019 #ifdef STMMAC_XMIT_DEBUG
1020 if ((nfrags
> 0) || (skb
->len
> ETH_FRAME_LEN
))
1021 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1022 "\t\tn_frags: %d, ip_summed: %d\n",
1023 skb
->len
, skb_headlen(skb
), nfrags
, skb
->ip_summed
);
1025 priv
->tx_skbuff
[entry
] = skb
;
1026 if (unlikely(skb
->len
>= BUF_SIZE_4KiB
)) {
1027 entry
= stmmac_handle_jumbo_frames(skb
, dev
, csum_insertion
);
1028 desc
= priv
->dma_tx
+ entry
;
1030 unsigned int nopaged_len
= skb_headlen(skb
);
1031 desc
->des2
= dma_map_single(priv
->device
, skb
->data
,
1032 nopaged_len
, DMA_TO_DEVICE
);
1033 priv
->hw
->desc
->prepare_tx_desc(desc
, 1, nopaged_len
,
1037 for (i
= 0; i
< nfrags
; i
++) {
1038 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
1039 int len
= frag
->size
;
1041 entry
= (++priv
->cur_tx
) % txsize
;
1042 desc
= priv
->dma_tx
+ entry
;
1044 TX_DBG("\t[entry %d] segment len: %d\n", entry
, len
);
1045 desc
->des2
= dma_map_page(priv
->device
, frag
->page
,
1047 len
, DMA_TO_DEVICE
);
1048 priv
->tx_skbuff
[entry
] = NULL
;
1049 priv
->hw
->desc
->prepare_tx_desc(desc
, 0, len
, csum_insertion
);
1050 priv
->hw
->desc
->set_tx_owner(desc
);
1053 /* Interrupt on completition only for the latest segment */
1054 priv
->hw
->desc
->close_tx_desc(desc
);
1056 #ifdef CONFIG_STMMAC_TIMER
1057 /* Clean IC while using timer */
1058 if (likely(priv
->tm
->enable
))
1059 priv
->hw
->desc
->clear_tx_ic(desc
);
1061 /* To avoid raise condition */
1062 priv
->hw
->desc
->set_tx_owner(first
);
1066 #ifdef STMMAC_XMIT_DEBUG
1067 if (netif_msg_pktdata(priv
)) {
1068 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1069 "first=%p, nfrags=%d\n",
1070 (priv
->cur_tx
% txsize
), (priv
->dirty_tx
% txsize
),
1071 entry
, first
, nfrags
);
1072 display_ring(priv
->dma_tx
, txsize
);
1073 pr_info(">>> frame to be transmitted: ");
1074 print_pkt(skb
->data
, skb
->len
);
1077 if (unlikely(stmmac_tx_avail(priv
) <= (MAX_SKB_FRAGS
+ 1))) {
1078 TX_DBG("%s: stop transmitted packets\n", __func__
);
1079 netif_stop_queue(dev
);
1082 dev
->stats
.tx_bytes
+= skb
->len
;
1084 priv
->hw
->dma
->enable_dma_transmission(priv
->ioaddr
);
1086 return NETDEV_TX_OK
;
1089 static inline void stmmac_rx_refill(struct stmmac_priv
*priv
)
1091 unsigned int rxsize
= priv
->dma_rx_size
;
1092 int bfsize
= priv
->dma_buf_sz
;
1093 struct dma_desc
*p
= priv
->dma_rx
;
1095 for (; priv
->cur_rx
- priv
->dirty_rx
> 0; priv
->dirty_rx
++) {
1096 unsigned int entry
= priv
->dirty_rx
% rxsize
;
1097 if (likely(priv
->rx_skbuff
[entry
] == NULL
)) {
1098 struct sk_buff
*skb
;
1100 skb
= __skb_dequeue(&priv
->rx_recycle
);
1102 skb
= netdev_alloc_skb_ip_align(priv
->dev
,
1105 if (unlikely(skb
== NULL
))
1108 priv
->rx_skbuff
[entry
] = skb
;
1109 priv
->rx_skbuff_dma
[entry
] =
1110 dma_map_single(priv
->device
, skb
->data
, bfsize
,
1113 (p
+ entry
)->des2
= priv
->rx_skbuff_dma
[entry
];
1114 if (unlikely(priv
->plat
->has_gmac
)) {
1115 if (bfsize
>= BUF_SIZE_8KiB
)
1117 (p
+ entry
)->des2
+ BUF_SIZE_8KiB
;
1119 RX_DBG(KERN_INFO
"\trefill entry #%d\n", entry
);
1121 priv
->hw
->desc
->set_rx_owner(p
+ entry
);
1125 static int stmmac_rx(struct stmmac_priv
*priv
, int limit
)
1127 unsigned int rxsize
= priv
->dma_rx_size
;
1128 unsigned int entry
= priv
->cur_rx
% rxsize
;
1129 unsigned int next_entry
;
1130 unsigned int count
= 0;
1131 struct dma_desc
*p
= priv
->dma_rx
+ entry
;
1132 struct dma_desc
*p_next
;
1134 #ifdef STMMAC_RX_DEBUG
1135 if (netif_msg_hw(priv
)) {
1136 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1137 display_ring(priv
->dma_rx
, rxsize
);
1141 while (!priv
->hw
->desc
->get_rx_owner(p
)) {
1149 next_entry
= (++priv
->cur_rx
) % rxsize
;
1150 p_next
= priv
->dma_rx
+ next_entry
;
1153 /* read the status of the incoming frame */
1154 status
= (priv
->hw
->desc
->rx_status(&priv
->dev
->stats
,
1156 if (unlikely(status
== discard_frame
))
1157 priv
->dev
->stats
.rx_errors
++;
1159 struct sk_buff
*skb
;
1162 frame_len
= priv
->hw
->desc
->get_rx_frame_len(p
);
1163 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1164 * Type frames (LLC/LLC-SNAP) */
1165 if (unlikely(status
!= llc_snap
))
1166 frame_len
-= ETH_FCS_LEN
;
1167 #ifdef STMMAC_RX_DEBUG
1168 if (frame_len
> ETH_FRAME_LEN
)
1169 pr_debug("\tRX frame size %d, COE status: %d\n",
1172 if (netif_msg_hw(priv
))
1173 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1176 skb
= priv
->rx_skbuff
[entry
];
1177 if (unlikely(!skb
)) {
1178 pr_err("%s: Inconsistent Rx descriptor chain\n",
1180 priv
->dev
->stats
.rx_dropped
++;
1183 prefetch(skb
->data
- NET_IP_ALIGN
);
1184 priv
->rx_skbuff
[entry
] = NULL
;
1186 skb_put(skb
, frame_len
);
1187 dma_unmap_single(priv
->device
,
1188 priv
->rx_skbuff_dma
[entry
],
1189 priv
->dma_buf_sz
, DMA_FROM_DEVICE
);
1190 #ifdef STMMAC_RX_DEBUG
1191 if (netif_msg_pktdata(priv
)) {
1192 pr_info(" frame received (%dbytes)", frame_len
);
1193 print_pkt(skb
->data
, frame_len
);
1196 skb
->protocol
= eth_type_trans(skb
, priv
->dev
);
1198 if (unlikely(status
== csum_none
)) {
1199 /* always for the old mac 10/100 */
1200 skb_checksum_none_assert(skb
);
1201 netif_receive_skb(skb
);
1203 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1204 napi_gro_receive(&priv
->napi
, skb
);
1207 priv
->dev
->stats
.rx_packets
++;
1208 priv
->dev
->stats
.rx_bytes
+= frame_len
;
1211 p
= p_next
; /* use prefetched values */
1214 stmmac_rx_refill(priv
);
1216 priv
->xstats
.rx_pkt_n
+= count
;
1222 * stmmac_poll - stmmac poll method (NAPI)
1223 * @napi : pointer to the napi structure.
1224 * @budget : maximum number of packets that the current CPU can receive from
1227 * This function implements the the reception process.
1228 * Also it runs the TX completion thread
1230 static int stmmac_poll(struct napi_struct
*napi
, int budget
)
1232 struct stmmac_priv
*priv
= container_of(napi
, struct stmmac_priv
, napi
);
1235 priv
->xstats
.poll_n
++;
1237 work_done
= stmmac_rx(priv
, budget
);
1239 if (work_done
< budget
) {
1240 napi_complete(napi
);
1241 stmmac_enable_irq(priv
);
1248 * @dev : Pointer to net device structure
1249 * Description: this function is called when a packet transmission fails to
1250 * complete within a reasonable tmrate. The driver will mark the error in the
1251 * netdev structure and arrange for the device to be reset to a sane state
1252 * in order to transmit a new packet.
1254 static void stmmac_tx_timeout(struct net_device
*dev
)
1256 struct stmmac_priv
*priv
= netdev_priv(dev
);
1258 /* Clear Tx resources and restart transmitting again */
1259 stmmac_tx_err(priv
);
1262 /* Configuration changes (passed on by ifconfig) */
1263 static int stmmac_config(struct net_device
*dev
, struct ifmap
*map
)
1265 if (dev
->flags
& IFF_UP
) /* can't act on a running interface */
1268 /* Don't allow changing the I/O address */
1269 if (map
->base_addr
!= dev
->base_addr
) {
1270 pr_warning("%s: can't change I/O address\n", dev
->name
);
1274 /* Don't allow changing the IRQ */
1275 if (map
->irq
!= dev
->irq
) {
1276 pr_warning("%s: can't change IRQ number %d\n",
1277 dev
->name
, dev
->irq
);
1281 /* ignore other fields */
1286 * stmmac_multicast_list - entry point for multicast addressing
1287 * @dev : pointer to the device structure
1289 * This function is a driver entry point which gets called by the kernel
1290 * whenever multicast addresses must be enabled/disabled.
1294 static void stmmac_multicast_list(struct net_device
*dev
)
1296 struct stmmac_priv
*priv
= netdev_priv(dev
);
1298 spin_lock(&priv
->lock
);
1299 priv
->hw
->mac
->set_filter(dev
);
1300 spin_unlock(&priv
->lock
);
1304 * stmmac_change_mtu - entry point to change MTU size for the device.
1305 * @dev : device pointer.
1306 * @new_mtu : the new MTU size for the device.
1307 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1308 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1309 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1311 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1314 static int stmmac_change_mtu(struct net_device
*dev
, int new_mtu
)
1316 struct stmmac_priv
*priv
= netdev_priv(dev
);
1319 if (netif_running(dev
)) {
1320 pr_err("%s: must be stopped to change its MTU\n", dev
->name
);
1324 if (priv
->plat
->has_gmac
)
1325 max_mtu
= JUMBO_LEN
;
1327 max_mtu
= ETH_DATA_LEN
;
1329 if ((new_mtu
< 46) || (new_mtu
> max_mtu
)) {
1330 pr_err("%s: invalid MTU, max MTU is: %d\n", dev
->name
, max_mtu
);
1335 netdev_update_features(dev
);
1340 static u32
stmmac_fix_features(struct net_device
*dev
, u32 features
)
1342 struct stmmac_priv
*priv
= netdev_priv(dev
);
1345 features
&= ~NETIF_F_RXCSUM
;
1346 if (!priv
->plat
->tx_coe
)
1347 features
&= ~NETIF_F_ALL_CSUM
;
1349 /* Some GMAC devices have a bugged Jumbo frame support that
1350 * needs to have the Tx COE disabled for oversized frames
1351 * (due to limited buffer sizes). In this case we disable
1352 * the TX csum insertionin the TDES and not use SF. */
1353 if (priv
->plat
->bugged_jumbo
&& (dev
->mtu
> ETH_DATA_LEN
))
1354 features
&= ~NETIF_F_ALL_CSUM
;
1359 static irqreturn_t
stmmac_interrupt(int irq
, void *dev_id
)
1361 struct net_device
*dev
= (struct net_device
*)dev_id
;
1362 struct stmmac_priv
*priv
= netdev_priv(dev
);
1364 if (unlikely(!dev
)) {
1365 pr_err("%s: invalid dev pointer\n", __func__
);
1369 if (priv
->plat
->has_gmac
)
1370 /* To handle GMAC own interrupts */
1371 priv
->hw
->mac
->host_irq_status((void __iomem
*) dev
->base_addr
);
1373 stmmac_dma_interrupt(priv
);
1378 #ifdef CONFIG_NET_POLL_CONTROLLER
1379 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1380 * to allow network I/O with interrupts disabled. */
1381 static void stmmac_poll_controller(struct net_device
*dev
)
1383 disable_irq(dev
->irq
);
1384 stmmac_interrupt(dev
->irq
, dev
);
1385 enable_irq(dev
->irq
);
1390 * stmmac_ioctl - Entry point for the Ioctl
1391 * @dev: Device pointer.
1392 * @rq: An IOCTL specefic structure, that can contain a pointer to
1393 * a proprietary structure used to pass information to the driver.
1394 * @cmd: IOCTL command
1396 * Currently there are no special functionality supported in IOCTL, just the
1397 * phy_mii_ioctl(...) can be invoked.
1399 static int stmmac_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1401 struct stmmac_priv
*priv
= netdev_priv(dev
);
1404 if (!netif_running(dev
))
1410 spin_lock(&priv
->lock
);
1411 ret
= phy_mii_ioctl(priv
->phydev
, rq
, cmd
);
1412 spin_unlock(&priv
->lock
);
1417 #ifdef STMMAC_VLAN_TAG_USED
1418 static void stmmac_vlan_rx_register(struct net_device
*dev
,
1419 struct vlan_group
*grp
)
1421 struct stmmac_priv
*priv
= netdev_priv(dev
);
1423 DBG(probe
, INFO
, "%s: Setting vlgrp to %p\n", dev
->name
, grp
);
1425 spin_lock(&priv
->lock
);
1427 spin_unlock(&priv
->lock
);
1431 static const struct net_device_ops stmmac_netdev_ops
= {
1432 .ndo_open
= stmmac_open
,
1433 .ndo_start_xmit
= stmmac_xmit
,
1434 .ndo_stop
= stmmac_release
,
1435 .ndo_change_mtu
= stmmac_change_mtu
,
1436 .ndo_fix_features
= stmmac_fix_features
,
1437 .ndo_set_multicast_list
= stmmac_multicast_list
,
1438 .ndo_tx_timeout
= stmmac_tx_timeout
,
1439 .ndo_do_ioctl
= stmmac_ioctl
,
1440 .ndo_set_config
= stmmac_config
,
1441 #ifdef STMMAC_VLAN_TAG_USED
1442 .ndo_vlan_rx_register
= stmmac_vlan_rx_register
,
1444 #ifdef CONFIG_NET_POLL_CONTROLLER
1445 .ndo_poll_controller
= stmmac_poll_controller
,
1447 .ndo_set_mac_address
= eth_mac_addr
,
1451 * stmmac_probe - Initialization of the adapter .
1452 * @dev : device pointer
1453 * Description: The function initializes the network device structure for
1454 * the STMMAC driver. It also calls the low level routines
1455 * in order to init the HW (i.e. the DMA engine)
1457 static int stmmac_probe(struct net_device
*dev
)
1460 struct stmmac_priv
*priv
= netdev_priv(dev
);
1464 dev
->netdev_ops
= &stmmac_netdev_ops
;
1465 stmmac_set_ethtool_ops(dev
);
1467 dev
->hw_features
= NETIF_F_SG
| NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
1468 dev
->features
|= dev
->hw_features
| NETIF_F_HIGHDMA
;
1469 dev
->watchdog_timeo
= msecs_to_jiffies(watchdog
);
1470 #ifdef STMMAC_VLAN_TAG_USED
1471 /* Both mac100 and gmac support receive VLAN tag detection */
1472 dev
->features
|= NETIF_F_HW_VLAN_RX
;
1474 priv
->msg_enable
= netif_msg_init(debug
, default_msg_level
);
1477 priv
->flow_ctrl
= FLOW_AUTO
; /* RX/TX pause on */
1479 priv
->pause
= pause
;
1480 netif_napi_add(dev
, &priv
->napi
, stmmac_poll
, 64);
1482 /* Get the MAC address */
1483 priv
->hw
->mac
->get_umac_addr((void __iomem
*) dev
->base_addr
,
1486 if (!is_valid_ether_addr(dev
->dev_addr
))
1487 pr_warning("\tno valid MAC address;"
1488 "please, use ifconfig or nwhwconfig!\n");
1490 spin_lock_init(&priv
->lock
);
1492 ret
= register_netdev(dev
);
1494 pr_err("%s: ERROR %i registering the device\n",
1499 DBG(probe
, DEBUG
, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1500 dev
->name
, (dev
->features
& NETIF_F_SG
) ? "on" : "off",
1501 (dev
->features
& NETIF_F_IP_CSUM
) ? "on" : "off");
1507 * stmmac_mac_device_setup
1508 * @dev : device pointer
1509 * Description: select and initialise the mac device (mac100 or Gmac).
1511 static int stmmac_mac_device_setup(struct net_device
*dev
)
1513 struct stmmac_priv
*priv
= netdev_priv(dev
);
1515 struct mac_device_info
*device
;
1517 if (priv
->plat
->has_gmac
)
1518 device
= dwmac1000_setup(priv
->ioaddr
);
1520 device
= dwmac100_setup(priv
->ioaddr
);
1525 if (priv
->plat
->enh_desc
) {
1526 device
->desc
= &enh_desc_ops
;
1527 pr_info("\tEnhanced descriptor structure\n");
1529 device
->desc
= &ndesc_ops
;
1533 if (device_can_wakeup(priv
->device
)) {
1534 priv
->wolopts
= WAKE_MAGIC
; /* Magic Frame as default */
1535 enable_irq_wake(dev
->irq
);
1541 static int stmmacphy_dvr_probe(struct platform_device
*pdev
)
1543 struct plat_stmmacphy_data
*plat_dat
= pdev
->dev
.platform_data
;
1545 pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1551 static int stmmacphy_dvr_remove(struct platform_device
*pdev
)
1556 static struct platform_driver stmmacphy_driver
= {
1558 .name
= PHY_RESOURCE_NAME
,
1560 .probe
= stmmacphy_dvr_probe
,
1561 .remove
= stmmacphy_dvr_remove
,
1565 * stmmac_associate_phy
1566 * @dev: pointer to device structure
1567 * @data: points to the private structure.
1568 * Description: Scans through all the PHYs we have registered and checks if
1569 * any are associated with our MAC. If so, then just fill in
1570 * the blanks in our local context structure
1572 static int stmmac_associate_phy(struct device
*dev
, void *data
)
1574 struct stmmac_priv
*priv
= (struct stmmac_priv
*)data
;
1575 struct plat_stmmacphy_data
*plat_dat
= dev
->platform_data
;
1577 DBG(probe
, DEBUG
, "%s: checking phy for bus %d\n", __func__
,
1580 /* Check that this phy is for the MAC being initialised */
1581 if (priv
->plat
->bus_id
!= plat_dat
->bus_id
)
1584 /* OK, this PHY is connected to the MAC.
1585 Go ahead and get the parameters */
1586 DBG(probe
, DEBUG
, "%s: OK. Found PHY config\n", __func__
);
1588 platform_get_irq_byname(to_platform_device(dev
), "phyirq");
1589 DBG(probe
, DEBUG
, "%s: PHY irq on bus %d is %d\n", __func__
,
1590 plat_dat
->bus_id
, priv
->phy_irq
);
1592 /* Override with kernel parameters if supplied XXX CRS XXX
1593 * this needs to have multiple instances */
1594 if ((phyaddr
>= 0) && (phyaddr
<= 31))
1595 plat_dat
->phy_addr
= phyaddr
;
1597 priv
->phy_addr
= plat_dat
->phy_addr
;
1598 priv
->phy_mask
= plat_dat
->phy_mask
;
1599 priv
->phy_interface
= plat_dat
->interface
;
1600 priv
->phy_reset
= plat_dat
->phy_reset
;
1602 DBG(probe
, DEBUG
, "%s: exiting\n", __func__
);
1603 return 1; /* forces exit of driver_for_each_device() */
1608 * @pdev: platform device pointer
1609 * Description: the driver is initialized through platform_device.
1611 static int stmmac_dvr_probe(struct platform_device
*pdev
)
1614 struct resource
*res
;
1615 void __iomem
*addr
= NULL
;
1616 struct net_device
*ndev
= NULL
;
1617 struct stmmac_priv
*priv
= NULL
;
1618 struct plat_stmmacenet_data
*plat_dat
;
1620 pr_info("STMMAC driver:\n\tplatform registration... ");
1621 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1624 pr_info("\tdone!\n");
1626 if (!request_mem_region(res
->start
, resource_size(res
),
1628 pr_err("%s: ERROR: memory allocation failed"
1629 "cannot get the I/O addr 0x%x\n",
1630 __func__
, (unsigned int)res
->start
);
1634 addr
= ioremap(res
->start
, resource_size(res
));
1636 pr_err("%s: ERROR: memory mapping failed\n", __func__
);
1638 goto out_release_region
;
1641 ndev
= alloc_etherdev(sizeof(struct stmmac_priv
));
1643 pr_err("%s: ERROR: allocating the device\n", __func__
);
1648 SET_NETDEV_DEV(ndev
, &pdev
->dev
);
1650 /* Get the MAC information */
1651 ndev
->irq
= platform_get_irq_byname(pdev
, "macirq");
1652 if (ndev
->irq
== -ENXIO
) {
1653 pr_err("%s: ERROR: MAC IRQ configuration "
1654 "information not found\n", __func__
);
1659 priv
= netdev_priv(ndev
);
1660 priv
->device
= &(pdev
->dev
);
1662 plat_dat
= pdev
->dev
.platform_data
;
1664 priv
->plat
= plat_dat
;
1666 priv
->ioaddr
= addr
;
1668 /* PMT module is not integrated in all the MAC devices. */
1669 if (plat_dat
->pmt
) {
1670 pr_info("\tPMT module supported\n");
1671 device_set_wakeup_capable(&pdev
->dev
, 1);
1674 platform_set_drvdata(pdev
, ndev
);
1676 /* Set the I/O base addr */
1677 ndev
->base_addr
= (unsigned long)addr
;
1679 /* Custom initialisation */
1680 if (priv
->plat
->init
) {
1681 ret
= priv
->plat
->init(pdev
);
1686 /* MAC HW revice detection */
1687 ret
= stmmac_mac_device_setup(ndev
);
1691 /* Network Device Registration */
1692 ret
= stmmac_probe(ndev
);
1696 /* associate a PHY - it is provided by another platform bus */
1697 if (!driver_for_each_device
1698 (&(stmmacphy_driver
.driver
), NULL
, (void *)priv
,
1699 stmmac_associate_phy
)) {
1700 pr_err("No PHY device is associated with this MAC!\n");
1702 goto out_unregister
;
1705 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1706 "\tIO base addr: 0x%p)\n", ndev
->name
, pdev
->name
,
1707 pdev
->id
, ndev
->irq
, addr
);
1709 /* MDIO bus Registration */
1710 pr_debug("\tMDIO bus (id: %d)...", priv
->plat
->bus_id
);
1711 ret
= stmmac_mdio_register(ndev
);
1713 goto out_unregister
;
1714 pr_debug("registered!\n");
1718 unregister_netdev(ndev
);
1720 if (priv
->plat
->exit
)
1721 priv
->plat
->exit(pdev
);
1724 platform_set_drvdata(pdev
, NULL
);
1728 release_mem_region(res
->start
, resource_size(res
));
1735 * @pdev: platform device pointer
1736 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1737 * changes the link status, releases the DMA descriptor rings,
1738 * unregisters the MDIO bus and unmaps the allocated memory.
1740 static int stmmac_dvr_remove(struct platform_device
*pdev
)
1742 struct net_device
*ndev
= platform_get_drvdata(pdev
);
1743 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1744 struct resource
*res
;
1746 pr_info("%s:\n\tremoving driver", __func__
);
1748 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
1749 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
1751 stmmac_disable_mac(priv
->ioaddr
);
1753 netif_carrier_off(ndev
);
1755 stmmac_mdio_unregister(ndev
);
1757 if (priv
->plat
->exit
)
1758 priv
->plat
->exit(pdev
);
1760 platform_set_drvdata(pdev
, NULL
);
1761 unregister_netdev(ndev
);
1763 iounmap((void *)priv
->ioaddr
);
1764 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1765 release_mem_region(res
->start
, resource_size(res
));
1773 static int stmmac_suspend(struct device
*dev
)
1775 struct net_device
*ndev
= dev_get_drvdata(dev
);
1776 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1779 if (!ndev
|| !netif_running(ndev
))
1782 spin_lock(&priv
->lock
);
1784 netif_device_detach(ndev
);
1785 netif_stop_queue(ndev
);
1787 phy_stop(priv
->phydev
);
1789 #ifdef CONFIG_STMMAC_TIMER
1790 priv
->tm
->timer_stop();
1791 if (likely(priv
->tm
->enable
))
1794 napi_disable(&priv
->napi
);
1796 /* Stop TX/RX DMA */
1797 priv
->hw
->dma
->stop_tx(priv
->ioaddr
);
1798 priv
->hw
->dma
->stop_rx(priv
->ioaddr
);
1799 /* Clear the Rx/Tx descriptors */
1800 priv
->hw
->desc
->init_rx_desc(priv
->dma_rx
, priv
->dma_rx_size
,
1802 priv
->hw
->desc
->init_tx_desc(priv
->dma_tx
, priv
->dma_tx_size
);
1804 /* Enable Power down mode by programming the PMT regs */
1805 if (device_may_wakeup(priv
->device
))
1806 priv
->hw
->mac
->pmt(priv
->ioaddr
, priv
->wolopts
);
1808 stmmac_disable_mac(priv
->ioaddr
);
1810 spin_unlock(&priv
->lock
);
1814 static int stmmac_resume(struct device
*dev
)
1816 struct net_device
*ndev
= dev_get_drvdata(dev
);
1817 struct stmmac_priv
*priv
= netdev_priv(ndev
);
1819 if (!netif_running(ndev
))
1822 spin_lock(&priv
->lock
);
1824 /* Power Down bit, into the PM register, is cleared
1825 * automatically as soon as a magic packet or a Wake-up frame
1826 * is received. Anyway, it's better to manually clear
1827 * this bit because it can generate problems while resuming
1828 * from another devices (e.g. serial console). */
1829 if (device_may_wakeup(priv
->device
))
1830 priv
->hw
->mac
->pmt(priv
->ioaddr
, 0);
1832 netif_device_attach(ndev
);
1834 /* Enable the MAC and DMA */
1835 stmmac_enable_mac(priv
->ioaddr
);
1836 priv
->hw
->dma
->start_tx(priv
->ioaddr
);
1837 priv
->hw
->dma
->start_rx(priv
->ioaddr
);
1839 #ifdef CONFIG_STMMAC_TIMER
1840 if (likely(priv
->tm
->enable
))
1841 priv
->tm
->timer_start(tmrate
);
1843 napi_enable(&priv
->napi
);
1846 phy_start(priv
->phydev
);
1848 netif_start_queue(ndev
);
1850 spin_unlock(&priv
->lock
);
1854 static int stmmac_freeze(struct device
*dev
)
1856 struct net_device
*ndev
= dev_get_drvdata(dev
);
1858 if (!ndev
|| !netif_running(ndev
))
1861 return stmmac_release(ndev
);
1864 static int stmmac_restore(struct device
*dev
)
1866 struct net_device
*ndev
= dev_get_drvdata(dev
);
1868 if (!ndev
|| !netif_running(ndev
))
1871 return stmmac_open(ndev
);
1874 static const struct dev_pm_ops stmmac_pm_ops
= {
1875 .suspend
= stmmac_suspend
,
1876 .resume
= stmmac_resume
,
1877 .freeze
= stmmac_freeze
,
1878 .thaw
= stmmac_restore
,
1879 .restore
= stmmac_restore
,
1882 static const struct dev_pm_ops stmmac_pm_ops
;
1883 #endif /* CONFIG_PM */
1885 static struct platform_driver stmmac_driver
= {
1886 .probe
= stmmac_dvr_probe
,
1887 .remove
= stmmac_dvr_remove
,
1889 .name
= STMMAC_RESOURCE_NAME
,
1890 .owner
= THIS_MODULE
,
1891 .pm
= &stmmac_pm_ops
,
1896 * stmmac_init_module - Entry point for the driver
1897 * Description: This function is the entry point for the driver.
1899 static int __init
stmmac_init_module(void)
1903 if (platform_driver_register(&stmmacphy_driver
)) {
1904 pr_err("No PHY devices registered!\n");
1908 ret
= platform_driver_register(&stmmac_driver
);
1913 * stmmac_cleanup_module - Cleanup routine for the driver
1914 * Description: This function is the cleanup routine for the driver.
1916 static void __exit
stmmac_cleanup_module(void)
1918 platform_driver_unregister(&stmmacphy_driver
);
1919 platform_driver_unregister(&stmmac_driver
);
1923 static int __init
stmmac_cmdline_opt(char *str
)
1929 while ((opt
= strsep(&str
, ",")) != NULL
) {
1930 if (!strncmp(opt
, "debug:", 6))
1931 strict_strtoul(opt
+ 6, 0, (unsigned long *)&debug
);
1932 else if (!strncmp(opt
, "phyaddr:", 8))
1933 strict_strtoul(opt
+ 8, 0, (unsigned long *)&phyaddr
);
1934 else if (!strncmp(opt
, "dma_txsize:", 11))
1935 strict_strtoul(opt
+ 11, 0,
1936 (unsigned long *)&dma_txsize
);
1937 else if (!strncmp(opt
, "dma_rxsize:", 11))
1938 strict_strtoul(opt
+ 11, 0,
1939 (unsigned long *)&dma_rxsize
);
1940 else if (!strncmp(opt
, "buf_sz:", 7))
1941 strict_strtoul(opt
+ 7, 0, (unsigned long *)&buf_sz
);
1942 else if (!strncmp(opt
, "tc:", 3))
1943 strict_strtoul(opt
+ 3, 0, (unsigned long *)&tc
);
1944 else if (!strncmp(opt
, "watchdog:", 9))
1945 strict_strtoul(opt
+ 9, 0, (unsigned long *)&watchdog
);
1946 else if (!strncmp(opt
, "flow_ctrl:", 10))
1947 strict_strtoul(opt
+ 10, 0,
1948 (unsigned long *)&flow_ctrl
);
1949 else if (!strncmp(opt
, "pause:", 6))
1950 strict_strtoul(opt
+ 6, 0, (unsigned long *)&pause
);
1951 #ifdef CONFIG_STMMAC_TIMER
1952 else if (!strncmp(opt
, "tmrate:", 7))
1953 strict_strtoul(opt
+ 7, 0, (unsigned long *)&tmrate
);
1959 __setup("stmmaceth=", stmmac_cmdline_opt
);
1962 module_init(stmmac_init_module
);
1963 module_exit(stmmac_cleanup_module
);
1965 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1966 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1967 MODULE_LICENSE("GPL");