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[POWERPC] Add PMC type to cputable
[linux-2.6/btrfs-unstable.git] / arch / powerpc / kernel / cputable.c
blob4939b3d56dfbd2ea2c3601a9c299b933cee97f99
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
25
26 /* NOTE:
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
31 * and ppc64
32 */
33 #ifdef CONFIG_PPC32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
43 #ifdef CONFIG_PPC64
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __restore_cpu_ppc970(void);
47 #endif /* CONFIG_PPC64 */
48
49 /* This table only contains "desktop" CPUs, it need to be filled with embedded
50 * ones as well...
51 */
52 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
53 PPC_FEATURE_HAS_MMU)
54 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
55 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
56 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
57 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
58 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
62 PPC_FEATURE_TRUE_LE)
63 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
64 PPC_FEATURE_TRUE_LE | \
65 PPC_FEATURE_HAS_ALTIVEC_COMP)
66 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
67 PPC_FEATURE_BOOKE)
68
69 /* We only set the spe features if the kernel was compiled with
70 * spe support
71 */
72 #ifdef CONFIG_SPE
73 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
74 #else
75 #define PPC_FEATURE_SPE_COMP 0
76 #endif
77
78 static struct cpu_spec cpu_specs[] = {
79 #ifdef CONFIG_PPC64
80 { /* Power3 */
81 .pvr_mask = 0xffff0000,
82 .pvr_value = 0x00400000,
83 .cpu_name = "POWER3 (630)",
84 .cpu_features = CPU_FTRS_POWER3,
85 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
86 .icache_bsize = 128,
87 .dcache_bsize = 128,
88 .num_pmcs = 8,
89 .pmc_type = PPC_PMC_IBM,
90 .oprofile_cpu_type = "ppc64/power3",
91 .oprofile_type = PPC_OPROFILE_RS64,
92 .platform = "power3",
93 },
94 { /* Power3+ */
95 .pvr_mask = 0xffff0000,
96 .pvr_value = 0x00410000,
97 .cpu_name = "POWER3 (630+)",
98 .cpu_features = CPU_FTRS_POWER3,
99 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
100 .icache_bsize = 128,
101 .dcache_bsize = 128,
102 .num_pmcs = 8,
103 .pmc_type = PPC_PMC_IBM,
104 .oprofile_cpu_type = "ppc64/power3",
105 .oprofile_type = PPC_OPROFILE_RS64,
106 .platform = "power3",
107 },
108 { /* Northstar */
109 .pvr_mask = 0xffff0000,
110 .pvr_value = 0x00330000,
111 .cpu_name = "RS64-II (northstar)",
112 .cpu_features = CPU_FTRS_RS64,
113 .cpu_user_features = COMMON_USER_PPC64,
114 .icache_bsize = 128,
115 .dcache_bsize = 128,
116 .num_pmcs = 8,
117 .pmc_type = PPC_PMC_IBM,
118 .oprofile_cpu_type = "ppc64/rs64",
119 .oprofile_type = PPC_OPROFILE_RS64,
120 .platform = "rs64",
121 },
122 { /* Pulsar */
123 .pvr_mask = 0xffff0000,
124 .pvr_value = 0x00340000,
125 .cpu_name = "RS64-III (pulsar)",
126 .cpu_features = CPU_FTRS_RS64,
127 .cpu_user_features = COMMON_USER_PPC64,
128 .icache_bsize = 128,
129 .dcache_bsize = 128,
130 .num_pmcs = 8,
131 .pmc_type = PPC_PMC_IBM,
132 .oprofile_cpu_type = "ppc64/rs64",
133 .oprofile_type = PPC_OPROFILE_RS64,
134 .platform = "rs64",
135 },
136 { /* I-star */
137 .pvr_mask = 0xffff0000,
138 .pvr_value = 0x00360000,
139 .cpu_name = "RS64-III (icestar)",
140 .cpu_features = CPU_FTRS_RS64,
141 .cpu_user_features = COMMON_USER_PPC64,
142 .icache_bsize = 128,
143 .dcache_bsize = 128,
144 .num_pmcs = 8,
145 .pmc_type = PPC_PMC_IBM,
146 .oprofile_cpu_type = "ppc64/rs64",
147 .oprofile_type = PPC_OPROFILE_RS64,
148 .platform = "rs64",
149 },
150 { /* S-star */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00370000,
153 .cpu_name = "RS64-IV (sstar)",
154 .cpu_features = CPU_FTRS_RS64,
155 .cpu_user_features = COMMON_USER_PPC64,
156 .icache_bsize = 128,
157 .dcache_bsize = 128,
158 .num_pmcs = 8,
159 .pmc_type = PPC_PMC_IBM,
160 .oprofile_cpu_type = "ppc64/rs64",
161 .oprofile_type = PPC_OPROFILE_RS64,
162 .platform = "rs64",
163 },
164 { /* Power4 */
165 .pvr_mask = 0xffff0000,
166 .pvr_value = 0x00350000,
167 .cpu_name = "POWER4 (gp)",
168 .cpu_features = CPU_FTRS_POWER4,
169 .cpu_user_features = COMMON_USER_POWER4,
170 .icache_bsize = 128,
171 .dcache_bsize = 128,
172 .num_pmcs = 8,
173 .pmc_type = PPC_PMC_IBM,
174 .oprofile_cpu_type = "ppc64/power4",
175 .oprofile_type = PPC_OPROFILE_POWER4,
176 .platform = "power4",
177 },
178 { /* Power4+ */
179 .pvr_mask = 0xffff0000,
180 .pvr_value = 0x00380000,
181 .cpu_name = "POWER4+ (gq)",
182 .cpu_features = CPU_FTRS_POWER4,
183 .cpu_user_features = COMMON_USER_POWER4,
184 .icache_bsize = 128,
185 .dcache_bsize = 128,
186 .num_pmcs = 8,
187 .pmc_type = PPC_PMC_IBM,
188 .oprofile_cpu_type = "ppc64/power4",
189 .oprofile_type = PPC_OPROFILE_POWER4,
190 .platform = "power4",
191 },
192 { /* PPC970 */
193 .pvr_mask = 0xffff0000,
194 .pvr_value = 0x00390000,
195 .cpu_name = "PPC970",
196 .cpu_features = CPU_FTRS_PPC970,
197 .cpu_user_features = COMMON_USER_POWER4 |
198 PPC_FEATURE_HAS_ALTIVEC_COMP,
199 .icache_bsize = 128,
200 .dcache_bsize = 128,
201 .num_pmcs = 8,
202 .pmc_type = PPC_PMC_IBM,
203 .cpu_setup = __setup_cpu_ppc970,
204 .cpu_restore = __restore_cpu_ppc970,
205 .oprofile_cpu_type = "ppc64/970",
206 .oprofile_type = PPC_OPROFILE_POWER4,
207 .platform = "ppc970",
208 },
209 { /* PPC970FX */
210 .pvr_mask = 0xffff0000,
211 .pvr_value = 0x003c0000,
212 .cpu_name = "PPC970FX",
213 .cpu_features = CPU_FTRS_PPC970,
214 .cpu_user_features = COMMON_USER_POWER4 |
215 PPC_FEATURE_HAS_ALTIVEC_COMP,
216 .icache_bsize = 128,
217 .dcache_bsize = 128,
218 .num_pmcs = 8,
219 .pmc_type = PPC_PMC_IBM,
220 .cpu_setup = __setup_cpu_ppc970,
221 .cpu_restore = __restore_cpu_ppc970,
222 .oprofile_cpu_type = "ppc64/970",
223 .oprofile_type = PPC_OPROFILE_POWER4,
224 .platform = "ppc970",
225 },
226 { /* PPC970MP */
227 .pvr_mask = 0xffff0000,
228 .pvr_value = 0x00440000,
229 .cpu_name = "PPC970MP",
230 .cpu_features = CPU_FTRS_PPC970,
231 .cpu_user_features = COMMON_USER_POWER4 |
232 PPC_FEATURE_HAS_ALTIVEC_COMP,
233 .icache_bsize = 128,
234 .dcache_bsize = 128,
235 .num_pmcs = 8,
236 .cpu_setup = __setup_cpu_ppc970MP,
237 .cpu_restore = __restore_cpu_ppc970,
238 .oprofile_cpu_type = "ppc64/970MP",
239 .oprofile_type = PPC_OPROFILE_POWER4,
240 .platform = "ppc970",
241 },
242 { /* PPC970GX */
243 .pvr_mask = 0xffff0000,
244 .pvr_value = 0x00450000,
245 .cpu_name = "PPC970GX",
246 .cpu_features = CPU_FTRS_PPC970,
247 .cpu_user_features = COMMON_USER_POWER4 |
248 PPC_FEATURE_HAS_ALTIVEC_COMP,
249 .icache_bsize = 128,
250 .dcache_bsize = 128,
251 .num_pmcs = 8,
252 .pmc_type = PPC_PMC_IBM,
253 .cpu_setup = __setup_cpu_ppc970,
254 .oprofile_cpu_type = "ppc64/970",
255 .oprofile_type = PPC_OPROFILE_POWER4,
256 .platform = "ppc970",
257 },
258 { /* Power5 GR */
259 .pvr_mask = 0xffff0000,
260 .pvr_value = 0x003a0000,
261 .cpu_name = "POWER5 (gr)",
262 .cpu_features = CPU_FTRS_POWER5,
263 .cpu_user_features = COMMON_USER_POWER5,
264 .icache_bsize = 128,
265 .dcache_bsize = 128,
266 .num_pmcs = 6,
267 .pmc_type = PPC_PMC_IBM,
268 .oprofile_cpu_type = "ppc64/power5",
269 .oprofile_type = PPC_OPROFILE_POWER4,
270 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
271 * and above but only works on POWER5 and above
272 */
273 .oprofile_mmcra_sihv = MMCRA_SIHV,
274 .oprofile_mmcra_sipr = MMCRA_SIPR,
275 .platform = "power5",
276 },
277 { /* Power5 GS */
278 .pvr_mask = 0xffff0000,
279 .pvr_value = 0x003b0000,
280 .cpu_name = "POWER5+ (gs)",
281 .cpu_features = CPU_FTRS_POWER5,
282 .cpu_user_features = COMMON_USER_POWER5_PLUS,
283 .icache_bsize = 128,
284 .dcache_bsize = 128,
285 .num_pmcs = 6,
286 .pmc_type = PPC_PMC_IBM,
287 .oprofile_cpu_type = "ppc64/power5+",
288 .oprofile_type = PPC_OPROFILE_POWER4,
289 .oprofile_mmcra_sihv = MMCRA_SIHV,
290 .oprofile_mmcra_sipr = MMCRA_SIPR,
291 .platform = "power5+",
292 },
293 { /* POWER6 in P5+ mode; 2.04-compliant processor */
294 .pvr_mask = 0xffffffff,
295 .pvr_value = 0x0f000001,
296 .cpu_name = "POWER5+",
297 .cpu_features = CPU_FTRS_POWER5,
298 .cpu_user_features = COMMON_USER_POWER5_PLUS,
299 .icache_bsize = 128,
300 .dcache_bsize = 128,
301 .num_pmcs = 6,
302 .oprofile_cpu_type = "ppc64/power6",
303 .oprofile_type = PPC_OPROFILE_POWER4,
304 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
305 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
306 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
307 POWER6_MMCRA_OTHER,
308 .platform = "power5+",
309 },
310 { /* Power6 */
311 .pvr_mask = 0xffff0000,
312 .pvr_value = 0x003e0000,
313 .cpu_name = "POWER6 (raw)",
314 .cpu_features = CPU_FTRS_POWER6,
315 .cpu_user_features = COMMON_USER_POWER6 |
316 PPC_FEATURE_POWER6_EXT,
317 .icache_bsize = 128,
318 .dcache_bsize = 128,
319 .num_pmcs = 6,
320 .oprofile_cpu_type = "ppc64/power6",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
323 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
324 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
325 POWER6_MMCRA_OTHER,
326 .platform = "power6x",
327 },
328 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
329 .pvr_mask = 0xffffffff,
330 .pvr_value = 0x0f000002,
331 .cpu_name = "POWER6 (architected)",
332 .cpu_features = CPU_FTRS_POWER6,
333 .cpu_user_features = COMMON_USER_POWER6,
334 .icache_bsize = 128,
335 .dcache_bsize = 128,
336 .num_pmcs = 6,
337 .pmc_type = PPC_PMC_IBM,
338 .oprofile_cpu_type = "ppc64/power6",
339 .oprofile_type = PPC_OPROFILE_POWER4,
340 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
341 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
342 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
343 POWER6_MMCRA_OTHER,
344 .platform = "power6",
345 },
346 { /* Cell Broadband Engine */
347 .pvr_mask = 0xffff0000,
348 .pvr_value = 0x00700000,
349 .cpu_name = "Cell Broadband Engine",
350 .cpu_features = CPU_FTRS_CELL,
351 .cpu_user_features = COMMON_USER_PPC64 |
352 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
353 PPC_FEATURE_SMT,
354 .icache_bsize = 128,
355 .dcache_bsize = 128,
356 .num_pmcs = 4,
357 .pmc_type = PPC_PMC_IBM,
358 .oprofile_cpu_type = "ppc64/cell-be",
359 .oprofile_type = PPC_OPROFILE_CELL,
360 .platform = "ppc-cell-be",
361 },
362 { /* PA Semi PA6T */
363 .pvr_mask = 0x7fff0000,
364 .pvr_value = 0x00900000,
365 .cpu_name = "PA6T",
366 .cpu_features = CPU_FTRS_PA6T,
367 .cpu_user_features = COMMON_USER_PA6T,
368 .icache_bsize = 64,
369 .dcache_bsize = 64,
370 .num_pmcs = 6,
371 .pmc_type = PPC_PMC_PA6T,
372 .platform = "pa6t",
373 },
374 { /* default match */
375 .pvr_mask = 0x00000000,
376 .pvr_value = 0x00000000,
377 .cpu_name = "POWER4 (compatible)",
378 .cpu_features = CPU_FTRS_COMPATIBLE,
379 .cpu_user_features = COMMON_USER_PPC64,
380 .icache_bsize = 128,
381 .dcache_bsize = 128,
382 .num_pmcs = 6,
383 .pmc_type = PPC_PMC_IBM,
384 .platform = "power4",
385 }
386 #endif /* CONFIG_PPC64 */
387 #ifdef CONFIG_PPC32
388 #if CLASSIC_PPC
389 { /* 601 */
390 .pvr_mask = 0xffff0000,
391 .pvr_value = 0x00010000,
392 .cpu_name = "601",
393 .cpu_features = CPU_FTRS_PPC601,
394 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
395 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
396 .icache_bsize = 32,
397 .dcache_bsize = 32,
398 .platform = "ppc601",
399 },
400 { /* 603 */
401 .pvr_mask = 0xffff0000,
402 .pvr_value = 0x00030000,
403 .cpu_name = "603",
404 .cpu_features = CPU_FTRS_603,
405 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
406 .icache_bsize = 32,
407 .dcache_bsize = 32,
408 .cpu_setup = __setup_cpu_603,
409 .platform = "ppc603",
410 },
411 { /* 603e */
412 .pvr_mask = 0xffff0000,
413 .pvr_value = 0x00060000,
414 .cpu_name = "603e",
415 .cpu_features = CPU_FTRS_603,
416 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
417 .icache_bsize = 32,
418 .dcache_bsize = 32,
419 .cpu_setup = __setup_cpu_603,
420 .platform = "ppc603",
421 },
422 { /* 603ev */
423 .pvr_mask = 0xffff0000,
424 .pvr_value = 0x00070000,
425 .cpu_name = "603ev",
426 .cpu_features = CPU_FTRS_603,
427 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
428 .icache_bsize = 32,
429 .dcache_bsize = 32,
430 .cpu_setup = __setup_cpu_603,
431 .platform = "ppc603",
432 },
433 { /* 604 */
434 .pvr_mask = 0xffff0000,
435 .pvr_value = 0x00040000,
436 .cpu_name = "604",
437 .cpu_features = CPU_FTRS_604,
438 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
439 .icache_bsize = 32,
440 .dcache_bsize = 32,
441 .num_pmcs = 2,
442 .cpu_setup = __setup_cpu_604,
443 .platform = "ppc604",
444 },
445 { /* 604e */
446 .pvr_mask = 0xfffff000,
447 .pvr_value = 0x00090000,
448 .cpu_name = "604e",
449 .cpu_features = CPU_FTRS_604,
450 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
451 .icache_bsize = 32,
452 .dcache_bsize = 32,
453 .num_pmcs = 4,
454 .cpu_setup = __setup_cpu_604,
455 .platform = "ppc604",
456 },
457 { /* 604r */
458 .pvr_mask = 0xffff0000,
459 .pvr_value = 0x00090000,
460 .cpu_name = "604r",
461 .cpu_features = CPU_FTRS_604,
462 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
463 .icache_bsize = 32,
464 .dcache_bsize = 32,
465 .num_pmcs = 4,
466 .cpu_setup = __setup_cpu_604,
467 .platform = "ppc604",
468 },
469 { /* 604ev */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x000a0000,
472 .cpu_name = "604ev",
473 .cpu_features = CPU_FTRS_604,
474 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
475 .icache_bsize = 32,
476 .dcache_bsize = 32,
477 .num_pmcs = 4,
478 .cpu_setup = __setup_cpu_604,
479 .platform = "ppc604",
480 },
481 { /* 740/750 (0x4202, don't support TAU ?) */
482 .pvr_mask = 0xffffffff,
483 .pvr_value = 0x00084202,
484 .cpu_name = "740/750",
485 .cpu_features = CPU_FTRS_740_NOTAU,
486 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
487 .icache_bsize = 32,
488 .dcache_bsize = 32,
489 .num_pmcs = 4,
490 .cpu_setup = __setup_cpu_750,
491 .platform = "ppc750",
492 },
493 { /* 750CX (80100 and 8010x?) */
494 .pvr_mask = 0xfffffff0,
495 .pvr_value = 0x00080100,
496 .cpu_name = "750CX",
497 .cpu_features = CPU_FTRS_750,
498 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
499 .icache_bsize = 32,
500 .dcache_bsize = 32,
501 .num_pmcs = 4,
502 .cpu_setup = __setup_cpu_750cx,
503 .platform = "ppc750",
504 },
505 { /* 750CX (82201 and 82202) */
506 .pvr_mask = 0xfffffff0,
507 .pvr_value = 0x00082200,
508 .cpu_name = "750CX",
509 .cpu_features = CPU_FTRS_750,
510 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
511 .icache_bsize = 32,
512 .dcache_bsize = 32,
513 .num_pmcs = 4,
514 .cpu_setup = __setup_cpu_750cx,
515 .platform = "ppc750",
516 },
517 { /* 750CXe (82214) */
518 .pvr_mask = 0xfffffff0,
519 .pvr_value = 0x00082210,
520 .cpu_name = "750CXe",
521 .cpu_features = CPU_FTRS_750,
522 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
523 .icache_bsize = 32,
524 .dcache_bsize = 32,
525 .num_pmcs = 4,
526 .cpu_setup = __setup_cpu_750cx,
527 .platform = "ppc750",
528 },
529 { /* 750CXe "Gekko" (83214) */
530 .pvr_mask = 0xffffffff,
531 .pvr_value = 0x00083214,
532 .cpu_name = "750CXe",
533 .cpu_features = CPU_FTRS_750,
534 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
535 .icache_bsize = 32,
536 .dcache_bsize = 32,
537 .num_pmcs = 4,
538 .cpu_setup = __setup_cpu_750cx,
539 .platform = "ppc750",
540 },
541 { /* 745/755 */
542 .pvr_mask = 0xfffff000,
543 .pvr_value = 0x00083000,
544 .cpu_name = "745/755",
545 .cpu_features = CPU_FTRS_750,
546 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
547 .icache_bsize = 32,
548 .dcache_bsize = 32,
549 .num_pmcs = 4,
550 .cpu_setup = __setup_cpu_750,
551 .platform = "ppc750",
552 },
553 { /* 750FX rev 1.x */
554 .pvr_mask = 0xffffff00,
555 .pvr_value = 0x70000100,
556 .cpu_name = "750FX",
557 .cpu_features = CPU_FTRS_750FX1,
558 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
559 .icache_bsize = 32,
560 .dcache_bsize = 32,
561 .num_pmcs = 4,
562 .cpu_setup = __setup_cpu_750,
563 .platform = "ppc750",
564 },
565 { /* 750FX rev 2.0 must disable HID0[DPM] */
566 .pvr_mask = 0xffffffff,
567 .pvr_value = 0x70000200,
568 .cpu_name = "750FX",
569 .cpu_features = CPU_FTRS_750FX2,
570 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
571 .icache_bsize = 32,
572 .dcache_bsize = 32,
573 .num_pmcs = 4,
574 .cpu_setup = __setup_cpu_750,
575 .platform = "ppc750",
576 },
577 { /* 750FX (All revs except 2.0) */
578 .pvr_mask = 0xffff0000,
579 .pvr_value = 0x70000000,
580 .cpu_name = "750FX",
581 .cpu_features = CPU_FTRS_750FX,
582 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
583 .icache_bsize = 32,
584 .dcache_bsize = 32,
585 .num_pmcs = 4,
586 .cpu_setup = __setup_cpu_750fx,
587 .platform = "ppc750",
588 },
589 { /* 750GX */
590 .pvr_mask = 0xffff0000,
591 .pvr_value = 0x70020000,
592 .cpu_name = "750GX",
593 .cpu_features = CPU_FTRS_750GX,
594 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
595 .icache_bsize = 32,
596 .dcache_bsize = 32,
597 .num_pmcs = 4,
598 .cpu_setup = __setup_cpu_750fx,
599 .platform = "ppc750",
600 },
601 { /* 740/750 (L2CR bit need fixup for 740) */
602 .pvr_mask = 0xffff0000,
603 .pvr_value = 0x00080000,
604 .cpu_name = "740/750",
605 .cpu_features = CPU_FTRS_740,
606 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
607 .icache_bsize = 32,
608 .dcache_bsize = 32,
609 .num_pmcs = 4,
610 .cpu_setup = __setup_cpu_750,
611 .platform = "ppc750",
612 },
613 { /* 7400 rev 1.1 ? (no TAU) */
614 .pvr_mask = 0xffffffff,
615 .pvr_value = 0x000c1101,
616 .cpu_name = "7400 (1.1)",
617 .cpu_features = CPU_FTRS_7400_NOTAU,
618 .cpu_user_features = COMMON_USER |
619 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
620 .icache_bsize = 32,
621 .dcache_bsize = 32,
622 .num_pmcs = 4,
623 .cpu_setup = __setup_cpu_7400,
624 .platform = "ppc7400",
625 },
626 { /* 7400 */
627 .pvr_mask = 0xffff0000,
628 .pvr_value = 0x000c0000,
629 .cpu_name = "7400",
630 .cpu_features = CPU_FTRS_7400,
631 .cpu_user_features = COMMON_USER |
632 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
633 .icache_bsize = 32,
634 .dcache_bsize = 32,
635 .num_pmcs = 4,
636 .cpu_setup = __setup_cpu_7400,
637 .platform = "ppc7400",
638 },
639 { /* 7410 */
640 .pvr_mask = 0xffff0000,
641 .pvr_value = 0x800c0000,
642 .cpu_name = "7410",
643 .cpu_features = CPU_FTRS_7400,
644 .cpu_user_features = COMMON_USER |
645 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
646 .icache_bsize = 32,
647 .dcache_bsize = 32,
648 .num_pmcs = 4,
649 .cpu_setup = __setup_cpu_7410,
650 .platform = "ppc7400",
651 },
652 { /* 7450 2.0 - no doze/nap */
653 .pvr_mask = 0xffffffff,
654 .pvr_value = 0x80000200,
655 .cpu_name = "7450",
656 .cpu_features = CPU_FTRS_7450_20,
657 .cpu_user_features = COMMON_USER |
658 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
659 .icache_bsize = 32,
660 .dcache_bsize = 32,
661 .num_pmcs = 6,
662 .cpu_setup = __setup_cpu_745x,
663 .oprofile_cpu_type = "ppc/7450",
664 .oprofile_type = PPC_OPROFILE_G4,
665 .platform = "ppc7450",
666 },
667 { /* 7450 2.1 */
668 .pvr_mask = 0xffffffff,
669 .pvr_value = 0x80000201,
670 .cpu_name = "7450",
671 .cpu_features = CPU_FTRS_7450_21,
672 .cpu_user_features = COMMON_USER |
673 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .num_pmcs = 6,
677 .cpu_setup = __setup_cpu_745x,
678 .oprofile_cpu_type = "ppc/7450",
679 .oprofile_type = PPC_OPROFILE_G4,
680 .platform = "ppc7450",
681 },
682 { /* 7450 2.3 and newer */
683 .pvr_mask = 0xffff0000,
684 .pvr_value = 0x80000000,
685 .cpu_name = "7450",
686 .cpu_features = CPU_FTRS_7450_23,
687 .cpu_user_features = COMMON_USER |
688 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
689 .icache_bsize = 32,
690 .dcache_bsize = 32,
691 .num_pmcs = 6,
692 .cpu_setup = __setup_cpu_745x,
693 .oprofile_cpu_type = "ppc/7450",
694 .oprofile_type = PPC_OPROFILE_G4,
695 .platform = "ppc7450",
696 },
697 { /* 7455 rev 1.x */
698 .pvr_mask = 0xffffff00,
699 .pvr_value = 0x80010100,
700 .cpu_name = "7455",
701 .cpu_features = CPU_FTRS_7455_1,
702 .cpu_user_features = COMMON_USER |
703 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
704 .icache_bsize = 32,
705 .dcache_bsize = 32,
706 .num_pmcs = 6,
707 .cpu_setup = __setup_cpu_745x,
708 .oprofile_cpu_type = "ppc/7450",
709 .oprofile_type = PPC_OPROFILE_G4,
710 .platform = "ppc7450",
711 },
712 { /* 7455 rev 2.0 */
713 .pvr_mask = 0xffffffff,
714 .pvr_value = 0x80010200,
715 .cpu_name = "7455",
716 .cpu_features = CPU_FTRS_7455_20,
717 .cpu_user_features = COMMON_USER |
718 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
719 .icache_bsize = 32,
720 .dcache_bsize = 32,
721 .num_pmcs = 6,
722 .cpu_setup = __setup_cpu_745x,
723 .oprofile_cpu_type = "ppc/7450",
724 .oprofile_type = PPC_OPROFILE_G4,
725 .platform = "ppc7450",
726 },
727 { /* 7455 others */
728 .pvr_mask = 0xffff0000,
729 .pvr_value = 0x80010000,
730 .cpu_name = "7455",
731 .cpu_features = CPU_FTRS_7455,
732 .cpu_user_features = COMMON_USER |
733 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
734 .icache_bsize = 32,
735 .dcache_bsize = 32,
736 .num_pmcs = 6,
737 .cpu_setup = __setup_cpu_745x,
738 .oprofile_cpu_type = "ppc/7450",
739 .oprofile_type = PPC_OPROFILE_G4,
740 .platform = "ppc7450",
741 },
742 { /* 7447/7457 Rev 1.0 */
743 .pvr_mask = 0xffffffff,
744 .pvr_value = 0x80020100,
745 .cpu_name = "7447/7457",
746 .cpu_features = CPU_FTRS_7447_10,
747 .cpu_user_features = COMMON_USER |
748 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
749 .icache_bsize = 32,
750 .dcache_bsize = 32,
751 .num_pmcs = 6,
752 .cpu_setup = __setup_cpu_745x,
753 .oprofile_cpu_type = "ppc/7450",
754 .oprofile_type = PPC_OPROFILE_G4,
755 .platform = "ppc7450",
756 },
757 { /* 7447/7457 Rev 1.1 */
758 .pvr_mask = 0xffffffff,
759 .pvr_value = 0x80020101,
760 .cpu_name = "7447/7457",
761 .cpu_features = CPU_FTRS_7447_10,
762 .cpu_user_features = COMMON_USER |
763 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
764 .icache_bsize = 32,
765 .dcache_bsize = 32,
766 .num_pmcs = 6,
767 .cpu_setup = __setup_cpu_745x,
768 .oprofile_cpu_type = "ppc/7450",
769 .oprofile_type = PPC_OPROFILE_G4,
770 .platform = "ppc7450",
771 },
772 { /* 7447/7457 Rev 1.2 and later */
773 .pvr_mask = 0xffff0000,
774 .pvr_value = 0x80020000,
775 .cpu_name = "7447/7457",
776 .cpu_features = CPU_FTRS_7447,
777 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
778 .icache_bsize = 32,
779 .dcache_bsize = 32,
780 .num_pmcs = 6,
781 .cpu_setup = __setup_cpu_745x,
782 .oprofile_cpu_type = "ppc/7450",
783 .oprofile_type = PPC_OPROFILE_G4,
784 .platform = "ppc7450",
785 },
786 { /* 7447A */
787 .pvr_mask = 0xffff0000,
788 .pvr_value = 0x80030000,
789 .cpu_name = "7447A",
790 .cpu_features = CPU_FTRS_7447A,
791 .cpu_user_features = COMMON_USER |
792 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
793 .icache_bsize = 32,
794 .dcache_bsize = 32,
795 .num_pmcs = 6,
796 .cpu_setup = __setup_cpu_745x,
797 .oprofile_cpu_type = "ppc/7450",
798 .oprofile_type = PPC_OPROFILE_G4,
799 .platform = "ppc7450",
800 },
801 { /* 7448 */
802 .pvr_mask = 0xffff0000,
803 .pvr_value = 0x80040000,
804 .cpu_name = "7448",
805 .cpu_features = CPU_FTRS_7447A,
806 .cpu_user_features = COMMON_USER |
807 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
808 .icache_bsize = 32,
809 .dcache_bsize = 32,
810 .num_pmcs = 6,
811 .cpu_setup = __setup_cpu_745x,
812 .oprofile_cpu_type = "ppc/7450",
813 .oprofile_type = PPC_OPROFILE_G4,
814 .platform = "ppc7450",
815 },
816 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
817 .pvr_mask = 0x7fff0000,
818 .pvr_value = 0x00810000,
819 .cpu_name = "82xx",
820 .cpu_features = CPU_FTRS_82XX,
821 .cpu_user_features = COMMON_USER,
822 .icache_bsize = 32,
823 .dcache_bsize = 32,
824 .cpu_setup = __setup_cpu_603,
825 .platform = "ppc603",
826 },
827 { /* All G2_LE (603e core, plus some) have the same pvr */
828 .pvr_mask = 0x7fff0000,
829 .pvr_value = 0x00820000,
830 .cpu_name = "G2_LE",
831 .cpu_features = CPU_FTRS_G2_LE,
832 .cpu_user_features = COMMON_USER,
833 .icache_bsize = 32,
834 .dcache_bsize = 32,
835 .cpu_setup = __setup_cpu_603,
836 .platform = "ppc603",
837 },
838 { /* e300c1 (a 603e core, plus some) on 83xx */
839 .pvr_mask = 0x7fff0000,
840 .pvr_value = 0x00830000,
841 .cpu_name = "e300c1",
842 .cpu_features = CPU_FTRS_E300,
843 .cpu_user_features = COMMON_USER,
844 .icache_bsize = 32,
845 .dcache_bsize = 32,
846 .cpu_setup = __setup_cpu_603,
847 .platform = "ppc603",
848 },
849 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
850 .pvr_mask = 0x7fff0000,
851 .pvr_value = 0x00840000,
852 .cpu_name = "e300c2",
853 .cpu_features = CPU_FTRS_E300C2,
854 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
855 .icache_bsize = 32,
856 .dcache_bsize = 32,
857 .cpu_setup = __setup_cpu_603,
858 .platform = "ppc603",
859 },
860 { /* e300c3 on 83xx */
861 .pvr_mask = 0x7fff0000,
862 .pvr_value = 0x00850000,
863 .cpu_name = "e300c3",
864 .cpu_features = CPU_FTRS_E300,
865 .cpu_user_features = COMMON_USER,
866 .icache_bsize = 32,
867 .dcache_bsize = 32,
868 .cpu_setup = __setup_cpu_603,
869 .platform = "ppc603",
870 },
871 { /* default match, we assume split I/D cache & TB (non-601)... */
872 .pvr_mask = 0x00000000,
873 .pvr_value = 0x00000000,
874 .cpu_name = "(generic PPC)",
875 .cpu_features = CPU_FTRS_CLASSIC32,
876 .cpu_user_features = COMMON_USER,
877 .icache_bsize = 32,
878 .dcache_bsize = 32,
879 .platform = "ppc603",
880 },
881 #endif /* CLASSIC_PPC */
882 #ifdef CONFIG_8xx
883 { /* 8xx */
884 .pvr_mask = 0xffff0000,
885 .pvr_value = 0x00500000,
886 .cpu_name = "8xx",
887 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
888 * if the 8xx code is there.... */
889 .cpu_features = CPU_FTRS_8XX,
890 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
891 .icache_bsize = 16,
892 .dcache_bsize = 16,
893 .platform = "ppc823",
894 },
895 #endif /* CONFIG_8xx */
896 #ifdef CONFIG_40x
897 { /* 403GC */
898 .pvr_mask = 0xffffff00,
899 .pvr_value = 0x00200200,
900 .cpu_name = "403GC",
901 .cpu_features = CPU_FTRS_40X,
902 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
903 .icache_bsize = 16,
904 .dcache_bsize = 16,
905 .platform = "ppc403",
906 },
907 { /* 403GCX */
908 .pvr_mask = 0xffffff00,
909 .pvr_value = 0x00201400,
910 .cpu_name = "403GCX",
911 .cpu_features = CPU_FTRS_40X,
912 .cpu_user_features = PPC_FEATURE_32 |
913 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
914 .icache_bsize = 16,
915 .dcache_bsize = 16,
916 .platform = "ppc403",
917 },
918 { /* 403G ?? */
919 .pvr_mask = 0xffff0000,
920 .pvr_value = 0x00200000,
921 .cpu_name = "403G ??",
922 .cpu_features = CPU_FTRS_40X,
923 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
924 .icache_bsize = 16,
925 .dcache_bsize = 16,
926 .platform = "ppc403",
927 },
928 { /* 405GP */
929 .pvr_mask = 0xffff0000,
930 .pvr_value = 0x40110000,
931 .cpu_name = "405GP",
932 .cpu_features = CPU_FTRS_40X,
933 .cpu_user_features = PPC_FEATURE_32 |
934 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
935 .icache_bsize = 32,
936 .dcache_bsize = 32,
937 .platform = "ppc405",
938 },
939 { /* STB 03xxx */
940 .pvr_mask = 0xffff0000,
941 .pvr_value = 0x40130000,
942 .cpu_name = "STB03xxx",
943 .cpu_features = CPU_FTRS_40X,
944 .cpu_user_features = PPC_FEATURE_32 |
945 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
946 .icache_bsize = 32,
947 .dcache_bsize = 32,
948 .platform = "ppc405",
949 },
950 { /* STB 04xxx */
951 .pvr_mask = 0xffff0000,
952 .pvr_value = 0x41810000,
953 .cpu_name = "STB04xxx",
954 .cpu_features = CPU_FTRS_40X,
955 .cpu_user_features = PPC_FEATURE_32 |
956 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
957 .icache_bsize = 32,
958 .dcache_bsize = 32,
959 .platform = "ppc405",
960 },
961 { /* NP405L */
962 .pvr_mask = 0xffff0000,
963 .pvr_value = 0x41610000,
964 .cpu_name = "NP405L",
965 .cpu_features = CPU_FTRS_40X,
966 .cpu_user_features = PPC_FEATURE_32 |
967 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
968 .icache_bsize = 32,
969 .dcache_bsize = 32,
970 .platform = "ppc405",
971 },
972 { /* NP4GS3 */
973 .pvr_mask = 0xffff0000,
974 .pvr_value = 0x40B10000,
975 .cpu_name = "NP4GS3",
976 .cpu_features = CPU_FTRS_40X,
977 .cpu_user_features = PPC_FEATURE_32 |
978 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
979 .icache_bsize = 32,
980 .dcache_bsize = 32,
981 .platform = "ppc405",
982 },
983 { /* NP405H */
984 .pvr_mask = 0xffff0000,
985 .pvr_value = 0x41410000,
986 .cpu_name = "NP405H",
987 .cpu_features = CPU_FTRS_40X,
988 .cpu_user_features = PPC_FEATURE_32 |
989 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
990 .icache_bsize = 32,
991 .dcache_bsize = 32,
992 .platform = "ppc405",
993 },
994 { /* 405GPr */
995 .pvr_mask = 0xffff0000,
996 .pvr_value = 0x50910000,
997 .cpu_name = "405GPr",
998 .cpu_features = CPU_FTRS_40X,
999 .cpu_user_features = PPC_FEATURE_32 |
1000 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1001 .icache_bsize = 32,
1002 .dcache_bsize = 32,
1003 .platform = "ppc405",
1004 },
1005 { /* STBx25xx */
1006 .pvr_mask = 0xffff0000,
1007 .pvr_value = 0x51510000,
1008 .cpu_name = "STBx25xx",
1009 .cpu_features = CPU_FTRS_40X,
1010 .cpu_user_features = PPC_FEATURE_32 |
1011 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .platform = "ppc405",
1015 },
1016 { /* 405LP */
1017 .pvr_mask = 0xffff0000,
1018 .pvr_value = 0x41F10000,
1019 .cpu_name = "405LP",
1020 .cpu_features = CPU_FTRS_40X,
1021 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1022 .icache_bsize = 32,
1023 .dcache_bsize = 32,
1024 .platform = "ppc405",
1025 },
1026 { /* Xilinx Virtex-II Pro */
1027 .pvr_mask = 0xfffff000,
1028 .pvr_value = 0x20010000,
1029 .cpu_name = "Virtex-II Pro",
1030 .cpu_features = CPU_FTRS_40X,
1031 .cpu_user_features = PPC_FEATURE_32 |
1032 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1033 .icache_bsize = 32,
1034 .dcache_bsize = 32,
1035 .platform = "ppc405",
1036 },
1037 { /* Xilinx Virtex-4 FX */
1038 .pvr_mask = 0xfffff000,
1039 .pvr_value = 0x20011000,
1040 .cpu_name = "Virtex-4 FX",
1041 .cpu_features = CPU_FTRS_40X,
1042 .cpu_user_features = PPC_FEATURE_32 |
1043 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1044 .icache_bsize = 32,
1045 .dcache_bsize = 32,
1046 .platform = "ppc405",
1047 },
1048 { /* 405EP */
1049 .pvr_mask = 0xffff0000,
1050 .pvr_value = 0x51210000,
1051 .cpu_name = "405EP",
1052 .cpu_features = CPU_FTRS_40X,
1053 .cpu_user_features = PPC_FEATURE_32 |
1054 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1055 .icache_bsize = 32,
1056 .dcache_bsize = 32,
1057 .platform = "ppc405",
1058 },
1059
1060 #endif /* CONFIG_40x */
1061 #ifdef CONFIG_44x
1062 {
1063 .pvr_mask = 0xf0000fff,
1064 .pvr_value = 0x40000850,
1065 .cpu_name = "440EP Rev. A",
1066 .cpu_features = CPU_FTRS_44X,
1067 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1068 .icache_bsize = 32,
1069 .dcache_bsize = 32,
1070 .platform = "ppc440",
1071 },
1072 {
1073 .pvr_mask = 0xf0000fff,
1074 .pvr_value = 0x400008d3,
1075 .cpu_name = "440EP Rev. B",
1076 .cpu_features = CPU_FTRS_44X,
1077 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1078 .icache_bsize = 32,
1079 .dcache_bsize = 32,
1080 .platform = "ppc440",
1081 },
1082 { /* 440GP Rev. B */
1083 .pvr_mask = 0xf0000fff,
1084 .pvr_value = 0x40000440,
1085 .cpu_name = "440GP Rev. B",
1086 .cpu_features = CPU_FTRS_44X,
1087 .cpu_user_features = COMMON_USER_BOOKE,
1088 .icache_bsize = 32,
1089 .dcache_bsize = 32,
1090 .platform = "ppc440gp",
1091 },
1092 { /* 440GP Rev. C */
1093 .pvr_mask = 0xf0000fff,
1094 .pvr_value = 0x40000481,
1095 .cpu_name = "440GP Rev. C",
1096 .cpu_features = CPU_FTRS_44X,
1097 .cpu_user_features = COMMON_USER_BOOKE,
1098 .icache_bsize = 32,
1099 .dcache_bsize = 32,
1100 .platform = "ppc440gp",
1101 },
1102 { /* 440GX Rev. A */
1103 .pvr_mask = 0xf0000fff,
1104 .pvr_value = 0x50000850,
1105 .cpu_name = "440GX Rev. A",
1106 .cpu_features = CPU_FTRS_44X,
1107 .cpu_user_features = COMMON_USER_BOOKE,
1108 .icache_bsize = 32,
1109 .dcache_bsize = 32,
1110 .platform = "ppc440",
1111 },
1112 { /* 440GX Rev. B */
1113 .pvr_mask = 0xf0000fff,
1114 .pvr_value = 0x50000851,
1115 .cpu_name = "440GX Rev. B",
1116 .cpu_features = CPU_FTRS_44X,
1117 .cpu_user_features = COMMON_USER_BOOKE,
1118 .icache_bsize = 32,
1119 .dcache_bsize = 32,
1120 .platform = "ppc440",
1121 },
1122 { /* 440GX Rev. C */
1123 .pvr_mask = 0xf0000fff,
1124 .pvr_value = 0x50000892,
1125 .cpu_name = "440GX Rev. C",
1126 .cpu_features = CPU_FTRS_44X,
1127 .cpu_user_features = COMMON_USER_BOOKE,
1128 .icache_bsize = 32,
1129 .dcache_bsize = 32,
1130 .platform = "ppc440",
1131 },
1132 { /* 440GX Rev. F */
1133 .pvr_mask = 0xf0000fff,
1134 .pvr_value = 0x50000894,
1135 .cpu_name = "440GX Rev. F",
1136 .cpu_features = CPU_FTRS_44X,
1137 .cpu_user_features = COMMON_USER_BOOKE,
1138 .icache_bsize = 32,
1139 .dcache_bsize = 32,
1140 .platform = "ppc440",
1141 },
1142 { /* 440SP Rev. A */
1143 .pvr_mask = 0xff000fff,
1144 .pvr_value = 0x53000891,
1145 .cpu_name = "440SP Rev. A",
1146 .cpu_features = CPU_FTRS_44X,
1147 .cpu_user_features = COMMON_USER_BOOKE,
1148 .icache_bsize = 32,
1149 .dcache_bsize = 32,
1150 .platform = "ppc440",
1151 },
1152 { /* 440SPe Rev. A */
1153 .pvr_mask = 0xff000fff,
1154 .pvr_value = 0x53000890,
1155 .cpu_name = "440SPe Rev. A",
1156 .cpu_features = CPU_FTRS_44X,
1157 .cpu_user_features = COMMON_USER_BOOKE,
1158 .icache_bsize = 32,
1159 .dcache_bsize = 32,
1160 .platform = "ppc440",
1161 },
1162 #endif /* CONFIG_44x */
1163 #ifdef CONFIG_FSL_BOOKE
1164 { /* e200z5 */
1165 .pvr_mask = 0xfff00000,
1166 .pvr_value = 0x81000000,
1167 .cpu_name = "e200z5",
1168 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1169 .cpu_features = CPU_FTRS_E200,
1170 .cpu_user_features = COMMON_USER_BOOKE |
1171 PPC_FEATURE_HAS_EFP_SINGLE |
1172 PPC_FEATURE_UNIFIED_CACHE,
1173 .dcache_bsize = 32,
1174 .platform = "ppc5554",
1175 },
1176 { /* e200z6 */
1177 .pvr_mask = 0xfff00000,
1178 .pvr_value = 0x81100000,
1179 .cpu_name = "e200z6",
1180 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1181 .cpu_features = CPU_FTRS_E200,
1182 .cpu_user_features = COMMON_USER_BOOKE |
1183 PPC_FEATURE_SPE_COMP |
1184 PPC_FEATURE_HAS_EFP_SINGLE |
1185 PPC_FEATURE_UNIFIED_CACHE,
1186 .dcache_bsize = 32,
1187 .platform = "ppc5554",
1188 },
1189 { /* e500 */
1190 .pvr_mask = 0xffff0000,
1191 .pvr_value = 0x80200000,
1192 .cpu_name = "e500",
1193 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1194 .cpu_features = CPU_FTRS_E500,
1195 .cpu_user_features = COMMON_USER_BOOKE |
1196 PPC_FEATURE_SPE_COMP |
1197 PPC_FEATURE_HAS_EFP_SINGLE,
1198 .icache_bsize = 32,
1199 .dcache_bsize = 32,
1200 .num_pmcs = 4,
1201 .oprofile_cpu_type = "ppc/e500",
1202 .oprofile_type = PPC_OPROFILE_BOOKE,
1203 .platform = "ppc8540",
1204 },
1205 { /* e500v2 */
1206 .pvr_mask = 0xffff0000,
1207 .pvr_value = 0x80210000,
1208 .cpu_name = "e500v2",
1209 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1210 .cpu_features = CPU_FTRS_E500_2,
1211 .cpu_user_features = COMMON_USER_BOOKE |
1212 PPC_FEATURE_SPE_COMP |
1213 PPC_FEATURE_HAS_EFP_SINGLE |
1214 PPC_FEATURE_HAS_EFP_DOUBLE,
1215 .icache_bsize = 32,
1216 .dcache_bsize = 32,
1217 .num_pmcs = 4,
1218 .oprofile_cpu_type = "ppc/e500",
1219 .oprofile_type = PPC_OPROFILE_BOOKE,
1220 .platform = "ppc8548",
1221 },
1222 #endif
1223 #if !CLASSIC_PPC
1224 { /* default match */
1225 .pvr_mask = 0x00000000,
1226 .pvr_value = 0x00000000,
1227 .cpu_name = "(generic PPC)",
1228 .cpu_features = CPU_FTRS_GENERIC_32,
1229 .cpu_user_features = PPC_FEATURE_32,
1230 .icache_bsize = 32,
1231 .dcache_bsize = 32,
1232 .platform = "powerpc",
1233 }
1234 #endif /* !CLASSIC_PPC */
1235 #endif /* CONFIG_PPC32 */
1236 };
1237
1238 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1239 {
1240 struct cpu_spec *s = cpu_specs;
1241 struct cpu_spec **cur = &cur_cpu_spec;
1242 int i;
1243
1244 s = PTRRELOC(s);
1245 cur = PTRRELOC(cur);
1246
1247 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1248 if ((pvr & s->pvr_mask) == s->pvr_value) {
1249 *cur = cpu_specs + i;
1250 #ifdef CONFIG_PPC64
1251 /* ppc64 expects identify_cpu to also call setup_cpu
1252 * for that processor. I will consolidate that at a
1253 * later time, for now, just use our friend #ifdef.
1254 * we also don't need to PTRRELOC the function pointer
1255 * on ppc64 as we are running at 0 in real mode.
1256 */
1257 if (s->cpu_setup) {
1258 s->cpu_setup(offset, s);
1259 }
1260 #endif /* CONFIG_PPC64 */
1261 return s;
1262 }
1263 BUG();
1264 return NULL;
1265 }
1266
1267 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1268 {
1269 struct fixup_entry {
1270 unsigned long mask;
1271 unsigned long value;
1272 long start_off;
1273 long end_off;
1274 } *fcur, *fend;
1275
1276 fcur = fixup_start;
1277 fend = fixup_end;
1278
1279 for (; fcur < fend; fcur++) {
1280 unsigned int *pstart, *pend, *p;
1281
1282 if ((value & fcur->mask) == fcur->value)
1283 continue;
1284
1285 /* These PTRRELOCs will disappear once the new scheme for
1286 * modules and vdso is implemented
1287 */
1288 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1289 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1290
1291 for (p = pstart; p < pend; p++) {
1292 *p = 0x60000000u;
1293 asm volatile ("dcbst 0, %0" : : "r" (p));
1294 }
1295 asm volatile ("sync" : : : "memory");
1296 for (p = pstart; p < pend; p++)
1297 asm volatile ("icbi 0,%0" : : "r" (p));
1298 asm volatile ("sync; isync" : : : "memory");
1299 }
1300 }
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