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[SCSI] qla2xxx: Obtain loopback iteration count from bsg request.
[linux-2.6/btrfs-unstable.git] / drivers / scsi / qla2xxx / qla_mbx.c
blob9e5d89db7272d0e8795a6addef96b56fdcc33e8a
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_target.h"
9
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
12
13
14 /*
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
17 *
18 * Input:
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
21 *
22 * Output:
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
24 *
25 * Returns:
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
29 *
30 * Context:
31 * Kernel context.
32 */
33 static int
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
35 {
36 int rval;
37 unsigned long flags = 0;
38 device_reg_t __iomem *reg;
39 uint8_t abort_active;
40 uint8_t io_lock_on;
41 uint16_t command = 0;
42 uint16_t *iptr;
43 uint16_t __iomem *optr;
44 uint32_t cnt;
45 uint32_t mboxes;
46 unsigned long wait_time;
47 struct qla_hw_data *ha = vha->hw;
48 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
49
50 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
51
52 if (ha->pdev->error_state > pci_channel_io_frozen) {
53 ql_log(ql_log_warn, vha, 0x1001,
54 "error_state is greater than pci_channel_io_frozen, "
55 "exiting.\n");
56 return QLA_FUNCTION_TIMEOUT;
57 }
58
59 if (vha->device_flags & DFLG_DEV_FAILED) {
60 ql_log(ql_log_warn, vha, 0x1002,
61 "Device in failed state, exiting.\n");
62 return QLA_FUNCTION_TIMEOUT;
63 }
64
65 reg = ha->iobase;
66 io_lock_on = base_vha->flags.init_done;
67
68 rval = QLA_SUCCESS;
69 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
70
71
72 if (ha->flags.pci_channel_io_perm_failure) {
73 ql_log(ql_log_warn, vha, 0x1003,
74 "Perm failure on EEH timeout MBX, exiting.\n");
75 return QLA_FUNCTION_TIMEOUT;
76 }
77
78 if (IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung) {
79 /* Setting Link-Down error */
80 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
81 ql_log(ql_log_warn, vha, 0x1004,
82 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
83 return QLA_FUNCTION_TIMEOUT;
84 }
85
86 /*
87 * Wait for active mailbox commands to finish by waiting at most tov
88 * seconds. This is to serialize actual issuing of mailbox cmds during
89 * non ISP abort time.
90 */
91 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
92 /* Timeout occurred. Return error. */
93 ql_log(ql_log_warn, vha, 0x1005,
94 "Cmd access timeout, cmd=0x%x, Exiting.\n",
95 mcp->mb[0]);
96 return QLA_FUNCTION_TIMEOUT;
97 }
98
99 ha->flags.mbox_busy = 1;
100 /* Save mailbox command for debug */
101 ha->mcp = mcp;
102
103 ql_dbg(ql_dbg_mbx, vha, 0x1006,
104 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
105
106 spin_lock_irqsave(&ha->hardware_lock, flags);
107
108 /* Load mailbox registers. */
109 if (IS_QLA82XX(ha))
110 optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
111 else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha))
112 optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
113 else
114 optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
115
116 iptr = mcp->mb;
117 command = mcp->mb[0];
118 mboxes = mcp->out_mb;
119
120 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
121 if (IS_QLA2200(ha) && cnt == 8)
122 optr =
123 (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
124 if (mboxes & BIT_0)
125 WRT_REG_WORD(optr, *iptr);
126
127 mboxes >>= 1;
128 optr++;
129 iptr++;
130 }
131
132 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1111,
133 "Loaded MBX registers (displayed in bytes) =.\n");
134 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1112,
135 (uint8_t *)mcp->mb, 16);
136 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1113,
137 ".\n");
138 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1114,
139 ((uint8_t *)mcp->mb + 0x10), 16);
140 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1115,
141 ".\n");
142 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1116,
143 ((uint8_t *)mcp->mb + 0x20), 8);
144 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
145 "I/O Address = %p.\n", optr);
146 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x100e);
147
148 /* Issue set host interrupt command to send cmd out. */
149 ha->flags.mbox_int = 0;
150 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
151
152 /* Unlock mbx registers and wait for interrupt */
153 ql_dbg(ql_dbg_mbx, vha, 0x100f,
154 "Going to unlock irq & waiting for interrupts. "
155 "jiffies=%lx.\n", jiffies);
156
157 /* Wait for mbx cmd completion until timeout */
158
159 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
160 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
161
162 if (IS_QLA82XX(ha)) {
163 if (RD_REG_DWORD(&reg->isp82.hint) &
164 HINT_MBX_INT_PENDING) {
165 spin_unlock_irqrestore(&ha->hardware_lock,
166 flags);
167 ha->flags.mbox_busy = 0;
168 ql_dbg(ql_dbg_mbx, vha, 0x1010,
169 "Pending mailbox timeout, exiting.\n");
170 rval = QLA_FUNCTION_TIMEOUT;
171 goto premature_exit;
172 }
173 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
174 } else if (IS_FWI2_CAPABLE(ha))
175 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
176 else
177 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
178 spin_unlock_irqrestore(&ha->hardware_lock, flags);
179
180 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
181
182 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
183
184 } else {
185 ql_dbg(ql_dbg_mbx, vha, 0x1011,
186 "Cmd=%x Polling Mode.\n", command);
187
188 if (IS_QLA82XX(ha)) {
189 if (RD_REG_DWORD(&reg->isp82.hint) &
190 HINT_MBX_INT_PENDING) {
191 spin_unlock_irqrestore(&ha->hardware_lock,
192 flags);
193 ha->flags.mbox_busy = 0;
194 ql_dbg(ql_dbg_mbx, vha, 0x1012,
195 "Pending mailbox timeout, exiting.\n");
196 rval = QLA_FUNCTION_TIMEOUT;
197 goto premature_exit;
198 }
199 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
200 } else if (IS_FWI2_CAPABLE(ha))
201 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
202 else
203 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
204 spin_unlock_irqrestore(&ha->hardware_lock, flags);
205
206 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
207 while (!ha->flags.mbox_int) {
208 if (time_after(jiffies, wait_time))
209 break;
210
211 /* Check for pending interrupts. */
212 qla2x00_poll(ha->rsp_q_map[0]);
213
214 if (!ha->flags.mbox_int &&
215 !(IS_QLA2200(ha) &&
216 command == MBC_LOAD_RISC_RAM_EXTENDED))
217 msleep(10);
218 } /* while */
219 ql_dbg(ql_dbg_mbx, vha, 0x1013,
220 "Waited %d sec.\n",
221 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
222 }
223
224 /* Check whether we timed out */
225 if (ha->flags.mbox_int) {
226 uint16_t *iptr2;
227
228 ql_dbg(ql_dbg_mbx, vha, 0x1014,
229 "Cmd=%x completed.\n", command);
230
231 /* Got interrupt. Clear the flag. */
232 ha->flags.mbox_int = 0;
233 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
234
235 if ((IS_QLA82XX(ha) && ha->flags.isp82xx_fw_hung)) {
236 ha->flags.mbox_busy = 0;
237 /* Setting Link-Down error */
238 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
239 ha->mcp = NULL;
240 rval = QLA_FUNCTION_FAILED;
241 ql_log(ql_log_warn, vha, 0x1015,
242 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
243 goto premature_exit;
244 }
245
246 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
247 rval = QLA_FUNCTION_FAILED;
248
249 /* Load return mailbox registers. */
250 iptr2 = mcp->mb;
251 iptr = (uint16_t *)&ha->mailbox_out[0];
252 mboxes = mcp->in_mb;
253 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
254 if (mboxes & BIT_0)
255 *iptr2 = *iptr;
256
257 mboxes >>= 1;
258 iptr2++;
259 iptr++;
260 }
261 } else {
262
263 uint16_t mb0;
264 uint32_t ictrl;
265
266 if (IS_FWI2_CAPABLE(ha)) {
267 mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
268 ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
269 } else {
270 mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
271 ictrl = RD_REG_WORD(&reg->isp.ictrl);
272 }
273 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
274 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
275 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
276 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
277
278 /*
279 * Attempt to capture a firmware dump for further analysis
280 * of the current firmware state
281 */
282 ha->isp_ops->fw_dump(vha, 0);
283
284 rval = QLA_FUNCTION_TIMEOUT;
285 }
286
287 ha->flags.mbox_busy = 0;
288
289 /* Clean up */
290 ha->mcp = NULL;
291
292 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
293 ql_dbg(ql_dbg_mbx, vha, 0x101a,
294 "Checking for additional resp interrupt.\n");
295
296 /* polling mode for non isp_abort commands. */
297 qla2x00_poll(ha->rsp_q_map[0]);
298 }
299
300 if (rval == QLA_FUNCTION_TIMEOUT &&
301 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
302 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
303 ha->flags.eeh_busy) {
304 /* not in dpc. schedule it for dpc to take over. */
305 ql_dbg(ql_dbg_mbx, vha, 0x101b,
306 "Timeout, schedule isp_abort_needed.\n");
307
308 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
309 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
310 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
311 if (IS_QLA82XX(ha)) {
312 ql_dbg(ql_dbg_mbx, vha, 0x112a,
313 "disabling pause transmit on port "
314 "0 & 1.\n");
315 qla82xx_wr_32(ha,
316 QLA82XX_CRB_NIU + 0x98,
317 CRB_NIU_XG_PAUSE_CTL_P0|
318 CRB_NIU_XG_PAUSE_CTL_P1);
319 }
320 ql_log(ql_log_info, base_vha, 0x101c,
321 "Mailbox cmd timeout occurred, cmd=0x%x, "
322 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
323 "abort.\n", command, mcp->mb[0],
324 ha->flags.eeh_busy);
325 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
326 qla2xxx_wake_dpc(vha);
327 }
328 } else if (!abort_active) {
329 /* call abort directly since we are in the DPC thread */
330 ql_dbg(ql_dbg_mbx, vha, 0x101d,
331 "Timeout, calling abort_isp.\n");
332
333 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
334 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
335 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
336 if (IS_QLA82XX(ha)) {
337 ql_dbg(ql_dbg_mbx, vha, 0x112b,
338 "disabling pause transmit on port "
339 "0 & 1.\n");
340 qla82xx_wr_32(ha,
341 QLA82XX_CRB_NIU + 0x98,
342 CRB_NIU_XG_PAUSE_CTL_P0|
343 CRB_NIU_XG_PAUSE_CTL_P1);
344 }
345 ql_log(ql_log_info, base_vha, 0x101e,
346 "Mailbox cmd timeout occurred, cmd=0x%x, "
347 "mb[0]=0x%x. Scheduling ISP abort ",
348 command, mcp->mb[0]);
349 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
350 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
351 /* Allow next mbx cmd to come in. */
352 complete(&ha->mbx_cmd_comp);
353 if (ha->isp_ops->abort_isp(vha)) {
354 /* Failed. retry later. */
355 set_bit(ISP_ABORT_NEEDED,
356 &vha->dpc_flags);
357 }
358 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
359 ql_dbg(ql_dbg_mbx, vha, 0x101f,
360 "Finished abort_isp.\n");
361 goto mbx_done;
362 }
363 }
364 }
365
366 premature_exit:
367 /* Allow next mbx cmd to come in. */
368 complete(&ha->mbx_cmd_comp);
369
370 mbx_done:
371 if (rval) {
372 ql_log(ql_log_warn, base_vha, 0x1020,
373 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
374 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
375 } else {
376 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
377 }
378
379 return rval;
380 }
381
382 int
383 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
384 uint32_t risc_code_size)
385 {
386 int rval;
387 struct qla_hw_data *ha = vha->hw;
388 mbx_cmd_t mc;
389 mbx_cmd_t *mcp = &mc;
390
391 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
392 "Entered %s.\n", __func__);
393
394 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
395 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
396 mcp->mb[8] = MSW(risc_addr);
397 mcp->out_mb = MBX_8|MBX_0;
398 } else {
399 mcp->mb[0] = MBC_LOAD_RISC_RAM;
400 mcp->out_mb = MBX_0;
401 }
402 mcp->mb[1] = LSW(risc_addr);
403 mcp->mb[2] = MSW(req_dma);
404 mcp->mb[3] = LSW(req_dma);
405 mcp->mb[6] = MSW(MSD(req_dma));
406 mcp->mb[7] = LSW(MSD(req_dma));
407 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
408 if (IS_FWI2_CAPABLE(ha)) {
409 mcp->mb[4] = MSW(risc_code_size);
410 mcp->mb[5] = LSW(risc_code_size);
411 mcp->out_mb |= MBX_5|MBX_4;
412 } else {
413 mcp->mb[4] = LSW(risc_code_size);
414 mcp->out_mb |= MBX_4;
415 }
416
417 mcp->in_mb = MBX_0;
418 mcp->tov = MBX_TOV_SECONDS;
419 mcp->flags = 0;
420 rval = qla2x00_mailbox_command(vha, mcp);
421
422 if (rval != QLA_SUCCESS) {
423 ql_dbg(ql_dbg_mbx, vha, 0x1023,
424 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
425 } else {
426 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
427 "Done %s.\n", __func__);
428 }
429
430 return rval;
431 }
432
433 #define EXTENDED_BB_CREDITS BIT_0
434 /*
435 * qla2x00_execute_fw
436 * Start adapter firmware.
437 *
438 * Input:
439 * ha = adapter block pointer.
440 * TARGET_QUEUE_LOCK must be released.
441 * ADAPTER_STATE_LOCK must be released.
442 *
443 * Returns:
444 * qla2x00 local function return status code.
445 *
446 * Context:
447 * Kernel context.
448 */
449 int
450 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
451 {
452 int rval;
453 struct qla_hw_data *ha = vha->hw;
454 mbx_cmd_t mc;
455 mbx_cmd_t *mcp = &mc;
456
457 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
458 "Entered %s.\n", __func__);
459
460 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
461 mcp->out_mb = MBX_0;
462 mcp->in_mb = MBX_0;
463 if (IS_FWI2_CAPABLE(ha)) {
464 mcp->mb[1] = MSW(risc_addr);
465 mcp->mb[2] = LSW(risc_addr);
466 mcp->mb[3] = 0;
467 if (IS_QLA81XX(ha) || IS_QLA83XX(ha)) {
468 struct nvram_81xx *nv = ha->nvram;
469 mcp->mb[4] = (nv->enhanced_features &
470 EXTENDED_BB_CREDITS);
471 } else
472 mcp->mb[4] = 0;
473 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
474 mcp->in_mb |= MBX_1;
475 } else {
476 mcp->mb[1] = LSW(risc_addr);
477 mcp->out_mb |= MBX_1;
478 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
479 mcp->mb[2] = 0;
480 mcp->out_mb |= MBX_2;
481 }
482 }
483
484 mcp->tov = MBX_TOV_SECONDS;
485 mcp->flags = 0;
486 rval = qla2x00_mailbox_command(vha, mcp);
487
488 if (rval != QLA_SUCCESS) {
489 ql_dbg(ql_dbg_mbx, vha, 0x1026,
490 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
491 } else {
492 if (IS_FWI2_CAPABLE(ha)) {
493 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
494 "Done exchanges=%x.\n", mcp->mb[1]);
495 } else {
496 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
497 "Done %s.\n", __func__);
498 }
499 }
500
501 return rval;
502 }
503
504 /*
505 * qla2x00_get_fw_version
506 * Get firmware version.
507 *
508 * Input:
509 * ha: adapter state pointer.
510 * major: pointer for major number.
511 * minor: pointer for minor number.
512 * subminor: pointer for subminor number.
513 *
514 * Returns:
515 * qla2x00 local function return status code.
516 *
517 * Context:
518 * Kernel context.
519 */
520 int
521 qla2x00_get_fw_version(scsi_qla_host_t *vha)
522 {
523 int rval;
524 mbx_cmd_t mc;
525 mbx_cmd_t *mcp = &mc;
526 struct qla_hw_data *ha = vha->hw;
527
528 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
529 "Entered %s.\n", __func__);
530
531 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
532 mcp->out_mb = MBX_0;
533 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
534 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha))
535 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
536 if (IS_FWI2_CAPABLE(ha))
537 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
538 mcp->flags = 0;
539 mcp->tov = MBX_TOV_SECONDS;
540 rval = qla2x00_mailbox_command(vha, mcp);
541 if (rval != QLA_SUCCESS)
542 goto failed;
543
544 /* Return mailbox data. */
545 ha->fw_major_version = mcp->mb[1];
546 ha->fw_minor_version = mcp->mb[2];
547 ha->fw_subminor_version = mcp->mb[3];
548 ha->fw_attributes = mcp->mb[6];
549 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
550 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
551 else
552 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
553 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw)) {
554 ha->mpi_version[0] = mcp->mb[10] & 0xff;
555 ha->mpi_version[1] = mcp->mb[11] >> 8;
556 ha->mpi_version[2] = mcp->mb[11] & 0xff;
557 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
558 ha->phy_version[0] = mcp->mb[8] & 0xff;
559 ha->phy_version[1] = mcp->mb[9] >> 8;
560 ha->phy_version[2] = mcp->mb[9] & 0xff;
561 }
562 if (IS_FWI2_CAPABLE(ha)) {
563 ha->fw_attributes_h = mcp->mb[15];
564 ha->fw_attributes_ext[0] = mcp->mb[16];
565 ha->fw_attributes_ext[1] = mcp->mb[17];
566 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
567 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
568 __func__, mcp->mb[15], mcp->mb[6]);
569 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
570 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
571 __func__, mcp->mb[17], mcp->mb[16]);
572 }
573
574 failed:
575 if (rval != QLA_SUCCESS) {
576 /*EMPTY*/
577 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
578 } else {
579 /*EMPTY*/
580 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
581 "Done %s.\n", __func__);
582 }
583 return rval;
584 }
585
586 /*
587 * qla2x00_get_fw_options
588 * Set firmware options.
589 *
590 * Input:
591 * ha = adapter block pointer.
592 * fwopt = pointer for firmware options.
593 *
594 * Returns:
595 * qla2x00 local function return status code.
596 *
597 * Context:
598 * Kernel context.
599 */
600 int
601 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
602 {
603 int rval;
604 mbx_cmd_t mc;
605 mbx_cmd_t *mcp = &mc;
606
607 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
608 "Entered %s.\n", __func__);
609
610 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
611 mcp->out_mb = MBX_0;
612 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
613 mcp->tov = MBX_TOV_SECONDS;
614 mcp->flags = 0;
615 rval = qla2x00_mailbox_command(vha, mcp);
616
617 if (rval != QLA_SUCCESS) {
618 /*EMPTY*/
619 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
620 } else {
621 fwopts[0] = mcp->mb[0];
622 fwopts[1] = mcp->mb[1];
623 fwopts[2] = mcp->mb[2];
624 fwopts[3] = mcp->mb[3];
625
626 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
627 "Done %s.\n", __func__);
628 }
629
630 return rval;
631 }
632
633
634 /*
635 * qla2x00_set_fw_options
636 * Set firmware options.
637 *
638 * Input:
639 * ha = adapter block pointer.
640 * fwopt = pointer for firmware options.
641 *
642 * Returns:
643 * qla2x00 local function return status code.
644 *
645 * Context:
646 * Kernel context.
647 */
648 int
649 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
650 {
651 int rval;
652 mbx_cmd_t mc;
653 mbx_cmd_t *mcp = &mc;
654
655 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
656 "Entered %s.\n", __func__);
657
658 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
659 mcp->mb[1] = fwopts[1];
660 mcp->mb[2] = fwopts[2];
661 mcp->mb[3] = fwopts[3];
662 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
663 mcp->in_mb = MBX_0;
664 if (IS_FWI2_CAPABLE(vha->hw)) {
665 mcp->in_mb |= MBX_1;
666 } else {
667 mcp->mb[10] = fwopts[10];
668 mcp->mb[11] = fwopts[11];
669 mcp->mb[12] = 0; /* Undocumented, but used */
670 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
671 }
672 mcp->tov = MBX_TOV_SECONDS;
673 mcp->flags = 0;
674 rval = qla2x00_mailbox_command(vha, mcp);
675
676 fwopts[0] = mcp->mb[0];
677
678 if (rval != QLA_SUCCESS) {
679 /*EMPTY*/
680 ql_dbg(ql_dbg_mbx, vha, 0x1030,
681 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
682 } else {
683 /*EMPTY*/
684 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
685 "Done %s.\n", __func__);
686 }
687
688 return rval;
689 }
690
691 /*
692 * qla2x00_mbx_reg_test
693 * Mailbox register wrap test.
694 *
695 * Input:
696 * ha = adapter block pointer.
697 * TARGET_QUEUE_LOCK must be released.
698 * ADAPTER_STATE_LOCK must be released.
699 *
700 * Returns:
701 * qla2x00 local function return status code.
702 *
703 * Context:
704 * Kernel context.
705 */
706 int
707 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
708 {
709 int rval;
710 mbx_cmd_t mc;
711 mbx_cmd_t *mcp = &mc;
712
713 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
714 "Entered %s.\n", __func__);
715
716 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
717 mcp->mb[1] = 0xAAAA;
718 mcp->mb[2] = 0x5555;
719 mcp->mb[3] = 0xAA55;
720 mcp->mb[4] = 0x55AA;
721 mcp->mb[5] = 0xA5A5;
722 mcp->mb[6] = 0x5A5A;
723 mcp->mb[7] = 0x2525;
724 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
725 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
726 mcp->tov = MBX_TOV_SECONDS;
727 mcp->flags = 0;
728 rval = qla2x00_mailbox_command(vha, mcp);
729
730 if (rval == QLA_SUCCESS) {
731 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
732 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
733 rval = QLA_FUNCTION_FAILED;
734 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
735 mcp->mb[7] != 0x2525)
736 rval = QLA_FUNCTION_FAILED;
737 }
738
739 if (rval != QLA_SUCCESS) {
740 /*EMPTY*/
741 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
742 } else {
743 /*EMPTY*/
744 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
745 "Done %s.\n", __func__);
746 }
747
748 return rval;
749 }
750
751 /*
752 * qla2x00_verify_checksum
753 * Verify firmware checksum.
754 *
755 * Input:
756 * ha = adapter block pointer.
757 * TARGET_QUEUE_LOCK must be released.
758 * ADAPTER_STATE_LOCK must be released.
759 *
760 * Returns:
761 * qla2x00 local function return status code.
762 *
763 * Context:
764 * Kernel context.
765 */
766 int
767 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
768 {
769 int rval;
770 mbx_cmd_t mc;
771 mbx_cmd_t *mcp = &mc;
772
773 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
774 "Entered %s.\n", __func__);
775
776 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
777 mcp->out_mb = MBX_0;
778 mcp->in_mb = MBX_0;
779 if (IS_FWI2_CAPABLE(vha->hw)) {
780 mcp->mb[1] = MSW(risc_addr);
781 mcp->mb[2] = LSW(risc_addr);
782 mcp->out_mb |= MBX_2|MBX_1;
783 mcp->in_mb |= MBX_2|MBX_1;
784 } else {
785 mcp->mb[1] = LSW(risc_addr);
786 mcp->out_mb |= MBX_1;
787 mcp->in_mb |= MBX_1;
788 }
789
790 mcp->tov = MBX_TOV_SECONDS;
791 mcp->flags = 0;
792 rval = qla2x00_mailbox_command(vha, mcp);
793
794 if (rval != QLA_SUCCESS) {
795 ql_dbg(ql_dbg_mbx, vha, 0x1036,
796 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
797 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
798 } else {
799 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
800 "Done %s.\n", __func__);
801 }
802
803 return rval;
804 }
805
806 /*
807 * qla2x00_issue_iocb
808 * Issue IOCB using mailbox command
809 *
810 * Input:
811 * ha = adapter state pointer.
812 * buffer = buffer pointer.
813 * phys_addr = physical address of buffer.
814 * size = size of buffer.
815 * TARGET_QUEUE_LOCK must be released.
816 * ADAPTER_STATE_LOCK must be released.
817 *
818 * Returns:
819 * qla2x00 local function return status code.
820 *
821 * Context:
822 * Kernel context.
823 */
824 int
825 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
826 dma_addr_t phys_addr, size_t size, uint32_t tov)
827 {
828 int rval;
829 mbx_cmd_t mc;
830 mbx_cmd_t *mcp = &mc;
831
832 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
833 "Entered %s.\n", __func__);
834
835 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
836 mcp->mb[1] = 0;
837 mcp->mb[2] = MSW(phys_addr);
838 mcp->mb[3] = LSW(phys_addr);
839 mcp->mb[6] = MSW(MSD(phys_addr));
840 mcp->mb[7] = LSW(MSD(phys_addr));
841 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
842 mcp->in_mb = MBX_2|MBX_0;
843 mcp->tov = tov;
844 mcp->flags = 0;
845 rval = qla2x00_mailbox_command(vha, mcp);
846
847 if (rval != QLA_SUCCESS) {
848 /*EMPTY*/
849 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
850 } else {
851 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
852
853 /* Mask reserved bits. */
854 sts_entry->entry_status &=
855 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
856 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
857 "Done %s.\n", __func__);
858 }
859
860 return rval;
861 }
862
863 int
864 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
865 size_t size)
866 {
867 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
868 MBX_TOV_SECONDS);
869 }
870
871 /*
872 * qla2x00_abort_command
873 * Abort command aborts a specified IOCB.
874 *
875 * Input:
876 * ha = adapter block pointer.
877 * sp = SB structure pointer.
878 *
879 * Returns:
880 * qla2x00 local function return status code.
881 *
882 * Context:
883 * Kernel context.
884 */
885 int
886 qla2x00_abort_command(srb_t *sp)
887 {
888 unsigned long flags = 0;
889 int rval;
890 uint32_t handle = 0;
891 mbx_cmd_t mc;
892 mbx_cmd_t *mcp = &mc;
893 fc_port_t *fcport = sp->fcport;
894 scsi_qla_host_t *vha = fcport->vha;
895 struct qla_hw_data *ha = vha->hw;
896 struct req_que *req = vha->req;
897 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
898
899 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
900 "Entered %s.\n", __func__);
901
902 spin_lock_irqsave(&ha->hardware_lock, flags);
903 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
904 if (req->outstanding_cmds[handle] == sp)
905 break;
906 }
907 spin_unlock_irqrestore(&ha->hardware_lock, flags);
908
909 if (handle == req->num_outstanding_cmds) {
910 /* command not found */
911 return QLA_FUNCTION_FAILED;
912 }
913
914 mcp->mb[0] = MBC_ABORT_COMMAND;
915 if (HAS_EXTENDED_IDS(ha))
916 mcp->mb[1] = fcport->loop_id;
917 else
918 mcp->mb[1] = fcport->loop_id << 8;
919 mcp->mb[2] = (uint16_t)handle;
920 mcp->mb[3] = (uint16_t)(handle >> 16);
921 mcp->mb[6] = (uint16_t)cmd->device->lun;
922 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
923 mcp->in_mb = MBX_0;
924 mcp->tov = MBX_TOV_SECONDS;
925 mcp->flags = 0;
926 rval = qla2x00_mailbox_command(vha, mcp);
927
928 if (rval != QLA_SUCCESS) {
929 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
930 } else {
931 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
932 "Done %s.\n", __func__);
933 }
934
935 return rval;
936 }
937
938 int
939 qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
940 {
941 int rval, rval2;
942 mbx_cmd_t mc;
943 mbx_cmd_t *mcp = &mc;
944 scsi_qla_host_t *vha;
945 struct req_que *req;
946 struct rsp_que *rsp;
947
948 l = l;
949 vha = fcport->vha;
950
951 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
952 "Entered %s.\n", __func__);
953
954 req = vha->hw->req_q_map[0];
955 rsp = req->rsp;
956 mcp->mb[0] = MBC_ABORT_TARGET;
957 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
958 if (HAS_EXTENDED_IDS(vha->hw)) {
959 mcp->mb[1] = fcport->loop_id;
960 mcp->mb[10] = 0;
961 mcp->out_mb |= MBX_10;
962 } else {
963 mcp->mb[1] = fcport->loop_id << 8;
964 }
965 mcp->mb[2] = vha->hw->loop_reset_delay;
966 mcp->mb[9] = vha->vp_idx;
967
968 mcp->in_mb = MBX_0;
969 mcp->tov = MBX_TOV_SECONDS;
970 mcp->flags = 0;
971 rval = qla2x00_mailbox_command(vha, mcp);
972 if (rval != QLA_SUCCESS) {
973 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
974 "Failed=%x.\n", rval);
975 }
976
977 /* Issue marker IOCB. */
978 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
979 MK_SYNC_ID);
980 if (rval2 != QLA_SUCCESS) {
981 ql_dbg(ql_dbg_mbx, vha, 0x1040,
982 "Failed to issue marker IOCB (%x).\n", rval2);
983 } else {
984 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
985 "Done %s.\n", __func__);
986 }
987
988 return rval;
989 }
990
991 int
992 qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
993 {
994 int rval, rval2;
995 mbx_cmd_t mc;
996 mbx_cmd_t *mcp = &mc;
997 scsi_qla_host_t *vha;
998 struct req_que *req;
999 struct rsp_que *rsp;
1000
1001 vha = fcport->vha;
1002
1003 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1004 "Entered %s.\n", __func__);
1005
1006 req = vha->hw->req_q_map[0];
1007 rsp = req->rsp;
1008 mcp->mb[0] = MBC_LUN_RESET;
1009 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1010 if (HAS_EXTENDED_IDS(vha->hw))
1011 mcp->mb[1] = fcport->loop_id;
1012 else
1013 mcp->mb[1] = fcport->loop_id << 8;
1014 mcp->mb[2] = l;
1015 mcp->mb[3] = 0;
1016 mcp->mb[9] = vha->vp_idx;
1017
1018 mcp->in_mb = MBX_0;
1019 mcp->tov = MBX_TOV_SECONDS;
1020 mcp->flags = 0;
1021 rval = qla2x00_mailbox_command(vha, mcp);
1022 if (rval != QLA_SUCCESS) {
1023 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1024 }
1025
1026 /* Issue marker IOCB. */
1027 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1028 MK_SYNC_ID_LUN);
1029 if (rval2 != QLA_SUCCESS) {
1030 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1031 "Failed to issue marker IOCB (%x).\n", rval2);
1032 } else {
1033 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1034 "Done %s.\n", __func__);
1035 }
1036
1037 return rval;
1038 }
1039
1040 /*
1041 * qla2x00_get_adapter_id
1042 * Get adapter ID and topology.
1043 *
1044 * Input:
1045 * ha = adapter block pointer.
1046 * id = pointer for loop ID.
1047 * al_pa = pointer for AL_PA.
1048 * area = pointer for area.
1049 * domain = pointer for domain.
1050 * top = pointer for topology.
1051 * TARGET_QUEUE_LOCK must be released.
1052 * ADAPTER_STATE_LOCK must be released.
1053 *
1054 * Returns:
1055 * qla2x00 local function return status code.
1056 *
1057 * Context:
1058 * Kernel context.
1059 */
1060 int
1061 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1062 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1063 {
1064 int rval;
1065 mbx_cmd_t mc;
1066 mbx_cmd_t *mcp = &mc;
1067
1068 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1069 "Entered %s.\n", __func__);
1070
1071 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1072 mcp->mb[9] = vha->vp_idx;
1073 mcp->out_mb = MBX_9|MBX_0;
1074 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1075 if (IS_CNA_CAPABLE(vha->hw))
1076 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1077 mcp->tov = MBX_TOV_SECONDS;
1078 mcp->flags = 0;
1079 rval = qla2x00_mailbox_command(vha, mcp);
1080 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1081 rval = QLA_COMMAND_ERROR;
1082 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1083 rval = QLA_INVALID_COMMAND;
1084
1085 /* Return data. */
1086 *id = mcp->mb[1];
1087 *al_pa = LSB(mcp->mb[2]);
1088 *area = MSB(mcp->mb[2]);
1089 *domain = LSB(mcp->mb[3]);
1090 *top = mcp->mb[6];
1091 *sw_cap = mcp->mb[7];
1092
1093 if (rval != QLA_SUCCESS) {
1094 /*EMPTY*/
1095 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1096 } else {
1097 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1098 "Done %s.\n", __func__);
1099
1100 if (IS_CNA_CAPABLE(vha->hw)) {
1101 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1102 vha->fcoe_fcf_idx = mcp->mb[10];
1103 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1104 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1105 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1106 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1107 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1108 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1109 }
1110 }
1111
1112 return rval;
1113 }
1114
1115 /*
1116 * qla2x00_get_retry_cnt
1117 * Get current firmware login retry count and delay.
1118 *
1119 * Input:
1120 * ha = adapter block pointer.
1121 * retry_cnt = pointer to login retry count.
1122 * tov = pointer to login timeout value.
1123 *
1124 * Returns:
1125 * qla2x00 local function return status code.
1126 *
1127 * Context:
1128 * Kernel context.
1129 */
1130 int
1131 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1132 uint16_t *r_a_tov)
1133 {
1134 int rval;
1135 uint16_t ratov;
1136 mbx_cmd_t mc;
1137 mbx_cmd_t *mcp = &mc;
1138
1139 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1140 "Entered %s.\n", __func__);
1141
1142 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1143 mcp->out_mb = MBX_0;
1144 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1145 mcp->tov = MBX_TOV_SECONDS;
1146 mcp->flags = 0;
1147 rval = qla2x00_mailbox_command(vha, mcp);
1148
1149 if (rval != QLA_SUCCESS) {
1150 /*EMPTY*/
1151 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1152 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1153 } else {
1154 /* Convert returned data and check our values. */
1155 *r_a_tov = mcp->mb[3] / 2;
1156 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1157 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1158 /* Update to the larger values */
1159 *retry_cnt = (uint8_t)mcp->mb[1];
1160 *tov = ratov;
1161 }
1162
1163 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1164 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1165 }
1166
1167 return rval;
1168 }
1169
1170 /*
1171 * qla2x00_init_firmware
1172 * Initialize adapter firmware.
1173 *
1174 * Input:
1175 * ha = adapter block pointer.
1176 * dptr = Initialization control block pointer.
1177 * size = size of initialization control block.
1178 * TARGET_QUEUE_LOCK must be released.
1179 * ADAPTER_STATE_LOCK must be released.
1180 *
1181 * Returns:
1182 * qla2x00 local function return status code.
1183 *
1184 * Context:
1185 * Kernel context.
1186 */
1187 int
1188 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1189 {
1190 int rval;
1191 mbx_cmd_t mc;
1192 mbx_cmd_t *mcp = &mc;
1193 struct qla_hw_data *ha = vha->hw;
1194
1195 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1196 "Entered %s.\n", __func__);
1197
1198 if (IS_QLA82XX(ha) && ql2xdbwr)
1199 qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1200 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1201
1202 if (ha->flags.npiv_supported)
1203 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1204 else
1205 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1206
1207 mcp->mb[1] = 0;
1208 mcp->mb[2] = MSW(ha->init_cb_dma);
1209 mcp->mb[3] = LSW(ha->init_cb_dma);
1210 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1211 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1212 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1213 if ((IS_QLA81XX(ha) || IS_QLA83XX(ha)) && ha->ex_init_cb->ex_version) {
1214 mcp->mb[1] = BIT_0;
1215 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1216 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1217 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1218 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1219 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1220 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1221 }
1222 /* 1 and 2 should normally be captured. */
1223 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1224 if (IS_QLA83XX(ha))
1225 /* mb3 is additional info about the installed SFP. */
1226 mcp->in_mb |= MBX_3;
1227 mcp->buf_size = size;
1228 mcp->flags = MBX_DMA_OUT;
1229 mcp->tov = MBX_TOV_SECONDS;
1230 rval = qla2x00_mailbox_command(vha, mcp);
1231
1232 if (rval != QLA_SUCCESS) {
1233 /*EMPTY*/
1234 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1235 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1236 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1237 } else {
1238 /*EMPTY*/
1239 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1240 "Done %s.\n", __func__);
1241 }
1242
1243 return rval;
1244 }
1245
1246 /*
1247 * qla2x00_get_node_name_list
1248 * Issue get node name list mailbox command, kmalloc()
1249 * and return the resulting list. Caller must kfree() it!
1250 *
1251 * Input:
1252 * ha = adapter state pointer.
1253 * out_data = resulting list
1254 * out_len = length of the resulting list
1255 *
1256 * Returns:
1257 * qla2x00 local function return status code.
1258 *
1259 * Context:
1260 * Kernel context.
1261 */
1262 int
1263 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1264 {
1265 struct qla_hw_data *ha = vha->hw;
1266 struct qla_port_24xx_data *list = NULL;
1267 void *pmap;
1268 mbx_cmd_t mc;
1269 dma_addr_t pmap_dma;
1270 ulong dma_size;
1271 int rval, left;
1272
1273 left = 1;
1274 while (left > 0) {
1275 dma_size = left * sizeof(*list);
1276 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1277 &pmap_dma, GFP_KERNEL);
1278 if (!pmap) {
1279 ql_log(ql_log_warn, vha, 0x113f,
1280 "%s(%ld): DMA Alloc failed of %ld\n",
1281 __func__, vha->host_no, dma_size);
1282 rval = QLA_MEMORY_ALLOC_FAILED;
1283 goto out;
1284 }
1285
1286 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1287 mc.mb[1] = BIT_1 | BIT_3;
1288 mc.mb[2] = MSW(pmap_dma);
1289 mc.mb[3] = LSW(pmap_dma);
1290 mc.mb[6] = MSW(MSD(pmap_dma));
1291 mc.mb[7] = LSW(MSD(pmap_dma));
1292 mc.mb[8] = dma_size;
1293 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1294 mc.in_mb = MBX_0|MBX_1;
1295 mc.tov = 30;
1296 mc.flags = MBX_DMA_IN;
1297
1298 rval = qla2x00_mailbox_command(vha, &mc);
1299 if (rval != QLA_SUCCESS) {
1300 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1301 (mc.mb[1] == 0xA)) {
1302 left += le16_to_cpu(mc.mb[2]) /
1303 sizeof(struct qla_port_24xx_data);
1304 goto restart;
1305 }
1306 goto out_free;
1307 }
1308
1309 left = 0;
1310
1311 list = kzalloc(dma_size, GFP_KERNEL);
1312 if (!list) {
1313 ql_log(ql_log_warn, vha, 0x1140,
1314 "%s(%ld): failed to allocate node names list "
1315 "structure.\n", __func__, vha->host_no);
1316 rval = QLA_MEMORY_ALLOC_FAILED;
1317 goto out_free;
1318 }
1319
1320 memcpy(list, pmap, dma_size);
1321 restart:
1322 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1323 }
1324
1325 *out_data = list;
1326 *out_len = dma_size;
1327
1328 out:
1329 return rval;
1330
1331 out_free:
1332 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1333 return rval;
1334 }
1335
1336 /*
1337 * qla2x00_get_port_database
1338 * Issue normal/enhanced get port database mailbox command
1339 * and copy device name as necessary.
1340 *
1341 * Input:
1342 * ha = adapter state pointer.
1343 * dev = structure pointer.
1344 * opt = enhanced cmd option byte.
1345 *
1346 * Returns:
1347 * qla2x00 local function return status code.
1348 *
1349 * Context:
1350 * Kernel context.
1351 */
1352 int
1353 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1354 {
1355 int rval;
1356 mbx_cmd_t mc;
1357 mbx_cmd_t *mcp = &mc;
1358 port_database_t *pd;
1359 struct port_database_24xx *pd24;
1360 dma_addr_t pd_dma;
1361 struct qla_hw_data *ha = vha->hw;
1362
1363 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1364 "Entered %s.\n", __func__);
1365
1366 pd24 = NULL;
1367 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1368 if (pd == NULL) {
1369 ql_log(ql_log_warn, vha, 0x1050,
1370 "Failed to allocate port database structure.\n");
1371 return QLA_MEMORY_ALLOC_FAILED;
1372 }
1373 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1374
1375 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1376 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1377 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1378 mcp->mb[2] = MSW(pd_dma);
1379 mcp->mb[3] = LSW(pd_dma);
1380 mcp->mb[6] = MSW(MSD(pd_dma));
1381 mcp->mb[7] = LSW(MSD(pd_dma));
1382 mcp->mb[9] = vha->vp_idx;
1383 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1384 mcp->in_mb = MBX_0;
1385 if (IS_FWI2_CAPABLE(ha)) {
1386 mcp->mb[1] = fcport->loop_id;
1387 mcp->mb[10] = opt;
1388 mcp->out_mb |= MBX_10|MBX_1;
1389 mcp->in_mb |= MBX_1;
1390 } else if (HAS_EXTENDED_IDS(ha)) {
1391 mcp->mb[1] = fcport->loop_id;
1392 mcp->mb[10] = opt;
1393 mcp->out_mb |= MBX_10|MBX_1;
1394 } else {
1395 mcp->mb[1] = fcport->loop_id << 8 | opt;
1396 mcp->out_mb |= MBX_1;
1397 }
1398 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1399 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1400 mcp->flags = MBX_DMA_IN;
1401 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1402 rval = qla2x00_mailbox_command(vha, mcp);
1403 if (rval != QLA_SUCCESS)
1404 goto gpd_error_out;
1405
1406 if (IS_FWI2_CAPABLE(ha)) {
1407 uint64_t zero = 0;
1408 pd24 = (struct port_database_24xx *) pd;
1409
1410 /* Check for logged in state. */
1411 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1412 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1413 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1414 "Unable to verify login-state (%x/%x) for "
1415 "loop_id %x.\n", pd24->current_login_state,
1416 pd24->last_login_state, fcport->loop_id);
1417 rval = QLA_FUNCTION_FAILED;
1418 goto gpd_error_out;
1419 }
1420
1421 if (fcport->loop_id == FC_NO_LOOP_ID ||
1422 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1423 memcmp(fcport->port_name, pd24->port_name, 8))) {
1424 /* We lost the device mid way. */
1425 rval = QLA_NOT_LOGGED_IN;
1426 goto gpd_error_out;
1427 }
1428
1429 /* Names are little-endian. */
1430 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1431 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1432
1433 /* Get port_id of device. */
1434 fcport->d_id.b.domain = pd24->port_id[0];
1435 fcport->d_id.b.area = pd24->port_id[1];
1436 fcport->d_id.b.al_pa = pd24->port_id[2];
1437 fcport->d_id.b.rsvd_1 = 0;
1438
1439 /* If not target must be initiator or unknown type. */
1440 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1441 fcport->port_type = FCT_INITIATOR;
1442 else
1443 fcport->port_type = FCT_TARGET;
1444
1445 /* Passback COS information. */
1446 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1447 FC_COS_CLASS2 : FC_COS_CLASS3;
1448
1449 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1450 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1451 } else {
1452 uint64_t zero = 0;
1453
1454 /* Check for logged in state. */
1455 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1456 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1457 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1458 "Unable to verify login-state (%x/%x) - "
1459 "portid=%02x%02x%02x.\n", pd->master_state,
1460 pd->slave_state, fcport->d_id.b.domain,
1461 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1462 rval = QLA_FUNCTION_FAILED;
1463 goto gpd_error_out;
1464 }
1465
1466 if (fcport->loop_id == FC_NO_LOOP_ID ||
1467 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1468 memcmp(fcport->port_name, pd->port_name, 8))) {
1469 /* We lost the device mid way. */
1470 rval = QLA_NOT_LOGGED_IN;
1471 goto gpd_error_out;
1472 }
1473
1474 /* Names are little-endian. */
1475 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1476 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1477
1478 /* Get port_id of device. */
1479 fcport->d_id.b.domain = pd->port_id[0];
1480 fcport->d_id.b.area = pd->port_id[3];
1481 fcport->d_id.b.al_pa = pd->port_id[2];
1482 fcport->d_id.b.rsvd_1 = 0;
1483
1484 /* If not target must be initiator or unknown type. */
1485 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1486 fcport->port_type = FCT_INITIATOR;
1487 else
1488 fcport->port_type = FCT_TARGET;
1489
1490 /* Passback COS information. */
1491 fcport->supported_classes = (pd->options & BIT_4) ?
1492 FC_COS_CLASS2: FC_COS_CLASS3;
1493 }
1494
1495 gpd_error_out:
1496 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1497
1498 if (rval != QLA_SUCCESS) {
1499 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1500 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1501 mcp->mb[0], mcp->mb[1]);
1502 } else {
1503 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1504 "Done %s.\n", __func__);
1505 }
1506
1507 return rval;
1508 }
1509
1510 /*
1511 * qla2x00_get_firmware_state
1512 * Get adapter firmware state.
1513 *
1514 * Input:
1515 * ha = adapter block pointer.
1516 * dptr = pointer for firmware state.
1517 * TARGET_QUEUE_LOCK must be released.
1518 * ADAPTER_STATE_LOCK must be released.
1519 *
1520 * Returns:
1521 * qla2x00 local function return status code.
1522 *
1523 * Context:
1524 * Kernel context.
1525 */
1526 int
1527 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1528 {
1529 int rval;
1530 mbx_cmd_t mc;
1531 mbx_cmd_t *mcp = &mc;
1532
1533 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1534 "Entered %s.\n", __func__);
1535
1536 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1537 mcp->out_mb = MBX_0;
1538 if (IS_FWI2_CAPABLE(vha->hw))
1539 mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1540 else
1541 mcp->in_mb = MBX_1|MBX_0;
1542 mcp->tov = MBX_TOV_SECONDS;
1543 mcp->flags = 0;
1544 rval = qla2x00_mailbox_command(vha, mcp);
1545
1546 /* Return firmware states. */
1547 states[0] = mcp->mb[1];
1548 if (IS_FWI2_CAPABLE(vha->hw)) {
1549 states[1] = mcp->mb[2];
1550 states[2] = mcp->mb[3];
1551 states[3] = mcp->mb[4];
1552 states[4] = mcp->mb[5];
1553 }
1554
1555 if (rval != QLA_SUCCESS) {
1556 /*EMPTY*/
1557 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1558 } else {
1559 /*EMPTY*/
1560 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1561 "Done %s.\n", __func__);
1562 }
1563
1564 return rval;
1565 }
1566
1567 /*
1568 * qla2x00_get_port_name
1569 * Issue get port name mailbox command.
1570 * Returned name is in big endian format.
1571 *
1572 * Input:
1573 * ha = adapter block pointer.
1574 * loop_id = loop ID of device.
1575 * name = pointer for name.
1576 * TARGET_QUEUE_LOCK must be released.
1577 * ADAPTER_STATE_LOCK must be released.
1578 *
1579 * Returns:
1580 * qla2x00 local function return status code.
1581 *
1582 * Context:
1583 * Kernel context.
1584 */
1585 int
1586 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1587 uint8_t opt)
1588 {
1589 int rval;
1590 mbx_cmd_t mc;
1591 mbx_cmd_t *mcp = &mc;
1592
1593 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1594 "Entered %s.\n", __func__);
1595
1596 mcp->mb[0] = MBC_GET_PORT_NAME;
1597 mcp->mb[9] = vha->vp_idx;
1598 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1599 if (HAS_EXTENDED_IDS(vha->hw)) {
1600 mcp->mb[1] = loop_id;
1601 mcp->mb[10] = opt;
1602 mcp->out_mb |= MBX_10;
1603 } else {
1604 mcp->mb[1] = loop_id << 8 | opt;
1605 }
1606
1607 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1608 mcp->tov = MBX_TOV_SECONDS;
1609 mcp->flags = 0;
1610 rval = qla2x00_mailbox_command(vha, mcp);
1611
1612 if (rval != QLA_SUCCESS) {
1613 /*EMPTY*/
1614 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1615 } else {
1616 if (name != NULL) {
1617 /* This function returns name in big endian. */
1618 name[0] = MSB(mcp->mb[2]);
1619 name[1] = LSB(mcp->mb[2]);
1620 name[2] = MSB(mcp->mb[3]);
1621 name[3] = LSB(mcp->mb[3]);
1622 name[4] = MSB(mcp->mb[6]);
1623 name[5] = LSB(mcp->mb[6]);
1624 name[6] = MSB(mcp->mb[7]);
1625 name[7] = LSB(mcp->mb[7]);
1626 }
1627
1628 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1629 "Done %s.\n", __func__);
1630 }
1631
1632 return rval;
1633 }
1634
1635 /*
1636 * qla24xx_link_initialization
1637 * Issue link initialization mailbox command.
1638 *
1639 * Input:
1640 * ha = adapter block pointer.
1641 * TARGET_QUEUE_LOCK must be released.
1642 * ADAPTER_STATE_LOCK must be released.
1643 *
1644 * Returns:
1645 * qla2x00 local function return status code.
1646 *
1647 * Context:
1648 * Kernel context.
1649 */
1650 int
1651 qla24xx_link_initialize(scsi_qla_host_t *vha)
1652 {
1653 int rval;
1654 mbx_cmd_t mc;
1655 mbx_cmd_t *mcp = &mc;
1656
1657 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1658 "Entered %s.\n", __func__);
1659
1660 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1661 return QLA_FUNCTION_FAILED;
1662
1663 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1664 mcp->mb[1] = BIT_6|BIT_4;
1665 mcp->mb[2] = 0;
1666 mcp->mb[3] = 0;
1667 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1668 mcp->in_mb = MBX_0;
1669 mcp->tov = MBX_TOV_SECONDS;
1670 mcp->flags = 0;
1671 rval = qla2x00_mailbox_command(vha, mcp);
1672
1673 if (rval != QLA_SUCCESS) {
1674 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1675 } else {
1676 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1677 "Done %s.\n", __func__);
1678 }
1679
1680 return rval;
1681 }
1682
1683 /*
1684 * qla2x00_lip_reset
1685 * Issue LIP reset mailbox command.
1686 *
1687 * Input:
1688 * ha = adapter block pointer.
1689 * TARGET_QUEUE_LOCK must be released.
1690 * ADAPTER_STATE_LOCK must be released.
1691 *
1692 * Returns:
1693 * qla2x00 local function return status code.
1694 *
1695 * Context:
1696 * Kernel context.
1697 */
1698 int
1699 qla2x00_lip_reset(scsi_qla_host_t *vha)
1700 {
1701 int rval;
1702 mbx_cmd_t mc;
1703 mbx_cmd_t *mcp = &mc;
1704
1705 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1706 "Entered %s.\n", __func__);
1707
1708 if (IS_CNA_CAPABLE(vha->hw)) {
1709 /* Logout across all FCFs. */
1710 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1711 mcp->mb[1] = BIT_1;
1712 mcp->mb[2] = 0;
1713 mcp->out_mb = MBX_2|MBX_1|MBX_0;
1714 } else if (IS_FWI2_CAPABLE(vha->hw)) {
1715 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1716 mcp->mb[1] = BIT_6;
1717 mcp->mb[2] = 0;
1718 mcp->mb[3] = vha->hw->loop_reset_delay;
1719 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1720 } else {
1721 mcp->mb[0] = MBC_LIP_RESET;
1722 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1723 if (HAS_EXTENDED_IDS(vha->hw)) {
1724 mcp->mb[1] = 0x00ff;
1725 mcp->mb[10] = 0;
1726 mcp->out_mb |= MBX_10;
1727 } else {
1728 mcp->mb[1] = 0xff00;
1729 }
1730 mcp->mb[2] = vha->hw->loop_reset_delay;
1731 mcp->mb[3] = 0;
1732 }
1733 mcp->in_mb = MBX_0;
1734 mcp->tov = MBX_TOV_SECONDS;
1735 mcp->flags = 0;
1736 rval = qla2x00_mailbox_command(vha, mcp);
1737
1738 if (rval != QLA_SUCCESS) {
1739 /*EMPTY*/
1740 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1741 } else {
1742 /*EMPTY*/
1743 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1744 "Done %s.\n", __func__);
1745 }
1746
1747 return rval;
1748 }
1749
1750 /*
1751 * qla2x00_send_sns
1752 * Send SNS command.
1753 *
1754 * Input:
1755 * ha = adapter block pointer.
1756 * sns = pointer for command.
1757 * cmd_size = command size.
1758 * buf_size = response/command size.
1759 * TARGET_QUEUE_LOCK must be released.
1760 * ADAPTER_STATE_LOCK must be released.
1761 *
1762 * Returns:
1763 * qla2x00 local function return status code.
1764 *
1765 * Context:
1766 * Kernel context.
1767 */
1768 int
1769 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1770 uint16_t cmd_size, size_t buf_size)
1771 {
1772 int rval;
1773 mbx_cmd_t mc;
1774 mbx_cmd_t *mcp = &mc;
1775
1776 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1777 "Entered %s.\n", __func__);
1778
1779 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1780 "Retry cnt=%d ratov=%d total tov=%d.\n",
1781 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1782
1783 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1784 mcp->mb[1] = cmd_size;
1785 mcp->mb[2] = MSW(sns_phys_address);
1786 mcp->mb[3] = LSW(sns_phys_address);
1787 mcp->mb[6] = MSW(MSD(sns_phys_address));
1788 mcp->mb[7] = LSW(MSD(sns_phys_address));
1789 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1790 mcp->in_mb = MBX_0|MBX_1;
1791 mcp->buf_size = buf_size;
1792 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1793 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1794 rval = qla2x00_mailbox_command(vha, mcp);
1795
1796 if (rval != QLA_SUCCESS) {
1797 /*EMPTY*/
1798 ql_dbg(ql_dbg_mbx, vha, 0x105f,
1799 "Failed=%x mb[0]=%x mb[1]=%x.\n",
1800 rval, mcp->mb[0], mcp->mb[1]);
1801 } else {
1802 /*EMPTY*/
1803 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1804 "Done %s.\n", __func__);
1805 }
1806
1807 return rval;
1808 }
1809
1810 int
1811 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1812 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1813 {
1814 int rval;
1815
1816 struct logio_entry_24xx *lg;
1817 dma_addr_t lg_dma;
1818 uint32_t iop[2];
1819 struct qla_hw_data *ha = vha->hw;
1820 struct req_que *req;
1821 struct rsp_que *rsp;
1822
1823 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1824 "Entered %s.\n", __func__);
1825
1826 if (ha->flags.cpu_affinity_enabled)
1827 req = ha->req_q_map[0];
1828 else
1829 req = vha->req;
1830 rsp = req->rsp;
1831
1832 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1833 if (lg == NULL) {
1834 ql_log(ql_log_warn, vha, 0x1062,
1835 "Failed to allocate login IOCB.\n");
1836 return QLA_MEMORY_ALLOC_FAILED;
1837 }
1838 memset(lg, 0, sizeof(struct logio_entry_24xx));
1839
1840 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1841 lg->entry_count = 1;
1842 lg->handle = MAKE_HANDLE(req->id, lg->handle);
1843 lg->nport_handle = cpu_to_le16(loop_id);
1844 lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1845 if (opt & BIT_0)
1846 lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1847 if (opt & BIT_1)
1848 lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1849 lg->port_id[0] = al_pa;
1850 lg->port_id[1] = area;
1851 lg->port_id[2] = domain;
1852 lg->vp_index = vha->vp_idx;
1853 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1854 (ha->r_a_tov / 10 * 2) + 2);
1855 if (rval != QLA_SUCCESS) {
1856 ql_dbg(ql_dbg_mbx, vha, 0x1063,
1857 "Failed to issue login IOCB (%x).\n", rval);
1858 } else if (lg->entry_status != 0) {
1859 ql_dbg(ql_dbg_mbx, vha, 0x1064,
1860 "Failed to complete IOCB -- error status (%x).\n",
1861 lg->entry_status);
1862 rval = QLA_FUNCTION_FAILED;
1863 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1864 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1865 iop[1] = le32_to_cpu(lg->io_parameter[1]);
1866
1867 ql_dbg(ql_dbg_mbx, vha, 0x1065,
1868 "Failed to complete IOCB -- completion status (%x) "
1869 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1870 iop[0], iop[1]);
1871
1872 switch (iop[0]) {
1873 case LSC_SCODE_PORTID_USED:
1874 mb[0] = MBS_PORT_ID_USED;
1875 mb[1] = LSW(iop[1]);
1876 break;
1877 case LSC_SCODE_NPORT_USED:
1878 mb[0] = MBS_LOOP_ID_USED;
1879 break;
1880 case LSC_SCODE_NOLINK:
1881 case LSC_SCODE_NOIOCB:
1882 case LSC_SCODE_NOXCB:
1883 case LSC_SCODE_CMD_FAILED:
1884 case LSC_SCODE_NOFABRIC:
1885 case LSC_SCODE_FW_NOT_READY:
1886 case LSC_SCODE_NOT_LOGGED_IN:
1887 case LSC_SCODE_NOPCB:
1888 case LSC_SCODE_ELS_REJECT:
1889 case LSC_SCODE_CMD_PARAM_ERR:
1890 case LSC_SCODE_NONPORT:
1891 case LSC_SCODE_LOGGED_IN:
1892 case LSC_SCODE_NOFLOGI_ACC:
1893 default:
1894 mb[0] = MBS_COMMAND_ERROR;
1895 break;
1896 }
1897 } else {
1898 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1899 "Done %s.\n", __func__);
1900
1901 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1902
1903 mb[0] = MBS_COMMAND_COMPLETE;
1904 mb[1] = 0;
1905 if (iop[0] & BIT_4) {
1906 if (iop[0] & BIT_8)
1907 mb[1] |= BIT_1;
1908 } else
1909 mb[1] = BIT_0;
1910
1911 /* Passback COS information. */
1912 mb[10] = 0;
1913 if (lg->io_parameter[7] || lg->io_parameter[8])
1914 mb[10] |= BIT_0; /* Class 2. */
1915 if (lg->io_parameter[9] || lg->io_parameter[10])
1916 mb[10] |= BIT_1; /* Class 3. */
1917 if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1918 mb[10] |= BIT_7; /* Confirmed Completion
1919 * Allowed
1920 */
1921 }
1922
1923 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1924
1925 return rval;
1926 }
1927
1928 /*
1929 * qla2x00_login_fabric
1930 * Issue login fabric port mailbox command.
1931 *
1932 * Input:
1933 * ha = adapter block pointer.
1934 * loop_id = device loop ID.
1935 * domain = device domain.
1936 * area = device area.
1937 * al_pa = device AL_PA.
1938 * status = pointer for return status.
1939 * opt = command options.
1940 * TARGET_QUEUE_LOCK must be released.
1941 * ADAPTER_STATE_LOCK must be released.
1942 *
1943 * Returns:
1944 * qla2x00 local function return status code.
1945 *
1946 * Context:
1947 * Kernel context.
1948 */
1949 int
1950 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1951 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1952 {
1953 int rval;
1954 mbx_cmd_t mc;
1955 mbx_cmd_t *mcp = &mc;
1956 struct qla_hw_data *ha = vha->hw;
1957
1958 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
1959 "Entered %s.\n", __func__);
1960
1961 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
1962 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1963 if (HAS_EXTENDED_IDS(ha)) {
1964 mcp->mb[1] = loop_id;
1965 mcp->mb[10] = opt;
1966 mcp->out_mb |= MBX_10;
1967 } else {
1968 mcp->mb[1] = (loop_id << 8) | opt;
1969 }
1970 mcp->mb[2] = domain;
1971 mcp->mb[3] = area << 8 | al_pa;
1972
1973 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
1974 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1975 mcp->flags = 0;
1976 rval = qla2x00_mailbox_command(vha, mcp);
1977
1978 /* Return mailbox statuses. */
1979 if (mb != NULL) {
1980 mb[0] = mcp->mb[0];
1981 mb[1] = mcp->mb[1];
1982 mb[2] = mcp->mb[2];
1983 mb[6] = mcp->mb[6];
1984 mb[7] = mcp->mb[7];
1985 /* COS retrieved from Get-Port-Database mailbox command. */
1986 mb[10] = 0;
1987 }
1988
1989 if (rval != QLA_SUCCESS) {
1990 /* RLU tmp code: need to change main mailbox_command function to
1991 * return ok even when the mailbox completion value is not
1992 * SUCCESS. The caller needs to be responsible to interpret
1993 * the return values of this mailbox command if we're not
1994 * to change too much of the existing code.
1995 */
1996 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
1997 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
1998 mcp->mb[0] == 0x4006)
1999 rval = QLA_SUCCESS;
2000
2001 /*EMPTY*/
2002 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2003 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2004 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2005 } else {
2006 /*EMPTY*/
2007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2008 "Done %s.\n", __func__);
2009 }
2010
2011 return rval;
2012 }
2013
2014 /*
2015 * qla2x00_login_local_device
2016 * Issue login loop port mailbox command.
2017 *
2018 * Input:
2019 * ha = adapter block pointer.
2020 * loop_id = device loop ID.
2021 * opt = command options.
2022 *
2023 * Returns:
2024 * Return status code.
2025 *
2026 * Context:
2027 * Kernel context.
2028 *
2029 */
2030 int
2031 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2032 uint16_t *mb_ret, uint8_t opt)
2033 {
2034 int rval;
2035 mbx_cmd_t mc;
2036 mbx_cmd_t *mcp = &mc;
2037 struct qla_hw_data *ha = vha->hw;
2038
2039 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2040 "Entered %s.\n", __func__);
2041
2042 if (IS_FWI2_CAPABLE(ha))
2043 return qla24xx_login_fabric(vha, fcport->loop_id,
2044 fcport->d_id.b.domain, fcport->d_id.b.area,
2045 fcport->d_id.b.al_pa, mb_ret, opt);
2046
2047 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2048 if (HAS_EXTENDED_IDS(ha))
2049 mcp->mb[1] = fcport->loop_id;
2050 else
2051 mcp->mb[1] = fcport->loop_id << 8;
2052 mcp->mb[2] = opt;
2053 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2054 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2055 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2056 mcp->flags = 0;
2057 rval = qla2x00_mailbox_command(vha, mcp);
2058
2059 /* Return mailbox statuses. */
2060 if (mb_ret != NULL) {
2061 mb_ret[0] = mcp->mb[0];
2062 mb_ret[1] = mcp->mb[1];
2063 mb_ret[6] = mcp->mb[6];
2064 mb_ret[7] = mcp->mb[7];
2065 }
2066
2067 if (rval != QLA_SUCCESS) {
2068 /* AV tmp code: need to change main mailbox_command function to
2069 * return ok even when the mailbox completion value is not
2070 * SUCCESS. The caller needs to be responsible to interpret
2071 * the return values of this mailbox command if we're not
2072 * to change too much of the existing code.
2073 */
2074 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2075 rval = QLA_SUCCESS;
2076
2077 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2078 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2079 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2080 } else {
2081 /*EMPTY*/
2082 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2083 "Done %s.\n", __func__);
2084 }
2085
2086 return (rval);
2087 }
2088
2089 int
2090 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2091 uint8_t area, uint8_t al_pa)
2092 {
2093 int rval;
2094 struct logio_entry_24xx *lg;
2095 dma_addr_t lg_dma;
2096 struct qla_hw_data *ha = vha->hw;
2097 struct req_que *req;
2098 struct rsp_que *rsp;
2099
2100 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2101 "Entered %s.\n", __func__);
2102
2103 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2104 if (lg == NULL) {
2105 ql_log(ql_log_warn, vha, 0x106e,
2106 "Failed to allocate logout IOCB.\n");
2107 return QLA_MEMORY_ALLOC_FAILED;
2108 }
2109 memset(lg, 0, sizeof(struct logio_entry_24xx));
2110
2111 if (ql2xmaxqueues > 1)
2112 req = ha->req_q_map[0];
2113 else
2114 req = vha->req;
2115 rsp = req->rsp;
2116 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2117 lg->entry_count = 1;
2118 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2119 lg->nport_handle = cpu_to_le16(loop_id);
2120 lg->control_flags =
2121 __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2122 LCF_FREE_NPORT);
2123 lg->port_id[0] = al_pa;
2124 lg->port_id[1] = area;
2125 lg->port_id[2] = domain;
2126 lg->vp_index = vha->vp_idx;
2127 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2128 (ha->r_a_tov / 10 * 2) + 2);
2129 if (rval != QLA_SUCCESS) {
2130 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2131 "Failed to issue logout IOCB (%x).\n", rval);
2132 } else if (lg->entry_status != 0) {
2133 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2134 "Failed to complete IOCB -- error status (%x).\n",
2135 lg->entry_status);
2136 rval = QLA_FUNCTION_FAILED;
2137 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2138 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2139 "Failed to complete IOCB -- completion status (%x) "
2140 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2141 le32_to_cpu(lg->io_parameter[0]),
2142 le32_to_cpu(lg->io_parameter[1]));
2143 } else {
2144 /*EMPTY*/
2145 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2146 "Done %s.\n", __func__);
2147 }
2148
2149 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2150
2151 return rval;
2152 }
2153
2154 /*
2155 * qla2x00_fabric_logout
2156 * Issue logout fabric port mailbox command.
2157 *
2158 * Input:
2159 * ha = adapter block pointer.
2160 * loop_id = device loop ID.
2161 * TARGET_QUEUE_LOCK must be released.
2162 * ADAPTER_STATE_LOCK must be released.
2163 *
2164 * Returns:
2165 * qla2x00 local function return status code.
2166 *
2167 * Context:
2168 * Kernel context.
2169 */
2170 int
2171 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2172 uint8_t area, uint8_t al_pa)
2173 {
2174 int rval;
2175 mbx_cmd_t mc;
2176 mbx_cmd_t *mcp = &mc;
2177
2178 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2179 "Entered %s.\n", __func__);
2180
2181 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2182 mcp->out_mb = MBX_1|MBX_0;
2183 if (HAS_EXTENDED_IDS(vha->hw)) {
2184 mcp->mb[1] = loop_id;
2185 mcp->mb[10] = 0;
2186 mcp->out_mb |= MBX_10;
2187 } else {
2188 mcp->mb[1] = loop_id << 8;
2189 }
2190
2191 mcp->in_mb = MBX_1|MBX_0;
2192 mcp->tov = MBX_TOV_SECONDS;
2193 mcp->flags = 0;
2194 rval = qla2x00_mailbox_command(vha, mcp);
2195
2196 if (rval != QLA_SUCCESS) {
2197 /*EMPTY*/
2198 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2199 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2200 } else {
2201 /*EMPTY*/
2202 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2203 "Done %s.\n", __func__);
2204 }
2205
2206 return rval;
2207 }
2208
2209 /*
2210 * qla2x00_full_login_lip
2211 * Issue full login LIP mailbox command.
2212 *
2213 * Input:
2214 * ha = adapter block pointer.
2215 * TARGET_QUEUE_LOCK must be released.
2216 * ADAPTER_STATE_LOCK must be released.
2217 *
2218 * Returns:
2219 * qla2x00 local function return status code.
2220 *
2221 * Context:
2222 * Kernel context.
2223 */
2224 int
2225 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2226 {
2227 int rval;
2228 mbx_cmd_t mc;
2229 mbx_cmd_t *mcp = &mc;
2230
2231 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2232 "Entered %s.\n", __func__);
2233
2234 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2235 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2236 mcp->mb[2] = 0;
2237 mcp->mb[3] = 0;
2238 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2239 mcp->in_mb = MBX_0;
2240 mcp->tov = MBX_TOV_SECONDS;
2241 mcp->flags = 0;
2242 rval = qla2x00_mailbox_command(vha, mcp);
2243
2244 if (rval != QLA_SUCCESS) {
2245 /*EMPTY*/
2246 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2247 } else {
2248 /*EMPTY*/
2249 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2250 "Done %s.\n", __func__);
2251 }
2252
2253 return rval;
2254 }
2255
2256 /*
2257 * qla2x00_get_id_list
2258 *
2259 * Input:
2260 * ha = adapter block pointer.
2261 *
2262 * Returns:
2263 * qla2x00 local function return status code.
2264 *
2265 * Context:
2266 * Kernel context.
2267 */
2268 int
2269 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2270 uint16_t *entries)
2271 {
2272 int rval;
2273 mbx_cmd_t mc;
2274 mbx_cmd_t *mcp = &mc;
2275
2276 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2277 "Entered %s.\n", __func__);
2278
2279 if (id_list == NULL)
2280 return QLA_FUNCTION_FAILED;
2281
2282 mcp->mb[0] = MBC_GET_ID_LIST;
2283 mcp->out_mb = MBX_0;
2284 if (IS_FWI2_CAPABLE(vha->hw)) {
2285 mcp->mb[2] = MSW(id_list_dma);
2286 mcp->mb[3] = LSW(id_list_dma);
2287 mcp->mb[6] = MSW(MSD(id_list_dma));
2288 mcp->mb[7] = LSW(MSD(id_list_dma));
2289 mcp->mb[8] = 0;
2290 mcp->mb[9] = vha->vp_idx;
2291 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2292 } else {
2293 mcp->mb[1] = MSW(id_list_dma);
2294 mcp->mb[2] = LSW(id_list_dma);
2295 mcp->mb[3] = MSW(MSD(id_list_dma));
2296 mcp->mb[6] = LSW(MSD(id_list_dma));
2297 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2298 }
2299 mcp->in_mb = MBX_1|MBX_0;
2300 mcp->tov = MBX_TOV_SECONDS;
2301 mcp->flags = 0;
2302 rval = qla2x00_mailbox_command(vha, mcp);
2303
2304 if (rval != QLA_SUCCESS) {
2305 /*EMPTY*/
2306 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2307 } else {
2308 *entries = mcp->mb[1];
2309 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2310 "Done %s.\n", __func__);
2311 }
2312
2313 return rval;
2314 }
2315
2316 /*
2317 * qla2x00_get_resource_cnts
2318 * Get current firmware resource counts.
2319 *
2320 * Input:
2321 * ha = adapter block pointer.
2322 *
2323 * Returns:
2324 * qla2x00 local function return status code.
2325 *
2326 * Context:
2327 * Kernel context.
2328 */
2329 int
2330 qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2331 uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2332 uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
2333 {
2334 int rval;
2335 mbx_cmd_t mc;
2336 mbx_cmd_t *mcp = &mc;
2337
2338 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2339 "Entered %s.\n", __func__);
2340
2341 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2342 mcp->out_mb = MBX_0;
2343 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2344 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
2345 mcp->in_mb |= MBX_12;
2346 mcp->tov = MBX_TOV_SECONDS;
2347 mcp->flags = 0;
2348 rval = qla2x00_mailbox_command(vha, mcp);
2349
2350 if (rval != QLA_SUCCESS) {
2351 /*EMPTY*/
2352 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2353 "Failed mb[0]=%x.\n", mcp->mb[0]);
2354 } else {
2355 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2356 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2357 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2358 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2359 mcp->mb[11], mcp->mb[12]);
2360
2361 if (cur_xchg_cnt)
2362 *cur_xchg_cnt = mcp->mb[3];
2363 if (orig_xchg_cnt)
2364 *orig_xchg_cnt = mcp->mb[6];
2365 if (cur_iocb_cnt)
2366 *cur_iocb_cnt = mcp->mb[7];
2367 if (orig_iocb_cnt)
2368 *orig_iocb_cnt = mcp->mb[10];
2369 if (vha->hw->flags.npiv_supported && max_npiv_vports)
2370 *max_npiv_vports = mcp->mb[11];
2371 if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2372 *max_fcfs = mcp->mb[12];
2373 }
2374
2375 return (rval);
2376 }
2377
2378 /*
2379 * qla2x00_get_fcal_position_map
2380 * Get FCAL (LILP) position map using mailbox command
2381 *
2382 * Input:
2383 * ha = adapter state pointer.
2384 * pos_map = buffer pointer (can be NULL).
2385 *
2386 * Returns:
2387 * qla2x00 local function return status code.
2388 *
2389 * Context:
2390 * Kernel context.
2391 */
2392 int
2393 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2394 {
2395 int rval;
2396 mbx_cmd_t mc;
2397 mbx_cmd_t *mcp = &mc;
2398 char *pmap;
2399 dma_addr_t pmap_dma;
2400 struct qla_hw_data *ha = vha->hw;
2401
2402 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2403 "Entered %s.\n", __func__);
2404
2405 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2406 if (pmap == NULL) {
2407 ql_log(ql_log_warn, vha, 0x1080,
2408 "Memory alloc failed.\n");
2409 return QLA_MEMORY_ALLOC_FAILED;
2410 }
2411 memset(pmap, 0, FCAL_MAP_SIZE);
2412
2413 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2414 mcp->mb[2] = MSW(pmap_dma);
2415 mcp->mb[3] = LSW(pmap_dma);
2416 mcp->mb[6] = MSW(MSD(pmap_dma));
2417 mcp->mb[7] = LSW(MSD(pmap_dma));
2418 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2419 mcp->in_mb = MBX_1|MBX_0;
2420 mcp->buf_size = FCAL_MAP_SIZE;
2421 mcp->flags = MBX_DMA_IN;
2422 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2423 rval = qla2x00_mailbox_command(vha, mcp);
2424
2425 if (rval == QLA_SUCCESS) {
2426 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2427 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2428 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2429 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2430 pmap, pmap[0] + 1);
2431
2432 if (pos_map)
2433 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2434 }
2435 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2436
2437 if (rval != QLA_SUCCESS) {
2438 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2439 } else {
2440 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2441 "Done %s.\n", __func__);
2442 }
2443
2444 return rval;
2445 }
2446
2447 /*
2448 * qla2x00_get_link_status
2449 *
2450 * Input:
2451 * ha = adapter block pointer.
2452 * loop_id = device loop ID.
2453 * ret_buf = pointer to link status return buffer.
2454 *
2455 * Returns:
2456 * 0 = success.
2457 * BIT_0 = mem alloc error.
2458 * BIT_1 = mailbox error.
2459 */
2460 int
2461 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2462 struct link_statistics *stats, dma_addr_t stats_dma)
2463 {
2464 int rval;
2465 mbx_cmd_t mc;
2466 mbx_cmd_t *mcp = &mc;
2467 uint32_t *siter, *diter, dwords;
2468 struct qla_hw_data *ha = vha->hw;
2469
2470 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2471 "Entered %s.\n", __func__);
2472
2473 mcp->mb[0] = MBC_GET_LINK_STATUS;
2474 mcp->mb[2] = MSW(stats_dma);
2475 mcp->mb[3] = LSW(stats_dma);
2476 mcp->mb[6] = MSW(MSD(stats_dma));
2477 mcp->mb[7] = LSW(MSD(stats_dma));
2478 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2479 mcp->in_mb = MBX_0;
2480 if (IS_FWI2_CAPABLE(ha)) {
2481 mcp->mb[1] = loop_id;
2482 mcp->mb[4] = 0;
2483 mcp->mb[10] = 0;
2484 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2485 mcp->in_mb |= MBX_1;
2486 } else if (HAS_EXTENDED_IDS(ha)) {
2487 mcp->mb[1] = loop_id;
2488 mcp->mb[10] = 0;
2489 mcp->out_mb |= MBX_10|MBX_1;
2490 } else {
2491 mcp->mb[1] = loop_id << 8;
2492 mcp->out_mb |= MBX_1;
2493 }
2494 mcp->tov = MBX_TOV_SECONDS;
2495 mcp->flags = IOCTL_CMD;
2496 rval = qla2x00_mailbox_command(vha, mcp);
2497
2498 if (rval == QLA_SUCCESS) {
2499 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2500 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2501 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2502 rval = QLA_FUNCTION_FAILED;
2503 } else {
2504 /* Copy over data -- firmware data is LE. */
2505 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2506 "Done %s.\n", __func__);
2507 dwords = offsetof(struct link_statistics, unused1) / 4;
2508 siter = diter = &stats->link_fail_cnt;
2509 while (dwords--)
2510 *diter++ = le32_to_cpu(*siter++);
2511 }
2512 } else {
2513 /* Failed. */
2514 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2515 }
2516
2517 return rval;
2518 }
2519
2520 int
2521 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2522 dma_addr_t stats_dma)
2523 {
2524 int rval;
2525 mbx_cmd_t mc;
2526 mbx_cmd_t *mcp = &mc;
2527 uint32_t *siter, *diter, dwords;
2528
2529 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2530 "Entered %s.\n", __func__);
2531
2532 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2533 mcp->mb[2] = MSW(stats_dma);
2534 mcp->mb[3] = LSW(stats_dma);
2535 mcp->mb[6] = MSW(MSD(stats_dma));
2536 mcp->mb[7] = LSW(MSD(stats_dma));
2537 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2538 mcp->mb[9] = vha->vp_idx;
2539 mcp->mb[10] = 0;
2540 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2541 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2542 mcp->tov = MBX_TOV_SECONDS;
2543 mcp->flags = IOCTL_CMD;
2544 rval = qla2x00_mailbox_command(vha, mcp);
2545
2546 if (rval == QLA_SUCCESS) {
2547 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2548 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2549 "Failed mb[0]=%x.\n", mcp->mb[0]);
2550 rval = QLA_FUNCTION_FAILED;
2551 } else {
2552 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2553 "Done %s.\n", __func__);
2554 /* Copy over data -- firmware data is LE. */
2555 dwords = sizeof(struct link_statistics) / 4;
2556 siter = diter = &stats->link_fail_cnt;
2557 while (dwords--)
2558 *diter++ = le32_to_cpu(*siter++);
2559 }
2560 } else {
2561 /* Failed. */
2562 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2563 }
2564
2565 return rval;
2566 }
2567
2568 int
2569 qla24xx_abort_command(srb_t *sp)
2570 {
2571 int rval;
2572 unsigned long flags = 0;
2573
2574 struct abort_entry_24xx *abt;
2575 dma_addr_t abt_dma;
2576 uint32_t handle;
2577 fc_port_t *fcport = sp->fcport;
2578 struct scsi_qla_host *vha = fcport->vha;
2579 struct qla_hw_data *ha = vha->hw;
2580 struct req_que *req = vha->req;
2581
2582 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2583 "Entered %s.\n", __func__);
2584
2585 spin_lock_irqsave(&ha->hardware_lock, flags);
2586 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2587 if (req->outstanding_cmds[handle] == sp)
2588 break;
2589 }
2590 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2591 if (handle == req->num_outstanding_cmds) {
2592 /* Command not found. */
2593 return QLA_FUNCTION_FAILED;
2594 }
2595
2596 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2597 if (abt == NULL) {
2598 ql_log(ql_log_warn, vha, 0x108d,
2599 "Failed to allocate abort IOCB.\n");
2600 return QLA_MEMORY_ALLOC_FAILED;
2601 }
2602 memset(abt, 0, sizeof(struct abort_entry_24xx));
2603
2604 abt->entry_type = ABORT_IOCB_TYPE;
2605 abt->entry_count = 1;
2606 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2607 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2608 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2609 abt->port_id[0] = fcport->d_id.b.al_pa;
2610 abt->port_id[1] = fcport->d_id.b.area;
2611 abt->port_id[2] = fcport->d_id.b.domain;
2612 abt->vp_index = fcport->vha->vp_idx;
2613
2614 abt->req_que_no = cpu_to_le16(req->id);
2615
2616 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2617 if (rval != QLA_SUCCESS) {
2618 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2619 "Failed to issue IOCB (%x).\n", rval);
2620 } else if (abt->entry_status != 0) {
2621 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2622 "Failed to complete IOCB -- error status (%x).\n",
2623 abt->entry_status);
2624 rval = QLA_FUNCTION_FAILED;
2625 } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2626 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2627 "Failed to complete IOCB -- completion status (%x).\n",
2628 le16_to_cpu(abt->nport_handle));
2629 rval = QLA_FUNCTION_FAILED;
2630 } else {
2631 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2632 "Done %s.\n", __func__);
2633 }
2634
2635 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2636
2637 return rval;
2638 }
2639
2640 struct tsk_mgmt_cmd {
2641 union {
2642 struct tsk_mgmt_entry tsk;
2643 struct sts_entry_24xx sts;
2644 } p;
2645 };
2646
2647 static int
2648 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2649 unsigned int l, int tag)
2650 {
2651 int rval, rval2;
2652 struct tsk_mgmt_cmd *tsk;
2653 struct sts_entry_24xx *sts;
2654 dma_addr_t tsk_dma;
2655 scsi_qla_host_t *vha;
2656 struct qla_hw_data *ha;
2657 struct req_que *req;
2658 struct rsp_que *rsp;
2659
2660 vha = fcport->vha;
2661 ha = vha->hw;
2662 req = vha->req;
2663
2664 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2665 "Entered %s.\n", __func__);
2666
2667 if (ha->flags.cpu_affinity_enabled)
2668 rsp = ha->rsp_q_map[tag + 1];
2669 else
2670 rsp = req->rsp;
2671 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2672 if (tsk == NULL) {
2673 ql_log(ql_log_warn, vha, 0x1093,
2674 "Failed to allocate task management IOCB.\n");
2675 return QLA_MEMORY_ALLOC_FAILED;
2676 }
2677 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2678
2679 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2680 tsk->p.tsk.entry_count = 1;
2681 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2682 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2683 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2684 tsk->p.tsk.control_flags = cpu_to_le32(type);
2685 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2686 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2687 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2688 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2689 if (type == TCF_LUN_RESET) {
2690 int_to_scsilun(l, &tsk->p.tsk.lun);
2691 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2692 sizeof(tsk->p.tsk.lun));
2693 }
2694
2695 sts = &tsk->p.sts;
2696 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2697 if (rval != QLA_SUCCESS) {
2698 ql_dbg(ql_dbg_mbx, vha, 0x1094,
2699 "Failed to issue %s reset IOCB (%x).\n", name, rval);
2700 } else if (sts->entry_status != 0) {
2701 ql_dbg(ql_dbg_mbx, vha, 0x1095,
2702 "Failed to complete IOCB -- error status (%x).\n",
2703 sts->entry_status);
2704 rval = QLA_FUNCTION_FAILED;
2705 } else if (sts->comp_status !=
2706 __constant_cpu_to_le16(CS_COMPLETE)) {
2707 ql_dbg(ql_dbg_mbx, vha, 0x1096,
2708 "Failed to complete IOCB -- completion status (%x).\n",
2709 le16_to_cpu(sts->comp_status));
2710 rval = QLA_FUNCTION_FAILED;
2711 } else if (le16_to_cpu(sts->scsi_status) &
2712 SS_RESPONSE_INFO_LEN_VALID) {
2713 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2714 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2715 "Ignoring inconsistent data length -- not enough "
2716 "response info (%d).\n",
2717 le32_to_cpu(sts->rsp_data_len));
2718 } else if (sts->data[3]) {
2719 ql_dbg(ql_dbg_mbx, vha, 0x1098,
2720 "Failed to complete IOCB -- response (%x).\n",
2721 sts->data[3]);
2722 rval = QLA_FUNCTION_FAILED;
2723 }
2724 }
2725
2726 /* Issue marker IOCB. */
2727 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2728 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2729 if (rval2 != QLA_SUCCESS) {
2730 ql_dbg(ql_dbg_mbx, vha, 0x1099,
2731 "Failed to issue marker IOCB (%x).\n", rval2);
2732 } else {
2733 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2734 "Done %s.\n", __func__);
2735 }
2736
2737 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2738
2739 return rval;
2740 }
2741
2742 int
2743 qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
2744 {
2745 struct qla_hw_data *ha = fcport->vha->hw;
2746
2747 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2748 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2749
2750 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2751 }
2752
2753 int
2754 qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
2755 {
2756 struct qla_hw_data *ha = fcport->vha->hw;
2757
2758 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2759 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2760
2761 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2762 }
2763
2764 int
2765 qla2x00_system_error(scsi_qla_host_t *vha)
2766 {
2767 int rval;
2768 mbx_cmd_t mc;
2769 mbx_cmd_t *mcp = &mc;
2770 struct qla_hw_data *ha = vha->hw;
2771
2772 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2773 return QLA_FUNCTION_FAILED;
2774
2775 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2776 "Entered %s.\n", __func__);
2777
2778 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2779 mcp->out_mb = MBX_0;
2780 mcp->in_mb = MBX_0;
2781 mcp->tov = 5;
2782 mcp->flags = 0;
2783 rval = qla2x00_mailbox_command(vha, mcp);
2784
2785 if (rval != QLA_SUCCESS) {
2786 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2787 } else {
2788 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2789 "Done %s.\n", __func__);
2790 }
2791
2792 return rval;
2793 }
2794
2795 /**
2796 * qla2x00_set_serdes_params() -
2797 * @ha: HA context
2798 *
2799 * Returns
2800 */
2801 int
2802 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
2803 uint16_t sw_em_2g, uint16_t sw_em_4g)
2804 {
2805 int rval;
2806 mbx_cmd_t mc;
2807 mbx_cmd_t *mcp = &mc;
2808
2809 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
2810 "Entered %s.\n", __func__);
2811
2812 mcp->mb[0] = MBC_SERDES_PARAMS;
2813 mcp->mb[1] = BIT_0;
2814 mcp->mb[2] = sw_em_1g | BIT_15;
2815 mcp->mb[3] = sw_em_2g | BIT_15;
2816 mcp->mb[4] = sw_em_4g | BIT_15;
2817 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2818 mcp->in_mb = MBX_0;
2819 mcp->tov = MBX_TOV_SECONDS;
2820 mcp->flags = 0;
2821 rval = qla2x00_mailbox_command(vha, mcp);
2822
2823 if (rval != QLA_SUCCESS) {
2824 /*EMPTY*/
2825 ql_dbg(ql_dbg_mbx, vha, 0x109f,
2826 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2827 } else {
2828 /*EMPTY*/
2829 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
2830 "Done %s.\n", __func__);
2831 }
2832
2833 return rval;
2834 }
2835
2836 int
2837 qla2x00_stop_firmware(scsi_qla_host_t *vha)
2838 {
2839 int rval;
2840 mbx_cmd_t mc;
2841 mbx_cmd_t *mcp = &mc;
2842
2843 if (!IS_FWI2_CAPABLE(vha->hw))
2844 return QLA_FUNCTION_FAILED;
2845
2846 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
2847 "Entered %s.\n", __func__);
2848
2849 mcp->mb[0] = MBC_STOP_FIRMWARE;
2850 mcp->mb[1] = 0;
2851 mcp->out_mb = MBX_1|MBX_0;
2852 mcp->in_mb = MBX_0;
2853 mcp->tov = 5;
2854 mcp->flags = 0;
2855 rval = qla2x00_mailbox_command(vha, mcp);
2856
2857 if (rval != QLA_SUCCESS) {
2858 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
2859 if (mcp->mb[0] == MBS_INVALID_COMMAND)
2860 rval = QLA_INVALID_COMMAND;
2861 } else {
2862 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
2863 "Done %s.\n", __func__);
2864 }
2865
2866 return rval;
2867 }
2868
2869 int
2870 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
2871 uint16_t buffers)
2872 {
2873 int rval;
2874 mbx_cmd_t mc;
2875 mbx_cmd_t *mcp = &mc;
2876
2877 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
2878 "Entered %s.\n", __func__);
2879
2880 if (!IS_FWI2_CAPABLE(vha->hw))
2881 return QLA_FUNCTION_FAILED;
2882
2883 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2884 return QLA_FUNCTION_FAILED;
2885
2886 mcp->mb[0] = MBC_TRACE_CONTROL;
2887 mcp->mb[1] = TC_EFT_ENABLE;
2888 mcp->mb[2] = LSW(eft_dma);
2889 mcp->mb[3] = MSW(eft_dma);
2890 mcp->mb[4] = LSW(MSD(eft_dma));
2891 mcp->mb[5] = MSW(MSD(eft_dma));
2892 mcp->mb[6] = buffers;
2893 mcp->mb[7] = TC_AEN_DISABLE;
2894 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2895 mcp->in_mb = MBX_1|MBX_0;
2896 mcp->tov = MBX_TOV_SECONDS;
2897 mcp->flags = 0;
2898 rval = qla2x00_mailbox_command(vha, mcp);
2899 if (rval != QLA_SUCCESS) {
2900 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
2901 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2902 rval, mcp->mb[0], mcp->mb[1]);
2903 } else {
2904 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
2905 "Done %s.\n", __func__);
2906 }
2907
2908 return rval;
2909 }
2910
2911 int
2912 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
2913 {
2914 int rval;
2915 mbx_cmd_t mc;
2916 mbx_cmd_t *mcp = &mc;
2917
2918 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
2919 "Entered %s.\n", __func__);
2920
2921 if (!IS_FWI2_CAPABLE(vha->hw))
2922 return QLA_FUNCTION_FAILED;
2923
2924 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2925 return QLA_FUNCTION_FAILED;
2926
2927 mcp->mb[0] = MBC_TRACE_CONTROL;
2928 mcp->mb[1] = TC_EFT_DISABLE;
2929 mcp->out_mb = MBX_1|MBX_0;
2930 mcp->in_mb = MBX_1|MBX_0;
2931 mcp->tov = MBX_TOV_SECONDS;
2932 mcp->flags = 0;
2933 rval = qla2x00_mailbox_command(vha, mcp);
2934 if (rval != QLA_SUCCESS) {
2935 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
2936 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2937 rval, mcp->mb[0], mcp->mb[1]);
2938 } else {
2939 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
2940 "Done %s.\n", __func__);
2941 }
2942
2943 return rval;
2944 }
2945
2946 int
2947 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
2948 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
2949 {
2950 int rval;
2951 mbx_cmd_t mc;
2952 mbx_cmd_t *mcp = &mc;
2953
2954 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
2955 "Entered %s.\n", __func__);
2956
2957 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
2958 !IS_QLA83XX(vha->hw))
2959 return QLA_FUNCTION_FAILED;
2960
2961 if (unlikely(pci_channel_offline(vha->hw->pdev)))
2962 return QLA_FUNCTION_FAILED;
2963
2964 mcp->mb[0] = MBC_TRACE_CONTROL;
2965 mcp->mb[1] = TC_FCE_ENABLE;
2966 mcp->mb[2] = LSW(fce_dma);
2967 mcp->mb[3] = MSW(fce_dma);
2968 mcp->mb[4] = LSW(MSD(fce_dma));
2969 mcp->mb[5] = MSW(MSD(fce_dma));
2970 mcp->mb[6] = buffers;
2971 mcp->mb[7] = TC_AEN_DISABLE;
2972 mcp->mb[8] = 0;
2973 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
2974 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
2975 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
2976 MBX_1|MBX_0;
2977 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
2978 mcp->tov = MBX_TOV_SECONDS;
2979 mcp->flags = 0;
2980 rval = qla2x00_mailbox_command(vha, mcp);
2981 if (rval != QLA_SUCCESS) {
2982 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
2983 "Failed=%x mb[0]=%x mb[1]=%x.\n",
2984 rval, mcp->mb[0], mcp->mb[1]);
2985 } else {
2986 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
2987 "Done %s.\n", __func__);
2988
2989 if (mb)
2990 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
2991 if (dwords)
2992 *dwords = buffers;
2993 }
2994
2995 return rval;
2996 }
2997
2998 int
2999 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3000 {
3001 int rval;
3002 mbx_cmd_t mc;
3003 mbx_cmd_t *mcp = &mc;
3004
3005 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3006 "Entered %s.\n", __func__);
3007
3008 if (!IS_FWI2_CAPABLE(vha->hw))
3009 return QLA_FUNCTION_FAILED;
3010
3011 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3012 return QLA_FUNCTION_FAILED;
3013
3014 mcp->mb[0] = MBC_TRACE_CONTROL;
3015 mcp->mb[1] = TC_FCE_DISABLE;
3016 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3017 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3018 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3019 MBX_1|MBX_0;
3020 mcp->tov = MBX_TOV_SECONDS;
3021 mcp->flags = 0;
3022 rval = qla2x00_mailbox_command(vha, mcp);
3023 if (rval != QLA_SUCCESS) {
3024 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3025 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3026 rval, mcp->mb[0], mcp->mb[1]);
3027 } else {
3028 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3029 "Done %s.\n", __func__);
3030
3031 if (wr)
3032 *wr = (uint64_t) mcp->mb[5] << 48 |
3033 (uint64_t) mcp->mb[4] << 32 |
3034 (uint64_t) mcp->mb[3] << 16 |
3035 (uint64_t) mcp->mb[2];
3036 if (rd)
3037 *rd = (uint64_t) mcp->mb[9] << 48 |
3038 (uint64_t) mcp->mb[8] << 32 |
3039 (uint64_t) mcp->mb[7] << 16 |
3040 (uint64_t) mcp->mb[6];
3041 }
3042
3043 return rval;
3044 }
3045
3046 int
3047 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3048 uint16_t *port_speed, uint16_t *mb)
3049 {
3050 int rval;
3051 mbx_cmd_t mc;
3052 mbx_cmd_t *mcp = &mc;
3053
3054 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3055 "Entered %s.\n", __func__);
3056
3057 if (!IS_IIDMA_CAPABLE(vha->hw))
3058 return QLA_FUNCTION_FAILED;
3059
3060 mcp->mb[0] = MBC_PORT_PARAMS;
3061 mcp->mb[1] = loop_id;
3062 mcp->mb[2] = mcp->mb[3] = 0;
3063 mcp->mb[9] = vha->vp_idx;
3064 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3065 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3066 mcp->tov = MBX_TOV_SECONDS;
3067 mcp->flags = 0;
3068 rval = qla2x00_mailbox_command(vha, mcp);
3069
3070 /* Return mailbox statuses. */
3071 if (mb != NULL) {
3072 mb[0] = mcp->mb[0];
3073 mb[1] = mcp->mb[1];
3074 mb[3] = mcp->mb[3];
3075 }
3076
3077 if (rval != QLA_SUCCESS) {
3078 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3079 } else {
3080 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3081 "Done %s.\n", __func__);
3082 if (port_speed)
3083 *port_speed = mcp->mb[3];
3084 }
3085
3086 return rval;
3087 }
3088
3089 int
3090 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3091 uint16_t port_speed, uint16_t *mb)
3092 {
3093 int rval;
3094 mbx_cmd_t mc;
3095 mbx_cmd_t *mcp = &mc;
3096
3097 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3098 "Entered %s.\n", __func__);
3099
3100 if (!IS_IIDMA_CAPABLE(vha->hw))
3101 return QLA_FUNCTION_FAILED;
3102
3103 mcp->mb[0] = MBC_PORT_PARAMS;
3104 mcp->mb[1] = loop_id;
3105 mcp->mb[2] = BIT_0;
3106 if (IS_CNA_CAPABLE(vha->hw))
3107 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3108 else
3109 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3110 mcp->mb[9] = vha->vp_idx;
3111 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3112 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3113 mcp->tov = MBX_TOV_SECONDS;
3114 mcp->flags = 0;
3115 rval = qla2x00_mailbox_command(vha, mcp);
3116
3117 /* Return mailbox statuses. */
3118 if (mb != NULL) {
3119 mb[0] = mcp->mb[0];
3120 mb[1] = mcp->mb[1];
3121 mb[3] = mcp->mb[3];
3122 }
3123
3124 if (rval != QLA_SUCCESS) {
3125 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3126 "Failed=%x.\n", rval);
3127 } else {
3128 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3129 "Done %s.\n", __func__);
3130 }
3131
3132 return rval;
3133 }
3134
3135 void
3136 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3137 struct vp_rpt_id_entry_24xx *rptid_entry)
3138 {
3139 uint8_t vp_idx;
3140 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3141 struct qla_hw_data *ha = vha->hw;
3142 scsi_qla_host_t *vp;
3143 unsigned long flags;
3144 int found;
3145
3146 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3147 "Entered %s.\n", __func__);
3148
3149 if (rptid_entry->entry_status != 0)
3150 return;
3151
3152 if (rptid_entry->format == 0) {
3153 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3154 "Format 0 : Number of VPs setup %d, number of "
3155 "VPs acquired %d.\n",
3156 MSB(le16_to_cpu(rptid_entry->vp_count)),
3157 LSB(le16_to_cpu(rptid_entry->vp_count)));
3158 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3159 "Primary port id %02x%02x%02x.\n",
3160 rptid_entry->port_id[2], rptid_entry->port_id[1],
3161 rptid_entry->port_id[0]);
3162 } else if (rptid_entry->format == 1) {
3163 vp_idx = LSB(stat);
3164 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3165 "Format 1: VP[%d] enabled - status %d - with "
3166 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3167 rptid_entry->port_id[2], rptid_entry->port_id[1],
3168 rptid_entry->port_id[0]);
3169
3170 vp = vha;
3171 if (vp_idx == 0 && (MSB(stat) != 1))
3172 goto reg_needed;
3173
3174 if (MSB(stat) != 0 && MSB(stat) != 2) {
3175 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3176 "Could not acquire ID for VP[%d].\n", vp_idx);
3177 return;
3178 }
3179
3180 found = 0;
3181 spin_lock_irqsave(&ha->vport_slock, flags);
3182 list_for_each_entry(vp, &ha->vp_list, list) {
3183 if (vp_idx == vp->vp_idx) {
3184 found = 1;
3185 break;
3186 }
3187 }
3188 spin_unlock_irqrestore(&ha->vport_slock, flags);
3189
3190 if (!found)
3191 return;
3192
3193 vp->d_id.b.domain = rptid_entry->port_id[2];
3194 vp->d_id.b.area = rptid_entry->port_id[1];
3195 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3196
3197 /*
3198 * Cannot configure here as we are still sitting on the
3199 * response queue. Handle it in dpc context.
3200 */
3201 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3202
3203 reg_needed:
3204 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3205 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3206 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3207 qla2xxx_wake_dpc(vha);
3208 }
3209 }
3210
3211 /*
3212 * qla24xx_modify_vp_config
3213 * Change VP configuration for vha
3214 *
3215 * Input:
3216 * vha = adapter block pointer.
3217 *
3218 * Returns:
3219 * qla2xxx local function return status code.
3220 *
3221 * Context:
3222 * Kernel context.
3223 */
3224 int
3225 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3226 {
3227 int rval;
3228 struct vp_config_entry_24xx *vpmod;
3229 dma_addr_t vpmod_dma;
3230 struct qla_hw_data *ha = vha->hw;
3231 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3232
3233 /* This can be called by the parent */
3234
3235 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3236 "Entered %s.\n", __func__);
3237
3238 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3239 if (!vpmod) {
3240 ql_log(ql_log_warn, vha, 0x10bc,
3241 "Failed to allocate modify VP IOCB.\n");
3242 return QLA_MEMORY_ALLOC_FAILED;
3243 }
3244
3245 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3246 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3247 vpmod->entry_count = 1;
3248 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3249 vpmod->vp_count = 1;
3250 vpmod->vp_index1 = vha->vp_idx;
3251 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3252
3253 qlt_modify_vp_config(vha, vpmod);
3254
3255 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3256 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3257 vpmod->entry_count = 1;
3258
3259 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3260 if (rval != QLA_SUCCESS) {
3261 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3262 "Failed to issue VP config IOCB (%x).\n", rval);
3263 } else if (vpmod->comp_status != 0) {
3264 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3265 "Failed to complete IOCB -- error status (%x).\n",
3266 vpmod->comp_status);
3267 rval = QLA_FUNCTION_FAILED;
3268 } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3269 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3270 "Failed to complete IOCB -- completion status (%x).\n",
3271 le16_to_cpu(vpmod->comp_status));
3272 rval = QLA_FUNCTION_FAILED;
3273 } else {
3274 /* EMPTY */
3275 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3276 "Done %s.\n", __func__);
3277 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3278 }
3279 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3280
3281 return rval;
3282 }
3283
3284 /*
3285 * qla24xx_control_vp
3286 * Enable a virtual port for given host
3287 *
3288 * Input:
3289 * ha = adapter block pointer.
3290 * vhba = virtual adapter (unused)
3291 * index = index number for enabled VP
3292 *
3293 * Returns:
3294 * qla2xxx local function return status code.
3295 *
3296 * Context:
3297 * Kernel context.
3298 */
3299 int
3300 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3301 {
3302 int rval;
3303 int map, pos;
3304 struct vp_ctrl_entry_24xx *vce;
3305 dma_addr_t vce_dma;
3306 struct qla_hw_data *ha = vha->hw;
3307 int vp_index = vha->vp_idx;
3308 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3309
3310 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3311 "Entered %s enabling index %d.\n", __func__, vp_index);
3312
3313 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3314 return QLA_PARAMETER_ERROR;
3315
3316 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3317 if (!vce) {
3318 ql_log(ql_log_warn, vha, 0x10c2,
3319 "Failed to allocate VP control IOCB.\n");
3320 return QLA_MEMORY_ALLOC_FAILED;
3321 }
3322 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3323
3324 vce->entry_type = VP_CTRL_IOCB_TYPE;
3325 vce->entry_count = 1;
3326 vce->command = cpu_to_le16(cmd);
3327 vce->vp_count = __constant_cpu_to_le16(1);
3328
3329 /* index map in firmware starts with 1; decrement index
3330 * this is ok as we never use index 0
3331 */
3332 map = (vp_index - 1) / 8;
3333 pos = (vp_index - 1) & 7;
3334 mutex_lock(&ha->vport_lock);
3335 vce->vp_idx_map[map] |= 1 << pos;
3336 mutex_unlock(&ha->vport_lock);
3337
3338 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3339 if (rval != QLA_SUCCESS) {
3340 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3341 "Failed to issue VP control IOCB (%x).\n", rval);
3342 } else if (vce->entry_status != 0) {
3343 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3344 "Failed to complete IOCB -- error status (%x).\n",
3345 vce->entry_status);
3346 rval = QLA_FUNCTION_FAILED;
3347 } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3348 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3349 "Failed to complet IOCB -- completion status (%x).\n",
3350 le16_to_cpu(vce->comp_status));
3351 rval = QLA_FUNCTION_FAILED;
3352 } else {
3353 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3354 "Done %s.\n", __func__);
3355 }
3356
3357 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3358
3359 return rval;
3360 }
3361
3362 /*
3363 * qla2x00_send_change_request
3364 * Receive or disable RSCN request from fabric controller
3365 *
3366 * Input:
3367 * ha = adapter block pointer
3368 * format = registration format:
3369 * 0 - Reserved
3370 * 1 - Fabric detected registration
3371 * 2 - N_port detected registration
3372 * 3 - Full registration
3373 * FF - clear registration
3374 * vp_idx = Virtual port index
3375 *
3376 * Returns:
3377 * qla2x00 local function return status code.
3378 *
3379 * Context:
3380 * Kernel Context
3381 */
3382
3383 int
3384 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3385 uint16_t vp_idx)
3386 {
3387 int rval;
3388 mbx_cmd_t mc;
3389 mbx_cmd_t *mcp = &mc;
3390
3391 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3392 "Entered %s.\n", __func__);
3393
3394 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3395 mcp->mb[1] = format;
3396 mcp->mb[9] = vp_idx;
3397 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3398 mcp->in_mb = MBX_0|MBX_1;
3399 mcp->tov = MBX_TOV_SECONDS;
3400 mcp->flags = 0;
3401 rval = qla2x00_mailbox_command(vha, mcp);
3402
3403 if (rval == QLA_SUCCESS) {
3404 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3405 rval = BIT_1;
3406 }
3407 } else
3408 rval = BIT_1;
3409
3410 return rval;
3411 }
3412
3413 int
3414 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3415 uint32_t size)
3416 {
3417 int rval;
3418 mbx_cmd_t mc;
3419 mbx_cmd_t *mcp = &mc;
3420
3421 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3422 "Entered %s.\n", __func__);
3423
3424 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3425 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3426 mcp->mb[8] = MSW(addr);
3427 mcp->out_mb = MBX_8|MBX_0;
3428 } else {
3429 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3430 mcp->out_mb = MBX_0;
3431 }
3432 mcp->mb[1] = LSW(addr);
3433 mcp->mb[2] = MSW(req_dma);
3434 mcp->mb[3] = LSW(req_dma);
3435 mcp->mb[6] = MSW(MSD(req_dma));
3436 mcp->mb[7] = LSW(MSD(req_dma));
3437 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3438 if (IS_FWI2_CAPABLE(vha->hw)) {
3439 mcp->mb[4] = MSW(size);
3440 mcp->mb[5] = LSW(size);
3441 mcp->out_mb |= MBX_5|MBX_4;
3442 } else {
3443 mcp->mb[4] = LSW(size);
3444 mcp->out_mb |= MBX_4;
3445 }
3446
3447 mcp->in_mb = MBX_0;
3448 mcp->tov = MBX_TOV_SECONDS;
3449 mcp->flags = 0;
3450 rval = qla2x00_mailbox_command(vha, mcp);
3451
3452 if (rval != QLA_SUCCESS) {
3453 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3454 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3455 } else {
3456 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3457 "Done %s.\n", __func__);
3458 }
3459
3460 return rval;
3461 }
3462 /* 84XX Support **************************************************************/
3463
3464 struct cs84xx_mgmt_cmd {
3465 union {
3466 struct verify_chip_entry_84xx req;
3467 struct verify_chip_rsp_84xx rsp;
3468 } p;
3469 };
3470
3471 int
3472 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3473 {
3474 int rval, retry;
3475 struct cs84xx_mgmt_cmd *mn;
3476 dma_addr_t mn_dma;
3477 uint16_t options;
3478 unsigned long flags;
3479 struct qla_hw_data *ha = vha->hw;
3480
3481 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3482 "Entered %s.\n", __func__);
3483
3484 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3485 if (mn == NULL) {
3486 return QLA_MEMORY_ALLOC_FAILED;
3487 }
3488
3489 /* Force Update? */
3490 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3491 /* Diagnostic firmware? */
3492 /* options |= MENLO_DIAG_FW; */
3493 /* We update the firmware with only one data sequence. */
3494 options |= VCO_END_OF_DATA;
3495
3496 do {
3497 retry = 0;
3498 memset(mn, 0, sizeof(*mn));
3499 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3500 mn->p.req.entry_count = 1;
3501 mn->p.req.options = cpu_to_le16(options);
3502
3503 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3504 "Dump of Verify Request.\n");
3505 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3506 (uint8_t *)mn, sizeof(*mn));
3507
3508 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3509 if (rval != QLA_SUCCESS) {
3510 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3511 "Failed to issue verify IOCB (%x).\n", rval);
3512 goto verify_done;
3513 }
3514
3515 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3516 "Dump of Verify Response.\n");
3517 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3518 (uint8_t *)mn, sizeof(*mn));
3519
3520 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3521 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3522 le16_to_cpu(mn->p.rsp.failure_code) : 0;
3523 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3524 "cs=%x fc=%x.\n", status[0], status[1]);
3525
3526 if (status[0] != CS_COMPLETE) {
3527 rval = QLA_FUNCTION_FAILED;
3528 if (!(options & VCO_DONT_UPDATE_FW)) {
3529 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3530 "Firmware update failed. Retrying "
3531 "without update firmware.\n");
3532 options |= VCO_DONT_UPDATE_FW;
3533 options &= ~VCO_FORCE_UPDATE;
3534 retry = 1;
3535 }
3536 } else {
3537 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3538 "Firmware updated to %x.\n",
3539 le32_to_cpu(mn->p.rsp.fw_ver));
3540
3541 /* NOTE: we only update OP firmware. */
3542 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3543 ha->cs84xx->op_fw_version =
3544 le32_to_cpu(mn->p.rsp.fw_ver);
3545 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3546 flags);
3547 }
3548 } while (retry);
3549
3550 verify_done:
3551 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3552
3553 if (rval != QLA_SUCCESS) {
3554 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3555 "Failed=%x.\n", rval);
3556 } else {
3557 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3558 "Done %s.\n", __func__);
3559 }
3560
3561 return rval;
3562 }
3563
3564 int
3565 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3566 {
3567 int rval;
3568 unsigned long flags;
3569 mbx_cmd_t mc;
3570 mbx_cmd_t *mcp = &mc;
3571 struct device_reg_25xxmq __iomem *reg;
3572 struct qla_hw_data *ha = vha->hw;
3573
3574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3575 "Entered %s.\n", __func__);
3576
3577 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3578 mcp->mb[1] = req->options;
3579 mcp->mb[2] = MSW(LSD(req->dma));
3580 mcp->mb[3] = LSW(LSD(req->dma));
3581 mcp->mb[6] = MSW(MSD(req->dma));
3582 mcp->mb[7] = LSW(MSD(req->dma));
3583 mcp->mb[5] = req->length;
3584 if (req->rsp)
3585 mcp->mb[10] = req->rsp->id;
3586 mcp->mb[12] = req->qos;
3587 mcp->mb[11] = req->vp_idx;
3588 mcp->mb[13] = req->rid;
3589 if (IS_QLA83XX(ha))
3590 mcp->mb[15] = 0;
3591
3592 reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3593 QLA_QUE_PAGE * req->id);
3594
3595 mcp->mb[4] = req->id;
3596 /* que in ptr index */
3597 mcp->mb[8] = 0;
3598 /* que out ptr index */
3599 mcp->mb[9] = 0;
3600 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3601 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3602 mcp->in_mb = MBX_0;
3603 mcp->flags = MBX_DMA_OUT;
3604 mcp->tov = MBX_TOV_SECONDS * 2;
3605
3606 if (IS_QLA81XX(ha) || IS_QLA83XX(ha))
3607 mcp->in_mb |= MBX_1;
3608 if (IS_QLA83XX(ha)) {
3609 mcp->out_mb |= MBX_15;
3610 /* debug q create issue in SR-IOV */
3611 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3612 }
3613
3614 spin_lock_irqsave(&ha->hardware_lock, flags);
3615 if (!(req->options & BIT_0)) {
3616 WRT_REG_DWORD(&reg->req_q_in, 0);
3617 if (!IS_QLA83XX(ha))
3618 WRT_REG_DWORD(&reg->req_q_out, 0);
3619 }
3620 req->req_q_in = &reg->req_q_in;
3621 req->req_q_out = &reg->req_q_out;
3622 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3623
3624 rval = qla2x00_mailbox_command(vha, mcp);
3625 if (rval != QLA_SUCCESS) {
3626 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3627 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3628 } else {
3629 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3630 "Done %s.\n", __func__);
3631 }
3632
3633 return rval;
3634 }
3635
3636 int
3637 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3638 {
3639 int rval;
3640 unsigned long flags;
3641 mbx_cmd_t mc;
3642 mbx_cmd_t *mcp = &mc;
3643 struct device_reg_25xxmq __iomem *reg;
3644 struct qla_hw_data *ha = vha->hw;
3645
3646 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3647 "Entered %s.\n", __func__);
3648
3649 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3650 mcp->mb[1] = rsp->options;
3651 mcp->mb[2] = MSW(LSD(rsp->dma));
3652 mcp->mb[3] = LSW(LSD(rsp->dma));
3653 mcp->mb[6] = MSW(MSD(rsp->dma));
3654 mcp->mb[7] = LSW(MSD(rsp->dma));
3655 mcp->mb[5] = rsp->length;
3656 mcp->mb[14] = rsp->msix->entry;
3657 mcp->mb[13] = rsp->rid;
3658 if (IS_QLA83XX(ha))
3659 mcp->mb[15] = 0;
3660
3661 reg = (struct device_reg_25xxmq __iomem *)((ha->mqiobase) +
3662 QLA_QUE_PAGE * rsp->id);
3663
3664 mcp->mb[4] = rsp->id;
3665 /* que in ptr index */
3666 mcp->mb[8] = 0;
3667 /* que out ptr index */
3668 mcp->mb[9] = 0;
3669 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3670 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3671 mcp->in_mb = MBX_0;
3672 mcp->flags = MBX_DMA_OUT;
3673 mcp->tov = MBX_TOV_SECONDS * 2;
3674
3675 if (IS_QLA81XX(ha)) {
3676 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3677 mcp->in_mb |= MBX_1;
3678 } else if (IS_QLA83XX(ha)) {
3679 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3680 mcp->in_mb |= MBX_1;
3681 /* debug q create issue in SR-IOV */
3682 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3683 }
3684
3685 spin_lock_irqsave(&ha->hardware_lock, flags);
3686 if (!(rsp->options & BIT_0)) {
3687 WRT_REG_DWORD(&reg->rsp_q_out, 0);
3688 if (!IS_QLA83XX(ha))
3689 WRT_REG_DWORD(&reg->rsp_q_in, 0);
3690 }
3691
3692 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3693
3694 rval = qla2x00_mailbox_command(vha, mcp);
3695 if (rval != QLA_SUCCESS) {
3696 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3697 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3698 } else {
3699 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3700 "Done %s.\n", __func__);
3701 }
3702
3703 return rval;
3704 }
3705
3706 int
3707 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3708 {
3709 int rval;
3710 mbx_cmd_t mc;
3711 mbx_cmd_t *mcp = &mc;
3712
3713 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3714 "Entered %s.\n", __func__);
3715
3716 mcp->mb[0] = MBC_IDC_ACK;
3717 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3718 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3719 mcp->in_mb = MBX_0;
3720 mcp->tov = MBX_TOV_SECONDS;
3721 mcp->flags = 0;
3722 rval = qla2x00_mailbox_command(vha, mcp);
3723
3724 if (rval != QLA_SUCCESS) {
3725 ql_dbg(ql_dbg_mbx, vha, 0x10da,
3726 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3727 } else {
3728 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3729 "Done %s.\n", __func__);
3730 }
3731
3732 return rval;
3733 }
3734
3735 int
3736 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3737 {
3738 int rval;
3739 mbx_cmd_t mc;
3740 mbx_cmd_t *mcp = &mc;
3741
3742 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3743 "Entered %s.\n", __func__);
3744
3745 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3746 return QLA_FUNCTION_FAILED;
3747
3748 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3749 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3750 mcp->out_mb = MBX_1|MBX_0;
3751 mcp->in_mb = MBX_1|MBX_0;
3752 mcp->tov = MBX_TOV_SECONDS;
3753 mcp->flags = 0;
3754 rval = qla2x00_mailbox_command(vha, mcp);
3755
3756 if (rval != QLA_SUCCESS) {
3757 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3758 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3759 rval, mcp->mb[0], mcp->mb[1]);
3760 } else {
3761 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3762 "Done %s.\n", __func__);
3763 *sector_size = mcp->mb[1];
3764 }
3765
3766 return rval;
3767 }
3768
3769 int
3770 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3771 {
3772 int rval;
3773 mbx_cmd_t mc;
3774 mbx_cmd_t *mcp = &mc;
3775
3776 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3777 return QLA_FUNCTION_FAILED;
3778
3779 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3780 "Entered %s.\n", __func__);
3781
3782 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3783 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3784 FAC_OPT_CMD_WRITE_PROTECT;
3785 mcp->out_mb = MBX_1|MBX_0;
3786 mcp->in_mb = MBX_1|MBX_0;
3787 mcp->tov = MBX_TOV_SECONDS;
3788 mcp->flags = 0;
3789 rval = qla2x00_mailbox_command(vha, mcp);
3790
3791 if (rval != QLA_SUCCESS) {
3792 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
3793 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3794 rval, mcp->mb[0], mcp->mb[1]);
3795 } else {
3796 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
3797 "Done %s.\n", __func__);
3798 }
3799
3800 return rval;
3801 }
3802
3803 int
3804 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
3805 {
3806 int rval;
3807 mbx_cmd_t mc;
3808 mbx_cmd_t *mcp = &mc;
3809
3810 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw))
3811 return QLA_FUNCTION_FAILED;
3812
3813 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
3814 "Entered %s.\n", __func__);
3815
3816 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3817 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
3818 mcp->mb[2] = LSW(start);
3819 mcp->mb[3] = MSW(start);
3820 mcp->mb[4] = LSW(finish);
3821 mcp->mb[5] = MSW(finish);
3822 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3823 mcp->in_mb = MBX_2|MBX_1|MBX_0;
3824 mcp->tov = MBX_TOV_SECONDS;
3825 mcp->flags = 0;
3826 rval = qla2x00_mailbox_command(vha, mcp);
3827
3828 if (rval != QLA_SUCCESS) {
3829 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
3830 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
3831 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
3832 } else {
3833 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
3834 "Done %s.\n", __func__);
3835 }
3836
3837 return rval;
3838 }
3839
3840 int
3841 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
3842 {
3843 int rval = 0;
3844 mbx_cmd_t mc;
3845 mbx_cmd_t *mcp = &mc;
3846
3847 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
3848 "Entered %s.\n", __func__);
3849
3850 mcp->mb[0] = MBC_RESTART_MPI_FW;
3851 mcp->out_mb = MBX_0;
3852 mcp->in_mb = MBX_0|MBX_1;
3853 mcp->tov = MBX_TOV_SECONDS;
3854 mcp->flags = 0;
3855 rval = qla2x00_mailbox_command(vha, mcp);
3856
3857 if (rval != QLA_SUCCESS) {
3858 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
3859 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3860 rval, mcp->mb[0], mcp->mb[1]);
3861 } else {
3862 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
3863 "Done %s.\n", __func__);
3864 }
3865
3866 return rval;
3867 }
3868
3869 static int
3870 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
3871 {
3872 int rval;
3873 mbx_cmd_t mc;
3874 mbx_cmd_t *mcp = &mc;
3875
3876 if (!IS_FWI2_CAPABLE(vha->hw))
3877 return QLA_FUNCTION_FAILED;
3878
3879 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
3880 "Entered %s.\n", __func__);
3881
3882 mcp->mb[0] = MBC_GET_RNID_PARAMS;
3883 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
3884 mcp->out_mb = MBX_1|MBX_0;
3885 mcp->in_mb = MBX_1|MBX_0;
3886 mcp->tov = MBX_TOV_SECONDS;
3887 mcp->flags = 0;
3888 rval = qla2x00_mailbox_command(vha, mcp);
3889 *temp = mcp->mb[1];
3890
3891 if (rval != QLA_SUCCESS) {
3892 ql_dbg(ql_dbg_mbx, vha, 0x115a,
3893 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
3894 } else {
3895 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
3896 "Done %s.\n", __func__);
3897 }
3898
3899 return rval;
3900 }
3901
3902 int
3903 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3904 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3905 {
3906 int rval;
3907 mbx_cmd_t mc;
3908 mbx_cmd_t *mcp = &mc;
3909 struct qla_hw_data *ha = vha->hw;
3910
3911 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
3912 "Entered %s.\n", __func__);
3913
3914 if (!IS_FWI2_CAPABLE(ha))
3915 return QLA_FUNCTION_FAILED;
3916
3917 if (len == 1)
3918 opt |= BIT_0;
3919
3920 mcp->mb[0] = MBC_READ_SFP;
3921 mcp->mb[1] = dev;
3922 mcp->mb[2] = MSW(sfp_dma);
3923 mcp->mb[3] = LSW(sfp_dma);
3924 mcp->mb[6] = MSW(MSD(sfp_dma));
3925 mcp->mb[7] = LSW(MSD(sfp_dma));
3926 mcp->mb[8] = len;
3927 mcp->mb[9] = off;
3928 mcp->mb[10] = opt;
3929 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3930 mcp->in_mb = MBX_1|MBX_0;
3931 mcp->tov = MBX_TOV_SECONDS;
3932 mcp->flags = 0;
3933 rval = qla2x00_mailbox_command(vha, mcp);
3934
3935 if (opt & BIT_0)
3936 *sfp = mcp->mb[1];
3937
3938 if (rval != QLA_SUCCESS) {
3939 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
3940 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3941 } else {
3942 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
3943 "Done %s.\n", __func__);
3944 }
3945
3946 return rval;
3947 }
3948
3949 int
3950 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
3951 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
3952 {
3953 int rval;
3954 mbx_cmd_t mc;
3955 mbx_cmd_t *mcp = &mc;
3956 struct qla_hw_data *ha = vha->hw;
3957
3958 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
3959 "Entered %s.\n", __func__);
3960
3961 if (!IS_FWI2_CAPABLE(ha))
3962 return QLA_FUNCTION_FAILED;
3963
3964 if (len == 1)
3965 opt |= BIT_0;
3966
3967 if (opt & BIT_0)
3968 len = *sfp;
3969
3970 mcp->mb[0] = MBC_WRITE_SFP;
3971 mcp->mb[1] = dev;
3972 mcp->mb[2] = MSW(sfp_dma);
3973 mcp->mb[3] = LSW(sfp_dma);
3974 mcp->mb[6] = MSW(MSD(sfp_dma));
3975 mcp->mb[7] = LSW(MSD(sfp_dma));
3976 mcp->mb[8] = len;
3977 mcp->mb[9] = off;
3978 mcp->mb[10] = opt;
3979 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
3980 mcp->in_mb = MBX_1|MBX_0;
3981 mcp->tov = MBX_TOV_SECONDS;
3982 mcp->flags = 0;
3983 rval = qla2x00_mailbox_command(vha, mcp);
3984
3985 if (rval != QLA_SUCCESS) {
3986 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
3987 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3988 } else {
3989 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
3990 "Done %s.\n", __func__);
3991 }
3992
3993 return rval;
3994 }
3995
3996 int
3997 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
3998 uint16_t size_in_bytes, uint16_t *actual_size)
3999 {
4000 int rval;
4001 mbx_cmd_t mc;
4002 mbx_cmd_t *mcp = &mc;
4003
4004 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4005 "Entered %s.\n", __func__);
4006
4007 if (!IS_CNA_CAPABLE(vha->hw))
4008 return QLA_FUNCTION_FAILED;
4009
4010 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4011 mcp->mb[2] = MSW(stats_dma);
4012 mcp->mb[3] = LSW(stats_dma);
4013 mcp->mb[6] = MSW(MSD(stats_dma));
4014 mcp->mb[7] = LSW(MSD(stats_dma));
4015 mcp->mb[8] = size_in_bytes >> 2;
4016 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4017 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4018 mcp->tov = MBX_TOV_SECONDS;
4019 mcp->flags = 0;
4020 rval = qla2x00_mailbox_command(vha, mcp);
4021
4022 if (rval != QLA_SUCCESS) {
4023 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4024 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4025 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4026 } else {
4027 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4028 "Done %s.\n", __func__);
4029
4030
4031 *actual_size = mcp->mb[2] << 2;
4032 }
4033
4034 return rval;
4035 }
4036
4037 int
4038 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4039 uint16_t size)
4040 {
4041 int rval;
4042 mbx_cmd_t mc;
4043 mbx_cmd_t *mcp = &mc;
4044
4045 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4046 "Entered %s.\n", __func__);
4047
4048 if (!IS_CNA_CAPABLE(vha->hw))
4049 return QLA_FUNCTION_FAILED;
4050
4051 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4052 mcp->mb[1] = 0;
4053 mcp->mb[2] = MSW(tlv_dma);
4054 mcp->mb[3] = LSW(tlv_dma);
4055 mcp->mb[6] = MSW(MSD(tlv_dma));
4056 mcp->mb[7] = LSW(MSD(tlv_dma));
4057 mcp->mb[8] = size;
4058 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4059 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4060 mcp->tov = MBX_TOV_SECONDS;
4061 mcp->flags = 0;
4062 rval = qla2x00_mailbox_command(vha, mcp);
4063
4064 if (rval != QLA_SUCCESS) {
4065 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4066 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4067 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4068 } else {
4069 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4070 "Done %s.\n", __func__);
4071 }
4072
4073 return rval;
4074 }
4075
4076 int
4077 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4078 {
4079 int rval;
4080 mbx_cmd_t mc;
4081 mbx_cmd_t *mcp = &mc;
4082
4083 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4084 "Entered %s.\n", __func__);
4085
4086 if (!IS_FWI2_CAPABLE(vha->hw))
4087 return QLA_FUNCTION_FAILED;
4088
4089 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4090 mcp->mb[1] = LSW(risc_addr);
4091 mcp->mb[8] = MSW(risc_addr);
4092 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4093 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4094 mcp->tov = 30;
4095 mcp->flags = 0;
4096 rval = qla2x00_mailbox_command(vha, mcp);
4097 if (rval != QLA_SUCCESS) {
4098 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4099 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4100 } else {
4101 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4102 "Done %s.\n", __func__);
4103 *data = mcp->mb[3] << 16 | mcp->mb[2];
4104 }
4105
4106 return rval;
4107 }
4108
4109 int
4110 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4111 uint16_t *mresp)
4112 {
4113 int rval;
4114 mbx_cmd_t mc;
4115 mbx_cmd_t *mcp = &mc;
4116
4117 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4118 "Entered %s.\n", __func__);
4119
4120 memset(mcp->mb, 0 , sizeof(mcp->mb));
4121 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4122 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4123
4124 /* transfer count */
4125 mcp->mb[10] = LSW(mreq->transfer_size);
4126 mcp->mb[11] = MSW(mreq->transfer_size);
4127
4128 /* send data address */
4129 mcp->mb[14] = LSW(mreq->send_dma);
4130 mcp->mb[15] = MSW(mreq->send_dma);
4131 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4132 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4133
4134 /* receive data address */
4135 mcp->mb[16] = LSW(mreq->rcv_dma);
4136 mcp->mb[17] = MSW(mreq->rcv_dma);
4137 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4138 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4139
4140 /* Iteration count */
4141 mcp->mb[18] = LSW(mreq->iteration_count);
4142 mcp->mb[19] = MSW(mreq->iteration_count);
4143
4144 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4145 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4146 if (IS_CNA_CAPABLE(vha->hw))
4147 mcp->out_mb |= MBX_2;
4148 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4149
4150 mcp->buf_size = mreq->transfer_size;
4151 mcp->tov = MBX_TOV_SECONDS;
4152 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4153
4154 rval = qla2x00_mailbox_command(vha, mcp);
4155
4156 if (rval != QLA_SUCCESS) {
4157 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4158 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4159 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4160 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4161 } else {
4162 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4163 "Done %s.\n", __func__);
4164 }
4165
4166 /* Copy mailbox information */
4167 memcpy( mresp, mcp->mb, 64);
4168 return rval;
4169 }
4170
4171 int
4172 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4173 uint16_t *mresp)
4174 {
4175 int rval;
4176 mbx_cmd_t mc;
4177 mbx_cmd_t *mcp = &mc;
4178 struct qla_hw_data *ha = vha->hw;
4179
4180 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4181 "Entered %s.\n", __func__);
4182
4183 memset(mcp->mb, 0 , sizeof(mcp->mb));
4184 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4185 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4186 if (IS_CNA_CAPABLE(ha)) {
4187 mcp->mb[1] |= BIT_15;
4188 mcp->mb[2] = vha->fcoe_fcf_idx;
4189 }
4190 mcp->mb[16] = LSW(mreq->rcv_dma);
4191 mcp->mb[17] = MSW(mreq->rcv_dma);
4192 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4193 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4194
4195 mcp->mb[10] = LSW(mreq->transfer_size);
4196
4197 mcp->mb[14] = LSW(mreq->send_dma);
4198 mcp->mb[15] = MSW(mreq->send_dma);
4199 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4200 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4201
4202 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4203 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4204 if (IS_CNA_CAPABLE(ha))
4205 mcp->out_mb |= MBX_2;
4206
4207 mcp->in_mb = MBX_0;
4208 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4209 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4210 mcp->in_mb |= MBX_1;
4211 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4212 mcp->in_mb |= MBX_3;
4213
4214 mcp->tov = MBX_TOV_SECONDS;
4215 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4216 mcp->buf_size = mreq->transfer_size;
4217
4218 rval = qla2x00_mailbox_command(vha, mcp);
4219
4220 if (rval != QLA_SUCCESS) {
4221 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4222 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4223 rval, mcp->mb[0], mcp->mb[1]);
4224 } else {
4225 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4226 "Done %s.\n", __func__);
4227 }
4228
4229 /* Copy mailbox information */
4230 memcpy(mresp, mcp->mb, 64);
4231 return rval;
4232 }
4233
4234 int
4235 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4236 {
4237 int rval;
4238 mbx_cmd_t mc;
4239 mbx_cmd_t *mcp = &mc;
4240
4241 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4242 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4243
4244 mcp->mb[0] = MBC_ISP84XX_RESET;
4245 mcp->mb[1] = enable_diagnostic;
4246 mcp->out_mb = MBX_1|MBX_0;
4247 mcp->in_mb = MBX_1|MBX_0;
4248 mcp->tov = MBX_TOV_SECONDS;
4249 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4250 rval = qla2x00_mailbox_command(vha, mcp);
4251
4252 if (rval != QLA_SUCCESS)
4253 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4254 else
4255 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4256 "Done %s.\n", __func__);
4257
4258 return rval;
4259 }
4260
4261 int
4262 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4263 {
4264 int rval;
4265 mbx_cmd_t mc;
4266 mbx_cmd_t *mcp = &mc;
4267
4268 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4269 "Entered %s.\n", __func__);
4270
4271 if (!IS_FWI2_CAPABLE(vha->hw))
4272 return QLA_FUNCTION_FAILED;
4273
4274 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4275 mcp->mb[1] = LSW(risc_addr);
4276 mcp->mb[2] = LSW(data);
4277 mcp->mb[3] = MSW(data);
4278 mcp->mb[8] = MSW(risc_addr);
4279 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4280 mcp->in_mb = MBX_0;
4281 mcp->tov = 30;
4282 mcp->flags = 0;
4283 rval = qla2x00_mailbox_command(vha, mcp);
4284 if (rval != QLA_SUCCESS) {
4285 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4286 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4287 } else {
4288 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4289 "Done %s.\n", __func__);
4290 }
4291
4292 return rval;
4293 }
4294
4295 int
4296 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4297 {
4298 int rval;
4299 uint32_t stat, timer;
4300 uint16_t mb0 = 0;
4301 struct qla_hw_data *ha = vha->hw;
4302 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4303
4304 rval = QLA_SUCCESS;
4305
4306 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4307 "Entered %s.\n", __func__);
4308
4309 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4310
4311 /* Write the MBC data to the registers */
4312 WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
4313 WRT_REG_WORD(&reg->mailbox1, mb[0]);
4314 WRT_REG_WORD(&reg->mailbox2, mb[1]);
4315 WRT_REG_WORD(&reg->mailbox3, mb[2]);
4316 WRT_REG_WORD(&reg->mailbox4, mb[3]);
4317
4318 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
4319
4320 /* Poll for MBC interrupt */
4321 for (timer = 6000000; timer; timer--) {
4322 /* Check for pending interrupts. */
4323 stat = RD_REG_DWORD(&reg->host_status);
4324 if (stat & HSRX_RISC_INT) {
4325 stat &= 0xff;
4326
4327 if (stat == 0x1 || stat == 0x2 ||
4328 stat == 0x10 || stat == 0x11) {
4329 set_bit(MBX_INTERRUPT,
4330 &ha->mbx_cmd_flags);
4331 mb0 = RD_REG_WORD(&reg->mailbox0);
4332 WRT_REG_DWORD(&reg->hccr,
4333 HCCRX_CLR_RISC_INT);
4334 RD_REG_DWORD(&reg->hccr);
4335 break;
4336 }
4337 }
4338 udelay(5);
4339 }
4340
4341 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4342 rval = mb0 & MBS_MASK;
4343 else
4344 rval = QLA_FUNCTION_FAILED;
4345
4346 if (rval != QLA_SUCCESS) {
4347 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4348 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4349 } else {
4350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4351 "Done %s.\n", __func__);
4352 }
4353
4354 return rval;
4355 }
4356
4357 int
4358 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4359 {
4360 int rval;
4361 mbx_cmd_t mc;
4362 mbx_cmd_t *mcp = &mc;
4363 struct qla_hw_data *ha = vha->hw;
4364
4365 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4366 "Entered %s.\n", __func__);
4367
4368 if (!IS_FWI2_CAPABLE(ha))
4369 return QLA_FUNCTION_FAILED;
4370
4371 mcp->mb[0] = MBC_DATA_RATE;
4372 mcp->mb[1] = 0;
4373 mcp->out_mb = MBX_1|MBX_0;
4374 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4375 if (IS_QLA83XX(ha))
4376 mcp->in_mb |= MBX_3;
4377 mcp->tov = MBX_TOV_SECONDS;
4378 mcp->flags = 0;
4379 rval = qla2x00_mailbox_command(vha, mcp);
4380 if (rval != QLA_SUCCESS) {
4381 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4382 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4383 } else {
4384 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4385 "Done %s.\n", __func__);
4386 if (mcp->mb[1] != 0x7)
4387 ha->link_data_rate = mcp->mb[1];
4388 }
4389
4390 return rval;
4391 }
4392
4393 int
4394 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4395 {
4396 int rval;
4397 mbx_cmd_t mc;
4398 mbx_cmd_t *mcp = &mc;
4399 struct qla_hw_data *ha = vha->hw;
4400
4401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4402 "Entered %s.\n", __func__);
4403
4404 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha))
4405 return QLA_FUNCTION_FAILED;
4406 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4407 mcp->out_mb = MBX_0;
4408 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4409 mcp->tov = MBX_TOV_SECONDS;
4410 mcp->flags = 0;
4411
4412 rval = qla2x00_mailbox_command(vha, mcp);
4413
4414 if (rval != QLA_SUCCESS) {
4415 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4417 } else {
4418 /* Copy all bits to preserve original value */
4419 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4420
4421 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4422 "Done %s.\n", __func__);
4423 }
4424 return rval;
4425 }
4426
4427 int
4428 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4429 {
4430 int rval;
4431 mbx_cmd_t mc;
4432 mbx_cmd_t *mcp = &mc;
4433
4434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4435 "Entered %s.\n", __func__);
4436
4437 mcp->mb[0] = MBC_SET_PORT_CONFIG;
4438 /* Copy all bits to preserve original setting */
4439 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4440 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4441 mcp->in_mb = MBX_0;
4442 mcp->tov = MBX_TOV_SECONDS;
4443 mcp->flags = 0;
4444 rval = qla2x00_mailbox_command(vha, mcp);
4445
4446 if (rval != QLA_SUCCESS) {
4447 ql_dbg(ql_dbg_mbx, vha, 0x110d,
4448 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4449 } else
4450 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4451 "Done %s.\n", __func__);
4452
4453 return rval;
4454 }
4455
4456
4457 int
4458 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4459 uint16_t *mb)
4460 {
4461 int rval;
4462 mbx_cmd_t mc;
4463 mbx_cmd_t *mcp = &mc;
4464 struct qla_hw_data *ha = vha->hw;
4465
4466 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4467 "Entered %s.\n", __func__);
4468
4469 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4470 return QLA_FUNCTION_FAILED;
4471
4472 mcp->mb[0] = MBC_PORT_PARAMS;
4473 mcp->mb[1] = loop_id;
4474 if (ha->flags.fcp_prio_enabled)
4475 mcp->mb[2] = BIT_1;
4476 else
4477 mcp->mb[2] = BIT_2;
4478 mcp->mb[4] = priority & 0xf;
4479 mcp->mb[9] = vha->vp_idx;
4480 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4481 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4482 mcp->tov = 30;
4483 mcp->flags = 0;
4484 rval = qla2x00_mailbox_command(vha, mcp);
4485 if (mb != NULL) {
4486 mb[0] = mcp->mb[0];
4487 mb[1] = mcp->mb[1];
4488 mb[3] = mcp->mb[3];
4489 mb[4] = mcp->mb[4];
4490 }
4491
4492 if (rval != QLA_SUCCESS) {
4493 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
4494 } else {
4495 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4496 "Done %s.\n", __func__);
4497 }
4498
4499 return rval;
4500 }
4501
4502 int
4503 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4504 {
4505 int rval = QLA_FUNCTION_FAILED;
4506 struct qla_hw_data *ha = vha->hw;
4507 uint8_t byte;
4508
4509 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ca,
4510 "Entered %s.\n", __func__);
4511
4512 if (ha->thermal_support & THERMAL_SUPPORT_I2C) {
4513 rval = qla2x00_read_sfp(vha, 0, &byte,
4514 0x98, 0x1, 1, BIT_13|BIT_12|BIT_0);
4515 *temp = byte;
4516 if (rval == QLA_SUCCESS)
4517 goto done;
4518
4519 ql_log(ql_log_warn, vha, 0x10c9,
4520 "Thermal not supported through I2C bus, trying alternate "
4521 "method (ISP access).\n");
4522 ha->thermal_support &= ~THERMAL_SUPPORT_I2C;
4523 }
4524
4525 if (ha->thermal_support & THERMAL_SUPPORT_ISP) {
4526 rval = qla2x00_read_asic_temperature(vha, temp);
4527 if (rval == QLA_SUCCESS)
4528 goto done;
4529
4530 ql_log(ql_log_warn, vha, 0x1019,
4531 "Thermal not supported through ISP.\n");
4532 ha->thermal_support &= ~THERMAL_SUPPORT_ISP;
4533 }
4534
4535 ql_log(ql_log_warn, vha, 0x1150,
4536 "Thermal not supported by this card "
4537 "(ignoring further requests).\n");
4538 return rval;
4539
4540 done:
4541 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1018,
4542 "Done %s.\n", __func__);
4543 return rval;
4544 }
4545
4546 int
4547 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4548 {
4549 int rval;
4550 struct qla_hw_data *ha = vha->hw;
4551 mbx_cmd_t mc;
4552 mbx_cmd_t *mcp = &mc;
4553
4554 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4555 "Entered %s.\n", __func__);
4556
4557 if (!IS_FWI2_CAPABLE(ha))
4558 return QLA_FUNCTION_FAILED;
4559
4560 memset(mcp, 0, sizeof(mbx_cmd_t));
4561 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4562 mcp->mb[1] = 1;
4563
4564 mcp->out_mb = MBX_1|MBX_0;
4565 mcp->in_mb = MBX_0;
4566 mcp->tov = 30;
4567 mcp->flags = 0;
4568
4569 rval = qla2x00_mailbox_command(vha, mcp);
4570 if (rval != QLA_SUCCESS) {
4571 ql_dbg(ql_dbg_mbx, vha, 0x1016,
4572 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4573 } else {
4574 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4575 "Done %s.\n", __func__);
4576 }
4577
4578 return rval;
4579 }
4580
4581 int
4582 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4583 {
4584 int rval;
4585 struct qla_hw_data *ha = vha->hw;
4586 mbx_cmd_t mc;
4587 mbx_cmd_t *mcp = &mc;
4588
4589 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4590 "Entered %s.\n", __func__);
4591
4592 if (!IS_QLA82XX(ha))
4593 return QLA_FUNCTION_FAILED;
4594
4595 memset(mcp, 0, sizeof(mbx_cmd_t));
4596 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4597 mcp->mb[1] = 0;
4598
4599 mcp->out_mb = MBX_1|MBX_0;
4600 mcp->in_mb = MBX_0;
4601 mcp->tov = 30;
4602 mcp->flags = 0;
4603
4604 rval = qla2x00_mailbox_command(vha, mcp);
4605 if (rval != QLA_SUCCESS) {
4606 ql_dbg(ql_dbg_mbx, vha, 0x100c,
4607 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4608 } else {
4609 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4610 "Done %s.\n", __func__);
4611 }
4612
4613 return rval;
4614 }
4615
4616 int
4617 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4618 {
4619 struct qla_hw_data *ha = vha->hw;
4620 mbx_cmd_t mc;
4621 mbx_cmd_t *mcp = &mc;
4622 int rval = QLA_FUNCTION_FAILED;
4623
4624 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4625 "Entered %s.\n", __func__);
4626
4627 memset(mcp->mb, 0 , sizeof(mcp->mb));
4628 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4629 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4630 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4631 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4632
4633 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4634 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4635 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4636
4637 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4638 mcp->tov = MBX_TOV_SECONDS;
4639 rval = qla2x00_mailbox_command(vha, mcp);
4640
4641 /* Always copy back return mailbox values. */
4642 if (rval != QLA_SUCCESS) {
4643 ql_dbg(ql_dbg_mbx, vha, 0x1120,
4644 "mailbox command FAILED=0x%x, subcode=%x.\n",
4645 (mcp->mb[1] << 16) | mcp->mb[0],
4646 (mcp->mb[3] << 16) | mcp->mb[2]);
4647 } else {
4648 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4649 "Done %s.\n", __func__);
4650 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4651 if (!ha->md_template_size) {
4652 ql_dbg(ql_dbg_mbx, vha, 0x1122,
4653 "Null template size obtained.\n");
4654 rval = QLA_FUNCTION_FAILED;
4655 }
4656 }
4657 return rval;
4658 }
4659
4660 int
4661 qla82xx_md_get_template(scsi_qla_host_t *vha)
4662 {
4663 struct qla_hw_data *ha = vha->hw;
4664 mbx_cmd_t mc;
4665 mbx_cmd_t *mcp = &mc;
4666 int rval = QLA_FUNCTION_FAILED;
4667
4668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4669 "Entered %s.\n", __func__);
4670
4671 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4672 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4673 if (!ha->md_tmplt_hdr) {
4674 ql_log(ql_log_warn, vha, 0x1124,
4675 "Unable to allocate memory for Minidump template.\n");
4676 return rval;
4677 }
4678
4679 memset(mcp->mb, 0 , sizeof(mcp->mb));
4680 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4681 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4682 mcp->mb[2] = LSW(RQST_TMPLT);
4683 mcp->mb[3] = MSW(RQST_TMPLT);
4684 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
4685 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
4686 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
4687 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
4688 mcp->mb[8] = LSW(ha->md_template_size);
4689 mcp->mb[9] = MSW(ha->md_template_size);
4690
4691 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4692 mcp->tov = MBX_TOV_SECONDS;
4693 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
4694 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4695 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4696 rval = qla2x00_mailbox_command(vha, mcp);
4697
4698 if (rval != QLA_SUCCESS) {
4699 ql_dbg(ql_dbg_mbx, vha, 0x1125,
4700 "mailbox command FAILED=0x%x, subcode=%x.\n",
4701 ((mcp->mb[1] << 16) | mcp->mb[0]),
4702 ((mcp->mb[3] << 16) | mcp->mb[2]));
4703 } else
4704 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
4705 "Done %s.\n", __func__);
4706 return rval;
4707 }
4708
4709 int
4710 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4711 {
4712 int rval;
4713 struct qla_hw_data *ha = vha->hw;
4714 mbx_cmd_t mc;
4715 mbx_cmd_t *mcp = &mc;
4716
4717 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4718 return QLA_FUNCTION_FAILED;
4719
4720 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
4721 "Entered %s.\n", __func__);
4722
4723 memset(mcp, 0, sizeof(mbx_cmd_t));
4724 mcp->mb[0] = MBC_SET_LED_CONFIG;
4725 mcp->mb[1] = led_cfg[0];
4726 mcp->mb[2] = led_cfg[1];
4727 if (IS_QLA8031(ha)) {
4728 mcp->mb[3] = led_cfg[2];
4729 mcp->mb[4] = led_cfg[3];
4730 mcp->mb[5] = led_cfg[4];
4731 mcp->mb[6] = led_cfg[5];
4732 }
4733
4734 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4735 if (IS_QLA8031(ha))
4736 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4737 mcp->in_mb = MBX_0;
4738 mcp->tov = 30;
4739 mcp->flags = 0;
4740
4741 rval = qla2x00_mailbox_command(vha, mcp);
4742 if (rval != QLA_SUCCESS) {
4743 ql_dbg(ql_dbg_mbx, vha, 0x1134,
4744 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4745 } else {
4746 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
4747 "Done %s.\n", __func__);
4748 }
4749
4750 return rval;
4751 }
4752
4753 int
4754 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
4755 {
4756 int rval;
4757 struct qla_hw_data *ha = vha->hw;
4758 mbx_cmd_t mc;
4759 mbx_cmd_t *mcp = &mc;
4760
4761 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
4762 return QLA_FUNCTION_FAILED;
4763
4764 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
4765 "Entered %s.\n", __func__);
4766
4767 memset(mcp, 0, sizeof(mbx_cmd_t));
4768 mcp->mb[0] = MBC_GET_LED_CONFIG;
4769
4770 mcp->out_mb = MBX_0;
4771 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4772 if (IS_QLA8031(ha))
4773 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
4774 mcp->tov = 30;
4775 mcp->flags = 0;
4776
4777 rval = qla2x00_mailbox_command(vha, mcp);
4778 if (rval != QLA_SUCCESS) {
4779 ql_dbg(ql_dbg_mbx, vha, 0x1137,
4780 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4781 } else {
4782 led_cfg[0] = mcp->mb[1];
4783 led_cfg[1] = mcp->mb[2];
4784 if (IS_QLA8031(ha)) {
4785 led_cfg[2] = mcp->mb[3];
4786 led_cfg[3] = mcp->mb[4];
4787 led_cfg[4] = mcp->mb[5];
4788 led_cfg[5] = mcp->mb[6];
4789 }
4790 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
4791 "Done %s.\n", __func__);
4792 }
4793
4794 return rval;
4795 }
4796
4797 int
4798 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
4799 {
4800 int rval;
4801 struct qla_hw_data *ha = vha->hw;
4802 mbx_cmd_t mc;
4803 mbx_cmd_t *mcp = &mc;
4804
4805 if (!IS_QLA82XX(ha))
4806 return QLA_FUNCTION_FAILED;
4807
4808 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
4809 "Entered %s.\n", __func__);
4810
4811 memset(mcp, 0, sizeof(mbx_cmd_t));
4812 mcp->mb[0] = MBC_SET_LED_CONFIG;
4813 if (enable)
4814 mcp->mb[7] = 0xE;
4815 else
4816 mcp->mb[7] = 0xD;
4817
4818 mcp->out_mb = MBX_7|MBX_0;
4819 mcp->in_mb = MBX_0;
4820 mcp->tov = MBX_TOV_SECONDS;
4821 mcp->flags = 0;
4822
4823 rval = qla2x00_mailbox_command(vha, mcp);
4824 if (rval != QLA_SUCCESS) {
4825 ql_dbg(ql_dbg_mbx, vha, 0x1128,
4826 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4827 } else {
4828 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
4829 "Done %s.\n", __func__);
4830 }
4831
4832 return rval;
4833 }
4834
4835 int
4836 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
4837 {
4838 int rval;
4839 struct qla_hw_data *ha = vha->hw;
4840 mbx_cmd_t mc;
4841 mbx_cmd_t *mcp = &mc;
4842
4843 if (!IS_QLA83XX(ha))
4844 return QLA_FUNCTION_FAILED;
4845
4846 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
4847 "Entered %s.\n", __func__);
4848
4849 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
4850 mcp->mb[1] = LSW(reg);
4851 mcp->mb[2] = MSW(reg);
4852 mcp->mb[3] = LSW(data);
4853 mcp->mb[4] = MSW(data);
4854 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4855
4856 mcp->in_mb = MBX_1|MBX_0;
4857 mcp->tov = MBX_TOV_SECONDS;
4858 mcp->flags = 0;
4859 rval = qla2x00_mailbox_command(vha, mcp);
4860
4861 if (rval != QLA_SUCCESS) {
4862 ql_dbg(ql_dbg_mbx, vha, 0x1131,
4863 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4864 } else {
4865 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
4866 "Done %s.\n", __func__);
4867 }
4868
4869 return rval;
4870 }
4871
4872 int
4873 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
4874 {
4875 int rval;
4876 struct qla_hw_data *ha = vha->hw;
4877 mbx_cmd_t mc;
4878 mbx_cmd_t *mcp = &mc;
4879
4880 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4881 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
4882 "Implicit LOGO Unsupported.\n");
4883 return QLA_FUNCTION_FAILED;
4884 }
4885
4886
4887 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
4888 "Entering %s.\n", __func__);
4889
4890 /* Perform Implicit LOGO. */
4891 mcp->mb[0] = MBC_PORT_LOGOUT;
4892 mcp->mb[1] = fcport->loop_id;
4893 mcp->mb[10] = BIT_15;
4894 mcp->out_mb = MBX_10|MBX_1|MBX_0;
4895 mcp->in_mb = MBX_0;
4896 mcp->tov = MBX_TOV_SECONDS;
4897 mcp->flags = 0;
4898 rval = qla2x00_mailbox_command(vha, mcp);
4899 if (rval != QLA_SUCCESS)
4900 ql_dbg(ql_dbg_mbx, vha, 0x113d,
4901 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4902 else
4903 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
4904 "Done %s.\n", __func__);
4905
4906 return rval;
4907 }
4908
4909 int
4910 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
4911 {
4912 int rval;
4913 mbx_cmd_t mc;
4914 mbx_cmd_t *mcp = &mc;
4915 struct qla_hw_data *ha = vha->hw;
4916 unsigned long retry_max_time = jiffies + (2 * HZ);
4917
4918 if (!IS_QLA83XX(ha))
4919 return QLA_FUNCTION_FAILED;
4920
4921 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
4922
4923 retry_rd_reg:
4924 mcp->mb[0] = MBC_READ_REMOTE_REG;
4925 mcp->mb[1] = LSW(reg);
4926 mcp->mb[2] = MSW(reg);
4927 mcp->out_mb = MBX_2|MBX_1|MBX_0;
4928 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4929 mcp->tov = MBX_TOV_SECONDS;
4930 mcp->flags = 0;
4931 rval = qla2x00_mailbox_command(vha, mcp);
4932
4933 if (rval != QLA_SUCCESS) {
4934 ql_dbg(ql_dbg_mbx, vha, 0x114c,
4935 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4936 rval, mcp->mb[0], mcp->mb[1]);
4937 } else {
4938 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
4939 if (*data == QLA8XXX_BAD_VALUE) {
4940 /*
4941 * During soft-reset CAMRAM register reads might
4942 * return 0xbad0bad0. So retry for MAX of 2 sec
4943 * while reading camram registers.
4944 */
4945 if (time_after(jiffies, retry_max_time)) {
4946 ql_dbg(ql_dbg_mbx, vha, 0x1141,
4947 "Failure to read CAMRAM register. "
4948 "data=0x%x.\n", *data);
4949 return QLA_FUNCTION_FAILED;
4950 }
4951 msleep(100);
4952 goto retry_rd_reg;
4953 }
4954 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
4955 }
4956
4957 return rval;
4958 }
4959
4960 int
4961 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
4962 {
4963 int rval;
4964 mbx_cmd_t mc;
4965 mbx_cmd_t *mcp = &mc;
4966 struct qla_hw_data *ha = vha->hw;
4967
4968 if (!IS_QLA83XX(ha))
4969 return QLA_FUNCTION_FAILED;
4970
4971 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
4972
4973 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
4974 mcp->out_mb = MBX_0;
4975 mcp->in_mb = MBX_1|MBX_0;
4976 mcp->tov = MBX_TOV_SECONDS;
4977 mcp->flags = 0;
4978 rval = qla2x00_mailbox_command(vha, mcp);
4979
4980 if (rval != QLA_SUCCESS) {
4981 ql_dbg(ql_dbg_mbx, vha, 0x1144,
4982 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4983 rval, mcp->mb[0], mcp->mb[1]);
4984 ha->isp_ops->fw_dump(vha, 0);
4985 } else {
4986 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
4987 }
4988
4989 return rval;
4990 }
4991
4992 int
4993 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
4994 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
4995 {
4996 int rval;
4997 mbx_cmd_t mc;
4998 mbx_cmd_t *mcp = &mc;
4999 uint8_t subcode = (uint8_t)options;
5000 struct qla_hw_data *ha = vha->hw;
5001
5002 if (!IS_QLA8031(ha))
5003 return QLA_FUNCTION_FAILED;
5004
5005 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5006
5007 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5008 mcp->mb[1] = options;
5009 mcp->out_mb = MBX_1|MBX_0;
5010 if (subcode & BIT_2) {
5011 mcp->mb[2] = LSW(start_addr);
5012 mcp->mb[3] = MSW(start_addr);
5013 mcp->mb[4] = LSW(end_addr);
5014 mcp->mb[5] = MSW(end_addr);
5015 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5016 }
5017 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5018 if (!(subcode & (BIT_2 | BIT_5)))
5019 mcp->in_mb |= MBX_4|MBX_3;
5020 mcp->tov = MBX_TOV_SECONDS;
5021 mcp->flags = 0;
5022 rval = qla2x00_mailbox_command(vha, mcp);
5023
5024 if (rval != QLA_SUCCESS) {
5025 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5026 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5027 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5028 mcp->mb[4]);
5029 ha->isp_ops->fw_dump(vha, 0);
5030 } else {
5031 if (subcode & BIT_5)
5032 *sector_size = mcp->mb[1];
5033 else if (subcode & (BIT_6 | BIT_7)) {
5034 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5035 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5036 } else if (subcode & (BIT_3 | BIT_4)) {
5037 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5038 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5039 }
5040 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5041 }
5042
5043 return rval;
5044 }
5045
5046 int
5047 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5048 uint32_t size)
5049 {
5050 int rval;
5051 mbx_cmd_t mc;
5052 mbx_cmd_t *mcp = &mc;
5053
5054 if (!IS_MCTP_CAPABLE(vha->hw))
5055 return QLA_FUNCTION_FAILED;
5056
5057 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5058 "Entered %s.\n", __func__);
5059
5060 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5061 mcp->mb[1] = LSW(addr);
5062 mcp->mb[2] = MSW(req_dma);
5063 mcp->mb[3] = LSW(req_dma);
5064 mcp->mb[4] = MSW(size);
5065 mcp->mb[5] = LSW(size);
5066 mcp->mb[6] = MSW(MSD(req_dma));
5067 mcp->mb[7] = LSW(MSD(req_dma));
5068 mcp->mb[8] = MSW(addr);
5069 /* Setting RAM ID to valid */
5070 mcp->mb[10] |= BIT_7;
5071 /* For MCTP RAM ID is 0x40 */
5072 mcp->mb[10] |= 0x40;
5073
5074 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5075 MBX_0;
5076
5077 mcp->in_mb = MBX_0;
5078 mcp->tov = MBX_TOV_SECONDS;
5079 mcp->flags = 0;
5080 rval = qla2x00_mailbox_command(vha, mcp);
5081
5082 if (rval != QLA_SUCCESS) {
5083 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5084 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5085 } else {
5086 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5087 "Done %s.\n", __func__);
5088 }
5089
5090 return rval;
5091 }
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