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[SCSI] qla2xxx: Reconfigure thermal temperature.
[linux-2.6/btrfs-unstable.git] / drivers / scsi / qla2xxx / qla_init.c
blob91df7a58da3018f1ed47bffd45f00f713cd9c3aa
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2013 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
34 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
35 uint16_t *);
36
37 static int qla2x00_restart_isp(scsi_qla_host_t *);
38
39 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
40 static int qla84xx_init_chip(scsi_qla_host_t *);
41 static int qla25xx_init_queues(struct qla_hw_data *);
42
43 /* SRB Extensions ---------------------------------------------------------- */
44
45 void
46 qla2x00_sp_timeout(unsigned long __data)
47 {
48 srb_t *sp = (srb_t *)__data;
49 struct srb_iocb *iocb;
50 fc_port_t *fcport = sp->fcport;
51 struct qla_hw_data *ha = fcport->vha->hw;
52 struct req_que *req;
53 unsigned long flags;
54
55 spin_lock_irqsave(&ha->hardware_lock, flags);
56 req = ha->req_q_map[0];
57 req->outstanding_cmds[sp->handle] = NULL;
58 iocb = &sp->u.iocb_cmd;
59 iocb->timeout(sp);
60 sp->free(fcport->vha, sp);
61 spin_unlock_irqrestore(&ha->hardware_lock, flags);
62 }
63
64 void
65 qla2x00_sp_free(void *data, void *ptr)
66 {
67 srb_t *sp = (srb_t *)ptr;
68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
69 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
70
71 del_timer(&iocb->timer);
72 qla2x00_rel_sp(vha, sp);
73 }
74
75 /* Asynchronous Login/Logout Routines -------------------------------------- */
76
77 unsigned long
78 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79 {
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95 }
96
97 static void
98 qla2x00_async_iocb_timeout(void *data)
99 {
100 srb_t *sp = (srb_t *)data;
101 fc_port_t *fcport = sp->fcport;
102
103 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
104 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n",
105 sp->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area,
106 fcport->d_id.b.al_pa);
107
108 fcport->flags &= ~FCF_ASYNC_SENT;
109 if (sp->type == SRB_LOGIN_CMD) {
110 struct srb_iocb *lio = &sp->u.iocb_cmd;
111 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
112 /* Retry as needed. */
113 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
114 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
115 QLA_LOGIO_LOGIN_RETRIED : 0;
116 qla2x00_post_async_login_done_work(fcport->vha, fcport,
117 lio->u.logio.data);
118 }
119 }
120
121 static void
122 qla2x00_async_login_sp_done(void *data, void *ptr, int res)
123 {
124 srb_t *sp = (srb_t *)ptr;
125 struct srb_iocb *lio = &sp->u.iocb_cmd;
126 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
127
128 if (!test_bit(UNLOADING, &vha->dpc_flags))
129 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
130 lio->u.logio.data);
131 sp->free(sp->fcport->vha, sp);
132 }
133
134 int
135 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
136 uint16_t *data)
137 {
138 srb_t *sp;
139 struct srb_iocb *lio;
140 int rval;
141
142 rval = QLA_FUNCTION_FAILED;
143 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
144 if (!sp)
145 goto done;
146
147 sp->type = SRB_LOGIN_CMD;
148 sp->name = "login";
149 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
150
151 lio = &sp->u.iocb_cmd;
152 lio->timeout = qla2x00_async_iocb_timeout;
153 sp->done = qla2x00_async_login_sp_done;
154 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
155 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
156 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
157 rval = qla2x00_start_sp(sp);
158 if (rval != QLA_SUCCESS)
159 goto done_free_sp;
160
161 ql_dbg(ql_dbg_disc, vha, 0x2072,
162 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x "
163 "retries=%d.\n", sp->handle, fcport->loop_id,
164 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
165 fcport->login_retry);
166 return rval;
167
168 done_free_sp:
169 sp->free(fcport->vha, sp);
170 done:
171 return rval;
172 }
173
174 static void
175 qla2x00_async_logout_sp_done(void *data, void *ptr, int res)
176 {
177 srb_t *sp = (srb_t *)ptr;
178 struct srb_iocb *lio = &sp->u.iocb_cmd;
179 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
180
181 if (!test_bit(UNLOADING, &vha->dpc_flags))
182 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
183 lio->u.logio.data);
184 sp->free(sp->fcport->vha, sp);
185 }
186
187 int
188 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
189 {
190 srb_t *sp;
191 struct srb_iocb *lio;
192 int rval;
193
194 rval = QLA_FUNCTION_FAILED;
195 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
196 if (!sp)
197 goto done;
198
199 sp->type = SRB_LOGOUT_CMD;
200 sp->name = "logout";
201 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
202
203 lio = &sp->u.iocb_cmd;
204 lio->timeout = qla2x00_async_iocb_timeout;
205 sp->done = qla2x00_async_logout_sp_done;
206 rval = qla2x00_start_sp(sp);
207 if (rval != QLA_SUCCESS)
208 goto done_free_sp;
209
210 ql_dbg(ql_dbg_disc, vha, 0x2070,
211 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
212 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
213 fcport->d_id.b.area, fcport->d_id.b.al_pa);
214 return rval;
215
216 done_free_sp:
217 sp->free(fcport->vha, sp);
218 done:
219 return rval;
220 }
221
222 static void
223 qla2x00_async_adisc_sp_done(void *data, void *ptr, int res)
224 {
225 srb_t *sp = (srb_t *)ptr;
226 struct srb_iocb *lio = &sp->u.iocb_cmd;
227 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
228
229 if (!test_bit(UNLOADING, &vha->dpc_flags))
230 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
231 lio->u.logio.data);
232 sp->free(sp->fcport->vha, sp);
233 }
234
235 int
236 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
237 uint16_t *data)
238 {
239 srb_t *sp;
240 struct srb_iocb *lio;
241 int rval;
242
243 rval = QLA_FUNCTION_FAILED;
244 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
245 if (!sp)
246 goto done;
247
248 sp->type = SRB_ADISC_CMD;
249 sp->name = "adisc";
250 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
251
252 lio = &sp->u.iocb_cmd;
253 lio->timeout = qla2x00_async_iocb_timeout;
254 sp->done = qla2x00_async_adisc_sp_done;
255 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
256 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
257 rval = qla2x00_start_sp(sp);
258 if (rval != QLA_SUCCESS)
259 goto done_free_sp;
260
261 ql_dbg(ql_dbg_disc, vha, 0x206f,
262 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
263 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
264 fcport->d_id.b.area, fcport->d_id.b.al_pa);
265 return rval;
266
267 done_free_sp:
268 sp->free(fcport->vha, sp);
269 done:
270 return rval;
271 }
272
273 static void
274 qla2x00_async_tm_cmd_done(void *data, void *ptr, int res)
275 {
276 srb_t *sp = (srb_t *)ptr;
277 struct srb_iocb *iocb = &sp->u.iocb_cmd;
278 struct scsi_qla_host *vha = (scsi_qla_host_t *)data;
279 uint32_t flags;
280 uint16_t lun;
281 int rval;
282
283 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
284 flags = iocb->u.tmf.flags;
285 lun = (uint16_t)iocb->u.tmf.lun;
286
287 /* Issue Marker IOCB */
288 rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
289 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
290 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
291
292 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
293 ql_dbg(ql_dbg_taskm, vha, 0x8030,
294 "TM IOCB failed (%x).\n", rval);
295 }
296 }
297 sp->free(sp->fcport->vha, sp);
298 }
299
300 int
301 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t tm_flags, uint32_t lun,
302 uint32_t tag)
303 {
304 struct scsi_qla_host *vha = fcport->vha;
305 srb_t *sp;
306 struct srb_iocb *tcf;
307 int rval;
308
309 rval = QLA_FUNCTION_FAILED;
310 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
311 if (!sp)
312 goto done;
313
314 sp->type = SRB_TM_CMD;
315 sp->name = "tmf";
316 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
317
318 tcf = &sp->u.iocb_cmd;
319 tcf->u.tmf.flags = tm_flags;
320 tcf->u.tmf.lun = lun;
321 tcf->u.tmf.data = tag;
322 tcf->timeout = qla2x00_async_iocb_timeout;
323 sp->done = qla2x00_async_tm_cmd_done;
324
325 rval = qla2x00_start_sp(sp);
326 if (rval != QLA_SUCCESS)
327 goto done_free_sp;
328
329 ql_dbg(ql_dbg_taskm, vha, 0x802f,
330 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
331 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
332 fcport->d_id.b.area, fcport->d_id.b.al_pa);
333 return rval;
334
335 done_free_sp:
336 sp->free(fcport->vha, sp);
337 done:
338 return rval;
339 }
340
341 void
342 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
343 uint16_t *data)
344 {
345 int rval;
346
347 switch (data[0]) {
348 case MBS_COMMAND_COMPLETE:
349 /*
350 * Driver must validate login state - If PRLI not complete,
351 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
352 * requests.
353 */
354 rval = qla2x00_get_port_database(vha, fcport, 0);
355 if (rval == QLA_NOT_LOGGED_IN) {
356 fcport->flags &= ~FCF_ASYNC_SENT;
357 fcport->flags |= FCF_LOGIN_NEEDED;
358 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
359 break;
360 }
361
362 if (rval != QLA_SUCCESS) {
363 qla2x00_post_async_logout_work(vha, fcport, NULL);
364 qla2x00_post_async_login_work(vha, fcport, NULL);
365 break;
366 }
367 if (fcport->flags & FCF_FCP2_DEVICE) {
368 qla2x00_post_async_adisc_work(vha, fcport, data);
369 break;
370 }
371 qla2x00_update_fcport(vha, fcport);
372 break;
373 case MBS_COMMAND_ERROR:
374 fcport->flags &= ~FCF_ASYNC_SENT;
375 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
376 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
377 else
378 qla2x00_mark_device_lost(vha, fcport, 1, 0);
379 break;
380 case MBS_PORT_ID_USED:
381 fcport->loop_id = data[1];
382 qla2x00_post_async_logout_work(vha, fcport, NULL);
383 qla2x00_post_async_login_work(vha, fcport, NULL);
384 break;
385 case MBS_LOOP_ID_USED:
386 fcport->loop_id++;
387 rval = qla2x00_find_new_loop_id(vha, fcport);
388 if (rval != QLA_SUCCESS) {
389 fcport->flags &= ~FCF_ASYNC_SENT;
390 qla2x00_mark_device_lost(vha, fcport, 1, 0);
391 break;
392 }
393 qla2x00_post_async_login_work(vha, fcport, NULL);
394 break;
395 }
396 return;
397 }
398
399 void
400 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
401 uint16_t *data)
402 {
403 qla2x00_mark_device_lost(vha, fcport, 1, 0);
404 return;
405 }
406
407 void
408 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
409 uint16_t *data)
410 {
411 if (data[0] == MBS_COMMAND_COMPLETE) {
412 qla2x00_update_fcport(vha, fcport);
413
414 return;
415 }
416
417 /* Retry login. */
418 fcport->flags &= ~FCF_ASYNC_SENT;
419 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
420 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
421 else
422 qla2x00_mark_device_lost(vha, fcport, 1, 0);
423
424 return;
425 }
426
427 /****************************************************************************/
428 /* QLogic ISP2x00 Hardware Support Functions. */
429 /****************************************************************************/
430
431 static int
432 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
433 {
434 int rval = QLA_SUCCESS;
435 struct qla_hw_data *ha = vha->hw;
436 uint32_t idc_major_ver, idc_minor_ver;
437 uint16_t config[4];
438
439 qla83xx_idc_lock(vha, 0);
440
441 /* SV: TODO: Assign initialization timeout from
442 * flash-info / other param
443 */
444 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
445 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
446
447 /* Set our fcoe function presence */
448 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
449 ql_dbg(ql_dbg_p3p, vha, 0xb077,
450 "Error while setting DRV-Presence.\n");
451 rval = QLA_FUNCTION_FAILED;
452 goto exit;
453 }
454
455 /* Decide the reset ownership */
456 qla83xx_reset_ownership(vha);
457
458 /*
459 * On first protocol driver load:
460 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
461 * register.
462 * Others: Check compatibility with current IDC Major version.
463 */
464 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
465 if (ha->flags.nic_core_reset_owner) {
466 /* Set IDC Major version */
467 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
468 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
469
470 /* Clearing IDC-Lock-Recovery register */
471 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
472 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
473 /*
474 * Clear further IDC participation if we are not compatible with
475 * the current IDC Major Version.
476 */
477 ql_log(ql_log_warn, vha, 0xb07d,
478 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
479 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
480 __qla83xx_clear_drv_presence(vha);
481 rval = QLA_FUNCTION_FAILED;
482 goto exit;
483 }
484 /* Each function sets its supported Minor version. */
485 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
486 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
487 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
488
489 if (ha->flags.nic_core_reset_owner) {
490 memset(config, 0, sizeof(config));
491 if (!qla81xx_get_port_config(vha, config))
492 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
493 QLA8XXX_DEV_READY);
494 }
495
496 rval = qla83xx_idc_state_handler(vha);
497
498 exit:
499 qla83xx_idc_unlock(vha, 0);
500
501 return rval;
502 }
503
504 /*
505 * qla2x00_initialize_adapter
506 * Initialize board.
507 *
508 * Input:
509 * ha = adapter block pointer.
510 *
511 * Returns:
512 * 0 = success
513 */
514 int
515 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
516 {
517 int rval;
518 struct qla_hw_data *ha = vha->hw;
519 struct req_que *req = ha->req_q_map[0];
520
521 /* Clear adapter flags. */
522 vha->flags.online = 0;
523 ha->flags.chip_reset_done = 0;
524 vha->flags.reset_active = 0;
525 ha->flags.pci_channel_io_perm_failure = 0;
526 ha->flags.eeh_busy = 0;
527 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
528 atomic_set(&vha->loop_state, LOOP_DOWN);
529 vha->device_flags = DFLG_NO_CABLE;
530 vha->dpc_flags = 0;
531 vha->flags.management_server_logged_in = 0;
532 vha->marker_needed = 0;
533 ha->isp_abort_cnt = 0;
534 ha->beacon_blink_led = 0;
535
536 set_bit(0, ha->req_qid_map);
537 set_bit(0, ha->rsp_qid_map);
538
539 ql_dbg(ql_dbg_init, vha, 0x0040,
540 "Configuring PCI space...\n");
541 rval = ha->isp_ops->pci_config(vha);
542 if (rval) {
543 ql_log(ql_log_warn, vha, 0x0044,
544 "Unable to configure PCI space.\n");
545 return (rval);
546 }
547
548 ha->isp_ops->reset_chip(vha);
549
550 rval = qla2xxx_get_flash_info(vha);
551 if (rval) {
552 ql_log(ql_log_fatal, vha, 0x004f,
553 "Unable to validate FLASH data.\n");
554 return rval;
555 }
556
557 if (IS_QLA8044(ha)) {
558 qla8044_read_reset_template(vha);
559
560 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
561 * If DONRESET_BIT0 is set, drivers should not set dev_state
562 * to NEED_RESET. But if NEED_RESET is set, drivers should
563 * should honor the reset. */
564 if (ql2xdontresethba == 1)
565 qla8044_set_idc_dontreset(vha);
566 }
567
568 ha->isp_ops->get_flash_version(vha, req->ring);
569 ql_dbg(ql_dbg_init, vha, 0x0061,
570 "Configure NVRAM parameters...\n");
571
572 ha->isp_ops->nvram_config(vha);
573
574 if (ha->flags.disable_serdes) {
575 /* Mask HBA via NVRAM settings? */
576 ql_log(ql_log_info, vha, 0x0077,
577 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
578 return QLA_FUNCTION_FAILED;
579 }
580
581 ql_dbg(ql_dbg_init, vha, 0x0078,
582 "Verifying loaded RISC code...\n");
583
584 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
585 rval = ha->isp_ops->chip_diag(vha);
586 if (rval)
587 return (rval);
588 rval = qla2x00_setup_chip(vha);
589 if (rval)
590 return (rval);
591 }
592
593 if (IS_QLA84XX(ha)) {
594 ha->cs84xx = qla84xx_get_chip(vha);
595 if (!ha->cs84xx) {
596 ql_log(ql_log_warn, vha, 0x00d0,
597 "Unable to configure ISP84XX.\n");
598 return QLA_FUNCTION_FAILED;
599 }
600 }
601
602 if (qla_ini_mode_enabled(vha))
603 rval = qla2x00_init_rings(vha);
604
605 ha->flags.chip_reset_done = 1;
606
607 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
608 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
609 rval = qla84xx_init_chip(vha);
610 if (rval != QLA_SUCCESS) {
611 ql_log(ql_log_warn, vha, 0x00d4,
612 "Unable to initialize ISP84XX.\n");
613 qla84xx_put_chip(vha);
614 }
615 }
616
617 /* Load the NIC Core f/w if we are the first protocol driver. */
618 if (IS_QLA8031(ha)) {
619 rval = qla83xx_nic_core_fw_load(vha);
620 if (rval)
621 ql_log(ql_log_warn, vha, 0x0124,
622 "Error in initializing NIC Core f/w.\n");
623 }
624
625 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
626 qla24xx_read_fcp_prio_cfg(vha);
627
628 if (IS_P3P_TYPE(ha))
629 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
630 else
631 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
632
633 return (rval);
634 }
635
636 /**
637 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
638 * @ha: HA context
639 *
640 * Returns 0 on success.
641 */
642 int
643 qla2100_pci_config(scsi_qla_host_t *vha)
644 {
645 uint16_t w;
646 unsigned long flags;
647 struct qla_hw_data *ha = vha->hw;
648 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
649
650 pci_set_master(ha->pdev);
651 pci_try_set_mwi(ha->pdev);
652
653 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
654 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
655 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
656
657 pci_disable_rom(ha->pdev);
658
659 /* Get PCI bus information. */
660 spin_lock_irqsave(&ha->hardware_lock, flags);
661 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
662 spin_unlock_irqrestore(&ha->hardware_lock, flags);
663
664 return QLA_SUCCESS;
665 }
666
667 /**
668 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
669 * @ha: HA context
670 *
671 * Returns 0 on success.
672 */
673 int
674 qla2300_pci_config(scsi_qla_host_t *vha)
675 {
676 uint16_t w;
677 unsigned long flags = 0;
678 uint32_t cnt;
679 struct qla_hw_data *ha = vha->hw;
680 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
681
682 pci_set_master(ha->pdev);
683 pci_try_set_mwi(ha->pdev);
684
685 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
686 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
687
688 if (IS_QLA2322(ha) || IS_QLA6322(ha))
689 w &= ~PCI_COMMAND_INTX_DISABLE;
690 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
691
692 /*
693 * If this is a 2300 card and not 2312, reset the
694 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
695 * the 2310 also reports itself as a 2300 so we need to get the
696 * fb revision level -- a 6 indicates it really is a 2300 and
697 * not a 2310.
698 */
699 if (IS_QLA2300(ha)) {
700 spin_lock_irqsave(&ha->hardware_lock, flags);
701
702 /* Pause RISC. */
703 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
704 for (cnt = 0; cnt < 30000; cnt++) {
705 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
706 break;
707
708 udelay(10);
709 }
710
711 /* Select FPM registers. */
712 WRT_REG_WORD(&reg->ctrl_status, 0x20);
713 RD_REG_WORD(&reg->ctrl_status);
714
715 /* Get the fb rev level */
716 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
717
718 if (ha->fb_rev == FPM_2300)
719 pci_clear_mwi(ha->pdev);
720
721 /* Deselect FPM registers. */
722 WRT_REG_WORD(&reg->ctrl_status, 0x0);
723 RD_REG_WORD(&reg->ctrl_status);
724
725 /* Release RISC module. */
726 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
727 for (cnt = 0; cnt < 30000; cnt++) {
728 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
729 break;
730
731 udelay(10);
732 }
733
734 spin_unlock_irqrestore(&ha->hardware_lock, flags);
735 }
736
737 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
738
739 pci_disable_rom(ha->pdev);
740
741 /* Get PCI bus information. */
742 spin_lock_irqsave(&ha->hardware_lock, flags);
743 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
744 spin_unlock_irqrestore(&ha->hardware_lock, flags);
745
746 return QLA_SUCCESS;
747 }
748
749 /**
750 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
751 * @ha: HA context
752 *
753 * Returns 0 on success.
754 */
755 int
756 qla24xx_pci_config(scsi_qla_host_t *vha)
757 {
758 uint16_t w;
759 unsigned long flags = 0;
760 struct qla_hw_data *ha = vha->hw;
761 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
762
763 pci_set_master(ha->pdev);
764 pci_try_set_mwi(ha->pdev);
765
766 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
767 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
768 w &= ~PCI_COMMAND_INTX_DISABLE;
769 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
770
771 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
772
773 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
774 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
775 pcix_set_mmrbc(ha->pdev, 2048);
776
777 /* PCIe -- adjust Maximum Read Request Size (2048). */
778 if (pci_is_pcie(ha->pdev))
779 pcie_set_readrq(ha->pdev, 4096);
780
781 pci_disable_rom(ha->pdev);
782
783 ha->chip_revision = ha->pdev->revision;
784
785 /* Get PCI bus information. */
786 spin_lock_irqsave(&ha->hardware_lock, flags);
787 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
788 spin_unlock_irqrestore(&ha->hardware_lock, flags);
789
790 return QLA_SUCCESS;
791 }
792
793 /**
794 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
795 * @ha: HA context
796 *
797 * Returns 0 on success.
798 */
799 int
800 qla25xx_pci_config(scsi_qla_host_t *vha)
801 {
802 uint16_t w;
803 struct qla_hw_data *ha = vha->hw;
804
805 pci_set_master(ha->pdev);
806 pci_try_set_mwi(ha->pdev);
807
808 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
809 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
810 w &= ~PCI_COMMAND_INTX_DISABLE;
811 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
812
813 /* PCIe -- adjust Maximum Read Request Size (2048). */
814 if (pci_is_pcie(ha->pdev))
815 pcie_set_readrq(ha->pdev, 4096);
816
817 pci_disable_rom(ha->pdev);
818
819 ha->chip_revision = ha->pdev->revision;
820
821 return QLA_SUCCESS;
822 }
823
824 /**
825 * qla2x00_isp_firmware() - Choose firmware image.
826 * @ha: HA context
827 *
828 * Returns 0 on success.
829 */
830 static int
831 qla2x00_isp_firmware(scsi_qla_host_t *vha)
832 {
833 int rval;
834 uint16_t loop_id, topo, sw_cap;
835 uint8_t domain, area, al_pa;
836 struct qla_hw_data *ha = vha->hw;
837
838 /* Assume loading risc code */
839 rval = QLA_FUNCTION_FAILED;
840
841 if (ha->flags.disable_risc_code_load) {
842 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
843
844 /* Verify checksum of loaded RISC code. */
845 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
846 if (rval == QLA_SUCCESS) {
847 /* And, verify we are not in ROM code. */
848 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
849 &area, &domain, &topo, &sw_cap);
850 }
851 }
852
853 if (rval)
854 ql_dbg(ql_dbg_init, vha, 0x007a,
855 "**** Load RISC code ****.\n");
856
857 return (rval);
858 }
859
860 /**
861 * qla2x00_reset_chip() - Reset ISP chip.
862 * @ha: HA context
863 *
864 * Returns 0 on success.
865 */
866 void
867 qla2x00_reset_chip(scsi_qla_host_t *vha)
868 {
869 unsigned long flags = 0;
870 struct qla_hw_data *ha = vha->hw;
871 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
872 uint32_t cnt;
873 uint16_t cmd;
874
875 if (unlikely(pci_channel_offline(ha->pdev)))
876 return;
877
878 ha->isp_ops->disable_intrs(ha);
879
880 spin_lock_irqsave(&ha->hardware_lock, flags);
881
882 /* Turn off master enable */
883 cmd = 0;
884 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
885 cmd &= ~PCI_COMMAND_MASTER;
886 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
887
888 if (!IS_QLA2100(ha)) {
889 /* Pause RISC. */
890 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
891 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
892 for (cnt = 0; cnt < 30000; cnt++) {
893 if ((RD_REG_WORD(&reg->hccr) &
894 HCCR_RISC_PAUSE) != 0)
895 break;
896 udelay(100);
897 }
898 } else {
899 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
900 udelay(10);
901 }
902
903 /* Select FPM registers. */
904 WRT_REG_WORD(&reg->ctrl_status, 0x20);
905 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
906
907 /* FPM Soft Reset. */
908 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
909 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
910
911 /* Toggle Fpm Reset. */
912 if (!IS_QLA2200(ha)) {
913 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
914 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
915 }
916
917 /* Select frame buffer registers. */
918 WRT_REG_WORD(&reg->ctrl_status, 0x10);
919 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
920
921 /* Reset frame buffer FIFOs. */
922 if (IS_QLA2200(ha)) {
923 WRT_FB_CMD_REG(ha, reg, 0xa000);
924 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
925 } else {
926 WRT_FB_CMD_REG(ha, reg, 0x00fc);
927
928 /* Read back fb_cmd until zero or 3 seconds max */
929 for (cnt = 0; cnt < 3000; cnt++) {
930 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
931 break;
932 udelay(100);
933 }
934 }
935
936 /* Select RISC module registers. */
937 WRT_REG_WORD(&reg->ctrl_status, 0);
938 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
939
940 /* Reset RISC processor. */
941 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
942 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
943
944 /* Release RISC processor. */
945 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
946 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
947 }
948
949 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
950 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
951
952 /* Reset ISP chip. */
953 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
954
955 /* Wait for RISC to recover from reset. */
956 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
957 /*
958 * It is necessary to for a delay here since the card doesn't
959 * respond to PCI reads during a reset. On some architectures
960 * this will result in an MCA.
961 */
962 udelay(20);
963 for (cnt = 30000; cnt; cnt--) {
964 if ((RD_REG_WORD(&reg->ctrl_status) &
965 CSR_ISP_SOFT_RESET) == 0)
966 break;
967 udelay(100);
968 }
969 } else
970 udelay(10);
971
972 /* Reset RISC processor. */
973 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
974
975 WRT_REG_WORD(&reg->semaphore, 0);
976
977 /* Release RISC processor. */
978 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
979 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
980
981 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
982 for (cnt = 0; cnt < 30000; cnt++) {
983 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
984 break;
985
986 udelay(100);
987 }
988 } else
989 udelay(100);
990
991 /* Turn on master enable */
992 cmd |= PCI_COMMAND_MASTER;
993 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
994
995 /* Disable RISC pause on FPM parity error. */
996 if (!IS_QLA2100(ha)) {
997 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
998 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
999 }
1000
1001 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1002 }
1003
1004 /**
1005 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
1006 *
1007 * Returns 0 on success.
1008 */
1009 static int
1010 qla81xx_reset_mpi(scsi_qla_host_t *vha)
1011 {
1012 uint16_t mb[4] = {0x1010, 0, 1, 0};
1013
1014 if (!IS_QLA81XX(vha->hw))
1015 return QLA_SUCCESS;
1016
1017 return qla81xx_write_mpi_register(vha, mb);
1018 }
1019
1020 /**
1021 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
1022 * @ha: HA context
1023 *
1024 * Returns 0 on success.
1025 */
1026 static inline void
1027 qla24xx_reset_risc(scsi_qla_host_t *vha)
1028 {
1029 unsigned long flags = 0;
1030 struct qla_hw_data *ha = vha->hw;
1031 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1032 uint32_t cnt, d2;
1033 uint16_t wd;
1034 static int abts_cnt; /* ISP abort retry counts */
1035
1036 spin_lock_irqsave(&ha->hardware_lock, flags);
1037
1038 /* Reset RISC. */
1039 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1040 for (cnt = 0; cnt < 30000; cnt++) {
1041 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
1042 break;
1043
1044 udelay(10);
1045 }
1046
1047 WRT_REG_DWORD(&reg->ctrl_status,
1048 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
1049 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
1050
1051 udelay(100);
1052 /* Wait for firmware to complete NVRAM accesses. */
1053 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1054 for (cnt = 10000 ; cnt && d2; cnt--) {
1055 udelay(5);
1056 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1057 barrier();
1058 }
1059
1060 /* Wait for soft-reset to complete. */
1061 d2 = RD_REG_DWORD(&reg->ctrl_status);
1062 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
1063 udelay(5);
1064 d2 = RD_REG_DWORD(&reg->ctrl_status);
1065 barrier();
1066 }
1067
1068 /* If required, do an MPI FW reset now */
1069 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
1070 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
1071 if (++abts_cnt < 5) {
1072 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1073 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
1074 } else {
1075 /*
1076 * We exhausted the ISP abort retries. We have to
1077 * set the board offline.
1078 */
1079 abts_cnt = 0;
1080 vha->flags.online = 0;
1081 }
1082 }
1083 }
1084
1085 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
1086 RD_REG_DWORD(&reg->hccr);
1087
1088 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
1089 RD_REG_DWORD(&reg->hccr);
1090
1091 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
1092 RD_REG_DWORD(&reg->hccr);
1093
1094 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1095 for (cnt = 6000000 ; cnt && d2; cnt--) {
1096 udelay(5);
1097 d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
1098 barrier();
1099 }
1100
1101 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1102
1103 if (IS_NOPOLLING_TYPE(ha))
1104 ha->isp_ops->enable_intrs(ha);
1105 }
1106
1107 static void
1108 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
1109 {
1110 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1111
1112 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1113 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
1114
1115 }
1116
1117 static void
1118 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
1119 {
1120 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
1121
1122 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
1123 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
1124 }
1125
1126 static void
1127 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
1128 {
1129 struct qla_hw_data *ha = vha->hw;
1130 uint32_t wd32 = 0;
1131 uint delta_msec = 100;
1132 uint elapsed_msec = 0;
1133 uint timeout_msec;
1134 ulong n;
1135
1136 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha))
1137 return;
1138
1139 attempt:
1140 timeout_msec = TIMEOUT_SEMAPHORE;
1141 n = timeout_msec / delta_msec;
1142 while (n--) {
1143 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
1144 qla25xx_read_risc_sema_reg(vha, &wd32);
1145 if (wd32 & RISC_SEMAPHORE)
1146 break;
1147 msleep(delta_msec);
1148 elapsed_msec += delta_msec;
1149 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1150 goto force;
1151 }
1152
1153 if (!(wd32 & RISC_SEMAPHORE))
1154 goto force;
1155
1156 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1157 goto acquired;
1158
1159 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
1160 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
1161 n = timeout_msec / delta_msec;
1162 while (n--) {
1163 qla25xx_read_risc_sema_reg(vha, &wd32);
1164 if (!(wd32 & RISC_SEMAPHORE_FORCE))
1165 break;
1166 msleep(delta_msec);
1167 elapsed_msec += delta_msec;
1168 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
1169 goto force;
1170 }
1171
1172 if (wd32 & RISC_SEMAPHORE_FORCE)
1173 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
1174
1175 goto attempt;
1176
1177 force:
1178 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
1179
1180 acquired:
1181 return;
1182 }
1183
1184 /**
1185 * qla24xx_reset_chip() - Reset ISP24xx chip.
1186 * @ha: HA context
1187 *
1188 * Returns 0 on success.
1189 */
1190 void
1191 qla24xx_reset_chip(scsi_qla_host_t *vha)
1192 {
1193 struct qla_hw_data *ha = vha->hw;
1194
1195 if (pci_channel_offline(ha->pdev) &&
1196 ha->flags.pci_channel_io_perm_failure) {
1197 return;
1198 }
1199
1200 ha->isp_ops->disable_intrs(ha);
1201
1202 qla25xx_manipulate_risc_semaphore(vha);
1203
1204 /* Perform RISC reset. */
1205 qla24xx_reset_risc(vha);
1206 }
1207
1208 /**
1209 * qla2x00_chip_diag() - Test chip for proper operation.
1210 * @ha: HA context
1211 *
1212 * Returns 0 on success.
1213 */
1214 int
1215 qla2x00_chip_diag(scsi_qla_host_t *vha)
1216 {
1217 int rval;
1218 struct qla_hw_data *ha = vha->hw;
1219 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1220 unsigned long flags = 0;
1221 uint16_t data;
1222 uint32_t cnt;
1223 uint16_t mb[5];
1224 struct req_que *req = ha->req_q_map[0];
1225
1226 /* Assume a failed state */
1227 rval = QLA_FUNCTION_FAILED;
1228
1229 ql_dbg(ql_dbg_init, vha, 0x007b,
1230 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1231
1232 spin_lock_irqsave(&ha->hardware_lock, flags);
1233
1234 /* Reset ISP chip. */
1235 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
1236
1237 /*
1238 * We need to have a delay here since the card will not respond while
1239 * in reset causing an MCA on some architectures.
1240 */
1241 udelay(20);
1242 data = qla2x00_debounce_register(&reg->ctrl_status);
1243 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
1244 udelay(5);
1245 data = RD_REG_WORD(&reg->ctrl_status);
1246 barrier();
1247 }
1248
1249 if (!cnt)
1250 goto chip_diag_failed;
1251
1252 ql_dbg(ql_dbg_init, vha, 0x007c,
1253 "Reset register cleared by chip reset.\n");
1254
1255 /* Reset RISC processor. */
1256 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
1257 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
1258
1259 /* Workaround for QLA2312 PCI parity error */
1260 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
1261 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
1262 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
1263 udelay(5);
1264 data = RD_MAILBOX_REG(ha, reg, 0);
1265 barrier();
1266 }
1267 } else
1268 udelay(10);
1269
1270 if (!cnt)
1271 goto chip_diag_failed;
1272
1273 /* Check product ID of chip */
1274 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n");
1275
1276 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
1277 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
1278 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
1279 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
1280 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
1281 mb[3] != PROD_ID_3) {
1282 ql_log(ql_log_warn, vha, 0x0062,
1283 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
1284 mb[1], mb[2], mb[3]);
1285
1286 goto chip_diag_failed;
1287 }
1288 ha->product_id[0] = mb[1];
1289 ha->product_id[1] = mb[2];
1290 ha->product_id[2] = mb[3];
1291 ha->product_id[3] = mb[4];
1292
1293 /* Adjust fw RISC transfer size */
1294 if (req->length > 1024)
1295 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
1296 else
1297 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
1298 req->length;
1299
1300 if (IS_QLA2200(ha) &&
1301 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
1302 /* Limit firmware transfer size with a 2200A */
1303 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1304
1305 ha->device_type |= DT_ISP2200A;
1306 ha->fw_transfer_size = 128;
1307 }
1308
1309 /* Wrap Incoming Mailboxes Test. */
1310 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1311
1312 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
1313 rval = qla2x00_mbx_reg_test(vha);
1314 if (rval)
1315 ql_log(ql_log_warn, vha, 0x0080,
1316 "Failed mailbox send register test.\n");
1317 else
1318 /* Flag a successful rval */
1319 rval = QLA_SUCCESS;
1320 spin_lock_irqsave(&ha->hardware_lock, flags);
1321
1322 chip_diag_failed:
1323 if (rval)
1324 ql_log(ql_log_info, vha, 0x0081,
1325 "Chip diagnostics **** FAILED ****.\n");
1326
1327 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1328
1329 return (rval);
1330 }
1331
1332 /**
1333 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
1334 * @ha: HA context
1335 *
1336 * Returns 0 on success.
1337 */
1338 int
1339 qla24xx_chip_diag(scsi_qla_host_t *vha)
1340 {
1341 int rval;
1342 struct qla_hw_data *ha = vha->hw;
1343 struct req_que *req = ha->req_q_map[0];
1344
1345 if (IS_P3P_TYPE(ha))
1346 return QLA_SUCCESS;
1347
1348 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
1349
1350 rval = qla2x00_mbx_reg_test(vha);
1351 if (rval) {
1352 ql_log(ql_log_warn, vha, 0x0082,
1353 "Failed mailbox send register test.\n");
1354 } else {
1355 /* Flag a successful rval */
1356 rval = QLA_SUCCESS;
1357 }
1358
1359 return rval;
1360 }
1361
1362 void
1363 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
1364 {
1365 int rval;
1366 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
1367 eft_size, fce_size, mq_size;
1368 dma_addr_t tc_dma;
1369 void *tc;
1370 struct qla_hw_data *ha = vha->hw;
1371 struct req_que *req = ha->req_q_map[0];
1372 struct rsp_que *rsp = ha->rsp_q_map[0];
1373
1374 if (ha->fw_dump) {
1375 ql_dbg(ql_dbg_init, vha, 0x00bd,
1376 "Firmware dump already allocated.\n");
1377 return;
1378 }
1379
1380 ha->fw_dumped = 0;
1381 fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
1382 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
1383 fixed_size = sizeof(struct qla2100_fw_dump);
1384 } else if (IS_QLA23XX(ha)) {
1385 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
1386 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
1387 sizeof(uint16_t);
1388 } else if (IS_FWI2_CAPABLE(ha)) {
1389 if (IS_QLA83XX(ha))
1390 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
1391 else if (IS_QLA81XX(ha))
1392 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
1393 else if (IS_QLA25XX(ha))
1394 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
1395 else
1396 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
1397 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
1398 sizeof(uint32_t);
1399 if (ha->mqenable) {
1400 if (!IS_QLA83XX(ha))
1401 mq_size = sizeof(struct qla2xxx_mq_chain);
1402 /*
1403 * Allocate maximum buffer size for all queues.
1404 * Resizing must be done at end-of-dump processing.
1405 */
1406 mq_size += ha->max_req_queues *
1407 (req->length * sizeof(request_t));
1408 mq_size += ha->max_rsp_queues *
1409 (rsp->length * sizeof(response_t));
1410 }
1411 if (ha->tgt.atio_ring)
1412 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
1413 /* Allocate memory for Fibre Channel Event Buffer. */
1414 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha))
1415 goto try_eft;
1416
1417 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
1418 GFP_KERNEL);
1419 if (!tc) {
1420 ql_log(ql_log_warn, vha, 0x00be,
1421 "Unable to allocate (%d KB) for FCE.\n",
1422 FCE_SIZE / 1024);
1423 goto try_eft;
1424 }
1425
1426 memset(tc, 0, FCE_SIZE);
1427 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
1428 ha->fce_mb, &ha->fce_bufs);
1429 if (rval) {
1430 ql_log(ql_log_warn, vha, 0x00bf,
1431 "Unable to initialize FCE (%d).\n", rval);
1432 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
1433 tc_dma);
1434 ha->flags.fce_enabled = 0;
1435 goto try_eft;
1436 }
1437 ql_dbg(ql_dbg_init, vha, 0x00c0,
1438 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
1439
1440 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
1441 ha->flags.fce_enabled = 1;
1442 ha->fce_dma = tc_dma;
1443 ha->fce = tc;
1444 try_eft:
1445 /* Allocate memory for Extended Trace Buffer. */
1446 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
1447 GFP_KERNEL);
1448 if (!tc) {
1449 ql_log(ql_log_warn, vha, 0x00c1,
1450 "Unable to allocate (%d KB) for EFT.\n",
1451 EFT_SIZE / 1024);
1452 goto cont_alloc;
1453 }
1454
1455 memset(tc, 0, EFT_SIZE);
1456 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
1457 if (rval) {
1458 ql_log(ql_log_warn, vha, 0x00c2,
1459 "Unable to initialize EFT (%d).\n", rval);
1460 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
1461 tc_dma);
1462 goto cont_alloc;
1463 }
1464 ql_dbg(ql_dbg_init, vha, 0x00c3,
1465 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
1466
1467 eft_size = EFT_SIZE;
1468 ha->eft_dma = tc_dma;
1469 ha->eft = tc;
1470 }
1471 cont_alloc:
1472 req_q_size = req->length * sizeof(request_t);
1473 rsp_q_size = rsp->length * sizeof(response_t);
1474
1475 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
1476 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
1477 ha->chain_offset = dump_size;
1478 dump_size += mq_size + fce_size;
1479
1480 ha->fw_dump = vmalloc(dump_size);
1481 if (!ha->fw_dump) {
1482 ql_log(ql_log_warn, vha, 0x00c4,
1483 "Unable to allocate (%d KB) for firmware dump.\n",
1484 dump_size / 1024);
1485
1486 if (ha->fce) {
1487 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
1488 ha->fce_dma);
1489 ha->fce = NULL;
1490 ha->fce_dma = 0;
1491 }
1492
1493 if (ha->eft) {
1494 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
1495 ha->eft_dma);
1496 ha->eft = NULL;
1497 ha->eft_dma = 0;
1498 }
1499 return;
1500 }
1501 ql_dbg(ql_dbg_init, vha, 0x00c5,
1502 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
1503
1504 ha->fw_dump_len = dump_size;
1505 ha->fw_dump->signature[0] = 'Q';
1506 ha->fw_dump->signature[1] = 'L';
1507 ha->fw_dump->signature[2] = 'G';
1508 ha->fw_dump->signature[3] = 'C';
1509 ha->fw_dump->version = __constant_htonl(1);
1510
1511 ha->fw_dump->fixed_size = htonl(fixed_size);
1512 ha->fw_dump->mem_size = htonl(mem_size);
1513 ha->fw_dump->req_q_size = htonl(req_q_size);
1514 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
1515
1516 ha->fw_dump->eft_size = htonl(eft_size);
1517 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
1518 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
1519
1520 ha->fw_dump->header_size =
1521 htonl(offsetof(struct qla2xxx_fw_dump, isp));
1522 }
1523
1524 static int
1525 qla81xx_mpi_sync(scsi_qla_host_t *vha)
1526 {
1527 #define MPS_MASK 0xe0
1528 int rval;
1529 uint16_t dc;
1530 uint32_t dw;
1531
1532 if (!IS_QLA81XX(vha->hw))
1533 return QLA_SUCCESS;
1534
1535 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
1536 if (rval != QLA_SUCCESS) {
1537 ql_log(ql_log_warn, vha, 0x0105,
1538 "Unable to acquire semaphore.\n");
1539 goto done;
1540 }
1541
1542 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
1543 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
1544 if (rval != QLA_SUCCESS) {
1545 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
1546 goto done_release;
1547 }
1548
1549 dc &= MPS_MASK;
1550 if (dc == (dw & MPS_MASK))
1551 goto done_release;
1552
1553 dw &= ~MPS_MASK;
1554 dw |= dc;
1555 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
1556 if (rval != QLA_SUCCESS) {
1557 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
1558 }
1559
1560 done_release:
1561 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
1562 if (rval != QLA_SUCCESS) {
1563 ql_log(ql_log_warn, vha, 0x006d,
1564 "Unable to release semaphore.\n");
1565 }
1566
1567 done:
1568 return rval;
1569 }
1570
1571 int
1572 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
1573 {
1574 /* Don't try to reallocate the array */
1575 if (req->outstanding_cmds)
1576 return QLA_SUCCESS;
1577
1578 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase &&
1579 (ql2xmultique_tag || ql2xmaxqueues > 1)))
1580 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
1581 else {
1582 if (ha->fw_xcb_count <= ha->fw_iocb_count)
1583 req->num_outstanding_cmds = ha->fw_xcb_count;
1584 else
1585 req->num_outstanding_cmds = ha->fw_iocb_count;
1586 }
1587
1588 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1589 req->num_outstanding_cmds, GFP_KERNEL);
1590
1591 if (!req->outstanding_cmds) {
1592 /*
1593 * Try to allocate a minimal size just so we can get through
1594 * initialization.
1595 */
1596 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
1597 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
1598 req->num_outstanding_cmds, GFP_KERNEL);
1599
1600 if (!req->outstanding_cmds) {
1601 ql_log(ql_log_fatal, NULL, 0x0126,
1602 "Failed to allocate memory for "
1603 "outstanding_cmds for req_que %p.\n", req);
1604 req->num_outstanding_cmds = 0;
1605 return QLA_FUNCTION_FAILED;
1606 }
1607 }
1608
1609 return QLA_SUCCESS;
1610 }
1611
1612 /**
1613 * qla2x00_setup_chip() - Load and start RISC firmware.
1614 * @ha: HA context
1615 *
1616 * Returns 0 on success.
1617 */
1618 static int
1619 qla2x00_setup_chip(scsi_qla_host_t *vha)
1620 {
1621 int rval;
1622 uint32_t srisc_address = 0;
1623 struct qla_hw_data *ha = vha->hw;
1624 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1625 unsigned long flags;
1626 uint16_t fw_major_version;
1627
1628 if (IS_P3P_TYPE(ha)) {
1629 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1630 if (rval == QLA_SUCCESS) {
1631 qla2x00_stop_firmware(vha);
1632 goto enable_82xx_npiv;
1633 } else
1634 goto failed;
1635 }
1636
1637 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1638 /* Disable SRAM, Instruction RAM and GP RAM parity. */
1639 spin_lock_irqsave(&ha->hardware_lock, flags);
1640 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
1641 RD_REG_WORD(&reg->hccr);
1642 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1643 }
1644
1645 qla81xx_mpi_sync(vha);
1646
1647 /* Load firmware sequences */
1648 rval = ha->isp_ops->load_risc(vha, &srisc_address);
1649 if (rval == QLA_SUCCESS) {
1650 ql_dbg(ql_dbg_init, vha, 0x00c9,
1651 "Verifying Checksum of loaded RISC code.\n");
1652
1653 rval = qla2x00_verify_checksum(vha, srisc_address);
1654 if (rval == QLA_SUCCESS) {
1655 /* Start firmware execution. */
1656 ql_dbg(ql_dbg_init, vha, 0x00ca,
1657 "Starting firmware.\n");
1658
1659 rval = qla2x00_execute_fw(vha, srisc_address);
1660 /* Retrieve firmware information. */
1661 if (rval == QLA_SUCCESS) {
1662 enable_82xx_npiv:
1663 fw_major_version = ha->fw_major_version;
1664 if (IS_P3P_TYPE(ha))
1665 qla82xx_check_md_needed(vha);
1666 else
1667 rval = qla2x00_get_fw_version(vha);
1668 if (rval != QLA_SUCCESS)
1669 goto failed;
1670 ha->flags.npiv_supported = 0;
1671 if (IS_QLA2XXX_MIDTYPE(ha) &&
1672 (ha->fw_attributes & BIT_2)) {
1673 ha->flags.npiv_supported = 1;
1674 if ((!ha->max_npiv_vports) ||
1675 ((ha->max_npiv_vports + 1) %
1676 MIN_MULTI_ID_FABRIC))
1677 ha->max_npiv_vports =
1678 MIN_MULTI_ID_FABRIC - 1;
1679 }
1680 qla2x00_get_resource_cnts(vha, NULL,
1681 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count,
1682 &ha->max_npiv_vports, NULL);
1683
1684 /*
1685 * Allocate the array of outstanding commands
1686 * now that we know the firmware resources.
1687 */
1688 rval = qla2x00_alloc_outstanding_cmds(ha,
1689 vha->req);
1690 if (rval != QLA_SUCCESS)
1691 goto failed;
1692
1693 if (!fw_major_version && ql2xallocfwdump
1694 && !(IS_P3P_TYPE(ha)))
1695 qla2x00_alloc_fw_dump(vha);
1696 }
1697 } else {
1698 ql_log(ql_log_fatal, vha, 0x00cd,
1699 "ISP Firmware failed checksum.\n");
1700 goto failed;
1701 }
1702 } else
1703 goto failed;
1704
1705 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
1706 /* Enable proper parity. */
1707 spin_lock_irqsave(&ha->hardware_lock, flags);
1708 if (IS_QLA2300(ha))
1709 /* SRAM parity */
1710 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
1711 else
1712 /* SRAM, Instruction RAM and GP RAM parity */
1713 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
1714 RD_REG_WORD(&reg->hccr);
1715 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1716 }
1717
1718 if (IS_QLA83XX(ha))
1719 goto skip_fac_check;
1720
1721 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1722 uint32_t size;
1723
1724 rval = qla81xx_fac_get_sector_size(vha, &size);
1725 if (rval == QLA_SUCCESS) {
1726 ha->flags.fac_supported = 1;
1727 ha->fdt_block_size = size << 2;
1728 } else {
1729 ql_log(ql_log_warn, vha, 0x00ce,
1730 "Unsupported FAC firmware (%d.%02d.%02d).\n",
1731 ha->fw_major_version, ha->fw_minor_version,
1732 ha->fw_subminor_version);
1733 skip_fac_check:
1734 if (IS_QLA83XX(ha)) {
1735 ha->flags.fac_supported = 0;
1736 rval = QLA_SUCCESS;
1737 }
1738 }
1739 }
1740 failed:
1741 if (rval) {
1742 ql_log(ql_log_fatal, vha, 0x00cf,
1743 "Setup chip ****FAILED****.\n");
1744 }
1745
1746 return (rval);
1747 }
1748
1749 /**
1750 * qla2x00_init_response_q_entries() - Initializes response queue entries.
1751 * @ha: HA context
1752 *
1753 * Beginning of request ring has initialization control block already built
1754 * by nvram config routine.
1755 *
1756 * Returns 0 on success.
1757 */
1758 void
1759 qla2x00_init_response_q_entries(struct rsp_que *rsp)
1760 {
1761 uint16_t cnt;
1762 response_t *pkt;
1763
1764 rsp->ring_ptr = rsp->ring;
1765 rsp->ring_index = 0;
1766 rsp->status_srb = NULL;
1767 pkt = rsp->ring_ptr;
1768 for (cnt = 0; cnt < rsp->length; cnt++) {
1769 pkt->signature = RESPONSE_PROCESSED;
1770 pkt++;
1771 }
1772 }
1773
1774 /**
1775 * qla2x00_update_fw_options() - Read and process firmware options.
1776 * @ha: HA context
1777 *
1778 * Returns 0 on success.
1779 */
1780 void
1781 qla2x00_update_fw_options(scsi_qla_host_t *vha)
1782 {
1783 uint16_t swing, emphasis, tx_sens, rx_sens;
1784 struct qla_hw_data *ha = vha->hw;
1785
1786 memset(ha->fw_options, 0, sizeof(ha->fw_options));
1787 qla2x00_get_fw_options(vha, ha->fw_options);
1788
1789 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1790 return;
1791
1792 /* Serial Link options. */
1793 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
1794 "Serial link options.\n");
1795 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
1796 (uint8_t *)&ha->fw_seriallink_options,
1797 sizeof(ha->fw_seriallink_options));
1798
1799 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1800 if (ha->fw_seriallink_options[3] & BIT_2) {
1801 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
1802
1803 /* 1G settings */
1804 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
1805 emphasis = (ha->fw_seriallink_options[2] &
1806 (BIT_4 | BIT_3)) >> 3;
1807 tx_sens = ha->fw_seriallink_options[0] &
1808 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1809 rx_sens = (ha->fw_seriallink_options[0] &
1810 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1811 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
1812 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1813 if (rx_sens == 0x0)
1814 rx_sens = 0x3;
1815 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
1816 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1817 ha->fw_options[10] |= BIT_5 |
1818 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1819 (tx_sens & (BIT_1 | BIT_0));
1820
1821 /* 2G settings */
1822 swing = (ha->fw_seriallink_options[2] &
1823 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1824 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
1825 tx_sens = ha->fw_seriallink_options[1] &
1826 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1827 rx_sens = (ha->fw_seriallink_options[1] &
1828 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1829 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
1830 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
1831 if (rx_sens == 0x0)
1832 rx_sens = 0x3;
1833 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
1834 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
1835 ha->fw_options[11] |= BIT_5 |
1836 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
1837 (tx_sens & (BIT_1 | BIT_0));
1838 }
1839
1840 /* FCP2 options. */
1841 /* Return command IOCBs without waiting for an ABTS to complete. */
1842 ha->fw_options[3] |= BIT_13;
1843
1844 /* LED scheme. */
1845 if (ha->flags.enable_led_scheme)
1846 ha->fw_options[2] |= BIT_12;
1847
1848 /* Detect ISP6312. */
1849 if (IS_QLA6312(ha))
1850 ha->fw_options[2] |= BIT_13;
1851
1852 /* Update firmware options. */
1853 qla2x00_set_fw_options(vha, ha->fw_options);
1854 }
1855
1856 void
1857 qla24xx_update_fw_options(scsi_qla_host_t *vha)
1858 {
1859 int rval;
1860 struct qla_hw_data *ha = vha->hw;
1861
1862 if (IS_P3P_TYPE(ha))
1863 return;
1864
1865 /* Update Serial Link options. */
1866 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
1867 return;
1868
1869 rval = qla2x00_set_serdes_params(vha,
1870 le16_to_cpu(ha->fw_seriallink_options24[1]),
1871 le16_to_cpu(ha->fw_seriallink_options24[2]),
1872 le16_to_cpu(ha->fw_seriallink_options24[3]));
1873 if (rval != QLA_SUCCESS) {
1874 ql_log(ql_log_warn, vha, 0x0104,
1875 "Unable to update Serial Link options (%x).\n", rval);
1876 }
1877 }
1878
1879 void
1880 qla2x00_config_rings(struct scsi_qla_host *vha)
1881 {
1882 struct qla_hw_data *ha = vha->hw;
1883 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1884 struct req_que *req = ha->req_q_map[0];
1885 struct rsp_que *rsp = ha->rsp_q_map[0];
1886
1887 /* Setup ring parameters in initialization control block. */
1888 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
1889 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
1890 ha->init_cb->request_q_length = cpu_to_le16(req->length);
1891 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
1892 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1893 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1894 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1895 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1896
1897 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
1898 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
1899 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
1900 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
1901 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
1902 }
1903
1904 void
1905 qla24xx_config_rings(struct scsi_qla_host *vha)
1906 {
1907 struct qla_hw_data *ha = vha->hw;
1908 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
1909 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
1910 struct qla_msix_entry *msix;
1911 struct init_cb_24xx *icb;
1912 uint16_t rid = 0;
1913 struct req_que *req = ha->req_q_map[0];
1914 struct rsp_que *rsp = ha->rsp_q_map[0];
1915
1916 /* Setup ring parameters in initialization control block. */
1917 icb = (struct init_cb_24xx *)ha->init_cb;
1918 icb->request_q_outpointer = __constant_cpu_to_le16(0);
1919 icb->response_q_inpointer = __constant_cpu_to_le16(0);
1920 icb->request_q_length = cpu_to_le16(req->length);
1921 icb->response_q_length = cpu_to_le16(rsp->length);
1922 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
1923 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
1924 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
1925 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
1926
1927 /* Setup ATIO queue dma pointers for target mode */
1928 icb->atio_q_inpointer = __constant_cpu_to_le16(0);
1929 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
1930 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
1931 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
1932
1933 if (ha->mqenable || IS_QLA83XX(ha)) {
1934 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
1935 icb->rid = __constant_cpu_to_le16(rid);
1936 if (ha->flags.msix_enabled) {
1937 msix = &ha->msix_entries[1];
1938 ql_dbg(ql_dbg_init, vha, 0x00fd,
1939 "Registering vector 0x%x for base que.\n",
1940 msix->entry);
1941 icb->msix = cpu_to_le16(msix->entry);
1942 }
1943 /* Use alternate PCI bus number */
1944 if (MSB(rid))
1945 icb->firmware_options_2 |=
1946 __constant_cpu_to_le32(BIT_19);
1947 /* Use alternate PCI devfn */
1948 if (LSB(rid))
1949 icb->firmware_options_2 |=
1950 __constant_cpu_to_le32(BIT_18);
1951
1952 /* Use Disable MSIX Handshake mode for capable adapters */
1953 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
1954 (ha->flags.msix_enabled)) {
1955 icb->firmware_options_2 &=
1956 __constant_cpu_to_le32(~BIT_22);
1957 ha->flags.disable_msix_handshake = 1;
1958 ql_dbg(ql_dbg_init, vha, 0x00fe,
1959 "MSIX Handshake Disable Mode turned on.\n");
1960 } else {
1961 icb->firmware_options_2 |=
1962 __constant_cpu_to_le32(BIT_22);
1963 }
1964 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
1965
1966 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
1967 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
1968 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
1969 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
1970 } else {
1971 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
1972 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
1973 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
1974 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
1975 }
1976 qlt_24xx_config_rings(vha);
1977
1978 /* PCI posting */
1979 RD_REG_DWORD(&ioreg->hccr);
1980 }
1981
1982 /**
1983 * qla2x00_init_rings() - Initializes firmware.
1984 * @ha: HA context
1985 *
1986 * Beginning of request ring has initialization control block already built
1987 * by nvram config routine.
1988 *
1989 * Returns 0 on success.
1990 */
1991 int
1992 qla2x00_init_rings(scsi_qla_host_t *vha)
1993 {
1994 int rval;
1995 unsigned long flags = 0;
1996 int cnt, que;
1997 struct qla_hw_data *ha = vha->hw;
1998 struct req_que *req;
1999 struct rsp_que *rsp;
2000 struct mid_init_cb_24xx *mid_init_cb =
2001 (struct mid_init_cb_24xx *) ha->init_cb;
2002
2003 spin_lock_irqsave(&ha->hardware_lock, flags);
2004
2005 /* Clear outstanding commands array. */
2006 for (que = 0; que < ha->max_req_queues; que++) {
2007 req = ha->req_q_map[que];
2008 if (!req)
2009 continue;
2010 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
2011 req->outstanding_cmds[cnt] = NULL;
2012
2013 req->current_outstanding_cmd = 1;
2014
2015 /* Initialize firmware. */
2016 req->ring_ptr = req->ring;
2017 req->ring_index = 0;
2018 req->cnt = req->length;
2019 }
2020
2021 for (que = 0; que < ha->max_rsp_queues; que++) {
2022 rsp = ha->rsp_q_map[que];
2023 if (!rsp)
2024 continue;
2025 /* Initialize response queue entries */
2026 if (IS_QLAFX00(ha))
2027 qlafx00_init_response_q_entries(rsp);
2028 else
2029 qla2x00_init_response_q_entries(rsp);
2030 }
2031
2032 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
2033 ha->tgt.atio_ring_index = 0;
2034 /* Initialize ATIO queue entries */
2035 qlt_init_atio_q_entries(vha);
2036
2037 ha->isp_ops->config_rings(vha);
2038
2039 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2040
2041 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
2042
2043 if (IS_QLAFX00(ha)) {
2044 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
2045 goto next_check;
2046 }
2047
2048 /* Update any ISP specific firmware options before initialization. */
2049 ha->isp_ops->update_fw_options(vha);
2050
2051 if (ha->flags.npiv_supported) {
2052 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
2053 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
2054 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
2055 }
2056
2057 if (IS_FWI2_CAPABLE(ha)) {
2058 mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
2059 mid_init_cb->init_cb.execution_throttle =
2060 cpu_to_le16(ha->fw_xcb_count);
2061 }
2062
2063 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
2064 next_check:
2065 if (rval) {
2066 ql_log(ql_log_fatal, vha, 0x00d2,
2067 "Init Firmware **** FAILED ****.\n");
2068 } else {
2069 ql_dbg(ql_dbg_init, vha, 0x00d3,
2070 "Init Firmware -- success.\n");
2071 }
2072
2073 return (rval);
2074 }
2075
2076 /**
2077 * qla2x00_fw_ready() - Waits for firmware ready.
2078 * @ha: HA context
2079 *
2080 * Returns 0 on success.
2081 */
2082 static int
2083 qla2x00_fw_ready(scsi_qla_host_t *vha)
2084 {
2085 int rval;
2086 unsigned long wtime, mtime, cs84xx_time;
2087 uint16_t min_wait; /* Minimum wait time if loop is down */
2088 uint16_t wait_time; /* Wait time if loop is coming ready */
2089 uint16_t state[5];
2090 struct qla_hw_data *ha = vha->hw;
2091
2092 if (IS_QLAFX00(vha->hw))
2093 return qlafx00_fw_ready(vha);
2094
2095 rval = QLA_SUCCESS;
2096
2097 /* 20 seconds for loop down. */
2098 min_wait = 20;
2099
2100 /*
2101 * Firmware should take at most one RATOV to login, plus 5 seconds for
2102 * our own processing.
2103 */
2104 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
2105 wait_time = min_wait;
2106 }
2107
2108 /* Min wait time if loop down */
2109 mtime = jiffies + (min_wait * HZ);
2110
2111 /* wait time before firmware ready */
2112 wtime = jiffies + (wait_time * HZ);
2113
2114 /* Wait for ISP to finish LIP */
2115 if (!vha->flags.init_done)
2116 ql_log(ql_log_info, vha, 0x801e,
2117 "Waiting for LIP to complete.\n");
2118
2119 do {
2120 memset(state, -1, sizeof(state));
2121 rval = qla2x00_get_firmware_state(vha, state);
2122 if (rval == QLA_SUCCESS) {
2123 if (state[0] < FSTATE_LOSS_OF_SYNC) {
2124 vha->device_flags &= ~DFLG_NO_CABLE;
2125 }
2126 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
2127 ql_dbg(ql_dbg_taskm, vha, 0x801f,
2128 "fw_state=%x 84xx=%x.\n", state[0],
2129 state[2]);
2130 if ((state[2] & FSTATE_LOGGED_IN) &&
2131 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
2132 ql_dbg(ql_dbg_taskm, vha, 0x8028,
2133 "Sending verify iocb.\n");
2134
2135 cs84xx_time = jiffies;
2136 rval = qla84xx_init_chip(vha);
2137 if (rval != QLA_SUCCESS) {
2138 ql_log(ql_log_warn,
2139 vha, 0x8007,
2140 "Init chip failed.\n");
2141 break;
2142 }
2143
2144 /* Add time taken to initialize. */
2145 cs84xx_time = jiffies - cs84xx_time;
2146 wtime += cs84xx_time;
2147 mtime += cs84xx_time;
2148 ql_dbg(ql_dbg_taskm, vha, 0x8008,
2149 "Increasing wait time by %ld. "
2150 "New time %ld.\n", cs84xx_time,
2151 wtime);
2152 }
2153 } else if (state[0] == FSTATE_READY) {
2154 ql_dbg(ql_dbg_taskm, vha, 0x8037,
2155 "F/W Ready - OK.\n");
2156
2157 qla2x00_get_retry_cnt(vha, &ha->retry_count,
2158 &ha->login_timeout, &ha->r_a_tov);
2159
2160 rval = QLA_SUCCESS;
2161 break;
2162 }
2163
2164 rval = QLA_FUNCTION_FAILED;
2165
2166 if (atomic_read(&vha->loop_down_timer) &&
2167 state[0] != FSTATE_READY) {
2168 /* Loop down. Timeout on min_wait for states
2169 * other than Wait for Login.
2170 */
2171 if (time_after_eq(jiffies, mtime)) {
2172 ql_log(ql_log_info, vha, 0x8038,
2173 "Cable is unplugged...\n");
2174
2175 vha->device_flags |= DFLG_NO_CABLE;
2176 break;
2177 }
2178 }
2179 } else {
2180 /* Mailbox cmd failed. Timeout on min_wait. */
2181 if (time_after_eq(jiffies, mtime) ||
2182 ha->flags.isp82xx_fw_hung)
2183 break;
2184 }
2185
2186 if (time_after_eq(jiffies, wtime))
2187 break;
2188
2189 /* Delay for a while */
2190 msleep(500);
2191 } while (1);
2192
2193 ql_dbg(ql_dbg_taskm, vha, 0x803a,
2194 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0],
2195 state[1], state[2], state[3], state[4], jiffies);
2196
2197 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
2198 ql_log(ql_log_warn, vha, 0x803b,
2199 "Firmware ready **** FAILED ****.\n");
2200 }
2201
2202 return (rval);
2203 }
2204
2205 /*
2206 * qla2x00_configure_hba
2207 * Setup adapter context.
2208 *
2209 * Input:
2210 * ha = adapter state pointer.
2211 *
2212 * Returns:
2213 * 0 = success
2214 *
2215 * Context:
2216 * Kernel context.
2217 */
2218 static int
2219 qla2x00_configure_hba(scsi_qla_host_t *vha)
2220 {
2221 int rval;
2222 uint16_t loop_id;
2223 uint16_t topo;
2224 uint16_t sw_cap;
2225 uint8_t al_pa;
2226 uint8_t area;
2227 uint8_t domain;
2228 char connect_type[22];
2229 struct qla_hw_data *ha = vha->hw;
2230 unsigned long flags;
2231 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
2232
2233 /* Get host addresses. */
2234 rval = qla2x00_get_adapter_id(vha,
2235 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
2236 if (rval != QLA_SUCCESS) {
2237 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
2238 IS_CNA_CAPABLE(ha) ||
2239 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
2240 ql_dbg(ql_dbg_disc, vha, 0x2008,
2241 "Loop is in a transition state.\n");
2242 } else {
2243 ql_log(ql_log_warn, vha, 0x2009,
2244 "Unable to get host loop ID.\n");
2245 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
2246 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
2247 ql_log(ql_log_warn, vha, 0x1151,
2248 "Doing link init.\n");
2249 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
2250 return rval;
2251 }
2252 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2253 }
2254 return (rval);
2255 }
2256
2257 if (topo == 4) {
2258 ql_log(ql_log_info, vha, 0x200a,
2259 "Cannot get topology - retrying.\n");
2260 return (QLA_FUNCTION_FAILED);
2261 }
2262
2263 vha->loop_id = loop_id;
2264
2265 /* initialize */
2266 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
2267 ha->operating_mode = LOOP;
2268 ha->switch_cap = 0;
2269
2270 switch (topo) {
2271 case 0:
2272 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
2273 ha->current_topology = ISP_CFG_NL;
2274 strcpy(connect_type, "(Loop)");
2275 break;
2276
2277 case 1:
2278 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2279 ha->switch_cap = sw_cap;
2280 ha->current_topology = ISP_CFG_FL;
2281 strcpy(connect_type, "(FL_Port)");
2282 break;
2283
2284 case 2:
2285 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
2286 ha->operating_mode = P2P;
2287 ha->current_topology = ISP_CFG_N;
2288 strcpy(connect_type, "(N_Port-to-N_Port)");
2289 break;
2290
2291 case 3:
2292 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2293 ha->switch_cap = sw_cap;
2294 ha->operating_mode = P2P;
2295 ha->current_topology = ISP_CFG_F;
2296 strcpy(connect_type, "(F_Port)");
2297 break;
2298
2299 default:
2300 ql_dbg(ql_dbg_disc, vha, 0x200f,
2301 "HBA in unknown topology %x, using NL.\n", topo);
2302 ha->current_topology = ISP_CFG_NL;
2303 strcpy(connect_type, "(Loop)");
2304 break;
2305 }
2306
2307 /* Save Host port and loop ID. */
2308 /* byte order - Big Endian */
2309 vha->d_id.b.domain = domain;
2310 vha->d_id.b.area = area;
2311 vha->d_id.b.al_pa = al_pa;
2312
2313 spin_lock_irqsave(&ha->vport_slock, flags);
2314 qlt_update_vp_map(vha, SET_AL_PA);
2315 spin_unlock_irqrestore(&ha->vport_slock, flags);
2316
2317 if (!vha->flags.init_done)
2318 ql_log(ql_log_info, vha, 0x2010,
2319 "Topology - %s, Host Loop address 0x%x.\n",
2320 connect_type, vha->loop_id);
2321
2322 return(rval);
2323 }
2324
2325 inline void
2326 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
2327 char *def)
2328 {
2329 char *st, *en;
2330 uint16_t index;
2331 struct qla_hw_data *ha = vha->hw;
2332 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
2333 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
2334
2335 if (memcmp(model, BINZERO, len) != 0) {
2336 strncpy(ha->model_number, model, len);
2337 st = en = ha->model_number;
2338 en += len - 1;
2339 while (en > st) {
2340 if (*en != 0x20 && *en != 0x00)
2341 break;
2342 *en-- = '\0';
2343 }
2344
2345 index = (ha->pdev->subsystem_device & 0xff);
2346 if (use_tbl &&
2347 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2348 index < QLA_MODEL_NAMES)
2349 strncpy(ha->model_desc,
2350 qla2x00_model_name[index * 2 + 1],
2351 sizeof(ha->model_desc) - 1);
2352 } else {
2353 index = (ha->pdev->subsystem_device & 0xff);
2354 if (use_tbl &&
2355 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
2356 index < QLA_MODEL_NAMES) {
2357 strcpy(ha->model_number,
2358 qla2x00_model_name[index * 2]);
2359 strncpy(ha->model_desc,
2360 qla2x00_model_name[index * 2 + 1],
2361 sizeof(ha->model_desc) - 1);
2362 } else {
2363 strcpy(ha->model_number, def);
2364 }
2365 }
2366 if (IS_FWI2_CAPABLE(ha))
2367 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
2368 sizeof(ha->model_desc));
2369 }
2370
2371 /* On sparc systems, obtain port and node WWN from firmware
2372 * properties.
2373 */
2374 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
2375 {
2376 #ifdef CONFIG_SPARC
2377 struct qla_hw_data *ha = vha->hw;
2378 struct pci_dev *pdev = ha->pdev;
2379 struct device_node *dp = pci_device_to_OF_node(pdev);
2380 const u8 *val;
2381 int len;
2382
2383 val = of_get_property(dp, "port-wwn", &len);
2384 if (val && len >= WWN_SIZE)
2385 memcpy(nv->port_name, val, WWN_SIZE);
2386
2387 val = of_get_property(dp, "node-wwn", &len);
2388 if (val && len >= WWN_SIZE)
2389 memcpy(nv->node_name, val, WWN_SIZE);
2390 #endif
2391 }
2392
2393 /*
2394 * NVRAM configuration for ISP 2xxx
2395 *
2396 * Input:
2397 * ha = adapter block pointer.
2398 *
2399 * Output:
2400 * initialization control block in response_ring
2401 * host adapters parameters in host adapter block
2402 *
2403 * Returns:
2404 * 0 = success.
2405 */
2406 int
2407 qla2x00_nvram_config(scsi_qla_host_t *vha)
2408 {
2409 int rval;
2410 uint8_t chksum = 0;
2411 uint16_t cnt;
2412 uint8_t *dptr1, *dptr2;
2413 struct qla_hw_data *ha = vha->hw;
2414 init_cb_t *icb = ha->init_cb;
2415 nvram_t *nv = ha->nvram;
2416 uint8_t *ptr = ha->nvram;
2417 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2418
2419 rval = QLA_SUCCESS;
2420
2421 /* Determine NVRAM starting address. */
2422 ha->nvram_size = sizeof(nvram_t);
2423 ha->nvram_base = 0;
2424 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
2425 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
2426 ha->nvram_base = 0x80;
2427
2428 /* Get NVRAM data and calculate checksum. */
2429 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
2430 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
2431 chksum += *ptr++;
2432
2433 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
2434 "Contents of NVRAM.\n");
2435 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
2436 (uint8_t *)nv, ha->nvram_size);
2437
2438 /* Bad NVRAM data, set defaults parameters. */
2439 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
2440 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
2441 /* Reset NVRAM data. */
2442 ql_log(ql_log_warn, vha, 0x0064,
2443 "Inconsistent NVRAM "
2444 "detected: checksum=0x%x id=%c version=0x%x.\n",
2445 chksum, nv->id[0], nv->nvram_version);
2446 ql_log(ql_log_warn, vha, 0x0065,
2447 "Falling back to "
2448 "functioning (yet invalid -- WWPN) defaults.\n");
2449
2450 /*
2451 * Set default initialization control block.
2452 */
2453 memset(nv, 0, ha->nvram_size);
2454 nv->parameter_block_version = ICB_VERSION;
2455
2456 if (IS_QLA23XX(ha)) {
2457 nv->firmware_options[0] = BIT_2 | BIT_1;
2458 nv->firmware_options[1] = BIT_7 | BIT_5;
2459 nv->add_firmware_options[0] = BIT_5;
2460 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2461 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2462 nv->special_options[1] = BIT_7;
2463 } else if (IS_QLA2200(ha)) {
2464 nv->firmware_options[0] = BIT_2 | BIT_1;
2465 nv->firmware_options[1] = BIT_7 | BIT_5;
2466 nv->add_firmware_options[0] = BIT_5;
2467 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2468 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2469 } else if (IS_QLA2100(ha)) {
2470 nv->firmware_options[0] = BIT_3 | BIT_1;
2471 nv->firmware_options[1] = BIT_5;
2472 nv->frame_payload_size = __constant_cpu_to_le16(1024);
2473 }
2474
2475 nv->max_iocb_allocation = __constant_cpu_to_le16(256);
2476 nv->execution_throttle = __constant_cpu_to_le16(16);
2477 nv->retry_count = 8;
2478 nv->retry_delay = 1;
2479
2480 nv->port_name[0] = 33;
2481 nv->port_name[3] = 224;
2482 nv->port_name[4] = 139;
2483
2484 qla2xxx_nvram_wwn_from_ofw(vha, nv);
2485
2486 nv->login_timeout = 4;
2487
2488 /*
2489 * Set default host adapter parameters
2490 */
2491 nv->host_p[1] = BIT_2;
2492 nv->reset_delay = 5;
2493 nv->port_down_retry_count = 8;
2494 nv->max_luns_per_target = __constant_cpu_to_le16(8);
2495 nv->link_down_timeout = 60;
2496
2497 rval = 1;
2498 }
2499
2500 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
2501 /*
2502 * The SN2 does not provide BIOS emulation which means you can't change
2503 * potentially bogus BIOS settings. Force the use of default settings
2504 * for link rate and frame size. Hope that the rest of the settings
2505 * are valid.
2506 */
2507 if (ia64_platform_is("sn2")) {
2508 nv->frame_payload_size = __constant_cpu_to_le16(2048);
2509 if (IS_QLA23XX(ha))
2510 nv->special_options[1] = BIT_7;
2511 }
2512 #endif
2513
2514 /* Reset Initialization control block */
2515 memset(icb, 0, ha->init_cb_size);
2516
2517 /*
2518 * Setup driver NVRAM options.
2519 */
2520 nv->firmware_options[0] |= (BIT_6 | BIT_1);
2521 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
2522 nv->firmware_options[1] |= (BIT_5 | BIT_0);
2523 nv->firmware_options[1] &= ~BIT_4;
2524
2525 if (IS_QLA23XX(ha)) {
2526 nv->firmware_options[0] |= BIT_2;
2527 nv->firmware_options[0] &= ~BIT_3;
2528 nv->special_options[0] &= ~BIT_6;
2529 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
2530
2531 if (IS_QLA2300(ha)) {
2532 if (ha->fb_rev == FPM_2310) {
2533 strcpy(ha->model_number, "QLA2310");
2534 } else {
2535 strcpy(ha->model_number, "QLA2300");
2536 }
2537 } else {
2538 qla2x00_set_model_info(vha, nv->model_number,
2539 sizeof(nv->model_number), "QLA23xx");
2540 }
2541 } else if (IS_QLA2200(ha)) {
2542 nv->firmware_options[0] |= BIT_2;
2543 /*
2544 * 'Point-to-point preferred, else loop' is not a safe
2545 * connection mode setting.
2546 */
2547 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
2548 (BIT_5 | BIT_4)) {
2549 /* Force 'loop preferred, else point-to-point'. */
2550 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
2551 nv->add_firmware_options[0] |= BIT_5;
2552 }
2553 strcpy(ha->model_number, "QLA22xx");
2554 } else /*if (IS_QLA2100(ha))*/ {
2555 strcpy(ha->model_number, "QLA2100");
2556 }
2557
2558 /*
2559 * Copy over NVRAM RISC parameter block to initialization control block.
2560 */
2561 dptr1 = (uint8_t *)icb;
2562 dptr2 = (uint8_t *)&nv->parameter_block_version;
2563 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
2564 while (cnt--)
2565 *dptr1++ = *dptr2++;
2566
2567 /* Copy 2nd half. */
2568 dptr1 = (uint8_t *)icb->add_firmware_options;
2569 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
2570 while (cnt--)
2571 *dptr1++ = *dptr2++;
2572
2573 /* Use alternate WWN? */
2574 if (nv->host_p[1] & BIT_7) {
2575 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
2576 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
2577 }
2578
2579 /* Prepare nodename */
2580 if ((icb->firmware_options[1] & BIT_6) == 0) {
2581 /*
2582 * Firmware will apply the following mask if the nodename was
2583 * not provided.
2584 */
2585 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
2586 icb->node_name[0] &= 0xF0;
2587 }
2588
2589 /*
2590 * Set host adapter parameters.
2591 */
2592
2593 /*
2594 * BIT_7 in the host-parameters section allows for modification to
2595 * internal driver logging.
2596 */
2597 if (nv->host_p[0] & BIT_7)
2598 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
2599 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
2600 /* Always load RISC code on non ISP2[12]00 chips. */
2601 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
2602 ha->flags.disable_risc_code_load = 0;
2603 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
2604 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
2605 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2606 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
2607 ha->flags.disable_serdes = 0;
2608
2609 ha->operating_mode =
2610 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
2611
2612 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
2613 sizeof(ha->fw_seriallink_options));
2614
2615 /* save HBA serial number */
2616 ha->serial0 = icb->port_name[5];
2617 ha->serial1 = icb->port_name[6];
2618 ha->serial2 = icb->port_name[7];
2619 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
2620 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
2621
2622 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
2623
2624 ha->retry_count = nv->retry_count;
2625
2626 /* Set minimum login_timeout to 4 seconds. */
2627 if (nv->login_timeout != ql2xlogintimeout)
2628 nv->login_timeout = ql2xlogintimeout;
2629 if (nv->login_timeout < 4)
2630 nv->login_timeout = 4;
2631 ha->login_timeout = nv->login_timeout;
2632 icb->login_timeout = nv->login_timeout;
2633
2634 /* Set minimum RATOV to 100 tenths of a second. */
2635 ha->r_a_tov = 100;
2636
2637 ha->loop_reset_delay = nv->reset_delay;
2638
2639 /* Link Down Timeout = 0:
2640 *
2641 * When Port Down timer expires we will start returning
2642 * I/O's to OS with "DID_NO_CONNECT".
2643 *
2644 * Link Down Timeout != 0:
2645 *
2646 * The driver waits for the link to come up after link down
2647 * before returning I/Os to OS with "DID_NO_CONNECT".
2648 */
2649 if (nv->link_down_timeout == 0) {
2650 ha->loop_down_abort_time =
2651 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
2652 } else {
2653 ha->link_down_timeout = nv->link_down_timeout;
2654 ha->loop_down_abort_time =
2655 (LOOP_DOWN_TIME - ha->link_down_timeout);
2656 }
2657
2658 /*
2659 * Need enough time to try and get the port back.
2660 */
2661 ha->port_down_retry_count = nv->port_down_retry_count;
2662 if (qlport_down_retry)
2663 ha->port_down_retry_count = qlport_down_retry;
2664 /* Set login_retry_count */
2665 ha->login_retry_count = nv->retry_count;
2666 if (ha->port_down_retry_count == nv->port_down_retry_count &&
2667 ha->port_down_retry_count > 3)
2668 ha->login_retry_count = ha->port_down_retry_count;
2669 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
2670 ha->login_retry_count = ha->port_down_retry_count;
2671 if (ql2xloginretrycount)
2672 ha->login_retry_count = ql2xloginretrycount;
2673
2674 icb->lun_enables = __constant_cpu_to_le16(0);
2675 icb->command_resource_count = 0;
2676 icb->immediate_notify_resource_count = 0;
2677 icb->timeout = __constant_cpu_to_le16(0);
2678
2679 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2680 /* Enable RIO */
2681 icb->firmware_options[0] &= ~BIT_3;
2682 icb->add_firmware_options[0] &=
2683 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2684 icb->add_firmware_options[0] |= BIT_2;
2685 icb->response_accumulation_timer = 3;
2686 icb->interrupt_delay_timer = 5;
2687
2688 vha->flags.process_response_queue = 1;
2689 } else {
2690 /* Enable ZIO. */
2691 if (!vha->flags.init_done) {
2692 ha->zio_mode = icb->add_firmware_options[0] &
2693 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2694 ha->zio_timer = icb->interrupt_delay_timer ?
2695 icb->interrupt_delay_timer: 2;
2696 }
2697 icb->add_firmware_options[0] &=
2698 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2699 vha->flags.process_response_queue = 0;
2700 if (ha->zio_mode != QLA_ZIO_DISABLED) {
2701 ha->zio_mode = QLA_ZIO_MODE_6;
2702
2703 ql_log(ql_log_info, vha, 0x0068,
2704 "ZIO mode %d enabled; timer delay (%d us).\n",
2705 ha->zio_mode, ha->zio_timer * 100);
2706
2707 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
2708 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
2709 vha->flags.process_response_queue = 1;
2710 }
2711 }
2712
2713 if (rval) {
2714 ql_log(ql_log_warn, vha, 0x0069,
2715 "NVRAM configuration failed.\n");
2716 }
2717 return (rval);
2718 }
2719
2720 static void
2721 qla2x00_rport_del(void *data)
2722 {
2723 fc_port_t *fcport = data;
2724 struct fc_rport *rport;
2725 scsi_qla_host_t *vha = fcport->vha;
2726 unsigned long flags;
2727
2728 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
2729 rport = fcport->drport ? fcport->drport: fcport->rport;
2730 fcport->drport = NULL;
2731 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
2732 if (rport) {
2733 fc_remote_port_delete(rport);
2734 /*
2735 * Release the target mode FC NEXUS in qla_target.c code
2736 * if target mod is enabled.
2737 */
2738 qlt_fc_port_deleted(vha, fcport);
2739 }
2740 }
2741
2742 /**
2743 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2744 * @ha: HA context
2745 * @flags: allocation flags
2746 *
2747 * Returns a pointer to the allocated fcport, or NULL, if none available.
2748 */
2749 fc_port_t *
2750 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
2751 {
2752 fc_port_t *fcport;
2753
2754 fcport = kzalloc(sizeof(fc_port_t), flags);
2755 if (!fcport)
2756 return NULL;
2757
2758 /* Setup fcport template structure. */
2759 fcport->vha = vha;
2760 fcport->port_type = FCT_UNKNOWN;
2761 fcport->loop_id = FC_NO_LOOP_ID;
2762 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
2763 fcport->supported_classes = FC_COS_UNSPECIFIED;
2764
2765 return fcport;
2766 }
2767
2768 /*
2769 * qla2x00_configure_loop
2770 * Updates Fibre Channel Device Database with what is actually on loop.
2771 *
2772 * Input:
2773 * ha = adapter block pointer.
2774 *
2775 * Returns:
2776 * 0 = success.
2777 * 1 = error.
2778 * 2 = database was full and device was not configured.
2779 */
2780 static int
2781 qla2x00_configure_loop(scsi_qla_host_t *vha)
2782 {
2783 int rval;
2784 unsigned long flags, save_flags;
2785 struct qla_hw_data *ha = vha->hw;
2786 rval = QLA_SUCCESS;
2787
2788 /* Get Initiator ID */
2789 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
2790 rval = qla2x00_configure_hba(vha);
2791 if (rval != QLA_SUCCESS) {
2792 ql_dbg(ql_dbg_disc, vha, 0x2013,
2793 "Unable to configure HBA.\n");
2794 return (rval);
2795 }
2796 }
2797
2798 save_flags = flags = vha->dpc_flags;
2799 ql_dbg(ql_dbg_disc, vha, 0x2014,
2800 "Configure loop -- dpc flags = 0x%lx.\n", flags);
2801
2802 /*
2803 * If we have both an RSCN and PORT UPDATE pending then handle them
2804 * both at the same time.
2805 */
2806 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2807 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
2808
2809 qla2x00_get_data_rate(vha);
2810
2811 /* Determine what we need to do */
2812 if (ha->current_topology == ISP_CFG_FL &&
2813 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2814
2815 set_bit(RSCN_UPDATE, &flags);
2816
2817 } else if (ha->current_topology == ISP_CFG_F &&
2818 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
2819
2820 set_bit(RSCN_UPDATE, &flags);
2821 clear_bit(LOCAL_LOOP_UPDATE, &flags);
2822
2823 } else if (ha->current_topology == ISP_CFG_N) {
2824 clear_bit(RSCN_UPDATE, &flags);
2825
2826 } else if (!vha->flags.online ||
2827 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
2828
2829 set_bit(RSCN_UPDATE, &flags);
2830 set_bit(LOCAL_LOOP_UPDATE, &flags);
2831 }
2832
2833 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
2834 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2835 ql_dbg(ql_dbg_disc, vha, 0x2015,
2836 "Loop resync needed, failing.\n");
2837 rval = QLA_FUNCTION_FAILED;
2838 } else
2839 rval = qla2x00_configure_local_loop(vha);
2840 }
2841
2842 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
2843 if (LOOP_TRANSITION(vha)) {
2844 ql_dbg(ql_dbg_disc, vha, 0x201e,
2845 "Needs RSCN update and loop transition.\n");
2846 rval = QLA_FUNCTION_FAILED;
2847 }
2848 else
2849 rval = qla2x00_configure_fabric(vha);
2850 }
2851
2852 if (rval == QLA_SUCCESS) {
2853 if (atomic_read(&vha->loop_down_timer) ||
2854 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2855 rval = QLA_FUNCTION_FAILED;
2856 } else {
2857 atomic_set(&vha->loop_state, LOOP_READY);
2858 ql_dbg(ql_dbg_disc, vha, 0x2069,
2859 "LOOP READY.\n");
2860 }
2861 }
2862
2863 if (rval) {
2864 ql_dbg(ql_dbg_disc, vha, 0x206a,
2865 "%s *** FAILED ***.\n", __func__);
2866 } else {
2867 ql_dbg(ql_dbg_disc, vha, 0x206b,
2868 "%s: exiting normally.\n", __func__);
2869 }
2870
2871 /* Restore state if a resync event occurred during processing */
2872 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
2873 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
2874 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2875 if (test_bit(RSCN_UPDATE, &save_flags)) {
2876 set_bit(RSCN_UPDATE, &vha->dpc_flags);
2877 }
2878 }
2879
2880 return (rval);
2881 }
2882
2883
2884
2885 /*
2886 * qla2x00_configure_local_loop
2887 * Updates Fibre Channel Device Database with local loop devices.
2888 *
2889 * Input:
2890 * ha = adapter block pointer.
2891 *
2892 * Returns:
2893 * 0 = success.
2894 */
2895 static int
2896 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
2897 {
2898 int rval, rval2;
2899 int found_devs;
2900 int found;
2901 fc_port_t *fcport, *new_fcport;
2902
2903 uint16_t index;
2904 uint16_t entries;
2905 char *id_iter;
2906 uint16_t loop_id;
2907 uint8_t domain, area, al_pa;
2908 struct qla_hw_data *ha = vha->hw;
2909
2910 found_devs = 0;
2911 new_fcport = NULL;
2912 entries = MAX_FIBRE_DEVICES_LOOP;
2913
2914 /* Get list of logged in devices. */
2915 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
2916 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
2917 &entries);
2918 if (rval != QLA_SUCCESS)
2919 goto cleanup_allocation;
2920
2921 ql_dbg(ql_dbg_disc, vha, 0x2017,
2922 "Entries in ID list (%d).\n", entries);
2923 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
2924 (uint8_t *)ha->gid_list,
2925 entries * sizeof(struct gid_list_info));
2926
2927 /* Allocate temporary fcport for any new fcports discovered. */
2928 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
2929 if (new_fcport == NULL) {
2930 ql_log(ql_log_warn, vha, 0x2018,
2931 "Memory allocation failed for fcport.\n");
2932 rval = QLA_MEMORY_ALLOC_FAILED;
2933 goto cleanup_allocation;
2934 }
2935 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
2936
2937 /*
2938 * Mark local devices that were present with FCF_DEVICE_LOST for now.
2939 */
2940 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2941 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2942 fcport->port_type != FCT_BROADCAST &&
2943 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
2944
2945 ql_dbg(ql_dbg_disc, vha, 0x2019,
2946 "Marking port lost loop_id=0x%04x.\n",
2947 fcport->loop_id);
2948
2949 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
2950 }
2951 }
2952
2953 /* Add devices to port list. */
2954 id_iter = (char *)ha->gid_list;
2955 for (index = 0; index < entries; index++) {
2956 domain = ((struct gid_list_info *)id_iter)->domain;
2957 area = ((struct gid_list_info *)id_iter)->area;
2958 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
2959 if (IS_QLA2100(ha) || IS_QLA2200(ha))
2960 loop_id = (uint16_t)
2961 ((struct gid_list_info *)id_iter)->loop_id_2100;
2962 else
2963 loop_id = le16_to_cpu(
2964 ((struct gid_list_info *)id_iter)->loop_id);
2965 id_iter += ha->gid_list_info_size;
2966
2967 /* Bypass reserved domain fields. */
2968 if ((domain & 0xf0) == 0xf0)
2969 continue;
2970
2971 /* Bypass if not same domain and area of adapter. */
2972 if (area && domain &&
2973 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
2974 continue;
2975
2976 /* Bypass invalid local loop ID. */
2977 if (loop_id > LAST_LOCAL_LOOP_ID)
2978 continue;
2979
2980 memset(new_fcport, 0, sizeof(fc_port_t));
2981
2982 /* Fill in member data. */
2983 new_fcport->d_id.b.domain = domain;
2984 new_fcport->d_id.b.area = area;
2985 new_fcport->d_id.b.al_pa = al_pa;
2986 new_fcport->loop_id = loop_id;
2987 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
2988 if (rval2 != QLA_SUCCESS) {
2989 ql_dbg(ql_dbg_disc, vha, 0x201a,
2990 "Failed to retrieve fcport information "
2991 "-- get_port_database=%x, loop_id=0x%04x.\n",
2992 rval2, new_fcport->loop_id);
2993 ql_dbg(ql_dbg_disc, vha, 0x201b,
2994 "Scheduling resync.\n");
2995 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2996 continue;
2997 }
2998
2999 /* Check for matching device in port list. */
3000 found = 0;
3001 fcport = NULL;
3002 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3003 if (memcmp(new_fcport->port_name, fcport->port_name,
3004 WWN_SIZE))
3005 continue;
3006
3007 fcport->flags &= ~FCF_FABRIC_DEVICE;
3008 fcport->loop_id = new_fcport->loop_id;
3009 fcport->port_type = new_fcport->port_type;
3010 fcport->d_id.b24 = new_fcport->d_id.b24;
3011 memcpy(fcport->node_name, new_fcport->node_name,
3012 WWN_SIZE);
3013
3014 found++;
3015 break;
3016 }
3017
3018 if (!found) {
3019 /* New device, add to fcports list. */
3020 list_add_tail(&new_fcport->list, &vha->vp_fcports);
3021
3022 /* Allocate a new replacement fcport. */
3023 fcport = new_fcport;
3024 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3025 if (new_fcport == NULL) {
3026 ql_log(ql_log_warn, vha, 0x201c,
3027 "Failed to allocate memory for fcport.\n");
3028 rval = QLA_MEMORY_ALLOC_FAILED;
3029 goto cleanup_allocation;
3030 }
3031 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
3032 }
3033
3034 /* Base iIDMA settings on HBA port speed. */
3035 fcport->fp_speed = ha->link_data_rate;
3036
3037 qla2x00_update_fcport(vha, fcport);
3038
3039 found_devs++;
3040 }
3041
3042 cleanup_allocation:
3043 kfree(new_fcport);
3044
3045 if (rval != QLA_SUCCESS) {
3046 ql_dbg(ql_dbg_disc, vha, 0x201d,
3047 "Configure local loop error exit: rval=%x.\n", rval);
3048 }
3049
3050 return (rval);
3051 }
3052
3053 static void
3054 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3055 {
3056 int rval;
3057 uint16_t mb[4];
3058 struct qla_hw_data *ha = vha->hw;
3059
3060 if (!IS_IIDMA_CAPABLE(ha))
3061 return;
3062
3063 if (atomic_read(&fcport->state) != FCS_ONLINE)
3064 return;
3065
3066 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
3067 fcport->fp_speed > ha->link_data_rate)
3068 return;
3069
3070 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
3071 mb);
3072 if (rval != QLA_SUCCESS) {
3073 ql_dbg(ql_dbg_disc, vha, 0x2004,
3074 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
3075 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
3076 } else {
3077 ql_dbg(ql_dbg_disc, vha, 0x2005,
3078 "iIDMA adjusted to %s GB/s on %8phN.\n",
3079 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
3080 fcport->port_name);
3081 }
3082 }
3083
3084 static void
3085 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
3086 {
3087 struct fc_rport_identifiers rport_ids;
3088 struct fc_rport *rport;
3089 unsigned long flags;
3090
3091 qla2x00_rport_del(fcport);
3092
3093 rport_ids.node_name = wwn_to_u64(fcport->node_name);
3094 rport_ids.port_name = wwn_to_u64(fcport->port_name);
3095 rport_ids.port_id = fcport->d_id.b.domain << 16 |
3096 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
3097 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3098 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
3099 if (!rport) {
3100 ql_log(ql_log_warn, vha, 0x2006,
3101 "Unable to allocate fc remote port.\n");
3102 return;
3103 }
3104 /*
3105 * Create target mode FC NEXUS in qla_target.c if target mode is
3106 * enabled..
3107 */
3108 qlt_fc_port_added(vha, fcport);
3109
3110 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
3111 *((fc_port_t **)rport->dd_data) = fcport;
3112 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
3113
3114 rport->supported_classes = fcport->supported_classes;
3115
3116 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
3117 if (fcport->port_type == FCT_INITIATOR)
3118 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
3119 if (fcport->port_type == FCT_TARGET)
3120 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
3121 fc_remote_port_rolechg(rport, rport_ids.roles);
3122 }
3123
3124 /*
3125 * qla2x00_update_fcport
3126 * Updates device on list.
3127 *
3128 * Input:
3129 * ha = adapter block pointer.
3130 * fcport = port structure pointer.
3131 *
3132 * Return:
3133 * 0 - Success
3134 * BIT_0 - error
3135 *
3136 * Context:
3137 * Kernel context.
3138 */
3139 void
3140 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
3141 {
3142 fcport->vha = vha;
3143
3144 if (IS_QLAFX00(vha->hw)) {
3145 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3146 qla2x00_reg_remote_port(vha, fcport);
3147 return;
3148 }
3149 fcport->login_retry = 0;
3150 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
3151
3152 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
3153 qla2x00_iidma_fcport(vha, fcport);
3154 qla24xx_update_fcport_fcp_prio(vha, fcport);
3155 qla2x00_reg_remote_port(vha, fcport);
3156 }
3157
3158 /*
3159 * qla2x00_configure_fabric
3160 * Setup SNS devices with loop ID's.
3161 *
3162 * Input:
3163 * ha = adapter block pointer.
3164 *
3165 * Returns:
3166 * 0 = success.
3167 * BIT_0 = error
3168 */
3169 static int
3170 qla2x00_configure_fabric(scsi_qla_host_t *vha)
3171 {
3172 int rval;
3173 fc_port_t *fcport, *fcptemp;
3174 uint16_t next_loopid;
3175 uint16_t mb[MAILBOX_REGISTER_COUNT];
3176 uint16_t loop_id;
3177 LIST_HEAD(new_fcports);
3178 struct qla_hw_data *ha = vha->hw;
3179 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3180
3181 /* If FL port exists, then SNS is present */
3182 if (IS_FWI2_CAPABLE(ha))
3183 loop_id = NPH_F_PORT;
3184 else
3185 loop_id = SNS_FL_PORT;
3186 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
3187 if (rval != QLA_SUCCESS) {
3188 ql_dbg(ql_dbg_disc, vha, 0x201f,
3189 "MBX_GET_PORT_NAME failed, No FL Port.\n");
3190
3191 vha->device_flags &= ~SWITCH_FOUND;
3192 return (QLA_SUCCESS);
3193 }
3194 vha->device_flags |= SWITCH_FOUND;
3195
3196 do {
3197 /* FDMI support. */
3198 if (ql2xfdmienable &&
3199 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
3200 qla2x00_fdmi_register(vha);
3201
3202 /* Ensure we are logged into the SNS. */
3203 if (IS_FWI2_CAPABLE(ha))
3204 loop_id = NPH_SNS;
3205 else
3206 loop_id = SIMPLE_NAME_SERVER;
3207 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
3208 0xfc, mb, BIT_1|BIT_0);
3209 if (rval != QLA_SUCCESS) {
3210 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3211 return rval;
3212 }
3213 if (mb[0] != MBS_COMMAND_COMPLETE) {
3214 ql_dbg(ql_dbg_disc, vha, 0x2042,
3215 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x "
3216 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1],
3217 mb[2], mb[6], mb[7]);
3218 return (QLA_SUCCESS);
3219 }
3220
3221 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
3222 if (qla2x00_rft_id(vha)) {
3223 /* EMPTY */
3224 ql_dbg(ql_dbg_disc, vha, 0x2045,
3225 "Register FC-4 TYPE failed.\n");
3226 }
3227 if (qla2x00_rff_id(vha)) {
3228 /* EMPTY */
3229 ql_dbg(ql_dbg_disc, vha, 0x2049,
3230 "Register FC-4 Features failed.\n");
3231 }
3232 if (qla2x00_rnn_id(vha)) {
3233 /* EMPTY */
3234 ql_dbg(ql_dbg_disc, vha, 0x204f,
3235 "Register Node Name failed.\n");
3236 } else if (qla2x00_rsnn_nn(vha)) {
3237 /* EMPTY */
3238 ql_dbg(ql_dbg_disc, vha, 0x2053,
3239 "Register Symobilic Node Name failed.\n");
3240 }
3241 }
3242
3243 #define QLA_FCPORT_SCAN 1
3244 #define QLA_FCPORT_FOUND 2
3245
3246 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3247 fcport->scan_state = QLA_FCPORT_SCAN;
3248 }
3249
3250 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
3251 if (rval != QLA_SUCCESS)
3252 break;
3253
3254 /*
3255 * Logout all previous fabric devices marked lost, except
3256 * FCP2 devices.
3257 */
3258 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3259 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3260 break;
3261
3262 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
3263 continue;
3264
3265 if (fcport->scan_state == QLA_FCPORT_SCAN &&
3266 atomic_read(&fcport->state) == FCS_ONLINE) {
3267 qla2x00_mark_device_lost(vha, fcport,
3268 ql2xplogiabsentdevice, 0);
3269 if (fcport->loop_id != FC_NO_LOOP_ID &&
3270 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3271 fcport->port_type != FCT_INITIATOR &&
3272 fcport->port_type != FCT_BROADCAST) {
3273 ha->isp_ops->fabric_logout(vha,
3274 fcport->loop_id,
3275 fcport->d_id.b.domain,
3276 fcport->d_id.b.area,
3277 fcport->d_id.b.al_pa);
3278 fcport->loop_id = FC_NO_LOOP_ID;
3279 }
3280 }
3281 }
3282
3283 /* Starting free loop ID. */
3284 next_loopid = ha->min_external_loopid;
3285
3286 /*
3287 * Scan through our port list and login entries that need to be
3288 * logged in.
3289 */
3290 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3291 if (atomic_read(&vha->loop_down_timer) ||
3292 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3293 break;
3294
3295 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
3296 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
3297 continue;
3298
3299 if (fcport->loop_id == FC_NO_LOOP_ID) {
3300 fcport->loop_id = next_loopid;
3301 rval = qla2x00_find_new_loop_id(
3302 base_vha, fcport);
3303 if (rval != QLA_SUCCESS) {
3304 /* Ran out of IDs to use */
3305 break;
3306 }
3307 }
3308 /* Login and update database */
3309 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3310 }
3311
3312 /* Exit if out of loop IDs. */
3313 if (rval != QLA_SUCCESS) {
3314 break;
3315 }
3316
3317 /*
3318 * Login and add the new devices to our port list.
3319 */
3320 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3321 if (atomic_read(&vha->loop_down_timer) ||
3322 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3323 break;
3324
3325 /* Find a new loop ID to use. */
3326 fcport->loop_id = next_loopid;
3327 rval = qla2x00_find_new_loop_id(base_vha, fcport);
3328 if (rval != QLA_SUCCESS) {
3329 /* Ran out of IDs to use */
3330 break;
3331 }
3332
3333 /* Login and update database */
3334 qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
3335
3336 list_move_tail(&fcport->list, &vha->vp_fcports);
3337 }
3338 } while (0);
3339
3340 /* Free all new device structures not processed. */
3341 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
3342 list_del(&fcport->list);
3343 kfree(fcport);
3344 }
3345
3346 if (rval) {
3347 ql_dbg(ql_dbg_disc, vha, 0x2068,
3348 "Configure fabric error exit rval=%d.\n", rval);
3349 }
3350
3351 return (rval);
3352 }
3353
3354 /*
3355 * qla2x00_find_all_fabric_devs
3356 *
3357 * Input:
3358 * ha = adapter block pointer.
3359 * dev = database device entry pointer.
3360 *
3361 * Returns:
3362 * 0 = success.
3363 *
3364 * Context:
3365 * Kernel context.
3366 */
3367 static int
3368 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
3369 struct list_head *new_fcports)
3370 {
3371 int rval;
3372 uint16_t loop_id;
3373 fc_port_t *fcport, *new_fcport, *fcptemp;
3374 int found;
3375
3376 sw_info_t *swl;
3377 int swl_idx;
3378 int first_dev, last_dev;
3379 port_id_t wrap = {}, nxt_d_id;
3380 struct qla_hw_data *ha = vha->hw;
3381 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3382
3383 rval = QLA_SUCCESS;
3384
3385 /* Try GID_PT to get device list, else GAN. */
3386 if (!ha->swl)
3387 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
3388 GFP_KERNEL);
3389 swl = ha->swl;
3390 if (!swl) {
3391 /*EMPTY*/
3392 ql_dbg(ql_dbg_disc, vha, 0x2054,
3393 "GID_PT allocations failed, fallback on GA_NXT.\n");
3394 } else {
3395 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
3396 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
3397 swl = NULL;
3398 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
3399 swl = NULL;
3400 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
3401 swl = NULL;
3402 } else if (ql2xiidmaenable &&
3403 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
3404 qla2x00_gpsc(vha, swl);
3405 }
3406
3407 /* If other queries succeeded probe for FC-4 type */
3408 if (swl)
3409 qla2x00_gff_id(vha, swl);
3410 }
3411 swl_idx = 0;
3412
3413 /* Allocate temporary fcport for any new fcports discovered. */
3414 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3415 if (new_fcport == NULL) {
3416 ql_log(ql_log_warn, vha, 0x205e,
3417 "Failed to allocate memory for fcport.\n");
3418 return (QLA_MEMORY_ALLOC_FAILED);
3419 }
3420 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3421 /* Set start port ID scan at adapter ID. */
3422 first_dev = 1;
3423 last_dev = 0;
3424
3425 /* Starting free loop ID. */
3426 loop_id = ha->min_external_loopid;
3427 for (; loop_id <= ha->max_loop_id; loop_id++) {
3428 if (qla2x00_is_reserved_id(vha, loop_id))
3429 continue;
3430
3431 if (ha->current_topology == ISP_CFG_FL &&
3432 (atomic_read(&vha->loop_down_timer) ||
3433 LOOP_TRANSITION(vha))) {
3434 atomic_set(&vha->loop_down_timer, 0);
3435 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3436 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
3437 break;
3438 }
3439
3440 if (swl != NULL) {
3441 if (last_dev) {
3442 wrap.b24 = new_fcport->d_id.b24;
3443 } else {
3444 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
3445 memcpy(new_fcport->node_name,
3446 swl[swl_idx].node_name, WWN_SIZE);
3447 memcpy(new_fcport->port_name,
3448 swl[swl_idx].port_name, WWN_SIZE);
3449 memcpy(new_fcport->fabric_port_name,
3450 swl[swl_idx].fabric_port_name, WWN_SIZE);
3451 new_fcport->fp_speed = swl[swl_idx].fp_speed;
3452 new_fcport->fc4_type = swl[swl_idx].fc4_type;
3453
3454 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
3455 last_dev = 1;
3456 }
3457 swl_idx++;
3458 }
3459 } else {
3460 /* Send GA_NXT to the switch */
3461 rval = qla2x00_ga_nxt(vha, new_fcport);
3462 if (rval != QLA_SUCCESS) {
3463 ql_log(ql_log_warn, vha, 0x2064,
3464 "SNS scan failed -- assuming "
3465 "zero-entry result.\n");
3466 list_for_each_entry_safe(fcport, fcptemp,
3467 new_fcports, list) {
3468 list_del(&fcport->list);
3469 kfree(fcport);
3470 }
3471 rval = QLA_SUCCESS;
3472 break;
3473 }
3474 }
3475
3476 /* If wrap on switch device list, exit. */
3477 if (first_dev) {
3478 wrap.b24 = new_fcport->d_id.b24;
3479 first_dev = 0;
3480 } else if (new_fcport->d_id.b24 == wrap.b24) {
3481 ql_dbg(ql_dbg_disc, vha, 0x2065,
3482 "Device wrap (%02x%02x%02x).\n",
3483 new_fcport->d_id.b.domain,
3484 new_fcport->d_id.b.area,
3485 new_fcport->d_id.b.al_pa);
3486 break;
3487 }
3488
3489 /* Bypass if same physical adapter. */
3490 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
3491 continue;
3492
3493 /* Bypass virtual ports of the same host. */
3494 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
3495 continue;
3496
3497 /* Bypass if same domain and area of adapter. */
3498 if (((new_fcport->d_id.b24 & 0xffff00) ==
3499 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
3500 ISP_CFG_FL)
3501 continue;
3502
3503 /* Bypass reserved domain fields. */
3504 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
3505 continue;
3506
3507 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
3508 if (ql2xgffidenable &&
3509 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
3510 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
3511 continue;
3512
3513 /* Locate matching device in database. */
3514 found = 0;
3515 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3516 if (memcmp(new_fcport->port_name, fcport->port_name,
3517 WWN_SIZE))
3518 continue;
3519
3520 fcport->scan_state = QLA_FCPORT_FOUND;
3521
3522 found++;
3523
3524 /* Update port state. */
3525 memcpy(fcport->fabric_port_name,
3526 new_fcport->fabric_port_name, WWN_SIZE);
3527 fcport->fp_speed = new_fcport->fp_speed;
3528
3529 /*
3530 * If address the same and state FCS_ONLINE, nothing
3531 * changed.
3532 */
3533 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
3534 atomic_read(&fcport->state) == FCS_ONLINE) {
3535 break;
3536 }
3537
3538 /*
3539 * If device was not a fabric device before.
3540 */
3541 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
3542 fcport->d_id.b24 = new_fcport->d_id.b24;
3543 qla2x00_clear_loop_id(fcport);
3544 fcport->flags |= (FCF_FABRIC_DEVICE |
3545 FCF_LOGIN_NEEDED);
3546 break;
3547 }
3548
3549 /*
3550 * Port ID changed or device was marked to be updated;
3551 * Log it out if still logged in and mark it for
3552 * relogin later.
3553 */
3554 fcport->d_id.b24 = new_fcport->d_id.b24;
3555 fcport->flags |= FCF_LOGIN_NEEDED;
3556 if (fcport->loop_id != FC_NO_LOOP_ID &&
3557 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
3558 (fcport->flags & FCF_ASYNC_SENT) == 0 &&
3559 fcport->port_type != FCT_INITIATOR &&
3560 fcport->port_type != FCT_BROADCAST) {
3561 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3562 fcport->d_id.b.domain, fcport->d_id.b.area,
3563 fcport->d_id.b.al_pa);
3564 qla2x00_clear_loop_id(fcport);
3565 }
3566
3567 break;
3568 }
3569
3570 if (found)
3571 continue;
3572 /* If device was not in our fcports list, then add it. */
3573 list_add_tail(&new_fcport->list, new_fcports);
3574
3575 /* Allocate a new replacement fcport. */
3576 nxt_d_id.b24 = new_fcport->d_id.b24;
3577 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
3578 if (new_fcport == NULL) {
3579 ql_log(ql_log_warn, vha, 0x2066,
3580 "Memory allocation failed for fcport.\n");
3581 return (QLA_MEMORY_ALLOC_FAILED);
3582 }
3583 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
3584 new_fcport->d_id.b24 = nxt_d_id.b24;
3585 }
3586
3587 kfree(new_fcport);
3588
3589 return (rval);
3590 }
3591
3592 /*
3593 * qla2x00_find_new_loop_id
3594 * Scan through our port list and find a new usable loop ID.
3595 *
3596 * Input:
3597 * ha: adapter state pointer.
3598 * dev: port structure pointer.
3599 *
3600 * Returns:
3601 * qla2x00 local function return status code.
3602 *
3603 * Context:
3604 * Kernel context.
3605 */
3606 int
3607 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
3608 {
3609 int rval;
3610 struct qla_hw_data *ha = vha->hw;
3611 unsigned long flags = 0;
3612
3613 rval = QLA_SUCCESS;
3614
3615 spin_lock_irqsave(&ha->vport_slock, flags);
3616
3617 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
3618 LOOPID_MAP_SIZE);
3619 if (dev->loop_id >= LOOPID_MAP_SIZE ||
3620 qla2x00_is_reserved_id(vha, dev->loop_id)) {
3621 dev->loop_id = FC_NO_LOOP_ID;
3622 rval = QLA_FUNCTION_FAILED;
3623 } else
3624 set_bit(dev->loop_id, ha->loop_id_map);
3625
3626 spin_unlock_irqrestore(&ha->vport_slock, flags);
3627
3628 if (rval == QLA_SUCCESS)
3629 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
3630 "Assigning new loopid=%x, portid=%x.\n",
3631 dev->loop_id, dev->d_id.b24);
3632 else
3633 ql_log(ql_log_warn, dev->vha, 0x2087,
3634 "No loop_id's available, portid=%x.\n",
3635 dev->d_id.b24);
3636
3637 return (rval);
3638 }
3639
3640 /*
3641 * qla2x00_fabric_dev_login
3642 * Login fabric target device and update FC port database.
3643 *
3644 * Input:
3645 * ha: adapter state pointer.
3646 * fcport: port structure list pointer.
3647 * next_loopid: contains value of a new loop ID that can be used
3648 * by the next login attempt.
3649 *
3650 * Returns:
3651 * qla2x00 local function return status code.
3652 *
3653 * Context:
3654 * Kernel context.
3655 */
3656 static int
3657 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3658 uint16_t *next_loopid)
3659 {
3660 int rval;
3661 int retry;
3662 uint8_t opts;
3663 struct qla_hw_data *ha = vha->hw;
3664
3665 rval = QLA_SUCCESS;
3666 retry = 0;
3667
3668 if (IS_ALOGIO_CAPABLE(ha)) {
3669 if (fcport->flags & FCF_ASYNC_SENT)
3670 return rval;
3671 fcport->flags |= FCF_ASYNC_SENT;
3672 rval = qla2x00_post_async_login_work(vha, fcport, NULL);
3673 if (!rval)
3674 return rval;
3675 }
3676
3677 fcport->flags &= ~FCF_ASYNC_SENT;
3678 rval = qla2x00_fabric_login(vha, fcport, next_loopid);
3679 if (rval == QLA_SUCCESS) {
3680 /* Send an ADISC to FCP2 devices.*/
3681 opts = 0;
3682 if (fcport->flags & FCF_FCP2_DEVICE)
3683 opts |= BIT_1;
3684 rval = qla2x00_get_port_database(vha, fcport, opts);
3685 if (rval != QLA_SUCCESS) {
3686 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3687 fcport->d_id.b.domain, fcport->d_id.b.area,
3688 fcport->d_id.b.al_pa);
3689 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3690 } else {
3691 qla2x00_update_fcport(vha, fcport);
3692 }
3693 } else {
3694 /* Retry Login. */
3695 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3696 }
3697
3698 return (rval);
3699 }
3700
3701 /*
3702 * qla2x00_fabric_login
3703 * Issue fabric login command.
3704 *
3705 * Input:
3706 * ha = adapter block pointer.
3707 * device = pointer to FC device type structure.
3708 *
3709 * Returns:
3710 * 0 - Login successfully
3711 * 1 - Login failed
3712 * 2 - Initiator device
3713 * 3 - Fatal error
3714 */
3715 int
3716 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
3717 uint16_t *next_loopid)
3718 {
3719 int rval;
3720 int retry;
3721 uint16_t tmp_loopid;
3722 uint16_t mb[MAILBOX_REGISTER_COUNT];
3723 struct qla_hw_data *ha = vha->hw;
3724
3725 retry = 0;
3726 tmp_loopid = 0;
3727
3728 for (;;) {
3729 ql_dbg(ql_dbg_disc, vha, 0x2000,
3730 "Trying Fabric Login w/loop id 0x%04x for port "
3731 "%02x%02x%02x.\n",
3732 fcport->loop_id, fcport->d_id.b.domain,
3733 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3734
3735 /* Login fcport on switch. */
3736 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
3737 fcport->d_id.b.domain, fcport->d_id.b.area,
3738 fcport->d_id.b.al_pa, mb, BIT_0);
3739 if (rval != QLA_SUCCESS) {
3740 return rval;
3741 }
3742 if (mb[0] == MBS_PORT_ID_USED) {
3743 /*
3744 * Device has another loop ID. The firmware team
3745 * recommends the driver perform an implicit login with
3746 * the specified ID again. The ID we just used is save
3747 * here so we return with an ID that can be tried by
3748 * the next login.
3749 */
3750 retry++;
3751 tmp_loopid = fcport->loop_id;
3752 fcport->loop_id = mb[1];
3753
3754 ql_dbg(ql_dbg_disc, vha, 0x2001,
3755 "Fabric Login: port in use - next loop "
3756 "id=0x%04x, port id= %02x%02x%02x.\n",
3757 fcport->loop_id, fcport->d_id.b.domain,
3758 fcport->d_id.b.area, fcport->d_id.b.al_pa);
3759
3760 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
3761 /*
3762 * Login succeeded.
3763 */
3764 if (retry) {
3765 /* A retry occurred before. */
3766 *next_loopid = tmp_loopid;
3767 } else {
3768 /*
3769 * No retry occurred before. Just increment the
3770 * ID value for next login.
3771 */
3772 *next_loopid = (fcport->loop_id + 1);
3773 }
3774
3775 if (mb[1] & BIT_0) {
3776 fcport->port_type = FCT_INITIATOR;
3777 } else {
3778 fcport->port_type = FCT_TARGET;
3779 if (mb[1] & BIT_1) {
3780 fcport->flags |= FCF_FCP2_DEVICE;
3781 }
3782 }
3783
3784 if (mb[10] & BIT_0)
3785 fcport->supported_classes |= FC_COS_CLASS2;
3786 if (mb[10] & BIT_1)
3787 fcport->supported_classes |= FC_COS_CLASS3;
3788
3789 if (IS_FWI2_CAPABLE(ha)) {
3790 if (mb[10] & BIT_7)
3791 fcport->flags |=
3792 FCF_CONF_COMP_SUPPORTED;
3793 }
3794
3795 rval = QLA_SUCCESS;
3796 break;
3797 } else if (mb[0] == MBS_LOOP_ID_USED) {
3798 /*
3799 * Loop ID already used, try next loop ID.
3800 */
3801 fcport->loop_id++;
3802 rval = qla2x00_find_new_loop_id(vha, fcport);
3803 if (rval != QLA_SUCCESS) {
3804 /* Ran out of loop IDs to use */
3805 break;
3806 }
3807 } else if (mb[0] == MBS_COMMAND_ERROR) {
3808 /*
3809 * Firmware possibly timed out during login. If NO
3810 * retries are left to do then the device is declared
3811 * dead.
3812 */
3813 *next_loopid = fcport->loop_id;
3814 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3815 fcport->d_id.b.domain, fcport->d_id.b.area,
3816 fcport->d_id.b.al_pa);
3817 qla2x00_mark_device_lost(vha, fcport, 1, 0);
3818
3819 rval = 1;
3820 break;
3821 } else {
3822 /*
3823 * unrecoverable / not handled error
3824 */
3825 ql_dbg(ql_dbg_disc, vha, 0x2002,
3826 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
3827 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
3828 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3829 fcport->loop_id, jiffies);
3830
3831 *next_loopid = fcport->loop_id;
3832 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
3833 fcport->d_id.b.domain, fcport->d_id.b.area,
3834 fcport->d_id.b.al_pa);
3835 qla2x00_clear_loop_id(fcport);
3836 fcport->login_retry = 0;
3837
3838 rval = 3;
3839 break;
3840 }
3841 }
3842
3843 return (rval);
3844 }
3845
3846 /*
3847 * qla2x00_local_device_login
3848 * Issue local device login command.
3849 *
3850 * Input:
3851 * ha = adapter block pointer.
3852 * loop_id = loop id of device to login to.
3853 *
3854 * Returns (Where's the #define!!!!):
3855 * 0 - Login successfully
3856 * 1 - Login failed
3857 * 3 - Fatal error
3858 */
3859 int
3860 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
3861 {
3862 int rval;
3863 uint16_t mb[MAILBOX_REGISTER_COUNT];
3864
3865 memset(mb, 0, sizeof(mb));
3866 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
3867 if (rval == QLA_SUCCESS) {
3868 /* Interrogate mailbox registers for any errors */
3869 if (mb[0] == MBS_COMMAND_ERROR)
3870 rval = 1;
3871 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
3872 /* device not in PCB table */
3873 rval = 3;
3874 }
3875
3876 return (rval);
3877 }
3878
3879 /*
3880 * qla2x00_loop_resync
3881 * Resync with fibre channel devices.
3882 *
3883 * Input:
3884 * ha = adapter block pointer.
3885 *
3886 * Returns:
3887 * 0 = success
3888 */
3889 int
3890 qla2x00_loop_resync(scsi_qla_host_t *vha)
3891 {
3892 int rval = QLA_SUCCESS;
3893 uint32_t wait_time;
3894 struct req_que *req;
3895 struct rsp_que *rsp;
3896
3897 if (vha->hw->flags.cpu_affinity_enabled)
3898 req = vha->hw->req_q_map[0];
3899 else
3900 req = vha->req;
3901 rsp = req->rsp;
3902
3903 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
3904 if (vha->flags.online) {
3905 if (!(rval = qla2x00_fw_ready(vha))) {
3906 /* Wait at most MAX_TARGET RSCNs for a stable link. */
3907 wait_time = 256;
3908 do {
3909 if (!IS_QLAFX00(vha->hw)) {
3910 /*
3911 * Issue a marker after FW becomes
3912 * ready.
3913 */
3914 qla2x00_marker(vha, req, rsp, 0, 0,
3915 MK_SYNC_ALL);
3916 vha->marker_needed = 0;
3917 }
3918
3919 /* Remap devices on Loop. */
3920 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
3921
3922 if (IS_QLAFX00(vha->hw))
3923 qlafx00_configure_devices(vha);
3924 else
3925 qla2x00_configure_loop(vha);
3926
3927 wait_time--;
3928 } while (!atomic_read(&vha->loop_down_timer) &&
3929 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3930 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
3931 &vha->dpc_flags)));
3932 }
3933 }
3934
3935 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
3936 return (QLA_FUNCTION_FAILED);
3937
3938 if (rval)
3939 ql_dbg(ql_dbg_disc, vha, 0x206c,
3940 "%s *** FAILED ***.\n", __func__);
3941
3942 return (rval);
3943 }
3944
3945 /*
3946 * qla2x00_perform_loop_resync
3947 * Description: This function will set the appropriate flags and call
3948 * qla2x00_loop_resync. If successful loop will be resynced
3949 * Arguments : scsi_qla_host_t pointer
3950 * returm : Success or Failure
3951 */
3952
3953 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
3954 {
3955 int32_t rval = 0;
3956
3957 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
3958 /*Configure the flags so that resync happens properly*/
3959 atomic_set(&ha->loop_down_timer, 0);
3960 if (!(ha->device_flags & DFLG_NO_CABLE)) {
3961 atomic_set(&ha->loop_state, LOOP_UP);
3962 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
3963 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
3964 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
3965
3966 rval = qla2x00_loop_resync(ha);
3967 } else
3968 atomic_set(&ha->loop_state, LOOP_DEAD);
3969
3970 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
3971 }
3972
3973 return rval;
3974 }
3975
3976 void
3977 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
3978 {
3979 fc_port_t *fcport;
3980 struct scsi_qla_host *vha;
3981 struct qla_hw_data *ha = base_vha->hw;
3982 unsigned long flags;
3983
3984 spin_lock_irqsave(&ha->vport_slock, flags);
3985 /* Go with deferred removal of rport references. */
3986 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
3987 atomic_inc(&vha->vref_count);
3988 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3989 if (fcport->drport &&
3990 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
3991 spin_unlock_irqrestore(&ha->vport_slock, flags);
3992 qla2x00_rport_del(fcport);
3993 spin_lock_irqsave(&ha->vport_slock, flags);
3994 }
3995 }
3996 atomic_dec(&vha->vref_count);
3997 }
3998 spin_unlock_irqrestore(&ha->vport_slock, flags);
3999 }
4000
4001 /* Assumes idc_lock always held on entry */
4002 void
4003 qla83xx_reset_ownership(scsi_qla_host_t *vha)
4004 {
4005 struct qla_hw_data *ha = vha->hw;
4006 uint32_t drv_presence, drv_presence_mask;
4007 uint32_t dev_part_info1, dev_part_info2, class_type;
4008 uint32_t class_type_mask = 0x3;
4009 uint16_t fcoe_other_function = 0xffff, i;
4010
4011 if (IS_QLA8044(ha)) {
4012 drv_presence = qla8044_rd_direct(vha,
4013 QLA8044_CRB_DRV_ACTIVE_INDEX);
4014 dev_part_info1 = qla8044_rd_direct(vha,
4015 QLA8044_CRB_DEV_PART_INFO_INDEX);
4016 dev_part_info2 = qla8044_rd_direct(vha,
4017 QLA8044_CRB_DEV_PART_INFO2);
4018 } else {
4019 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4020 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
4021 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
4022 }
4023 for (i = 0; i < 8; i++) {
4024 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
4025 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4026 (i != ha->portnum)) {
4027 fcoe_other_function = i;
4028 break;
4029 }
4030 }
4031 if (fcoe_other_function == 0xffff) {
4032 for (i = 0; i < 8; i++) {
4033 class_type = ((dev_part_info2 >> (i * 4)) &
4034 class_type_mask);
4035 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
4036 ((i + 8) != ha->portnum)) {
4037 fcoe_other_function = i + 8;
4038 break;
4039 }
4040 }
4041 }
4042 /*
4043 * Prepare drv-presence mask based on fcoe functions present.
4044 * However consider only valid physical fcoe function numbers (0-15).
4045 */
4046 drv_presence_mask = ~((1 << (ha->portnum)) |
4047 ((fcoe_other_function == 0xffff) ?
4048 0 : (1 << (fcoe_other_function))));
4049
4050 /* We are the reset owner iff:
4051 * - No other protocol drivers present.
4052 * - This is the lowest among fcoe functions. */
4053 if (!(drv_presence & drv_presence_mask) &&
4054 (ha->portnum < fcoe_other_function)) {
4055 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
4056 "This host is Reset owner.\n");
4057 ha->flags.nic_core_reset_owner = 1;
4058 }
4059 }
4060
4061 static int
4062 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
4063 {
4064 int rval = QLA_SUCCESS;
4065 struct qla_hw_data *ha = vha->hw;
4066 uint32_t drv_ack;
4067
4068 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4069 if (rval == QLA_SUCCESS) {
4070 drv_ack |= (1 << ha->portnum);
4071 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4072 }
4073
4074 return rval;
4075 }
4076
4077 static int
4078 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
4079 {
4080 int rval = QLA_SUCCESS;
4081 struct qla_hw_data *ha = vha->hw;
4082 uint32_t drv_ack;
4083
4084 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4085 if (rval == QLA_SUCCESS) {
4086 drv_ack &= ~(1 << ha->portnum);
4087 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
4088 }
4089
4090 return rval;
4091 }
4092
4093 static const char *
4094 qla83xx_dev_state_to_string(uint32_t dev_state)
4095 {
4096 switch (dev_state) {
4097 case QLA8XXX_DEV_COLD:
4098 return "COLD/RE-INIT";
4099 case QLA8XXX_DEV_INITIALIZING:
4100 return "INITIALIZING";
4101 case QLA8XXX_DEV_READY:
4102 return "READY";
4103 case QLA8XXX_DEV_NEED_RESET:
4104 return "NEED RESET";
4105 case QLA8XXX_DEV_NEED_QUIESCENT:
4106 return "NEED QUIESCENT";
4107 case QLA8XXX_DEV_FAILED:
4108 return "FAILED";
4109 case QLA8XXX_DEV_QUIESCENT:
4110 return "QUIESCENT";
4111 default:
4112 return "Unknown";
4113 }
4114 }
4115
4116 /* Assumes idc-lock always held on entry */
4117 void
4118 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
4119 {
4120 struct qla_hw_data *ha = vha->hw;
4121 uint32_t idc_audit_reg = 0, duration_secs = 0;
4122
4123 switch (audit_type) {
4124 case IDC_AUDIT_TIMESTAMP:
4125 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
4126 idc_audit_reg = (ha->portnum) |
4127 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
4128 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4129 break;
4130
4131 case IDC_AUDIT_COMPLETION:
4132 duration_secs = ((jiffies_to_msecs(jiffies) -
4133 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
4134 idc_audit_reg = (ha->portnum) |
4135 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
4136 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
4137 break;
4138
4139 default:
4140 ql_log(ql_log_warn, vha, 0xb078,
4141 "Invalid audit type specified.\n");
4142 break;
4143 }
4144 }
4145
4146 /* Assumes idc_lock always held on entry */
4147 static int
4148 qla83xx_initiating_reset(scsi_qla_host_t *vha)
4149 {
4150 struct qla_hw_data *ha = vha->hw;
4151 uint32_t idc_control, dev_state;
4152
4153 __qla83xx_get_idc_control(vha, &idc_control);
4154 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
4155 ql_log(ql_log_info, vha, 0xb080,
4156 "NIC Core reset has been disabled. idc-control=0x%x\n",
4157 idc_control);
4158 return QLA_FUNCTION_FAILED;
4159 }
4160
4161 /* Set NEED-RESET iff in READY state and we are the reset-owner */
4162 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4163 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
4164 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
4165 QLA8XXX_DEV_NEED_RESET);
4166 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
4167 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
4168 } else {
4169 const char *state = qla83xx_dev_state_to_string(dev_state);
4170 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
4171
4172 /* SV: XXX: Is timeout required here? */
4173 /* Wait for IDC state change READY -> NEED_RESET */
4174 while (dev_state == QLA8XXX_DEV_READY) {
4175 qla83xx_idc_unlock(vha, 0);
4176 msleep(200);
4177 qla83xx_idc_lock(vha, 0);
4178 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4179 }
4180 }
4181
4182 /* Send IDC ack by writing to drv-ack register */
4183 __qla83xx_set_drv_ack(vha);
4184
4185 return QLA_SUCCESS;
4186 }
4187
4188 int
4189 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
4190 {
4191 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4192 }
4193
4194 int
4195 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
4196 {
4197 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
4198 }
4199
4200 static int
4201 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
4202 {
4203 uint32_t drv_presence = 0;
4204 struct qla_hw_data *ha = vha->hw;
4205
4206 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4207 if (drv_presence & (1 << ha->portnum))
4208 return QLA_SUCCESS;
4209 else
4210 return QLA_TEST_FAILED;
4211 }
4212
4213 int
4214 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
4215 {
4216 int rval = QLA_SUCCESS;
4217 struct qla_hw_data *ha = vha->hw;
4218
4219 ql_dbg(ql_dbg_p3p, vha, 0xb058,
4220 "Entered %s().\n", __func__);
4221
4222 if (vha->device_flags & DFLG_DEV_FAILED) {
4223 ql_log(ql_log_warn, vha, 0xb059,
4224 "Device in unrecoverable FAILED state.\n");
4225 return QLA_FUNCTION_FAILED;
4226 }
4227
4228 qla83xx_idc_lock(vha, 0);
4229
4230 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
4231 ql_log(ql_log_warn, vha, 0xb05a,
4232 "Function=0x%x has been removed from IDC participation.\n",
4233 ha->portnum);
4234 rval = QLA_FUNCTION_FAILED;
4235 goto exit;
4236 }
4237
4238 qla83xx_reset_ownership(vha);
4239
4240 rval = qla83xx_initiating_reset(vha);
4241
4242 /*
4243 * Perform reset if we are the reset-owner,
4244 * else wait till IDC state changes to READY/FAILED.
4245 */
4246 if (rval == QLA_SUCCESS) {
4247 rval = qla83xx_idc_state_handler(vha);
4248
4249 if (rval == QLA_SUCCESS)
4250 ha->flags.nic_core_hung = 0;
4251 __qla83xx_clear_drv_ack(vha);
4252 }
4253
4254 exit:
4255 qla83xx_idc_unlock(vha, 0);
4256
4257 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
4258
4259 return rval;
4260 }
4261
4262 int
4263 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
4264 {
4265 struct qla_hw_data *ha = vha->hw;
4266 int rval = QLA_FUNCTION_FAILED;
4267
4268 if (!IS_MCTP_CAPABLE(ha)) {
4269 /* This message can be removed from the final version */
4270 ql_log(ql_log_info, vha, 0x506d,
4271 "This board is not MCTP capable\n");
4272 return rval;
4273 }
4274
4275 if (!ha->mctp_dump) {
4276 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
4277 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
4278
4279 if (!ha->mctp_dump) {
4280 ql_log(ql_log_warn, vha, 0x506e,
4281 "Failed to allocate memory for mctp dump\n");
4282 return rval;
4283 }
4284 }
4285
4286 #define MCTP_DUMP_STR_ADDR 0x00000000
4287 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
4288 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
4289 if (rval != QLA_SUCCESS) {
4290 ql_log(ql_log_warn, vha, 0x506f,
4291 "Failed to capture mctp dump\n");
4292 } else {
4293 ql_log(ql_log_info, vha, 0x5070,
4294 "Mctp dump capture for host (%ld/%p).\n",
4295 vha->host_no, ha->mctp_dump);
4296 ha->mctp_dumped = 1;
4297 }
4298
4299 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
4300 ha->flags.nic_core_reset_hdlr_active = 1;
4301 rval = qla83xx_restart_nic_firmware(vha);
4302 if (rval)
4303 /* NIC Core reset failed. */
4304 ql_log(ql_log_warn, vha, 0x5071,
4305 "Failed to restart nic firmware\n");
4306 else
4307 ql_dbg(ql_dbg_p3p, vha, 0xb084,
4308 "Restarted NIC firmware successfully.\n");
4309 ha->flags.nic_core_reset_hdlr_active = 0;
4310 }
4311
4312 return rval;
4313
4314 }
4315
4316 /*
4317 * qla2x00_quiesce_io
4318 * Description: This function will block the new I/Os
4319 * Its not aborting any I/Os as context
4320 * is not destroyed during quiescence
4321 * Arguments: scsi_qla_host_t
4322 * return : void
4323 */
4324 void
4325 qla2x00_quiesce_io(scsi_qla_host_t *vha)
4326 {
4327 struct qla_hw_data *ha = vha->hw;
4328 struct scsi_qla_host *vp;
4329
4330 ql_dbg(ql_dbg_dpc, vha, 0x401d,
4331 "Quiescing I/O - ha=%p.\n", ha);
4332
4333 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
4334 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4335 atomic_set(&vha->loop_state, LOOP_DOWN);
4336 qla2x00_mark_all_devices_lost(vha, 0);
4337 list_for_each_entry(vp, &ha->vp_list, list)
4338 qla2x00_mark_all_devices_lost(vp, 0);
4339 } else {
4340 if (!atomic_read(&vha->loop_down_timer))
4341 atomic_set(&vha->loop_down_timer,
4342 LOOP_DOWN_TIME);
4343 }
4344 /* Wait for pending cmds to complete */
4345 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
4346 }
4347
4348 void
4349 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
4350 {
4351 struct qla_hw_data *ha = vha->hw;
4352 struct scsi_qla_host *vp;
4353 unsigned long flags;
4354 fc_port_t *fcport;
4355
4356 /* For ISP82XX, driver waits for completion of the commands.
4357 * online flag should be set.
4358 */
4359 if (!(IS_P3P_TYPE(ha)))
4360 vha->flags.online = 0;
4361 ha->flags.chip_reset_done = 0;
4362 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4363 vha->qla_stats.total_isp_aborts++;
4364
4365 ql_log(ql_log_info, vha, 0x00af,
4366 "Performing ISP error recovery - ha=%p.\n", ha);
4367
4368 /* For ISP82XX, reset_chip is just disabling interrupts.
4369 * Driver waits for the completion of the commands.
4370 * the interrupts need to be enabled.
4371 */
4372 if (!(IS_P3P_TYPE(ha)))
4373 ha->isp_ops->reset_chip(vha);
4374
4375 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
4376 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
4377 atomic_set(&vha->loop_state, LOOP_DOWN);
4378 qla2x00_mark_all_devices_lost(vha, 0);
4379
4380 spin_lock_irqsave(&ha->vport_slock, flags);
4381 list_for_each_entry(vp, &ha->vp_list, list) {
4382 atomic_inc(&vp->vref_count);
4383 spin_unlock_irqrestore(&ha->vport_slock, flags);
4384
4385 qla2x00_mark_all_devices_lost(vp, 0);
4386
4387 spin_lock_irqsave(&ha->vport_slock, flags);
4388 atomic_dec(&vp->vref_count);
4389 }
4390 spin_unlock_irqrestore(&ha->vport_slock, flags);
4391 } else {
4392 if (!atomic_read(&vha->loop_down_timer))
4393 atomic_set(&vha->loop_down_timer,
4394 LOOP_DOWN_TIME);
4395 }
4396
4397 /* Clear all async request states across all VPs. */
4398 list_for_each_entry(fcport, &vha->vp_fcports, list)
4399 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4400 spin_lock_irqsave(&ha->vport_slock, flags);
4401 list_for_each_entry(vp, &ha->vp_list, list) {
4402 atomic_inc(&vp->vref_count);
4403 spin_unlock_irqrestore(&ha->vport_slock, flags);
4404
4405 list_for_each_entry(fcport, &vp->vp_fcports, list)
4406 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
4407
4408 spin_lock_irqsave(&ha->vport_slock, flags);
4409 atomic_dec(&vp->vref_count);
4410 }
4411 spin_unlock_irqrestore(&ha->vport_slock, flags);
4412
4413 if (!ha->flags.eeh_busy) {
4414 /* Make sure for ISP 82XX IO DMA is complete */
4415 if (IS_P3P_TYPE(ha)) {
4416 qla82xx_chip_reset_cleanup(vha);
4417 ql_log(ql_log_info, vha, 0x00b4,
4418 "Done chip reset cleanup.\n");
4419
4420 /* Done waiting for pending commands.
4421 * Reset the online flag.
4422 */
4423 vha->flags.online = 0;
4424 }
4425
4426 /* Requeue all commands in outstanding command list. */
4427 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
4428 }
4429 }
4430
4431 /*
4432 * qla2x00_abort_isp
4433 * Resets ISP and aborts all outstanding commands.
4434 *
4435 * Input:
4436 * ha = adapter block pointer.
4437 *
4438 * Returns:
4439 * 0 = success
4440 */
4441 int
4442 qla2x00_abort_isp(scsi_qla_host_t *vha)
4443 {
4444 int rval;
4445 uint8_t status = 0;
4446 struct qla_hw_data *ha = vha->hw;
4447 struct scsi_qla_host *vp;
4448 struct req_que *req = ha->req_q_map[0];
4449 unsigned long flags;
4450
4451 if (vha->flags.online) {
4452 qla2x00_abort_isp_cleanup(vha);
4453
4454 if (IS_QLA8031(ha)) {
4455 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
4456 "Clearing fcoe driver presence.\n");
4457 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
4458 ql_dbg(ql_dbg_p3p, vha, 0xb073,
4459 "Error while clearing DRV-Presence.\n");
4460 }
4461
4462 if (unlikely(pci_channel_offline(ha->pdev) &&
4463 ha->flags.pci_channel_io_perm_failure)) {
4464 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4465 status = 0;
4466 return status;
4467 }
4468
4469 ha->isp_ops->get_flash_version(vha, req->ring);
4470
4471 ha->isp_ops->nvram_config(vha);
4472
4473 if (!qla2x00_restart_isp(vha)) {
4474 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4475
4476 if (!atomic_read(&vha->loop_down_timer)) {
4477 /*
4478 * Issue marker command only when we are going
4479 * to start the I/O .
4480 */
4481 vha->marker_needed = 1;
4482 }
4483
4484 vha->flags.online = 1;
4485
4486 ha->isp_ops->enable_intrs(ha);
4487
4488 ha->isp_abort_cnt = 0;
4489 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4490
4491 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
4492 qla2x00_get_fw_version(vha);
4493 if (ha->fce) {
4494 ha->flags.fce_enabled = 1;
4495 memset(ha->fce, 0,
4496 fce_calc_size(ha->fce_bufs));
4497 rval = qla2x00_enable_fce_trace(vha,
4498 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
4499 &ha->fce_bufs);
4500 if (rval) {
4501 ql_log(ql_log_warn, vha, 0x8033,
4502 "Unable to reinitialize FCE "
4503 "(%d).\n", rval);
4504 ha->flags.fce_enabled = 0;
4505 }
4506 }
4507
4508 if (ha->eft) {
4509 memset(ha->eft, 0, EFT_SIZE);
4510 rval = qla2x00_enable_eft_trace(vha,
4511 ha->eft_dma, EFT_NUM_BUFFERS);
4512 if (rval) {
4513 ql_log(ql_log_warn, vha, 0x8034,
4514 "Unable to reinitialize EFT "
4515 "(%d).\n", rval);
4516 }
4517 }
4518 } else { /* failed the ISP abort */
4519 vha->flags.online = 1;
4520 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
4521 if (ha->isp_abort_cnt == 0) {
4522 ql_log(ql_log_fatal, vha, 0x8035,
4523 "ISP error recover failed - "
4524 "board disabled.\n");
4525 /*
4526 * The next call disables the board
4527 * completely.
4528 */
4529 ha->isp_ops->reset_adapter(vha);
4530 vha->flags.online = 0;
4531 clear_bit(ISP_ABORT_RETRY,
4532 &vha->dpc_flags);
4533 status = 0;
4534 } else { /* schedule another ISP abort */
4535 ha->isp_abort_cnt--;
4536 ql_dbg(ql_dbg_taskm, vha, 0x8020,
4537 "ISP abort - retry remaining %d.\n",
4538 ha->isp_abort_cnt);
4539 status = 1;
4540 }
4541 } else {
4542 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
4543 ql_dbg(ql_dbg_taskm, vha, 0x8021,
4544 "ISP error recovery - retrying (%d) "
4545 "more times.\n", ha->isp_abort_cnt);
4546 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
4547 status = 1;
4548 }
4549 }
4550
4551 }
4552
4553 if (!status) {
4554 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
4555
4556 spin_lock_irqsave(&ha->vport_slock, flags);
4557 list_for_each_entry(vp, &ha->vp_list, list) {
4558 if (vp->vp_idx) {
4559 atomic_inc(&vp->vref_count);
4560 spin_unlock_irqrestore(&ha->vport_slock, flags);
4561
4562 qla2x00_vp_abort_isp(vp);
4563
4564 spin_lock_irqsave(&ha->vport_slock, flags);
4565 atomic_dec(&vp->vref_count);
4566 }
4567 }
4568 spin_unlock_irqrestore(&ha->vport_slock, flags);
4569
4570 if (IS_QLA8031(ha)) {
4571 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
4572 "Setting back fcoe driver presence.\n");
4573 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
4574 ql_dbg(ql_dbg_p3p, vha, 0xb074,
4575 "Error while setting DRV-Presence.\n");
4576 }
4577 } else {
4578 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
4579 __func__);
4580 }
4581
4582 return(status);
4583 }
4584
4585 /*
4586 * qla2x00_restart_isp
4587 * restarts the ISP after a reset
4588 *
4589 * Input:
4590 * ha = adapter block pointer.
4591 *
4592 * Returns:
4593 * 0 = success
4594 */
4595 static int
4596 qla2x00_restart_isp(scsi_qla_host_t *vha)
4597 {
4598 int status = 0;
4599 uint32_t wait_time;
4600 struct qla_hw_data *ha = vha->hw;
4601 struct req_que *req = ha->req_q_map[0];
4602 struct rsp_que *rsp = ha->rsp_q_map[0];
4603 unsigned long flags;
4604
4605 /* If firmware needs to be loaded */
4606 if (qla2x00_isp_firmware(vha)) {
4607 vha->flags.online = 0;
4608 status = ha->isp_ops->chip_diag(vha);
4609 if (!status)
4610 status = qla2x00_setup_chip(vha);
4611 }
4612
4613 if (!status && !(status = qla2x00_init_rings(vha))) {
4614 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4615 ha->flags.chip_reset_done = 1;
4616 /* Initialize the queues in use */
4617 qla25xx_init_queues(ha);
4618
4619 status = qla2x00_fw_ready(vha);
4620 if (!status) {
4621 ql_dbg(ql_dbg_taskm, vha, 0x8031,
4622 "Start configure loop status = %d.\n", status);
4623
4624 /* Issue a marker after FW becomes ready. */
4625 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
4626
4627 vha->flags.online = 1;
4628
4629 /*
4630 * Process any ATIO queue entries that came in
4631 * while we weren't online.
4632 */
4633 spin_lock_irqsave(&ha->hardware_lock, flags);
4634 if (qla_tgt_mode_enabled(vha))
4635 qlt_24xx_process_atio_queue(vha);
4636 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4637
4638 /* Wait at most MAX_TARGET RSCNs for a stable link. */
4639 wait_time = 256;
4640 do {
4641 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4642 qla2x00_configure_loop(vha);
4643 wait_time--;
4644 } while (!atomic_read(&vha->loop_down_timer) &&
4645 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
4646 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
4647 &vha->dpc_flags)));
4648 }
4649
4650 /* if no cable then assume it's good */
4651 if ((vha->device_flags & DFLG_NO_CABLE))
4652 status = 0;
4653
4654 ql_dbg(ql_dbg_taskm, vha, 0x8032,
4655 "Configure loop done, status = 0x%x.\n", status);
4656 }
4657 return (status);
4658 }
4659
4660 static int
4661 qla25xx_init_queues(struct qla_hw_data *ha)
4662 {
4663 struct rsp_que *rsp = NULL;
4664 struct req_que *req = NULL;
4665 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
4666 int ret = -1;
4667 int i;
4668
4669 for (i = 1; i < ha->max_rsp_queues; i++) {
4670 rsp = ha->rsp_q_map[i];
4671 if (rsp) {
4672 rsp->options &= ~BIT_0;
4673 ret = qla25xx_init_rsp_que(base_vha, rsp);
4674 if (ret != QLA_SUCCESS)
4675 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
4676 "%s Rsp que: %d init failed.\n",
4677 __func__, rsp->id);
4678 else
4679 ql_dbg(ql_dbg_init, base_vha, 0x0100,
4680 "%s Rsp que: %d inited.\n",
4681 __func__, rsp->id);
4682 }
4683 }
4684 for (i = 1; i < ha->max_req_queues; i++) {
4685 req = ha->req_q_map[i];
4686 if (req) {
4687 /* Clear outstanding commands array. */
4688 req->options &= ~BIT_0;
4689 ret = qla25xx_init_req_que(base_vha, req);
4690 if (ret != QLA_SUCCESS)
4691 ql_dbg(ql_dbg_init, base_vha, 0x0101,
4692 "%s Req que: %d init failed.\n",
4693 __func__, req->id);
4694 else
4695 ql_dbg(ql_dbg_init, base_vha, 0x0102,
4696 "%s Req que: %d inited.\n",
4697 __func__, req->id);
4698 }
4699 }
4700 return ret;
4701 }
4702
4703 /*
4704 * qla2x00_reset_adapter
4705 * Reset adapter.
4706 *
4707 * Input:
4708 * ha = adapter block pointer.
4709 */
4710 void
4711 qla2x00_reset_adapter(scsi_qla_host_t *vha)
4712 {
4713 unsigned long flags = 0;
4714 struct qla_hw_data *ha = vha->hw;
4715 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4716
4717 vha->flags.online = 0;
4718 ha->isp_ops->disable_intrs(ha);
4719
4720 spin_lock_irqsave(&ha->hardware_lock, flags);
4721 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
4722 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4723 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
4724 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
4725 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4726 }
4727
4728 void
4729 qla24xx_reset_adapter(scsi_qla_host_t *vha)
4730 {
4731 unsigned long flags = 0;
4732 struct qla_hw_data *ha = vha->hw;
4733 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4734
4735 if (IS_P3P_TYPE(ha))
4736 return;
4737
4738 vha->flags.online = 0;
4739 ha->isp_ops->disable_intrs(ha);
4740
4741 spin_lock_irqsave(&ha->hardware_lock, flags);
4742 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
4743 RD_REG_DWORD(&reg->hccr);
4744 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
4745 RD_REG_DWORD(&reg->hccr);
4746 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4747
4748 if (IS_NOPOLLING_TYPE(ha))
4749 ha->isp_ops->enable_intrs(ha);
4750 }
4751
4752 /* On sparc systems, obtain port and node WWN from firmware
4753 * properties.
4754 */
4755 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
4756 struct nvram_24xx *nv)
4757 {
4758 #ifdef CONFIG_SPARC
4759 struct qla_hw_data *ha = vha->hw;
4760 struct pci_dev *pdev = ha->pdev;
4761 struct device_node *dp = pci_device_to_OF_node(pdev);
4762 const u8 *val;
4763 int len;
4764
4765 val = of_get_property(dp, "port-wwn", &len);
4766 if (val && len >= WWN_SIZE)
4767 memcpy(nv->port_name, val, WWN_SIZE);
4768
4769 val = of_get_property(dp, "node-wwn", &len);
4770 if (val && len >= WWN_SIZE)
4771 memcpy(nv->node_name, val, WWN_SIZE);
4772 #endif
4773 }
4774
4775 int
4776 qla24xx_nvram_config(scsi_qla_host_t *vha)
4777 {
4778 int rval;
4779 struct init_cb_24xx *icb;
4780 struct nvram_24xx *nv;
4781 uint32_t *dptr;
4782 uint8_t *dptr1, *dptr2;
4783 uint32_t chksum;
4784 uint16_t cnt;
4785 struct qla_hw_data *ha = vha->hw;
4786
4787 rval = QLA_SUCCESS;
4788 icb = (struct init_cb_24xx *)ha->init_cb;
4789 nv = ha->nvram;
4790
4791 /* Determine NVRAM starting address. */
4792 if (ha->flags.port0) {
4793 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
4794 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
4795 } else {
4796 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
4797 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
4798 }
4799 ha->nvram_size = sizeof(struct nvram_24xx);
4800 ha->vpd_size = FA_NVRAM_VPD_SIZE;
4801
4802 /* Get VPD data into cache */
4803 ha->vpd = ha->nvram + VPD_OFFSET;
4804 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
4805 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
4806
4807 /* Get NVRAM data into cache and calculate checksum. */
4808 dptr = (uint32_t *)nv;
4809 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
4810 ha->nvram_size);
4811 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
4812 chksum += le32_to_cpu(*dptr++);
4813
4814 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
4815 "Contents of NVRAM\n");
4816 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
4817 (uint8_t *)nv, ha->nvram_size);
4818
4819 /* Bad NVRAM data, set defaults parameters. */
4820 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
4821 || nv->id[3] != ' ' ||
4822 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
4823 /* Reset NVRAM data. */
4824 ql_log(ql_log_warn, vha, 0x006b,
4825 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
4826 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
4827 ql_log(ql_log_warn, vha, 0x006c,
4828 "Falling back to functioning (yet invalid -- WWPN) "
4829 "defaults.\n");
4830
4831 /*
4832 * Set default initialization control block.
4833 */
4834 memset(nv, 0, ha->nvram_size);
4835 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
4836 nv->version = __constant_cpu_to_le16(ICB_VERSION);
4837 nv->frame_payload_size = __constant_cpu_to_le16(2048);
4838 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4839 nv->exchange_count = __constant_cpu_to_le16(0);
4840 nv->hard_address = __constant_cpu_to_le16(124);
4841 nv->port_name[0] = 0x21;
4842 nv->port_name[1] = 0x00 + ha->port_no;
4843 nv->port_name[2] = 0x00;
4844 nv->port_name[3] = 0xe0;
4845 nv->port_name[4] = 0x8b;
4846 nv->port_name[5] = 0x1c;
4847 nv->port_name[6] = 0x55;
4848 nv->port_name[7] = 0x86;
4849 nv->node_name[0] = 0x20;
4850 nv->node_name[1] = 0x00;
4851 nv->node_name[2] = 0x00;
4852 nv->node_name[3] = 0xe0;
4853 nv->node_name[4] = 0x8b;
4854 nv->node_name[5] = 0x1c;
4855 nv->node_name[6] = 0x55;
4856 nv->node_name[7] = 0x86;
4857 qla24xx_nvram_wwn_from_ofw(vha, nv);
4858 nv->login_retry_count = __constant_cpu_to_le16(8);
4859 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
4860 nv->login_timeout = __constant_cpu_to_le16(0);
4861 nv->firmware_options_1 =
4862 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
4863 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
4864 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
4865 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
4866 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
4867 nv->efi_parameters = __constant_cpu_to_le32(0);
4868 nv->reset_delay = 5;
4869 nv->max_luns_per_target = __constant_cpu_to_le16(128);
4870 nv->port_down_retry_count = __constant_cpu_to_le16(30);
4871 nv->link_down_timeout = __constant_cpu_to_le16(30);
4872
4873 rval = 1;
4874 }
4875
4876 if (!qla_ini_mode_enabled(vha)) {
4877 /* Don't enable full login after initial LIP */
4878 nv->firmware_options_1 &= __constant_cpu_to_le32(~BIT_13);
4879 /* Don't enable LIP full login for initiator */
4880 nv->host_p &= __constant_cpu_to_le32(~BIT_10);
4881 }
4882
4883 qlt_24xx_config_nvram_stage1(vha, nv);
4884
4885 /* Reset Initialization control block */
4886 memset(icb, 0, ha->init_cb_size);
4887
4888 /* Copy 1st segment. */
4889 dptr1 = (uint8_t *)icb;
4890 dptr2 = (uint8_t *)&nv->version;
4891 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
4892 while (cnt--)
4893 *dptr1++ = *dptr2++;
4894
4895 icb->login_retry_count = nv->login_retry_count;
4896 icb->link_down_on_nos = nv->link_down_on_nos;
4897
4898 /* Copy 2nd segment. */
4899 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
4900 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
4901 cnt = (uint8_t *)&icb->reserved_3 -
4902 (uint8_t *)&icb->interrupt_delay_timer;
4903 while (cnt--)
4904 *dptr1++ = *dptr2++;
4905
4906 /*
4907 * Setup driver NVRAM options.
4908 */
4909 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
4910 "QLA2462");
4911
4912 qlt_24xx_config_nvram_stage2(vha, icb);
4913
4914 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
4915 /* Use alternate WWN? */
4916 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4917 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4918 }
4919
4920 /* Prepare nodename */
4921 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
4922 /*
4923 * Firmware will apply the following mask if the nodename was
4924 * not provided.
4925 */
4926 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4927 icb->node_name[0] &= 0xF0;
4928 }
4929
4930 /* Set host adapter parameters. */
4931 ha->flags.disable_risc_code_load = 0;
4932 ha->flags.enable_lip_reset = 0;
4933 ha->flags.enable_lip_full_login =
4934 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
4935 ha->flags.enable_target_reset =
4936 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
4937 ha->flags.enable_led_scheme = 0;
4938 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
4939
4940 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
4941 (BIT_6 | BIT_5 | BIT_4)) >> 4;
4942
4943 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
4944 sizeof(ha->fw_seriallink_options24));
4945
4946 /* save HBA serial number */
4947 ha->serial0 = icb->port_name[5];
4948 ha->serial1 = icb->port_name[6];
4949 ha->serial2 = icb->port_name[7];
4950 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4951 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4952
4953 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
4954
4955 ha->retry_count = le16_to_cpu(nv->login_retry_count);
4956
4957 /* Set minimum login_timeout to 4 seconds. */
4958 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
4959 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
4960 if (le16_to_cpu(nv->login_timeout) < 4)
4961 nv->login_timeout = __constant_cpu_to_le16(4);
4962 ha->login_timeout = le16_to_cpu(nv->login_timeout);
4963 icb->login_timeout = nv->login_timeout;
4964
4965 /* Set minimum RATOV to 100 tenths of a second. */
4966 ha->r_a_tov = 100;
4967
4968 ha->loop_reset_delay = nv->reset_delay;
4969
4970 /* Link Down Timeout = 0:
4971 *
4972 * When Port Down timer expires we will start returning
4973 * I/O's to OS with "DID_NO_CONNECT".
4974 *
4975 * Link Down Timeout != 0:
4976 *
4977 * The driver waits for the link to come up after link down
4978 * before returning I/Os to OS with "DID_NO_CONNECT".
4979 */
4980 if (le16_to_cpu(nv->link_down_timeout) == 0) {
4981 ha->loop_down_abort_time =
4982 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4983 } else {
4984 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
4985 ha->loop_down_abort_time =
4986 (LOOP_DOWN_TIME - ha->link_down_timeout);
4987 }
4988
4989 /* Need enough time to try and get the port back. */
4990 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
4991 if (qlport_down_retry)
4992 ha->port_down_retry_count = qlport_down_retry;
4993
4994 /* Set login_retry_count */
4995 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
4996 if (ha->port_down_retry_count ==
4997 le16_to_cpu(nv->port_down_retry_count) &&
4998 ha->port_down_retry_count > 3)
4999 ha->login_retry_count = ha->port_down_retry_count;
5000 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5001 ha->login_retry_count = ha->port_down_retry_count;
5002 if (ql2xloginretrycount)
5003 ha->login_retry_count = ql2xloginretrycount;
5004
5005 /* Enable ZIO. */
5006 if (!vha->flags.init_done) {
5007 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5008 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5009 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5010 le16_to_cpu(icb->interrupt_delay_timer): 2;
5011 }
5012 icb->firmware_options_2 &= __constant_cpu_to_le32(
5013 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5014 vha->flags.process_response_queue = 0;
5015 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5016 ha->zio_mode = QLA_ZIO_MODE_6;
5017
5018 ql_log(ql_log_info, vha, 0x006f,
5019 "ZIO mode %d enabled; timer delay (%d us).\n",
5020 ha->zio_mode, ha->zio_timer * 100);
5021
5022 icb->firmware_options_2 |= cpu_to_le32(
5023 (uint32_t)ha->zio_mode);
5024 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5025 vha->flags.process_response_queue = 1;
5026 }
5027
5028 if (rval) {
5029 ql_log(ql_log_warn, vha, 0x0070,
5030 "NVRAM configuration failed.\n");
5031 }
5032 return (rval);
5033 }
5034
5035 static int
5036 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
5037 uint32_t faddr)
5038 {
5039 int rval = QLA_SUCCESS;
5040 int segments, fragment;
5041 uint32_t *dcode, dlen;
5042 uint32_t risc_addr;
5043 uint32_t risc_size;
5044 uint32_t i;
5045 struct qla_hw_data *ha = vha->hw;
5046 struct req_que *req = ha->req_q_map[0];
5047
5048 ql_dbg(ql_dbg_init, vha, 0x008b,
5049 "FW: Loading firmware from flash (%x).\n", faddr);
5050
5051 rval = QLA_SUCCESS;
5052
5053 segments = FA_RISC_CODE_SEGMENTS;
5054 dcode = (uint32_t *)req->ring;
5055 *srisc_addr = 0;
5056
5057 /* Validate firmware image by checking version. */
5058 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
5059 for (i = 0; i < 4; i++)
5060 dcode[i] = be32_to_cpu(dcode[i]);
5061 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5062 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5063 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5064 dcode[3] == 0)) {
5065 ql_log(ql_log_fatal, vha, 0x008c,
5066 "Unable to verify the integrity of flash firmware "
5067 "image.\n");
5068 ql_log(ql_log_fatal, vha, 0x008d,
5069 "Firmware data: %08x %08x %08x %08x.\n",
5070 dcode[0], dcode[1], dcode[2], dcode[3]);
5071
5072 return QLA_FUNCTION_FAILED;
5073 }
5074
5075 while (segments && rval == QLA_SUCCESS) {
5076 /* Read segment's load information. */
5077 qla24xx_read_flash_data(vha, dcode, faddr, 4);
5078
5079 risc_addr = be32_to_cpu(dcode[2]);
5080 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5081 risc_size = be32_to_cpu(dcode[3]);
5082
5083 fragment = 0;
5084 while (risc_size > 0 && rval == QLA_SUCCESS) {
5085 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5086 if (dlen > risc_size)
5087 dlen = risc_size;
5088
5089 ql_dbg(ql_dbg_init, vha, 0x008e,
5090 "Loading risc segment@ risc addr %x "
5091 "number of dwords 0x%x offset 0x%x.\n",
5092 risc_addr, dlen, faddr);
5093
5094 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
5095 for (i = 0; i < dlen; i++)
5096 dcode[i] = swab32(dcode[i]);
5097
5098 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5099 dlen);
5100 if (rval) {
5101 ql_log(ql_log_fatal, vha, 0x008f,
5102 "Failed to load segment %d of firmware.\n",
5103 fragment);
5104 break;
5105 }
5106
5107 faddr += dlen;
5108 risc_addr += dlen;
5109 risc_size -= dlen;
5110 fragment++;
5111 }
5112
5113 /* Next segment. */
5114 segments--;
5115 }
5116
5117 return rval;
5118 }
5119
5120 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
5121
5122 int
5123 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5124 {
5125 int rval;
5126 int i, fragment;
5127 uint16_t *wcode, *fwcode;
5128 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
5129 struct fw_blob *blob;
5130 struct qla_hw_data *ha = vha->hw;
5131 struct req_que *req = ha->req_q_map[0];
5132
5133 /* Load firmware blob. */
5134 blob = qla2x00_request_firmware(vha);
5135 if (!blob) {
5136 ql_log(ql_log_info, vha, 0x0083,
5137 "Fimware image unavailable.\n");
5138 ql_log(ql_log_info, vha, 0x0084,
5139 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5140 return QLA_FUNCTION_FAILED;
5141 }
5142
5143 rval = QLA_SUCCESS;
5144
5145 wcode = (uint16_t *)req->ring;
5146 *srisc_addr = 0;
5147 fwcode = (uint16_t *)blob->fw->data;
5148 fwclen = 0;
5149
5150 /* Validate firmware image by checking version. */
5151 if (blob->fw->size < 8 * sizeof(uint16_t)) {
5152 ql_log(ql_log_fatal, vha, 0x0085,
5153 "Unable to verify integrity of firmware image (%Zd).\n",
5154 blob->fw->size);
5155 goto fail_fw_integrity;
5156 }
5157 for (i = 0; i < 4; i++)
5158 wcode[i] = be16_to_cpu(fwcode[i + 4]);
5159 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
5160 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
5161 wcode[2] == 0 && wcode[3] == 0)) {
5162 ql_log(ql_log_fatal, vha, 0x0086,
5163 "Unable to verify integrity of firmware image.\n");
5164 ql_log(ql_log_fatal, vha, 0x0087,
5165 "Firmware data: %04x %04x %04x %04x.\n",
5166 wcode[0], wcode[1], wcode[2], wcode[3]);
5167 goto fail_fw_integrity;
5168 }
5169
5170 seg = blob->segs;
5171 while (*seg && rval == QLA_SUCCESS) {
5172 risc_addr = *seg;
5173 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
5174 risc_size = be16_to_cpu(fwcode[3]);
5175
5176 /* Validate firmware image size. */
5177 fwclen += risc_size * sizeof(uint16_t);
5178 if (blob->fw->size < fwclen) {
5179 ql_log(ql_log_fatal, vha, 0x0088,
5180 "Unable to verify integrity of firmware image "
5181 "(%Zd).\n", blob->fw->size);
5182 goto fail_fw_integrity;
5183 }
5184
5185 fragment = 0;
5186 while (risc_size > 0 && rval == QLA_SUCCESS) {
5187 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
5188 if (wlen > risc_size)
5189 wlen = risc_size;
5190 ql_dbg(ql_dbg_init, vha, 0x0089,
5191 "Loading risc segment@ risc addr %x number of "
5192 "words 0x%x.\n", risc_addr, wlen);
5193
5194 for (i = 0; i < wlen; i++)
5195 wcode[i] = swab16(fwcode[i]);
5196
5197 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5198 wlen);
5199 if (rval) {
5200 ql_log(ql_log_fatal, vha, 0x008a,
5201 "Failed to load segment %d of firmware.\n",
5202 fragment);
5203 break;
5204 }
5205
5206 fwcode += wlen;
5207 risc_addr += wlen;
5208 risc_size -= wlen;
5209 fragment++;
5210 }
5211
5212 /* Next segment. */
5213 seg++;
5214 }
5215 return rval;
5216
5217 fail_fw_integrity:
5218 return QLA_FUNCTION_FAILED;
5219 }
5220
5221 static int
5222 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5223 {
5224 int rval;
5225 int segments, fragment;
5226 uint32_t *dcode, dlen;
5227 uint32_t risc_addr;
5228 uint32_t risc_size;
5229 uint32_t i;
5230 struct fw_blob *blob;
5231 uint32_t *fwcode, fwclen;
5232 struct qla_hw_data *ha = vha->hw;
5233 struct req_que *req = ha->req_q_map[0];
5234
5235 /* Load firmware blob. */
5236 blob = qla2x00_request_firmware(vha);
5237 if (!blob) {
5238 ql_log(ql_log_warn, vha, 0x0090,
5239 "Fimware image unavailable.\n");
5240 ql_log(ql_log_warn, vha, 0x0091,
5241 "Firmware images can be retrieved from: "
5242 QLA_FW_URL ".\n");
5243
5244 return QLA_FUNCTION_FAILED;
5245 }
5246
5247 ql_dbg(ql_dbg_init, vha, 0x0092,
5248 "FW: Loading via request-firmware.\n");
5249
5250 rval = QLA_SUCCESS;
5251
5252 segments = FA_RISC_CODE_SEGMENTS;
5253 dcode = (uint32_t *)req->ring;
5254 *srisc_addr = 0;
5255 fwcode = (uint32_t *)blob->fw->data;
5256 fwclen = 0;
5257
5258 /* Validate firmware image by checking version. */
5259 if (blob->fw->size < 8 * sizeof(uint32_t)) {
5260 ql_log(ql_log_fatal, vha, 0x0093,
5261 "Unable to verify integrity of firmware image (%Zd).\n",
5262 blob->fw->size);
5263 goto fail_fw_integrity;
5264 }
5265 for (i = 0; i < 4; i++)
5266 dcode[i] = be32_to_cpu(fwcode[i + 4]);
5267 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
5268 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
5269 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
5270 dcode[3] == 0)) {
5271 ql_log(ql_log_fatal, vha, 0x0094,
5272 "Unable to verify integrity of firmware image (%Zd).\n",
5273 blob->fw->size);
5274 ql_log(ql_log_fatal, vha, 0x0095,
5275 "Firmware data: %08x %08x %08x %08x.\n",
5276 dcode[0], dcode[1], dcode[2], dcode[3]);
5277 goto fail_fw_integrity;
5278 }
5279
5280 while (segments && rval == QLA_SUCCESS) {
5281 risc_addr = be32_to_cpu(fwcode[2]);
5282 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
5283 risc_size = be32_to_cpu(fwcode[3]);
5284
5285 /* Validate firmware image size. */
5286 fwclen += risc_size * sizeof(uint32_t);
5287 if (blob->fw->size < fwclen) {
5288 ql_log(ql_log_fatal, vha, 0x0096,
5289 "Unable to verify integrity of firmware image "
5290 "(%Zd).\n", blob->fw->size);
5291
5292 goto fail_fw_integrity;
5293 }
5294
5295 fragment = 0;
5296 while (risc_size > 0 && rval == QLA_SUCCESS) {
5297 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
5298 if (dlen > risc_size)
5299 dlen = risc_size;
5300
5301 ql_dbg(ql_dbg_init, vha, 0x0097,
5302 "Loading risc segment@ risc addr %x "
5303 "number of dwords 0x%x.\n", risc_addr, dlen);
5304
5305 for (i = 0; i < dlen; i++)
5306 dcode[i] = swab32(fwcode[i]);
5307
5308 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5309 dlen);
5310 if (rval) {
5311 ql_log(ql_log_fatal, vha, 0x0098,
5312 "Failed to load segment %d of firmware.\n",
5313 fragment);
5314 break;
5315 }
5316
5317 fwcode += dlen;
5318 risc_addr += dlen;
5319 risc_size -= dlen;
5320 fragment++;
5321 }
5322
5323 /* Next segment. */
5324 segments--;
5325 }
5326 return rval;
5327
5328 fail_fw_integrity:
5329 return QLA_FUNCTION_FAILED;
5330 }
5331
5332 int
5333 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5334 {
5335 int rval;
5336
5337 if (ql2xfwloadbin == 1)
5338 return qla81xx_load_risc(vha, srisc_addr);
5339
5340 /*
5341 * FW Load priority:
5342 * 1) Firmware via request-firmware interface (.bin file).
5343 * 2) Firmware residing in flash.
5344 */
5345 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5346 if (rval == QLA_SUCCESS)
5347 return rval;
5348
5349 return qla24xx_load_risc_flash(vha, srisc_addr,
5350 vha->hw->flt_region_fw);
5351 }
5352
5353 int
5354 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5355 {
5356 int rval;
5357 struct qla_hw_data *ha = vha->hw;
5358
5359 if (ql2xfwloadbin == 2)
5360 goto try_blob_fw;
5361
5362 /*
5363 * FW Load priority:
5364 * 1) Firmware residing in flash.
5365 * 2) Firmware via request-firmware interface (.bin file).
5366 * 3) Golden-Firmware residing in flash -- limited operation.
5367 */
5368 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
5369 if (rval == QLA_SUCCESS)
5370 return rval;
5371
5372 try_blob_fw:
5373 rval = qla24xx_load_risc_blob(vha, srisc_addr);
5374 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
5375 return rval;
5376
5377 ql_log(ql_log_info, vha, 0x0099,
5378 "Attempting to fallback to golden firmware.\n");
5379 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
5380 if (rval != QLA_SUCCESS)
5381 return rval;
5382
5383 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
5384 ha->flags.running_gold_fw = 1;
5385 return rval;
5386 }
5387
5388 void
5389 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
5390 {
5391 int ret, retries;
5392 struct qla_hw_data *ha = vha->hw;
5393
5394 if (ha->flags.pci_channel_io_perm_failure)
5395 return;
5396 if (!IS_FWI2_CAPABLE(ha))
5397 return;
5398 if (!ha->fw_major_version)
5399 return;
5400
5401 ret = qla2x00_stop_firmware(vha);
5402 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
5403 ret != QLA_INVALID_COMMAND && retries ; retries--) {
5404 ha->isp_ops->reset_chip(vha);
5405 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
5406 continue;
5407 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
5408 continue;
5409 ql_log(ql_log_info, vha, 0x8015,
5410 "Attempting retry of stop-firmware command.\n");
5411 ret = qla2x00_stop_firmware(vha);
5412 }
5413 }
5414
5415 int
5416 qla24xx_configure_vhba(scsi_qla_host_t *vha)
5417 {
5418 int rval = QLA_SUCCESS;
5419 int rval2;
5420 uint16_t mb[MAILBOX_REGISTER_COUNT];
5421 struct qla_hw_data *ha = vha->hw;
5422 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5423 struct req_que *req;
5424 struct rsp_que *rsp;
5425
5426 if (!vha->vp_idx)
5427 return -EINVAL;
5428
5429 rval = qla2x00_fw_ready(base_vha);
5430 if (ha->flags.cpu_affinity_enabled)
5431 req = ha->req_q_map[0];
5432 else
5433 req = vha->req;
5434 rsp = req->rsp;
5435
5436 if (rval == QLA_SUCCESS) {
5437 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5438 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5439 }
5440
5441 vha->flags.management_server_logged_in = 0;
5442
5443 /* Login to SNS first */
5444 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
5445 BIT_1);
5446 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5447 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
5448 ql_dbg(ql_dbg_init, vha, 0x0120,
5449 "Failed SNS login: loop_id=%x, rval2=%d\n",
5450 NPH_SNS, rval2);
5451 else
5452 ql_dbg(ql_dbg_init, vha, 0x0103,
5453 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
5454 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
5455 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
5456 return (QLA_FUNCTION_FAILED);
5457 }
5458
5459 atomic_set(&vha->loop_down_timer, 0);
5460 atomic_set(&vha->loop_state, LOOP_UP);
5461 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5462 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5463 rval = qla2x00_loop_resync(base_vha);
5464
5465 return rval;
5466 }
5467
5468 /* 84XX Support **************************************************************/
5469
5470 static LIST_HEAD(qla_cs84xx_list);
5471 static DEFINE_MUTEX(qla_cs84xx_mutex);
5472
5473 static struct qla_chip_state_84xx *
5474 qla84xx_get_chip(struct scsi_qla_host *vha)
5475 {
5476 struct qla_chip_state_84xx *cs84xx;
5477 struct qla_hw_data *ha = vha->hw;
5478
5479 mutex_lock(&qla_cs84xx_mutex);
5480
5481 /* Find any shared 84xx chip. */
5482 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
5483 if (cs84xx->bus == ha->pdev->bus) {
5484 kref_get(&cs84xx->kref);
5485 goto done;
5486 }
5487 }
5488
5489 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
5490 if (!cs84xx)
5491 goto done;
5492
5493 kref_init(&cs84xx->kref);
5494 spin_lock_init(&cs84xx->access_lock);
5495 mutex_init(&cs84xx->fw_update_mutex);
5496 cs84xx->bus = ha->pdev->bus;
5497
5498 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
5499 done:
5500 mutex_unlock(&qla_cs84xx_mutex);
5501 return cs84xx;
5502 }
5503
5504 static void
5505 __qla84xx_chip_release(struct kref *kref)
5506 {
5507 struct qla_chip_state_84xx *cs84xx =
5508 container_of(kref, struct qla_chip_state_84xx, kref);
5509
5510 mutex_lock(&qla_cs84xx_mutex);
5511 list_del(&cs84xx->list);
5512 mutex_unlock(&qla_cs84xx_mutex);
5513 kfree(cs84xx);
5514 }
5515
5516 void
5517 qla84xx_put_chip(struct scsi_qla_host *vha)
5518 {
5519 struct qla_hw_data *ha = vha->hw;
5520 if (ha->cs84xx)
5521 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
5522 }
5523
5524 static int
5525 qla84xx_init_chip(scsi_qla_host_t *vha)
5526 {
5527 int rval;
5528 uint16_t status[2];
5529 struct qla_hw_data *ha = vha->hw;
5530
5531 mutex_lock(&ha->cs84xx->fw_update_mutex);
5532
5533 rval = qla84xx_verify_chip(vha, status);
5534
5535 mutex_unlock(&ha->cs84xx->fw_update_mutex);
5536
5537 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
5538 QLA_SUCCESS;
5539 }
5540
5541 /* 81XX Support **************************************************************/
5542
5543 int
5544 qla81xx_nvram_config(scsi_qla_host_t *vha)
5545 {
5546 int rval;
5547 struct init_cb_81xx *icb;
5548 struct nvram_81xx *nv;
5549 uint32_t *dptr;
5550 uint8_t *dptr1, *dptr2;
5551 uint32_t chksum;
5552 uint16_t cnt;
5553 struct qla_hw_data *ha = vha->hw;
5554
5555 rval = QLA_SUCCESS;
5556 icb = (struct init_cb_81xx *)ha->init_cb;
5557 nv = ha->nvram;
5558
5559 /* Determine NVRAM starting address. */
5560 ha->nvram_size = sizeof(struct nvram_81xx);
5561 ha->vpd_size = FA_NVRAM_VPD_SIZE;
5562 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
5563 ha->vpd_size = FA_VPD_SIZE_82XX;
5564
5565 /* Get VPD data into cache */
5566 ha->vpd = ha->nvram + VPD_OFFSET;
5567 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
5568 ha->vpd_size);
5569
5570 /* Get NVRAM data into cache and calculate checksum. */
5571 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
5572 ha->nvram_size);
5573 dptr = (uint32_t *)nv;
5574 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
5575 chksum += le32_to_cpu(*dptr++);
5576
5577 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
5578 "Contents of NVRAM:\n");
5579 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
5580 (uint8_t *)nv, ha->nvram_size);
5581
5582 /* Bad NVRAM data, set defaults parameters. */
5583 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
5584 || nv->id[3] != ' ' ||
5585 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
5586 /* Reset NVRAM data. */
5587 ql_log(ql_log_info, vha, 0x0073,
5588 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
5589 "version=0x%x.\n", chksum, nv->id[0],
5590 le16_to_cpu(nv->nvram_version));
5591 ql_log(ql_log_info, vha, 0x0074,
5592 "Falling back to functioning (yet invalid -- WWPN) "
5593 "defaults.\n");
5594
5595 /*
5596 * Set default initialization control block.
5597 */
5598 memset(nv, 0, ha->nvram_size);
5599 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
5600 nv->version = __constant_cpu_to_le16(ICB_VERSION);
5601 nv->frame_payload_size = __constant_cpu_to_le16(2048);
5602 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5603 nv->exchange_count = __constant_cpu_to_le16(0);
5604 nv->port_name[0] = 0x21;
5605 nv->port_name[1] = 0x00 + ha->port_no;
5606 nv->port_name[2] = 0x00;
5607 nv->port_name[3] = 0xe0;
5608 nv->port_name[4] = 0x8b;
5609 nv->port_name[5] = 0x1c;
5610 nv->port_name[6] = 0x55;
5611 nv->port_name[7] = 0x86;
5612 nv->node_name[0] = 0x20;
5613 nv->node_name[1] = 0x00;
5614 nv->node_name[2] = 0x00;
5615 nv->node_name[3] = 0xe0;
5616 nv->node_name[4] = 0x8b;
5617 nv->node_name[5] = 0x1c;
5618 nv->node_name[6] = 0x55;
5619 nv->node_name[7] = 0x86;
5620 nv->login_retry_count = __constant_cpu_to_le16(8);
5621 nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
5622 nv->login_timeout = __constant_cpu_to_le16(0);
5623 nv->firmware_options_1 =
5624 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
5625 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
5626 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
5627 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
5628 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
5629 nv->efi_parameters = __constant_cpu_to_le32(0);
5630 nv->reset_delay = 5;
5631 nv->max_luns_per_target = __constant_cpu_to_le16(128);
5632 nv->port_down_retry_count = __constant_cpu_to_le16(30);
5633 nv->link_down_timeout = __constant_cpu_to_le16(180);
5634 nv->enode_mac[0] = 0x00;
5635 nv->enode_mac[1] = 0xC0;
5636 nv->enode_mac[2] = 0xDD;
5637 nv->enode_mac[3] = 0x04;
5638 nv->enode_mac[4] = 0x05;
5639 nv->enode_mac[5] = 0x06 + ha->port_no;
5640
5641 rval = 1;
5642 }
5643
5644 if (IS_T10_PI_CAPABLE(ha))
5645 nv->frame_payload_size &= ~7;
5646
5647 qlt_81xx_config_nvram_stage1(vha, nv);
5648
5649 /* Reset Initialization control block */
5650 memset(icb, 0, ha->init_cb_size);
5651
5652 /* Copy 1st segment. */
5653 dptr1 = (uint8_t *)icb;
5654 dptr2 = (uint8_t *)&nv->version;
5655 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
5656 while (cnt--)
5657 *dptr1++ = *dptr2++;
5658
5659 icb->login_retry_count = nv->login_retry_count;
5660
5661 /* Copy 2nd segment. */
5662 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
5663 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
5664 cnt = (uint8_t *)&icb->reserved_5 -
5665 (uint8_t *)&icb->interrupt_delay_timer;
5666 while (cnt--)
5667 *dptr1++ = *dptr2++;
5668
5669 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
5670 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
5671 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
5672 icb->enode_mac[0] = 0x00;
5673 icb->enode_mac[1] = 0xC0;
5674 icb->enode_mac[2] = 0xDD;
5675 icb->enode_mac[3] = 0x04;
5676 icb->enode_mac[4] = 0x05;
5677 icb->enode_mac[5] = 0x06 + ha->port_no;
5678 }
5679
5680 /* Use extended-initialization control block. */
5681 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
5682
5683 /*
5684 * Setup driver NVRAM options.
5685 */
5686 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
5687 "QLE8XXX");
5688
5689 qlt_81xx_config_nvram_stage2(vha, icb);
5690
5691 /* Use alternate WWN? */
5692 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
5693 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
5694 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
5695 }
5696
5697 /* Prepare nodename */
5698 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
5699 /*
5700 * Firmware will apply the following mask if the nodename was
5701 * not provided.
5702 */
5703 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
5704 icb->node_name[0] &= 0xF0;
5705 }
5706
5707 /* Set host adapter parameters. */
5708 ha->flags.disable_risc_code_load = 0;
5709 ha->flags.enable_lip_reset = 0;
5710 ha->flags.enable_lip_full_login =
5711 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
5712 ha->flags.enable_target_reset =
5713 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
5714 ha->flags.enable_led_scheme = 0;
5715 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
5716
5717 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
5718 (BIT_6 | BIT_5 | BIT_4)) >> 4;
5719
5720 /* save HBA serial number */
5721 ha->serial0 = icb->port_name[5];
5722 ha->serial1 = icb->port_name[6];
5723 ha->serial2 = icb->port_name[7];
5724 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
5725 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
5726
5727 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
5728
5729 ha->retry_count = le16_to_cpu(nv->login_retry_count);
5730
5731 /* Set minimum login_timeout to 4 seconds. */
5732 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
5733 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
5734 if (le16_to_cpu(nv->login_timeout) < 4)
5735 nv->login_timeout = __constant_cpu_to_le16(4);
5736 ha->login_timeout = le16_to_cpu(nv->login_timeout);
5737 icb->login_timeout = nv->login_timeout;
5738
5739 /* Set minimum RATOV to 100 tenths of a second. */
5740 ha->r_a_tov = 100;
5741
5742 ha->loop_reset_delay = nv->reset_delay;
5743
5744 /* Link Down Timeout = 0:
5745 *
5746 * When Port Down timer expires we will start returning
5747 * I/O's to OS with "DID_NO_CONNECT".
5748 *
5749 * Link Down Timeout != 0:
5750 *
5751 * The driver waits for the link to come up after link down
5752 * before returning I/Os to OS with "DID_NO_CONNECT".
5753 */
5754 if (le16_to_cpu(nv->link_down_timeout) == 0) {
5755 ha->loop_down_abort_time =
5756 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
5757 } else {
5758 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
5759 ha->loop_down_abort_time =
5760 (LOOP_DOWN_TIME - ha->link_down_timeout);
5761 }
5762
5763 /* Need enough time to try and get the port back. */
5764 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
5765 if (qlport_down_retry)
5766 ha->port_down_retry_count = qlport_down_retry;
5767
5768 /* Set login_retry_count */
5769 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
5770 if (ha->port_down_retry_count ==
5771 le16_to_cpu(nv->port_down_retry_count) &&
5772 ha->port_down_retry_count > 3)
5773 ha->login_retry_count = ha->port_down_retry_count;
5774 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
5775 ha->login_retry_count = ha->port_down_retry_count;
5776 if (ql2xloginretrycount)
5777 ha->login_retry_count = ql2xloginretrycount;
5778
5779 /* if not running MSI-X we need handshaking on interrupts */
5780 if (!vha->hw->flags.msix_enabled && IS_QLA83XX(ha))
5781 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
5782
5783 /* Enable ZIO. */
5784 if (!vha->flags.init_done) {
5785 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
5786 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
5787 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
5788 le16_to_cpu(icb->interrupt_delay_timer): 2;
5789 }
5790 icb->firmware_options_2 &= __constant_cpu_to_le32(
5791 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
5792 vha->flags.process_response_queue = 0;
5793 if (ha->zio_mode != QLA_ZIO_DISABLED) {
5794 ha->zio_mode = QLA_ZIO_MODE_6;
5795
5796 ql_log(ql_log_info, vha, 0x0075,
5797 "ZIO mode %d enabled; timer delay (%d us).\n",
5798 ha->zio_mode,
5799 ha->zio_timer * 100);
5800
5801 icb->firmware_options_2 |= cpu_to_le32(
5802 (uint32_t)ha->zio_mode);
5803 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
5804 vha->flags.process_response_queue = 1;
5805 }
5806
5807 if (rval) {
5808 ql_log(ql_log_warn, vha, 0x0076,
5809 "NVRAM configuration failed.\n");
5810 }
5811 return (rval);
5812 }
5813
5814 int
5815 qla82xx_restart_isp(scsi_qla_host_t *vha)
5816 {
5817 int status, rval;
5818 uint32_t wait_time;
5819 struct qla_hw_data *ha = vha->hw;
5820 struct req_que *req = ha->req_q_map[0];
5821 struct rsp_que *rsp = ha->rsp_q_map[0];
5822 struct scsi_qla_host *vp;
5823 unsigned long flags;
5824
5825 status = qla2x00_init_rings(vha);
5826 if (!status) {
5827 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5828 ha->flags.chip_reset_done = 1;
5829
5830 status = qla2x00_fw_ready(vha);
5831 if (!status) {
5832 ql_log(ql_log_info, vha, 0x803c,
5833 "Start configure loop, status =%d.\n", status);
5834
5835 /* Issue a marker after FW becomes ready. */
5836 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
5837
5838 vha->flags.online = 1;
5839 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5840 wait_time = 256;
5841 do {
5842 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5843 qla2x00_configure_loop(vha);
5844 wait_time--;
5845 } while (!atomic_read(&vha->loop_down_timer) &&
5846 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
5847 wait_time &&
5848 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
5849 }
5850
5851 /* if no cable then assume it's good */
5852 if ((vha->device_flags & DFLG_NO_CABLE))
5853 status = 0;
5854
5855 ql_log(ql_log_info, vha, 0x8000,
5856 "Configure loop done, status = 0x%x.\n", status);
5857 }
5858
5859 if (!status) {
5860 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5861
5862 if (!atomic_read(&vha->loop_down_timer)) {
5863 /*
5864 * Issue marker command only when we are going
5865 * to start the I/O .
5866 */
5867 vha->marker_needed = 1;
5868 }
5869
5870 vha->flags.online = 1;
5871
5872 ha->isp_ops->enable_intrs(ha);
5873
5874 ha->isp_abort_cnt = 0;
5875 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5876
5877 /* Update the firmware version */
5878 status = qla82xx_check_md_needed(vha);
5879
5880 if (ha->fce) {
5881 ha->flags.fce_enabled = 1;
5882 memset(ha->fce, 0,
5883 fce_calc_size(ha->fce_bufs));
5884 rval = qla2x00_enable_fce_trace(vha,
5885 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
5886 &ha->fce_bufs);
5887 if (rval) {
5888 ql_log(ql_log_warn, vha, 0x8001,
5889 "Unable to reinitialize FCE (%d).\n",
5890 rval);
5891 ha->flags.fce_enabled = 0;
5892 }
5893 }
5894
5895 if (ha->eft) {
5896 memset(ha->eft, 0, EFT_SIZE);
5897 rval = qla2x00_enable_eft_trace(vha,
5898 ha->eft_dma, EFT_NUM_BUFFERS);
5899 if (rval) {
5900 ql_log(ql_log_warn, vha, 0x8010,
5901 "Unable to reinitialize EFT (%d).\n",
5902 rval);
5903 }
5904 }
5905 }
5906
5907 if (!status) {
5908 ql_dbg(ql_dbg_taskm, vha, 0x8011,
5909 "qla82xx_restart_isp succeeded.\n");
5910
5911 spin_lock_irqsave(&ha->vport_slock, flags);
5912 list_for_each_entry(vp, &ha->vp_list, list) {
5913 if (vp->vp_idx) {
5914 atomic_inc(&vp->vref_count);
5915 spin_unlock_irqrestore(&ha->vport_slock, flags);
5916
5917 qla2x00_vp_abort_isp(vp);
5918
5919 spin_lock_irqsave(&ha->vport_slock, flags);
5920 atomic_dec(&vp->vref_count);
5921 }
5922 }
5923 spin_unlock_irqrestore(&ha->vport_slock, flags);
5924
5925 } else {
5926 ql_log(ql_log_warn, vha, 0x8016,
5927 "qla82xx_restart_isp **** FAILED ****.\n");
5928 }
5929
5930 return status;
5931 }
5932
5933 void
5934 qla81xx_update_fw_options(scsi_qla_host_t *vha)
5935 {
5936 struct qla_hw_data *ha = vha->hw;
5937
5938 if (!ql2xetsenable)
5939 return;
5940
5941 /* Enable ETS Burst. */
5942 memset(ha->fw_options, 0, sizeof(ha->fw_options));
5943 ha->fw_options[2] |= BIT_9;
5944 qla2x00_set_fw_options(vha, ha->fw_options);
5945 }
5946
5947 /*
5948 * qla24xx_get_fcp_prio
5949 * Gets the fcp cmd priority value for the logged in port.
5950 * Looks for a match of the port descriptors within
5951 * each of the fcp prio config entries. If a match is found,
5952 * the tag (priority) value is returned.
5953 *
5954 * Input:
5955 * vha = scsi host structure pointer.
5956 * fcport = port structure pointer.
5957 *
5958 * Return:
5959 * non-zero (if found)
5960 * -1 (if not found)
5961 *
5962 * Context:
5963 * Kernel context
5964 */
5965 static int
5966 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
5967 {
5968 int i, entries;
5969 uint8_t pid_match, wwn_match;
5970 int priority;
5971 uint32_t pid1, pid2;
5972 uint64_t wwn1, wwn2;
5973 struct qla_fcp_prio_entry *pri_entry;
5974 struct qla_hw_data *ha = vha->hw;
5975
5976 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
5977 return -1;
5978
5979 priority = -1;
5980 entries = ha->fcp_prio_cfg->num_entries;
5981 pri_entry = &ha->fcp_prio_cfg->entry[0];
5982
5983 for (i = 0; i < entries; i++) {
5984 pid_match = wwn_match = 0;
5985
5986 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
5987 pri_entry++;
5988 continue;
5989 }
5990
5991 /* check source pid for a match */
5992 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
5993 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
5994 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
5995 if (pid1 == INVALID_PORT_ID)
5996 pid_match++;
5997 else if (pid1 == pid2)
5998 pid_match++;
5999 }
6000
6001 /* check destination pid for a match */
6002 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
6003 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
6004 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
6005 if (pid1 == INVALID_PORT_ID)
6006 pid_match++;
6007 else if (pid1 == pid2)
6008 pid_match++;
6009 }
6010
6011 /* check source WWN for a match */
6012 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
6013 wwn1 = wwn_to_u64(vha->port_name);
6014 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
6015 if (wwn2 == (uint64_t)-1)
6016 wwn_match++;
6017 else if (wwn1 == wwn2)
6018 wwn_match++;
6019 }
6020
6021 /* check destination WWN for a match */
6022 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
6023 wwn1 = wwn_to_u64(fcport->port_name);
6024 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
6025 if (wwn2 == (uint64_t)-1)
6026 wwn_match++;
6027 else if (wwn1 == wwn2)
6028 wwn_match++;
6029 }
6030
6031 if (pid_match == 2 || wwn_match == 2) {
6032 /* Found a matching entry */
6033 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
6034 priority = pri_entry->tag;
6035 break;
6036 }
6037
6038 pri_entry++;
6039 }
6040
6041 return priority;
6042 }
6043
6044 /*
6045 * qla24xx_update_fcport_fcp_prio
6046 * Activates fcp priority for the logged in fc port
6047 *
6048 * Input:
6049 * vha = scsi host structure pointer.
6050 * fcp = port structure pointer.
6051 *
6052 * Return:
6053 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6054 *
6055 * Context:
6056 * Kernel context.
6057 */
6058 int
6059 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
6060 {
6061 int ret;
6062 int priority;
6063 uint16_t mb[5];
6064
6065 if (fcport->port_type != FCT_TARGET ||
6066 fcport->loop_id == FC_NO_LOOP_ID)
6067 return QLA_FUNCTION_FAILED;
6068
6069 priority = qla24xx_get_fcp_prio(vha, fcport);
6070 if (priority < 0)
6071 return QLA_FUNCTION_FAILED;
6072
6073 if (IS_P3P_TYPE(vha->hw)) {
6074 fcport->fcp_prio = priority & 0xf;
6075 return QLA_SUCCESS;
6076 }
6077
6078 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
6079 if (ret == QLA_SUCCESS) {
6080 if (fcport->fcp_prio != priority)
6081 ql_dbg(ql_dbg_user, vha, 0x709e,
6082 "Updated FCP_CMND priority - value=%d loop_id=%d "
6083 "port_id=%02x%02x%02x.\n", priority,
6084 fcport->loop_id, fcport->d_id.b.domain,
6085 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6086 fcport->fcp_prio = priority & 0xf;
6087 } else
6088 ql_dbg(ql_dbg_user, vha, 0x704f,
6089 "Unable to update FCP_CMND priority - ret=0x%x for "
6090 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
6091 fcport->d_id.b.domain, fcport->d_id.b.area,
6092 fcport->d_id.b.al_pa);
6093 return ret;
6094 }
6095
6096 /*
6097 * qla24xx_update_all_fcp_prio
6098 * Activates fcp priority for all the logged in ports
6099 *
6100 * Input:
6101 * ha = adapter block pointer.
6102 *
6103 * Return:
6104 * QLA_SUCCESS or QLA_FUNCTION_FAILED
6105 *
6106 * Context:
6107 * Kernel context.
6108 */
6109 int
6110 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
6111 {
6112 int ret;
6113 fc_port_t *fcport;
6114
6115 ret = QLA_FUNCTION_FAILED;
6116 /* We need to set priority for all logged in ports */
6117 list_for_each_entry(fcport, &vha->vp_fcports, list)
6118 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
6119
6120 return ret;
6121 }
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