arch/arm/mach-mx5/board-mx51_babbage.c

   1 /*
   2  * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c.h>
  16 #include <linux/gpio.h>
  17 #include <linux/delay.h>
  18 #include <linux/io.h>
  19 #include <linux/input.h>
  20 #include <linux/spi/flash.h>
  21 #include <linux/spi/spi.h>
  22
  23 #include <mach/common.h>
  24 #include <mach/hardware.h>
  25 #include <mach/iomux-mx51.h>
  26
  27 #include <asm/irq.h>
  28 #include <asm/setup.h>
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/arch.h>
  31 #include <asm/mach/time.h>
  32
  33 #include "devices-imx51.h"
  34 #include "devices.h"
  35 #include "cpu_op-mx51.h"
  36
  37 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
  38 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
  39 #define BABBAGE_USB_PHY_RESET   IMX_GPIO_NR(2, 5)
  40 #define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
  41 #define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
  42 #define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
  43 #define BABBAGE_ECSPI1_CS1      IMX_GPIO_NR(4, 25)
  44 #define BABBAGE_SD2_CD          IMX_GPIO_NR(1, 6)
  45 #define BABBAGE_SD2_WP          IMX_GPIO_NR(1, 5)
  46
  47 /* USB_CTRL_1 */
  48 #define MX51_USB_CTRL_1_OFFSET                  0x10
  49 #define MX51_USB_CTRL_UH1_EXT_CLK_EN            (1 << 25)
  50
  51 #define MX51_USB_PLLDIV_12_MHZ          0x00
  52 #define MX51_USB_PLL_DIV_19_2_MHZ       0x01
  53 #define MX51_USB_PLL_DIV_24_MHZ 0x02
  54
  55 static struct gpio_keys_button babbage_buttons[] = {
  56         {
  57                 .gpio           = BABBAGE_POWER_KEY,
  58                 .code           = BTN_0,
  59                 .desc           = "PWR",
  60                 .active_low     = 1,
  61                 .wakeup         = 1,
  62         },
  63 };
  64
  65 static const struct gpio_keys_platform_data imx_button_data __initconst = {
  66         .buttons        = babbage_buttons,
  67         .nbuttons       = ARRAY_SIZE(babbage_buttons),
  68 };
  69
  70 static iomux_v3_cfg_t mx51babbage_pads[] = {
  71         /* UART1 */
  72         MX51_PAD_UART1_RXD__UART1_RXD,
  73         MX51_PAD_UART1_TXD__UART1_TXD,
  74         MX51_PAD_UART1_RTS__UART1_RTS,
  75         MX51_PAD_UART1_CTS__UART1_CTS,
  76
  77         /* UART2 */
  78         MX51_PAD_UART2_RXD__UART2_RXD,
  79         MX51_PAD_UART2_TXD__UART2_TXD,
  80
  81         /* UART3 */
  82         MX51_PAD_EIM_D25__UART3_RXD,
  83         MX51_PAD_EIM_D26__UART3_TXD,
  84         MX51_PAD_EIM_D27__UART3_RTS,
  85         MX51_PAD_EIM_D24__UART3_CTS,
  86
  87         /* I2C1 */
  88         MX51_PAD_EIM_D16__I2C1_SDA,
  89         MX51_PAD_EIM_D19__I2C1_SCL,
  90
  91         /* I2C2 */
  92         MX51_PAD_KEY_COL4__I2C2_SCL,
  93         MX51_PAD_KEY_COL5__I2C2_SDA,
  94
  95         /* HSI2C */
  96         MX51_PAD_I2C1_CLK__I2C1_CLK,
  97         MX51_PAD_I2C1_DAT__I2C1_DAT,
  98
  99         /* USB HOST1 */
 100         MX51_PAD_USBH1_CLK__USBH1_CLK,
 101         MX51_PAD_USBH1_DIR__USBH1_DIR,
 102         MX51_PAD_USBH1_NXT__USBH1_NXT,
 103         MX51_PAD_USBH1_DATA0__USBH1_DATA0,
 104         MX51_PAD_USBH1_DATA1__USBH1_DATA1,
 105         MX51_PAD_USBH1_DATA2__USBH1_DATA2,
 106         MX51_PAD_USBH1_DATA3__USBH1_DATA3,
 107         MX51_PAD_USBH1_DATA4__USBH1_DATA4,
 108         MX51_PAD_USBH1_DATA5__USBH1_DATA5,
 109         MX51_PAD_USBH1_DATA6__USBH1_DATA6,
 110         MX51_PAD_USBH1_DATA7__USBH1_DATA7,
 111
 112         /* USB HUB reset line*/
 113         MX51_PAD_GPIO1_7__GPIO1_7,
 114
 115         /* USB PHY reset line */
 116         MX51_PAD_EIM_D21__GPIO2_5,
 117
 118         /* FEC */
 119         MX51_PAD_EIM_EB2__FEC_MDIO,
 120         MX51_PAD_EIM_EB3__FEC_RDATA1,
 121         MX51_PAD_EIM_CS2__FEC_RDATA2,
 122         MX51_PAD_EIM_CS3__FEC_RDATA3,
 123         MX51_PAD_EIM_CS4__FEC_RX_ER,
 124         MX51_PAD_EIM_CS5__FEC_CRS,
 125         MX51_PAD_NANDF_RB2__FEC_COL,
 126         MX51_PAD_NANDF_RB3__FEC_RX_CLK,
 127         MX51_PAD_NANDF_D9__FEC_RDATA0,
 128         MX51_PAD_NANDF_D8__FEC_TDATA0,
 129         MX51_PAD_NANDF_CS2__FEC_TX_ER,
 130         MX51_PAD_NANDF_CS3__FEC_MDC,
 131         MX51_PAD_NANDF_CS4__FEC_TDATA1,
 132         MX51_PAD_NANDF_CS5__FEC_TDATA2,
 133         MX51_PAD_NANDF_CS6__FEC_TDATA3,
 134         MX51_PAD_NANDF_CS7__FEC_TX_EN,
 135         MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
 136
 137         /* FEC PHY reset line */
 138         MX51_PAD_EIM_A20__GPIO2_14,
 139
 140         /* SD 1 */
 141         MX51_PAD_SD1_CMD__SD1_CMD,
 142         MX51_PAD_SD1_CLK__SD1_CLK,
 143         MX51_PAD_SD1_DATA0__SD1_DATA0,
 144         MX51_PAD_SD1_DATA1__SD1_DATA1,
 145         MX51_PAD_SD1_DATA2__SD1_DATA2,
 146         MX51_PAD_SD1_DATA3__SD1_DATA3,
 147         /* CD/WP from controller */
 148         MX51_PAD_GPIO1_0__SD1_CD,
 149         MX51_PAD_GPIO1_1__SD1_WP,
 150
 151         /* SD 2 */
 152         MX51_PAD_SD2_CMD__SD2_CMD,
 153         MX51_PAD_SD2_CLK__SD2_CLK,
 154         MX51_PAD_SD2_DATA0__SD2_DATA0,
 155         MX51_PAD_SD2_DATA1__SD2_DATA1,
 156         MX51_PAD_SD2_DATA2__SD2_DATA2,
 157         MX51_PAD_SD2_DATA3__SD2_DATA3,
 158         /* CD/WP gpio */
 159         MX51_PAD_GPIO1_6__GPIO1_6,
 160         MX51_PAD_GPIO1_5__GPIO1_5,
 161
 162         /* eCSPI1 */
 163         MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
 164         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
 165         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
 166         MX51_PAD_CSPI1_SS0__GPIO4_24,
 167         MX51_PAD_CSPI1_SS1__GPIO4_25,
 168 };
 169
 170 /* Serial ports */
 171 static const struct imxuart_platform_data uart_pdata __initconst = {
 172         .flags = IMXUART_HAVE_RTSCTS,
 173 };
 174
 175 static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
 176         .bitrate = 100000,
 177 };
 178
 179 static struct imxi2c_platform_data babbage_hsi2c_data = {
 180         .bitrate = 400000,
 181 };
 182
 183 static struct gpio mx51_babbage_usbh1_gpios[] = {
 184         { BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" },
 185         { BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" },
 186 };
 187
 188 static int gpio_usbh1_active(void)
 189 {
 190         iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
 191         int ret;
 192
 193         /* Set USBH1_STP to GPIO and toggle it */
 194         mxc_iomux_v3_setup_pad(usbh1stp_gpio);
 195         ret = gpio_request_array(mx51_babbage_usbh1_gpios,
 196                                         ARRAY_SIZE(mx51_babbage_usbh1_gpios));
 197
 198         if (ret) {
 199                 pr_debug("failed to get USBH1 pins: %d\n", ret);
 200                 return ret;
 201         }
 202
 203         msleep(100);
 204         gpio_set_value(BABBAGE_USBH1_STP, 1);
 205         gpio_set_value(BABBAGE_USB_PHY_RESET, 1);
 206         gpio_free_array(mx51_babbage_usbh1_gpios,
 207                                         ARRAY_SIZE(mx51_babbage_usbh1_gpios));
 208         return 0;
 209 }
 210
 211 static inline void babbage_usbhub_reset(void)
 212 {
 213         int ret;
 214
 215         /* Reset USB hub */
 216         ret = gpio_request_one(BABBAGE_USB_HUB_RESET,
 217                                         GPIOF_OUT_INIT_LOW, "GPIO1_7");
 218         if (ret) {
 219                 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
 220                 return;
 221         }
 222
 223         msleep(2);
 224         /* Deassert reset */
 225         gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
 226 }
 227
 228 static inline void babbage_fec_reset(void)
 229 {
 230         int ret;
 231
 232         /* reset FEC PHY */
 233         ret = gpio_request_one(BABBAGE_FEC_PHY_RESET,
 234                                         GPIOF_OUT_INIT_LOW, "fec-phy-reset");
 235         if (ret) {
 236                 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
 237                 return;
 238         }
 239         msleep(1);
 240         gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
 241 }
 242
 243 /* This function is board specific as the bit mask for the plldiv will also
 244 be different for other Freescale SoCs, thus a common bitmask is not
 245 possible and cannot get place in /plat-mxc/ehci.c.*/
 246 static int initialize_otg_port(struct platform_device *pdev)
 247 {
 248         u32 v;
 249         void __iomem *usb_base;
 250         void __iomem *usbother_base;
 251
 252         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 253         if (!usb_base)
 254                 return -ENOMEM;
 255         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 256
 257         /* Set the PHY clock to 19.2MHz */
 258         v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 259         v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
 260         v |= MX51_USB_PLL_DIV_19_2_MHZ;
 261         __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 262         iounmap(usb_base);
 263
 264         mdelay(10);
 265
 266         return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
 267 }
 268
 269 static int initialize_usbh1_port(struct platform_device *pdev)
 270 {
 271         u32 v;
 272         void __iomem *usb_base;
 273         void __iomem *usbother_base;
 274
 275         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 276         if (!usb_base)
 277                 return -ENOMEM;
 278         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 279
 280         /* The clock for the USBH1 ULPI port will come externally from the PHY. */
 281         v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
 282         __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
 283         iounmap(usb_base);
 284
 285         mdelay(10);
 286
 287         return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
 288                         MXC_EHCI_ITC_NO_THRESHOLD);
 289 }
 290
 291 static struct mxc_usbh_platform_data dr_utmi_config = {
 292         .init           = initialize_otg_port,
 293         .portsc = MXC_EHCI_UTMI_16BIT,
 294 };
 295
 296 static struct fsl_usb2_platform_data usb_pdata = {
 297         .operating_mode = FSL_USB2_DR_DEVICE,
 298         .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
 299 };
 300
 301 static struct mxc_usbh_platform_data usbh1_config = {
 302         .init           = initialize_usbh1_port,
 303         .portsc = MXC_EHCI_MODE_ULPI,
 304 };
 305
 306 static int otg_mode_host;
 307
 308 static int __init babbage_otg_mode(char *options)
 309 {
 310         if (!strcmp(options, "host"))
 311                 otg_mode_host = 1;
 312         else if (!strcmp(options, "device"))
 313                 otg_mode_host = 0;
 314         else
 315                 pr_info("otg_mode neither \"host\" nor \"device\". "
 316                         "Defaulting to device\n");
 317         return 0;
 318 }
 319 __setup("otg_mode=", babbage_otg_mode);
 320
 321 static struct spi_board_info mx51_babbage_spi_board_info[] __initdata = {
 322         {
 323                 .modalias = "mtd_dataflash",
 324                 .max_speed_hz = 25000000,
 325                 .bus_num = 0,
 326                 .chip_select = 1,
 327                 .mode = SPI_MODE_0,
 328                 .platform_data = NULL,
 329         },
 330 };
 331
 332 static int mx51_babbage_spi_cs[] = {
 333         BABBAGE_ECSPI1_CS0,
 334         BABBAGE_ECSPI1_CS1,
 335 };
 336
 337 static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
 338         .chipselect     = mx51_babbage_spi_cs,
 339         .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
 340 };
 341
 342 static const struct esdhc_platform_data mx51_babbage_sd1_data __initconst = {
 343         .cd_type = ESDHC_CD_CONTROLLER,
 344         .wp_type = ESDHC_WP_CONTROLLER,
 345 };
 346
 347 static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
 348         .cd_gpio = BABBAGE_SD2_CD,
 349         .wp_gpio = BABBAGE_SD2_WP,
 350         .cd_type = ESDHC_CD_GPIO,
 351         .wp_type = ESDHC_WP_GPIO,
 352 };
 353
 354 /*
 355  * Board specific initialization.
 356  */
 357 static void __init mx51_babbage_init(void)
 358 {
 359         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
 360         iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 |
 361                 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
 362
 363         imx51_soc_init();
 364
 365 #if defined(CONFIG_CPU_FREQ_IMX)
 366         get_cpu_op = mx51_get_cpu_op;
 367 #endif
 368         mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
 369                                         ARRAY_SIZE(mx51babbage_pads));
 370
 371         imx51_add_imx_uart(0, &uart_pdata);
 372         imx51_add_imx_uart(1, NULL);
 373         imx51_add_imx_uart(2, &uart_pdata);
 374
 375         babbage_fec_reset();
 376         imx51_add_fec(NULL);
 377
 378         /* Set the PAD settings for the pwr key. */
 379         mxc_iomux_v3_setup_pad(power_key);
 380         imx_add_gpio_keys(&imx_button_data);
 381
 382         imx51_add_imx_i2c(0, &babbage_i2c_data);
 383         imx51_add_imx_i2c(1, &babbage_i2c_data);
 384         mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data);
 385
 386         if (otg_mode_host)
 387                 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
 388         else {
 389                 initialize_otg_port(NULL);
 390                 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
 391         }
 392
 393         gpio_usbh1_active();
 394         mxc_register_device(&mxc_usbh1_device, &usbh1_config);
 395         /* setback USBH1_STP to be function */
 396         mxc_iomux_v3_setup_pad(usbh1stp);
 397         babbage_usbhub_reset();
 398
 399         imx51_add_sdhci_esdhc_imx(0, &mx51_babbage_sd1_data);
 400         imx51_add_sdhci_esdhc_imx(1, &mx51_babbage_sd2_data);
 401
 402         spi_register_board_info(mx51_babbage_spi_board_info,
 403                 ARRAY_SIZE(mx51_babbage_spi_board_info));
 404         imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
 405         imx51_add_imx2_wdt(0, NULL);
 406 }
 407
 408 static void __init mx51_babbage_timer_init(void)
 409 {
 410         mx51_clocks_init(32768, 24000000, 22579200, 0);
 411 }
 412
 413 static struct sys_timer mx51_babbage_timer = {
 414         .init = mx51_babbage_timer_init,
 415 };
 416
 417 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
 418         /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
 419         .boot_params = MX51_PHYS_OFFSET + 0x100,
 420         .map_io = mx51_map_io,
 421         .init_early = imx51_init_early,
 422         .init_irq = mx51_init_irq,
 423         .timer = &mx51_babbage_timer,
 424         .init_machine = mx51_babbage_init,
 425 MACHINE_END