drivers/net/vxge/vxge-main.h

   1 /******************************************************************************
   2  * This software may be used and distributed according to the terms of
   3  * the GNU General Public License (GPL), incorporated herein by reference.
   4  * Drivers based on or derived from this code fall under the GPL and must
   5  * retain the authorship, copyright and license notice.  This file is not
   6  * a complete program and may only be used when the entire operating
   7  * system is licensed under the GPL.
   8  * See the file COPYING in this distribution for more information.
   9  *
  10  * vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11  *              Virtualized Server Adapter.
  12  * Copyright(c) 2002-2010 Exar Corp.
  13  ******************************************************************************/
  14 #ifndef VXGE_MAIN_H
  15 #define VXGE_MAIN_H
  16
  17 #include "vxge-traffic.h"
  18 #include "vxge-config.h"
  19 #include "vxge-version.h"
  20 #include <linux/list.h>
  21
  22 #define VXGE_DRIVER_NAME                "vxge"
  23 #define VXGE_DRIVER_VENDOR              "Neterion, Inc"
  24 #define VXGE_DRIVER_FW_VERSION_MAJOR    1
  25
  26 #define DRV_VERSION     VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
  27         VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
  28         VXGE_VERSION_FOR
  29
  30 #define PCI_DEVICE_ID_TITAN_WIN         0x5733
  31 #define PCI_DEVICE_ID_TITAN_UNI         0x5833
  32 #define VXGE_HW_TITAN1_PCI_REVISION     1
  33 #define VXGE_HW_TITAN1A_PCI_REVISION    2
  34
  35 #define VXGE_USE_DEFAULT                0xffffffff
  36 #define VXGE_HW_VPATH_MSIX_ACTIVE       4
  37 #define VXGE_ALARM_MSIX_ID              2
  38 #define VXGE_HW_RXSYNC_FREQ_CNT         4
  39 #define VXGE_LL_WATCH_DOG_TIMEOUT       (15 * HZ)
  40 #define VXGE_LL_RX_COPY_THRESHOLD       256
  41 #define VXGE_DEF_FIFO_LENGTH            84
  42
  43 #define NO_STEERING             0
  44 #define PORT_STEERING           0x1
  45 #define RTH_STEERING            0x2
  46 #define RX_TOS_STEERING         0x3
  47 #define RX_VLAN_STEERING        0x4
  48 #define RTH_BUCKET_SIZE         4
  49
  50 #define TX_PRIORITY_STEERING    1
  51 #define TX_VLAN_STEERING        2
  52 #define TX_PORT_STEERING        3
  53 #define TX_MULTIQ_STEERING      4
  54
  55 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
  56
  57 #define VXGE_TTI_BTIMER_VAL 250000
  58
  59 #define VXGE_TTI_LTIMER_VAL     1000
  60 #define VXGE_T1A_TTI_LTIMER_VAL 80
  61 #define VXGE_TTI_RTIMER_VAL     0
  62 #define VXGE_T1A_TTI_RTIMER_VAL 400
  63 #define VXGE_RTI_BTIMER_VAL     250
  64 #define VXGE_RTI_LTIMER_VAL     100
  65 #define VXGE_RTI_RTIMER_VAL     0
  66 #define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH
  67 #define VXGE_ISR_POLLING_CNT    8
  68 #define VXGE_MAX_CONFIG_DEV     0xFF
  69 #define VXGE_EXEC_MODE_DISABLE  0
  70 #define VXGE_EXEC_MODE_ENABLE   1
  71 #define VXGE_MAX_CONFIG_PORT    1
  72 #define VXGE_ALL_VID_DISABLE    0
  73 #define VXGE_ALL_VID_ENABLE     1
  74 #define VXGE_PAUSE_CTRL_DISABLE 0
  75 #define VXGE_PAUSE_CTRL_ENABLE  1
  76
  77 #define TTI_TX_URANGE_A 5
  78 #define TTI_TX_URANGE_B 15
  79 #define TTI_TX_URANGE_C 40
  80 #define TTI_TX_UFC_A    5
  81 #define TTI_TX_UFC_B    40
  82 #define TTI_TX_UFC_C    60
  83 #define TTI_TX_UFC_D    100
  84 #define TTI_T1A_TX_UFC_A        30
  85 #define TTI_T1A_TX_UFC_B        80
  86 /* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */
  87 /* Slope - 93 */
  88 /* 60 - 9k Mtu, 140 - 1.5k mtu */
  89 #define TTI_T1A_TX_UFC_C(mtu)   (60 + ((VXGE_HW_MAX_MTU - mtu) / 93))
  90
  91 /* Slope - 37 */
  92 /* 100 - 9k Mtu, 300 - 1.5k mtu */
  93 #define TTI_T1A_TX_UFC_D(mtu)   (100 + ((VXGE_HW_MAX_MTU - mtu) / 37))
  94
  95
  96 #define RTI_RX_URANGE_A         5
  97 #define RTI_RX_URANGE_B         15
  98 #define RTI_RX_URANGE_C         40
  99 #define RTI_T1A_RX_URANGE_A     1
 100 #define RTI_T1A_RX_URANGE_B     20
 101 #define RTI_T1A_RX_URANGE_C     50
 102 #define RTI_RX_UFC_A            1
 103 #define RTI_RX_UFC_B            5
 104 #define RTI_RX_UFC_C            10
 105 #define RTI_RX_UFC_D            15
 106 #define RTI_T1A_RX_UFC_B        20
 107 #define RTI_T1A_RX_UFC_C        50
 108 #define RTI_T1A_RX_UFC_D        60
 109
 110
 111 /* Milli secs timer period */
 112 #define VXGE_TIMER_DELAY                10000
 113
 114 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
 115
 116 #define is_sriov(function_mode) \
 117         ((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
 118         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
 119         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
 120
 121 enum vxge_reset_event {
 122         /* reset events */
 123         VXGE_LL_VPATH_RESET     = 0,
 124         VXGE_LL_DEVICE_RESET    = 1,
 125         VXGE_LL_FULL_RESET      = 2,
 126         VXGE_LL_START_RESET     = 3,
 127         VXGE_LL_COMPL_RESET     = 4
 128 };
 129 /* These flags represent the devices temporary state */
 130 enum vxge_device_state_t {
 131 __VXGE_STATE_RESET_CARD = 0,
 132 __VXGE_STATE_CARD_UP
 133 };
 134
 135 enum vxge_mac_addr_state {
 136         /* mac address states */
 137         VXGE_LL_MAC_ADDR_IN_LIST        = 0,
 138         VXGE_LL_MAC_ADDR_IN_DA_TABLE    = 1
 139 };
 140
 141 struct vxge_drv_config {
 142         int config_dev_cnt;
 143         int total_dev_cnt;
 144         int g_no_cpus;
 145         unsigned int vpath_per_dev;
 146 };
 147
 148 struct macInfo {
 149         unsigned char macaddr[ETH_ALEN];
 150         unsigned char macmask[ETH_ALEN];
 151         unsigned int vpath_no;
 152         enum vxge_mac_addr_state state;
 153 };
 154
 155 struct vxge_config {
 156         int             tx_pause_enable;
 157         int             rx_pause_enable;
 158
 159 #define NEW_NAPI_WEIGHT 64
 160         int             napi_weight;
 161 #define VXGE_GRO_DONOT_AGGREGATE                0
 162 #define VXGE_GRO_ALWAYS_AGGREGATE               1
 163         int             gro_enable;
 164         int             intr_type;
 165 #define INTA    0
 166 #define MSI     1
 167 #define MSI_X   2
 168
 169         int             addr_learn_en;
 170
 171         u32             rth_steering:2,
 172                         rth_algorithm:2,
 173                         rth_hash_type_tcpipv4:1,
 174                         rth_hash_type_ipv4:1,
 175                         rth_hash_type_tcpipv6:1,
 176                         rth_hash_type_ipv6:1,
 177                         rth_hash_type_tcpipv6ex:1,
 178                         rth_hash_type_ipv6ex:1,
 179                         rth_bkt_sz:8;
 180         int             rth_jhash_golden_ratio;
 181         int             tx_steering_type;
 182         int     fifo_indicate_max_pkts;
 183         struct vxge_hw_device_hw_info device_hw_info;
 184 };
 185
 186 struct vxge_msix_entry {
 187         /* Mimicing the msix_entry struct of Kernel. */
 188         u16 vector;
 189         u16 entry;
 190         u16 in_use;
 191         void *arg;
 192 };
 193
 194 /* Software Statistics */
 195
 196 struct vxge_sw_stats {
 197         /* Network Stats (interface stats) */
 198
 199         /* Tx */
 200         u64 tx_frms;
 201         u64 tx_errors;
 202         u64 tx_bytes;
 203         u64 txd_not_free;
 204         u64 txd_out_of_desc;
 205
 206         /* Virtual Path */
 207         u64 vpaths_open;
 208         u64 vpath_open_fail;
 209
 210         /* Rx */
 211         u64 rx_frms;
 212         u64 rx_errors;
 213         u64 rx_bytes;
 214         u64 rx_mcast;
 215
 216         /* Misc. */
 217         u64 link_up;
 218         u64 link_down;
 219         u64 pci_map_fail;
 220         u64 skb_alloc_fail;
 221 };
 222
 223 struct vxge_mac_addrs {
 224         struct list_head item;
 225         u64 macaddr;
 226         u64 macmask;
 227         enum vxge_mac_addr_state state;
 228 };
 229
 230 struct vxgedev;
 231
 232 struct vxge_fifo_stats {
 233         u64 tx_frms;
 234         u64 tx_errors;
 235         u64 tx_bytes;
 236         u64 txd_not_free;
 237         u64 txd_out_of_desc;
 238         u64 pci_map_fail;
 239 };
 240
 241 struct vxge_fifo {
 242         struct net_device *ndev;
 243         struct pci_dev *pdev;
 244         struct __vxge_hw_fifo *handle;
 245         struct netdev_queue *txq;
 246
 247         int tx_steering_type;
 248         int indicate_max_pkts;
 249
 250         /* Tx stats */
 251         struct vxge_fifo_stats stats;
 252 } ____cacheline_aligned;
 253
 254 struct vxge_ring_stats {
 255         u64 prev_rx_frms;
 256         u64 rx_frms;
 257         u64 rx_errors;
 258         u64 rx_dropped;
 259         u64 rx_bytes;
 260         u64 rx_mcast;
 261         u64 pci_map_fail;
 262         u64 skb_alloc_fail;
 263 };
 264
 265 struct vxge_ring {
 266         struct net_device       *ndev;
 267         struct pci_dev          *pdev;
 268         struct __vxge_hw_ring   *handle;
 269         /* The vpath id maintained in the driver -
 270          * 0 to 'maximum_vpaths_in_function - 1'
 271          */
 272         int driver_id;
 273
 274         /* copy of the flag indicating whether rx_csum is to be used */
 275         u32 rx_csum:1,
 276             rx_hwts:1;
 277
 278         int pkts_processed;
 279         int budget;
 280         int gro_enable;
 281
 282         struct napi_struct napi;
 283         struct napi_struct *napi_p;
 284
 285 #define VXGE_MAX_MAC_ADDR_COUNT         30
 286
 287         int vlan_tag_strip;
 288         struct vlan_group *vlgrp;
 289         int rx_vector_no;
 290         enum vxge_hw_status last_status;
 291
 292         /* Rx stats */
 293         struct vxge_ring_stats stats;
 294 } ____cacheline_aligned;
 295
 296 struct vxge_vpath {
 297         struct vxge_fifo fifo;
 298         struct vxge_ring ring;
 299
 300         struct __vxge_hw_vpath_handle *handle;
 301
 302         /* Actual vpath id for this vpath in the device - 0 to 16 */
 303         int device_id;
 304         int max_mac_addr_cnt;
 305         int is_configured;
 306         int is_open;
 307         struct vxgedev *vdev;
 308         u8 macaddr[ETH_ALEN];
 309         u8 macmask[ETH_ALEN];
 310
 311 #define VXGE_MAX_LEARN_MAC_ADDR_CNT     2048
 312         /* mac addresses currently programmed into NIC */
 313         u16 mac_addr_cnt;
 314         u16 mcast_addr_cnt;
 315         struct list_head mac_addr_list;
 316
 317         u32 level_err;
 318         u32 level_trace;
 319 };
 320 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) {  \
 321         for (i = 0; i < vdev->no_of_vpath; i++) {               \
 322                 vdev->vpaths[i].level_err = err;                \
 323                 vdev->vpaths[i].level_trace = trace;            \
 324         }                                                       \
 325         vdev->level_err = err;                                  \
 326         vdev->level_trace = trace;                              \
 327 }
 328
 329 struct vxgedev {
 330         struct net_device       *ndev;
 331         struct pci_dev          *pdev;
 332         struct __vxge_hw_device *devh;
 333         struct vlan_group       *vlgrp;
 334         int vlan_tag_strip;
 335         struct vxge_config      config;
 336         unsigned long   state;
 337
 338         /* Indicates which vpath to reset */
 339         unsigned long  vp_reset;
 340
 341         /* Timer used for polling vpath resets */
 342         struct timer_list vp_reset_timer;
 343
 344         /* Timer used for polling vpath lockup */
 345         struct timer_list vp_lockup_timer;
 346
 347         /*
 348          * Flags to track whether device is in All Multicast
 349          * or in promiscuous mode.
 350          */
 351         u16             all_multi_flg;
 352
 353          /* A flag indicating whether rx_csum is to be used or not. */
 354         u32     rx_csum:1,
 355                 rx_hwts:1,
 356                 titan1:1;
 357
 358         struct vxge_msix_entry *vxge_entries;
 359         struct msix_entry *entries;
 360         /*
 361          * 4 for each vpath * 17;
 362          * total is 68
 363          */
 364 #define VXGE_MAX_REQUESTED_MSIX 68
 365 #define VXGE_INTR_STRLEN 80
 366         char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
 367
 368         enum vxge_hw_event cric_err_event;
 369
 370         int max_vpath_supported;
 371         int no_of_vpath;
 372
 373         struct napi_struct napi;
 374         /* A debug option, when enabled and if error condition occurs,
 375          * the driver will do following steps:
 376          * - mask all interrupts
 377          * - Not clear the source of the alarm
 378          * - gracefully stop all I/O
 379          * A diagnostic dump of register and stats at this point
 380          * reveals very useful information.
 381          */
 382         int exec_mode;
 383         int max_config_port;
 384         struct vxge_vpath       *vpaths;
 385
 386         struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
 387         void __iomem *bar0;
 388         struct vxge_sw_stats    stats;
 389         int             mtu;
 390         /* Below variables are used for vpath selection to transmit a packet */
 391         u8              vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
 392         u64             vpaths_deployed;
 393
 394         u32             intr_cnt;
 395         u32             level_err;
 396         u32             level_trace;
 397         char            fw_version[VXGE_HW_FW_STRLEN];
 398         struct work_struct reset_task;
 399 };
 400
 401 struct vxge_rx_priv {
 402         struct sk_buff          *skb;
 403         unsigned char           *skb_data;
 404         dma_addr_t              data_dma;
 405         dma_addr_t              data_size;
 406 };
 407
 408 struct vxge_tx_priv {
 409         struct sk_buff          *skb;
 410         dma_addr_t              dma_buffers[MAX_SKB_FRAGS+1];
 411 };
 412
 413 #define VXGE_MODULE_PARAM_INT(p, val) \
 414         static int p = val; \
 415         module_param(p, int, 0)
 416
 417 #define vxge_os_timer(timer, handle, arg, exp) do { \
 418                 init_timer(&timer); \
 419                 timer.function = handle; \
 420                 timer.data = (unsigned long) arg; \
 421                 mod_timer(&timer, (jiffies + exp)); \
 422         } while (0);
 423
 424 void vxge_initialize_ethtool_ops(struct net_device *ndev);
 425 enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
 426 int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
 427
 428 /**
 429  * #define VXGE_DEBUG_INIT: debug for initialization functions
 430  * #define VXGE_DEBUG_TX         : debug transmit related functions
 431  * #define VXGE_DEBUG_RX  : debug recevice related functions
 432  * #define VXGE_DEBUG_MEM : debug memory module
 433  * #define VXGE_DEBUG_LOCK: debug locks
 434  * #define VXGE_DEBUG_SEM : debug semaphore
 435  * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
 436 */
 437 #define VXGE_DEBUG_INIT         0x00000001
 438 #define VXGE_DEBUG_TX           0x00000002
 439 #define VXGE_DEBUG_RX           0x00000004
 440 #define VXGE_DEBUG_MEM          0x00000008
 441 #define VXGE_DEBUG_LOCK         0x00000010
 442 #define VXGE_DEBUG_SEM          0x00000020
 443 #define VXGE_DEBUG_ENTRYEXIT    0x00000040
 444 #define VXGE_DEBUG_INTR         0x00000080
 445 #define VXGE_DEBUG_LL_CONFIG    0x00000100
 446
 447 /* Debug tracing for VXGE driver */
 448 #ifndef VXGE_DEBUG_MASK
 449 #define VXGE_DEBUG_MASK 0x0
 450 #endif
 451
 452 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
 453 #define vxge_debug_ll_config(level, fmt, ...) \
 454         vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
 455 #else
 456 #define vxge_debug_ll_config(level, fmt, ...)
 457 #endif
 458
 459 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
 460 #define vxge_debug_init(level, fmt, ...) \
 461         vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
 462 #else
 463 #define vxge_debug_init(level, fmt, ...)
 464 #endif
 465
 466 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
 467 #define vxge_debug_tx(level, fmt, ...) \
 468         vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
 469 #else
 470 #define vxge_debug_tx(level, fmt, ...)
 471 #endif
 472
 473 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
 474 #define vxge_debug_rx(level, fmt, ...) \
 475         vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
 476 #else
 477 #define vxge_debug_rx(level, fmt, ...)
 478 #endif
 479
 480 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
 481 #define vxge_debug_mem(level, fmt, ...) \
 482         vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
 483 #else
 484 #define vxge_debug_mem(level, fmt, ...)
 485 #endif
 486
 487 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
 488 #define vxge_debug_entryexit(level, fmt, ...) \
 489         vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
 490 #else
 491 #define vxge_debug_entryexit(level, fmt, ...)
 492 #endif
 493
 494 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
 495 #define vxge_debug_intr(level, fmt, ...) \
 496         vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
 497 #else
 498 #define vxge_debug_intr(level, fmt, ...)
 499 #endif
 500
 501 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
 502         vxge_hw_device_debug_set((struct __vxge_hw_device  *)vdev->devh, \
 503                 level, mask);\
 504         VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
 505                 vxge_hw_device_error_level_get((struct __vxge_hw_device  *) \
 506                         vdev->devh), \
 507                 vxge_hw_device_trace_level_get((struct __vxge_hw_device  *) \
 508                         vdev->devh));\
 509 }
 510
 511 #ifdef NETIF_F_GSO
 512 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
 513 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
 514 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
 515 #endif
 516
 517 #endif