drivers/bcma/driver_mips.c

   1 /*
   2  * Broadcom specific AMBA
   3  * Broadcom MIPS32 74K core driver
   4  *
   5  * Copyright 2009, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
   7  * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
   8  * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
   9  *
  10  * Licensed under the GNU/GPL. See COPYING for details.
  11  */
  12
  13 #include "bcma_private.h"
  14
  15 #include <linux/bcma/bcma.h>
  16
  17 #include <linux/serial.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/serial_reg.h>
  20 #include <linux/time.h>
  21
  22 /* The 47162a0 hangs when reading MIPS DMP registers registers */
  23 static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
  24 {
  25         return dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM47162 &&
  26                dev->bus->chipinfo.rev == 0 && dev->id.id == BCMA_CORE_MIPS_74K;
  27 }
  28
  29 /* The 5357b0 hangs when reading USB20H DMP registers */
  30 static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
  31 {
  32         return (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
  33                 dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) &&
  34                dev->bus->chipinfo.pkg == 11 &&
  35                dev->id.id == BCMA_CORE_USB20_HOST;
  36 }
  37
  38 static inline u32 mips_read32(struct bcma_drv_mips *mcore,
  39                               u16 offset)
  40 {
  41         return bcma_read32(mcore->core, offset);
  42 }
  43
  44 static inline void mips_write32(struct bcma_drv_mips *mcore,
  45                                 u16 offset,
  46                                 u32 value)
  47 {
  48         bcma_write32(mcore->core, offset, value);
  49 }
  50
  51 static const u32 ipsflag_irq_mask[] = {
  52         0,
  53         BCMA_MIPS_IPSFLAG_IRQ1,
  54         BCMA_MIPS_IPSFLAG_IRQ2,
  55         BCMA_MIPS_IPSFLAG_IRQ3,
  56         BCMA_MIPS_IPSFLAG_IRQ4,
  57 };
  58
  59 static const u32 ipsflag_irq_shift[] = {
  60         0,
  61         BCMA_MIPS_IPSFLAG_IRQ1_SHIFT,
  62         BCMA_MIPS_IPSFLAG_IRQ2_SHIFT,
  63         BCMA_MIPS_IPSFLAG_IRQ3_SHIFT,
  64         BCMA_MIPS_IPSFLAG_IRQ4_SHIFT,
  65 };
  66
  67 static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
  68 {
  69         u32 flag;
  70
  71         if (bcma_core_mips_bcm47162a0_quirk(dev))
  72                 return dev->core_index;
  73         if (bcma_core_mips_bcm5357b0_quirk(dev))
  74                 return dev->core_index;
  75         flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
  76
  77         if (flag)
  78                 return flag & 0x1F;
  79         else
  80                 return 0x3f;
  81 }
  82
  83 /* Get the MIPS IRQ assignment for a specified device.
  84  * If unassigned, 0 is returned.
  85  * If disabled, 5 is returned.
  86  * If not supported, 6 is returned.
  87  */
  88 static unsigned int bcma_core_mips_irq(struct bcma_device *dev)
  89 {
  90         struct bcma_device *mdev = dev->bus->drv_mips.core;
  91         u32 irqflag;
  92         unsigned int irq;
  93
  94         irqflag = bcma_core_mips_irqflag(dev);
  95         if (irqflag == 0x3f)
  96                 return 6;
  97
  98         for (irq = 0; irq <= 4; irq++)
  99                 if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
 100                     (1 << irqflag))
 101                         return irq;
 102
 103         return 5;
 104 }
 105
 106 unsigned int bcma_core_irq(struct bcma_device *dev)
 107 {
 108         unsigned int mips_irq = bcma_core_mips_irq(dev);
 109         return mips_irq <= 4 ? mips_irq + 2 : 0;
 110 }
 111 EXPORT_SYMBOL(bcma_core_irq);
 112
 113 static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
 114 {
 115         unsigned int oldirq = bcma_core_mips_irq(dev);
 116         struct bcma_bus *bus = dev->bus;
 117         struct bcma_device *mdev = bus->drv_mips.core;
 118         u32 irqflag;
 119
 120         irqflag = bcma_core_mips_irqflag(dev);
 121         BUG_ON(oldirq == 6);
 122
 123         dev->irq = irq + 2;
 124
 125         /* clear the old irq */
 126         if (oldirq == 0)
 127                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
 128                             bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
 129                             ~(1 << irqflag));
 130         else if (oldirq != 5)
 131                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(oldirq), 0);
 132
 133         /* assign the new one */
 134         if (irq == 0) {
 135                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
 136                             bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
 137                             (1 << irqflag));
 138         } else {
 139                 u32 irqinitmask = bcma_read32(mdev,
 140                                               BCMA_MIPS_MIPS74K_INTMASK(irq));
 141                 if (irqinitmask) {
 142                         struct bcma_device *core;
 143
 144                         /* backplane irq line is in use, find out who uses
 145                          * it and set user to irq 0
 146                          */
 147                         list_for_each_entry(core, &bus->cores, list) {
 148                                 if ((1 << bcma_core_mips_irqflag(core)) ==
 149                                     irqinitmask) {
 150                                         bcma_core_mips_set_irq(core, 0);
 151                                         break;
 152                                 }
 153                         }
 154                 }
 155                 bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
 156                              1 << irqflag);
 157         }
 158
 159         bcma_debug(bus, "set_irq: core 0x%04x, irq %d => %d\n",
 160                    dev->id.id, oldirq <= 4 ? oldirq + 2 : 0, irq + 2);
 161 }
 162
 163 static void bcma_core_mips_set_irq_name(struct bcma_bus *bus, unsigned int irq,
 164                                         u16 coreid, u8 unit)
 165 {
 166         struct bcma_device *core;
 167
 168         core = bcma_find_core_unit(bus, coreid, unit);
 169         if (!core) {
 170                 bcma_warn(bus,
 171                           "Can not find core (id: 0x%x, unit %i) for IRQ configuration.\n",
 172                           coreid, unit);
 173                 return;
 174         }
 175
 176         bcma_core_mips_set_irq(core, irq);
 177 }
 178
 179 static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
 180 {
 181         int i;
 182         static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
 183         printk(KERN_DEBUG KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
 184         for (i = 0; i <= 6; i++)
 185                 printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
 186         printk("\n");
 187 }
 188
 189 static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
 190 {
 191         struct bcma_device *core;
 192
 193         list_for_each_entry(core, &bus->cores, list) {
 194                 bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
 195         }
 196 }
 197
 198 u32 bcma_cpu_clock(struct bcma_drv_mips *mcore)
 199 {
 200         struct bcma_bus *bus = mcore->core->bus;
 201
 202         if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU)
 203                 return bcma_pmu_get_cpu_clock(&bus->drv_cc);
 204
 205         bcma_err(bus, "No PMU available, need this to get the cpu clock\n");
 206         return 0;
 207 }
 208 EXPORT_SYMBOL(bcma_cpu_clock);
 209
 210 static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
 211 {
 212         struct bcma_bus *bus = mcore->core->bus;
 213         struct bcma_drv_cc *cc = &bus->drv_cc;
 214
 215         switch (cc->capabilities & BCMA_CC_CAP_FLASHT) {
 216         case BCMA_CC_FLASHT_STSER:
 217         case BCMA_CC_FLASHT_ATSER:
 218                 bcma_debug(bus, "Found serial flash\n");
 219                 bcma_sflash_init(cc);
 220                 break;
 221         case BCMA_CC_FLASHT_PARA:
 222                 bcma_debug(bus, "Found parallel flash\n");
 223                 cc->pflash.present = true;
 224                 cc->pflash.window = BCMA_SOC_FLASH2;
 225                 cc->pflash.window_size = BCMA_SOC_FLASH2_SZ;
 226
 227                 if ((bcma_read32(cc->core, BCMA_CC_FLASH_CFG) &
 228                      BCMA_CC_FLASH_CFG_DS) == 0)
 229                         cc->pflash.buswidth = 1;
 230                 else
 231                         cc->pflash.buswidth = 2;
 232                 break;
 233         default:
 234                 bcma_err(bus, "Flash type not supported\n");
 235         }
 236
 237         if (cc->core->id.rev == 38 ||
 238             bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
 239                 if (cc->capabilities & BCMA_CC_CAP_NFLASH) {
 240                         bcma_debug(bus, "Found NAND flash\n");
 241                         bcma_nflash_init(cc);
 242                 }
 243         }
 244 }
 245
 246 void bcma_core_mips_early_init(struct bcma_drv_mips *mcore)
 247 {
 248         struct bcma_bus *bus = mcore->core->bus;
 249
 250         if (mcore->early_setup_done)
 251                 return;
 252
 253         bcma_chipco_serial_init(&bus->drv_cc);
 254         bcma_core_mips_flash_detect(mcore);
 255
 256         mcore->early_setup_done = true;
 257 }
 258
 259 static void bcma_fix_i2s_irqflag(struct bcma_bus *bus)
 260 {
 261         struct bcma_device *cpu, *pcie, *i2s;
 262
 263         /* Fixup the interrupts in 4716/4748 for i2s core (2010 Broadcom SDK)
 264          * (IRQ flags > 7 are ignored when setting the interrupt masks)
 265          */
 266         if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4716 &&
 267             bus->chipinfo.id != BCMA_CHIP_ID_BCM4748)
 268                 return;
 269
 270         cpu = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
 271         pcie = bcma_find_core(bus, BCMA_CORE_PCIE);
 272         i2s = bcma_find_core(bus, BCMA_CORE_I2S);
 273         if (cpu && pcie && i2s &&
 274             bcma_aread32(cpu, BCMA_MIPS_OOBSELINA74) == 0x08060504 &&
 275             bcma_aread32(pcie, BCMA_MIPS_OOBSELINA74) == 0x08060504 &&
 276             bcma_aread32(i2s, BCMA_MIPS_OOBSELOUTA30) == 0x88) {
 277                 bcma_awrite32(cpu, BCMA_MIPS_OOBSELINA74, 0x07060504);
 278                 bcma_awrite32(pcie, BCMA_MIPS_OOBSELINA74, 0x07060504);
 279                 bcma_awrite32(i2s, BCMA_MIPS_OOBSELOUTA30, 0x87);
 280                 bcma_debug(bus,
 281                            "Moved i2s interrupt to oob line 7 instead of 8\n");
 282         }
 283 }
 284
 285 void bcma_core_mips_init(struct bcma_drv_mips *mcore)
 286 {
 287         struct bcma_bus *bus;
 288         struct bcma_device *core;
 289         bus = mcore->core->bus;
 290
 291         if (mcore->setup_done)
 292                 return;
 293
 294         bcma_debug(bus, "Initializing MIPS core...\n");
 295
 296         bcma_core_mips_early_init(mcore);
 297
 298         bcma_fix_i2s_irqflag(bus);
 299
 300         switch (bus->chipinfo.id) {
 301         case BCMA_CHIP_ID_BCM4716:
 302         case BCMA_CHIP_ID_BCM4748:
 303                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 304                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 305                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
 306                 bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_PCIE, 0);
 307                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 308                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
 309                 break;
 310         case BCMA_CHIP_ID_BCM5356:
 311         case BCMA_CHIP_ID_BCM47162:
 312         case BCMA_CHIP_ID_BCM53572:
 313                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 314                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 315                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 316                 break;
 317         case BCMA_CHIP_ID_BCM5357:
 318         case BCMA_CHIP_ID_BCM4749:
 319                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_80211, 0);
 320                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_MAC_GBIT, 0);
 321                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_USB20_HOST, 0);
 322                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_CHIPCOMMON, 0);
 323                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_I2S, 0);
 324                 break;
 325         case BCMA_CHIP_ID_BCM4706:
 326                 bcma_core_mips_set_irq_name(bus, 1, BCMA_CORE_PCIE, 0);
 327                 bcma_core_mips_set_irq_name(bus, 2, BCMA_CORE_4706_MAC_GBIT,
 328                                             0);
 329                 bcma_core_mips_set_irq_name(bus, 3, BCMA_CORE_PCIE, 1);
 330                 bcma_core_mips_set_irq_name(bus, 4, BCMA_CORE_USB20_HOST, 0);
 331                 bcma_core_mips_set_irq_name(bus, 0, BCMA_CORE_4706_CHIPCOMMON,
 332                                             0);
 333                 break;
 334         default:
 335                 list_for_each_entry(core, &bus->cores, list) {
 336                         core->irq = bcma_core_irq(core);
 337                 }
 338                 bcma_err(bus,
 339                          "Unknown device (0x%x) found, can not configure IRQs\n",
 340                          bus->chipinfo.id);
 341         }
 342         bcma_debug(bus, "IRQ reconfiguration done\n");
 343         bcma_core_mips_dump_irq(bus);
 344
 345         mcore->setup_done = true;
 346 }