[POWERPC] Add new interrupt mapping core and change platforms to use it
[linux-2.6/btrfs-unstable.git] / arch / powerpc / kernel / setup_32.c
blobe0df2ba1ab9f936f397aa547e44e3a3af2a02cc5
1 /*
2 * Common prep/pmac/chrp boot and setup code.
3 */
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/ide.h>
14 #include <linux/tty.h>
15 #include <linux/bootmem.h>
16 #include <linux/seq_file.h>
17 #include <linux/root_dev.h>
18 #include <linux/cpu.h>
19 #include <linux/console.h>
21 #include <asm/residual.h>
22 #include <asm/io.h>
23 #include <asm/prom.h>
24 #include <asm/processor.h>
25 #include <asm/pgtable.h>
26 #include <asm/setup.h>
27 #include <asm/amigappc.h>
28 #include <asm/smp.h>
29 #include <asm/elf.h>
30 #include <asm/cputable.h>
31 #include <asm/bootx.h>
32 #include <asm/btext.h>
33 #include <asm/machdep.h>
34 #include <asm/uaccess.h>
35 #include <asm/system.h>
36 #include <asm/pmac_feature.h>
37 #include <asm/sections.h>
38 #include <asm/nvram.h>
39 #include <asm/xmon.h>
40 #include <asm/time.h>
41 #include <asm/serial.h>
42 #include <asm/udbg.h>
44 #include "setup.h"
46 #define DBG(fmt...)
48 #if defined CONFIG_KGDB
49 #include <asm/kgdb.h>
50 #endif
52 extern void bootx_init(unsigned long r4, unsigned long phys);
54 struct ide_machdep_calls ppc_ide_md;
56 int boot_cpuid;
57 EXPORT_SYMBOL_GPL(boot_cpuid);
58 int boot_cpuid_phys;
60 unsigned long ISA_DMA_THRESHOLD;
61 unsigned int DMA_MODE_READ;
62 unsigned int DMA_MODE_WRITE;
64 int have_of = 1;
66 #ifdef CONFIG_PPC_MULTIPLATFORM
67 dev_t boot_dev;
68 #endif /* CONFIG_PPC_MULTIPLATFORM */
70 #ifdef CONFIG_MAGIC_SYSRQ
71 unsigned long SYSRQ_KEY = 0x54;
72 #endif /* CONFIG_MAGIC_SYSRQ */
74 #ifdef CONFIG_VGA_CONSOLE
75 unsigned long vgacon_remap_base;
76 #endif
79 * These are used in binfmt_elf.c to put aux entries on the stack
80 * for each elf executable being started.
82 int dcache_bsize;
83 int icache_bsize;
84 int ucache_bsize;
87 * We're called here very early in the boot. We determine the machine
88 * type and call the appropriate low-level setup functions.
89 * -- Cort <cort@fsmlabs.com>
91 * Note that the kernel may be running at an address which is different
92 * from the address that it was linked at, so we must use RELOC/PTRRELOC
93 * to access static data (including strings). -- paulus
95 unsigned long __init early_init(unsigned long dt_ptr)
97 unsigned long offset = reloc_offset();
99 /* First zero the BSS -- use memset_io, some platforms don't have
100 * caches on yet */
101 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
104 * Identify the CPU type and fix up code sections
105 * that depend on which cpu we have.
107 identify_cpu(offset, 0);
108 do_cpu_ftr_fixups(offset);
110 return KERNELBASE + offset;
115 * Find out what kind of machine we're on and save any data we need
116 * from the early boot process (devtree is copied on pmac by prom_init()).
117 * This is called very early on the boot process, after a minimal
118 * MMU environment has been set up but before MMU_init is called.
120 void __init machine_init(unsigned long dt_ptr, unsigned long phys)
122 /* If btext is enabled, we might have a BAT setup for early display,
123 * thus we do enable some very basic udbg output
125 #ifdef CONFIG_BOOTX_TEXT
126 udbg_putc = btext_drawchar;
127 #endif
129 /* Do some early initialization based on the flat device tree */
130 early_init_devtree(__va(dt_ptr));
132 probe_machine();
134 #ifdef CONFIG_6xx
135 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
136 cpu_has_feature(CPU_FTR_CAN_NAP))
137 ppc_md.power_save = ppc6xx_idle;
138 #endif
140 if (ppc_md.progress)
141 ppc_md.progress("id mach(): done", 0x200);
144 #ifdef CONFIG_BOOKE_WDT
145 /* Checks wdt=x and wdt_period=xx command-line option */
146 int __init early_parse_wdt(char *p)
148 if (p && strncmp(p, "0", 1) != 0)
149 booke_wdt_enabled = 1;
151 return 0;
153 early_param("wdt", early_parse_wdt);
155 int __init early_parse_wdt_period (char *p)
157 if (p)
158 booke_wdt_period = simple_strtoul(p, NULL, 0);
160 return 0;
162 early_param("wdt_period", early_parse_wdt_period);
163 #endif /* CONFIG_BOOKE_WDT */
165 /* Checks "l2cr=xxxx" command-line option */
166 int __init ppc_setup_l2cr(char *str)
168 if (cpu_has_feature(CPU_FTR_L2CR)) {
169 unsigned long val = simple_strtoul(str, NULL, 0);
170 printk(KERN_INFO "l2cr set to %lx\n", val);
171 _set_L2CR(0); /* force invalidate by disable cache */
172 _set_L2CR(val); /* and enable it */
174 return 1;
176 __setup("l2cr=", ppc_setup_l2cr);
178 #ifdef CONFIG_GENERIC_NVRAM
180 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
181 unsigned char nvram_read_byte(int addr)
183 if (ppc_md.nvram_read_val)
184 return ppc_md.nvram_read_val(addr);
185 return 0xff;
187 EXPORT_SYMBOL(nvram_read_byte);
189 void nvram_write_byte(unsigned char val, int addr)
191 if (ppc_md.nvram_write_val)
192 ppc_md.nvram_write_val(addr, val);
194 EXPORT_SYMBOL(nvram_write_byte);
196 void nvram_sync(void)
198 if (ppc_md.nvram_sync)
199 ppc_md.nvram_sync();
201 EXPORT_SYMBOL(nvram_sync);
203 #endif /* CONFIG_NVRAM */
205 static struct cpu cpu_devices[NR_CPUS];
207 int __init ppc_init(void)
209 int i;
211 /* clear the progress line */
212 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
214 /* register CPU devices */
215 for_each_possible_cpu(i)
216 register_cpu(&cpu_devices[i], i);
218 /* call platform init */
219 if (ppc_md.init != NULL) {
220 ppc_md.init();
222 return 0;
225 arch_initcall(ppc_init);
227 /* Warning, IO base is not yet inited */
228 void __init setup_arch(char **cmdline_p)
230 *cmdline_p = cmd_line;
232 /* so udelay does something sensible, assume <= 1000 bogomips */
233 loops_per_jiffy = 500000000 / HZ;
235 unflatten_device_tree();
236 check_for_initrd();
238 if (ppc_md.init_early)
239 ppc_md.init_early();
241 find_legacy_serial_ports();
243 smp_setup_cpu_maps();
245 #ifdef CONFIG_XMON_DEFAULT
246 xmon_init(1);
247 #endif
248 /* Register early console */
249 register_early_udbg_console();
251 #if defined(CONFIG_KGDB)
252 if (ppc_md.kgdb_map_scc)
253 ppc_md.kgdb_map_scc();
254 set_debug_traps();
255 if (strstr(cmd_line, "gdb")) {
256 if (ppc_md.progress)
257 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
258 printk("kgdb breakpoint activated\n");
259 breakpoint();
261 #endif
264 * Set cache line size based on type of cpu as a default.
265 * Systems with OF can look in the properties on the cpu node(s)
266 * for a possibly more accurate value.
268 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
269 dcache_bsize = cur_cpu_spec->dcache_bsize;
270 icache_bsize = cur_cpu_spec->icache_bsize;
271 ucache_bsize = 0;
272 } else
273 ucache_bsize = dcache_bsize = icache_bsize
274 = cur_cpu_spec->dcache_bsize;
276 /* reboot on panic */
277 panic_timeout = 180;
279 if (ppc_md.panic)
280 setup_panic();
282 init_mm.start_code = PAGE_OFFSET;
283 init_mm.end_code = (unsigned long) _etext;
284 init_mm.end_data = (unsigned long) _edata;
285 init_mm.brk = klimit;
287 if (do_early_xmon)
288 debugger(NULL);
290 /* set up the bootmem stuff with available memory */
291 do_init_bootmem();
292 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
294 #ifdef CONFIG_DUMMY_CONSOLE
295 conswitchp = &dummy_con;
296 #endif
298 ppc_md.setup_arch();
299 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
301 paging_init();