arch/arc/plat-arcfpga/platform.c

   1 /*
   2  * ARC FPGA Platform support code
   3  *
   4  * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/io.h>
  16 #include <linux/console.h>
  17 #include <linux/of_platform.h>
  18 #include <asm/setup.h>
  19 #include <asm/clk.h>
  20 #include <asm/mach_desc.h>
  21 #include <plat/memmap.h>
  22 #include <plat/smp.h>
  23 #include <plat/irq.h>
  24
  25 /*-----------------------BVCI Latency Unit -----------------------------*/
  26
  27 #ifdef CONFIG_ARC_HAS_BVCI_LAT_UNIT
  28
  29 int lat_cycles = CONFIG_BVCI_LAT_CYCLES;
  30
  31 /* BVCI Bus Profiler: Latency Unit */
  32 static void __init setup_bvci_lat_unit(void)
  33 {
  34 #define MAX_BVCI_UNITS 12
  35
  36         unsigned int i;
  37         unsigned int *base = (unsigned int *)BVCI_LAT_UNIT_BASE;
  38         const unsigned long units_req = CONFIG_BVCI_LAT_UNITS;
  39         const unsigned int REG_UNIT = 21;
  40         const unsigned int REG_VAL = 22;
  41
  42         /*
  43          * There are multiple Latency Units corresponding to the many
  44          * interfaces of the system bus arbiter (both CPU side as well as
  45          * the peripheral side).
  46          *
  47          * Unit  0 - System Arb and Mem Controller - adds latency to all
  48          *          memory trasactions
  49          * Unit  1 - I$ and System Bus
  50          * Unit  2 - D$ and System Bus
  51          * ..
  52          * Unit 12 - IDE Disk controller and System Bus
  53          *
  54          * The programmers model requires writing to lat_unit reg first
  55          * and then the latency value (cycles) to lat_value reg
  56          */
  57
  58         if (CONFIG_BVCI_LAT_UNITS == 0) {
  59                 writel(0, base + REG_UNIT);
  60                 writel(lat_cycles, base + REG_VAL);
  61                 pr_info("BVCI Latency for all Memory Transactions %d cycles\n",
  62                         lat_cycles);
  63         } else {
  64                 for_each_set_bit(i, &units_req, MAX_BVCI_UNITS) {
  65                         writel(i + 1, base + REG_UNIT); /* loop is 0 based */
  66                         writel(lat_cycles, base + REG_VAL);
  67                         pr_info("BVCI Latency for Unit[%d] = %d cycles\n",
  68                                 (i + 1), lat_cycles);
  69                 }
  70         }
  71 }
  72 #else
  73 static void __init setup_bvci_lat_unit(void)
  74 {
  75 }
  76 #endif
  77
  78 /*----------------------- Platform Devices -----------------------------*/
  79
  80 #if IS_ENABLED(CONFIG_SERIAL_ARC)
  81 static unsigned long arc_uart_info[] = {
  82         0,      /* uart->is_emulated (runtime @running_on_hw) */
  83         0,      /* uart->port.uartclk */
  84         0,      /* uart->baud */
  85         0
  86 };
  87
  88 #if defined(CONFIG_SERIAL_ARC_CONSOLE)
  89 /*
  90  * static platform data - but only for early serial
  91  * TBD: derive this from a special DT node
  92  */
  93 static struct resource arc_uart0_res[] = {
  94         {
  95                 .start = UART0_BASE,
  96                 .end   = UART0_BASE + 0xFF,
  97                 .flags = IORESOURCE_MEM,
  98         },
  99         {
 100                 .start = UART0_IRQ,
 101                 .end   = UART0_IRQ,
 102                 .flags = IORESOURCE_IRQ,
 103         },
 104 };
 105
 106 static struct platform_device arc_uart0_dev = {
 107         .name = "arc-uart",
 108         .id = 0,
 109         .num_resources = ARRAY_SIZE(arc_uart0_res),
 110         .resource = arc_uart0_res,
 111         .dev = {
 112                 .platform_data = &arc_uart_info,
 113         },
 114 };
 115
 116 static struct platform_device *fpga_early_devs[] __initdata = {
 117         &arc_uart0_dev,
 118 };
 119 #endif  /* CONFIG_SERIAL_ARC_CONSOLE */
 120
 121 static void arc_fpga_serial_init(void)
 122 {
 123         /* To let driver workaround ISS bug: baudh Reg can't be set to 0 */
 124         arc_uart_info[0] = !running_on_hw;
 125
 126         arc_uart_info[1] = arc_get_core_freq();
 127
 128         arc_uart_info[2] = CONFIG_ARC_SERIAL_BAUD;
 129
 130 #if defined(CONFIG_SERIAL_ARC_CONSOLE)
 131         early_platform_add_devices(fpga_early_devs,
 132                                    ARRAY_SIZE(fpga_early_devs));
 133
 134         /*
 135          * ARC console driver registers itself as an early platform driver
 136          * of class "earlyprintk".
 137          * Install it here, followed by probe of devices.
 138          * The installation here doesn't require earlyprintk in command line
 139          * To do so however, replace the lines below with
 140          *      parse_early_param();
 141          *      early_platform_driver_probe("earlyprintk", 1, 1);
 142          *                                                    ^^
 143          */
 144         early_platform_driver_register_all("earlyprintk");
 145         early_platform_driver_probe("earlyprintk", 1, 0);
 146
 147         /*
 148          * This is to make sure that arc uart would be preferred console
 149          * despite one/more of following:
 150          *   -command line lacked "console=ttyARC0" or
 151          *   -CONFIG_VT_CONSOLE was enabled (for no reason whatsoever)
 152          * Note that this needs to be done after above early console is reg,
 153          * otherwise the early console never gets a chance to run.
 154          */
 155         add_preferred_console("ttyARC", 0, "115200");
 156 #endif  /* CONFIG_SERIAL_ARC_CONSOLE */
 157 }
 158 #else   /* !IS_ENABLED(CONFIG_SERIAL_ARC) */
 159 static void arc_fpga_serial_init(void)
 160 {
 161 }
 162 #endif
 163
 164 static void __init plat_fpga_early_init(void)
 165 {
 166         pr_info("[plat-arcfpga]: registering early dev resources\n");
 167
 168         setup_bvci_lat_unit();
 169
 170         arc_fpga_serial_init();
 171
 172 #ifdef CONFIG_SMP
 173         iss_model_init_early_smp();
 174 #endif
 175 }
 176
 177 static struct of_dev_auxdata plat_auxdata_lookup[] __initdata = {
 178 #if IS_ENABLED(CONFIG_SERIAL_ARC)
 179         OF_DEV_AUXDATA("snps,arc-uart", UART0_BASE, "arc-uart", arc_uart_info),
 180 #endif
 181         {}
 182 };
 183
 184 static void __init plat_fpga_populate_dev(void)
 185 {
 186         pr_info("[plat-arcfpga]: registering device resources\n");
 187
 188         /*
 189          * Traverses flattened DeviceTree - registering platform devices
 190          * complete with their resources
 191          */
 192         of_platform_populate(NULL, of_default_bus_match_table,
 193                              plat_auxdata_lookup, NULL);
 194 }
 195
 196 /*----------------------- Machine Descriptions ------------------------------
 197  *
 198  * Machine description is simply a set of platform/board specific callbacks
 199  * This is not directly related to DeviceTree based dynamic device creation,
 200  * however as part of early device tree scan, we also select the right
 201  * callback set, by matching the DT compatible name.
 202  */
 203
 204 static const char *aa4_compat[] __initdata = {
 205         "snps,arc-angel4",
 206         NULL,
 207 };
 208
 209 MACHINE_START(ANGEL4, "angel4")
 210         .dt_compat      = aa4_compat,
 211         .init_early     = plat_fpga_early_init,
 212         .init_machine   = plat_fpga_populate_dev,
 213         .init_irq       = plat_fpga_init_IRQ,
 214 #ifdef CONFIG_SMP
 215         .init_smp       = iss_model_init_smp,
 216 #endif
 217 MACHINE_END
 218
 219 static const char *ml509_compat[] __initdata = {
 220         "snps,arc-ml509",
 221         NULL,
 222 };
 223
 224 MACHINE_START(ML509, "ml509")
 225         .dt_compat      = ml509_compat,
 226         .init_early     = plat_fpga_early_init,
 227         .init_machine   = plat_fpga_populate_dev,
 228         .init_irq       = plat_fpga_init_IRQ,
 229 #ifdef CONFIG_SMP
 230         .init_smp       = iss_model_init_smp,
 231 #endif
 232 MACHINE_END
 233
 234 static const char *nsimosci_compat[] __initdata = {
 235         "snps,nsimosci",
 236         NULL,
 237 };
 238
 239 MACHINE_START(NSIMOSCI, "nsimosci")
 240         .dt_compat      = nsimosci_compat,
 241         .init_early     = NULL,
 242         .init_machine   = plat_fpga_populate_dev,
 243         .init_irq       = NULL,
 244 MACHINE_END