serial: add support for the TI AR7 internal UART
[linux-2.6/btrfs-unstable.git] / arch / arm / plat-s3c / pm.c
blob061182ca66e392246beae1abb29411339b338a8d
1 /* linux/arch/arm/plat-s3c/pm.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2004,2006,2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C common power management (suspend to ram) support.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/suspend.h>
17 #include <linux/errno.h>
18 #include <linux/delay.h>
19 #include <linux/serial_core.h>
20 #include <linux/io.h>
22 #include <asm/cacheflush.h>
23 #include <mach/hardware.h>
25 #include <plat/regs-serial.h>
26 #include <mach/regs-clock.h>
27 #include <mach/regs-gpio.h>
28 #include <mach/regs-mem.h>
29 #include <mach/regs-irq.h>
30 #include <asm/irq.h>
32 #include <plat/pm.h>
33 #include <plat/pm-core.h>
35 /* for external use */
37 unsigned long s3c_pm_flags;
39 /* Debug code:
41 * This code supports debug output to the low level UARTs for use on
42 * resume before the console layer is available.
45 #ifdef CONFIG_S3C2410_PM_DEBUG
46 extern void printascii(const char *);
48 void s3c_pm_dbg(const char *fmt, ...)
50 va_list va;
51 char buff[256];
53 va_start(va, fmt);
54 vsprintf(buff, fmt, va);
55 va_end(va);
57 printascii(buff);
60 static inline void s3c_pm_debug_init(void)
62 /* restart uart clocks so we can use them to output */
63 s3c_pm_debug_init_uart();
66 #else
67 #define s3c_pm_debug_init() do { } while(0)
69 #endif /* CONFIG_S3C2410_PM_DEBUG */
71 /* Save the UART configurations if we are configured for debug. */
73 #ifdef CONFIG_S3C2410_PM_DEBUG
75 struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
77 static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
79 void __iomem *regs = S3C_VA_UARTx(uart);
81 save->ulcon = __raw_readl(regs + S3C2410_ULCON);
82 save->ucon = __raw_readl(regs + S3C2410_UCON);
83 save->ufcon = __raw_readl(regs + S3C2410_UFCON);
84 save->umcon = __raw_readl(regs + S3C2410_UMCON);
85 save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
88 static void s3c_pm_save_uarts(void)
90 struct pm_uart_save *save = uart_save;
91 unsigned int uart;
93 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
94 s3c_pm_save_uart(uart, save);
97 static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
99 void __iomem *regs = S3C_VA_UARTx(uart);
101 __raw_writel(save->ulcon, regs + S3C2410_ULCON);
102 __raw_writel(save->ucon, regs + S3C2410_UCON);
103 __raw_writel(save->ufcon, regs + S3C2410_UFCON);
104 __raw_writel(save->umcon, regs + S3C2410_UMCON);
105 __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
108 static void s3c_pm_restore_uarts(void)
110 struct pm_uart_save *save = uart_save;
111 unsigned int uart;
113 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
114 s3c_pm_restore_uart(uart, save);
116 #else
117 static void s3c_pm_save_uarts(void) { }
118 static void s3c_pm_restore_uarts(void) { }
119 #endif
121 /* The IRQ ext-int code goes here, it is too small to currently bother
122 * with its own file. */
124 unsigned long s3c_irqwake_intmask = 0xffffffffL;
125 unsigned long s3c_irqwake_eintmask = 0xffffffffL;
127 int s3c_irqext_wake(unsigned int irqno, unsigned int state)
129 unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
131 if (!(s3c_irqwake_eintallow & bit))
132 return -ENOENT;
134 printk(KERN_INFO "wake %s for irq %d\n",
135 state ? "enabled" : "disabled", irqno);
137 if (!state)
138 s3c_irqwake_eintmask |= bit;
139 else
140 s3c_irqwake_eintmask &= ~bit;
142 return 0;
145 /* helper functions to save and restore register state */
148 * s3c_pm_do_save() - save a set of registers for restoration on resume.
149 * @ptr: Pointer to an array of registers.
150 * @count: Size of the ptr array.
152 * Run through the list of registers given, saving their contents in the
153 * array for later restoration when we wakeup.
155 void s3c_pm_do_save(struct sleep_save *ptr, int count)
157 for (; count > 0; count--, ptr++) {
158 ptr->val = __raw_readl(ptr->reg);
159 S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
164 * s3c_pm_do_restore() - restore register values from the save list.
165 * @ptr: Pointer to an array of registers.
166 * @count: Size of the ptr array.
168 * Restore the register values saved from s3c_pm_do_save().
170 * Note, we do not use S3C_PMDBG() in here, as the system may not have
171 * restore the UARTs state yet
174 void s3c_pm_do_restore(struct sleep_save *ptr, int count)
176 for (; count > 0; count--, ptr++) {
177 printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
178 ptr->reg, ptr->val, __raw_readl(ptr->reg));
180 __raw_writel(ptr->val, ptr->reg);
185 * s3c_pm_do_restore_core() - early restore register values from save list.
187 * This is similar to s3c_pm_do_restore() except we try and minimise the
188 * side effects of the function in case registers that hardware might need
189 * to work has been restored.
191 * WARNING: Do not put any debug in here that may effect memory or use
192 * peripherals, as things may be changing!
195 void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
197 for (; count > 0; count--, ptr++)
198 __raw_writel(ptr->val, ptr->reg);
201 /* s3c2410_pm_show_resume_irqs
203 * print any IRQs asserted at resume time (ie, we woke from)
205 static void s3c_pm_show_resume_irqs(int start, unsigned long which,
206 unsigned long mask)
208 int i;
210 which &= ~mask;
212 for (i = 0; i <= 31; i++) {
213 if (which & (1L<<i)) {
214 S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
220 void (*pm_cpu_prep)(void);
221 void (*pm_cpu_sleep)(void);
223 #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
225 /* s3c_pm_enter
227 * central control for sleep/resume process
230 static int s3c_pm_enter(suspend_state_t state)
232 static unsigned long regs_save[16];
234 /* ensure the debug is initialised (if enabled) */
236 s3c_pm_debug_init();
238 S3C_PMDBG("%s(%d)\n", __func__, state);
240 if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
241 printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
242 return -EINVAL;
245 /* check if we have anything to wake-up with... bad things seem
246 * to happen if you suspend with no wakeup (system will often
247 * require a full power-cycle)
250 if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
251 !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
252 printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
253 printk(KERN_ERR "%s: Aborting sleep\n", __func__);
254 return -EINVAL;
257 /* store the physical address of the register recovery block */
259 s3c_sleep_save_phys = virt_to_phys(regs_save);
261 S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
263 /* save all necessary core registers not covered by the drivers */
265 s3c_pm_save_gpios();
266 s3c_pm_save_uarts();
267 s3c_pm_save_core();
269 /* set the irq configuration for wake */
271 s3c_pm_configure_extint();
273 S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
274 s3c_irqwake_intmask, s3c_irqwake_eintmask);
276 s3c_pm_arch_prepare_irqs();
278 /* call cpu specific preparation */
280 pm_cpu_prep();
282 /* flush cache back to ram */
284 flush_cache_all();
286 s3c_pm_check_store();
288 /* send the cpu to sleep... */
290 s3c_pm_arch_stop_clocks();
292 /* s3c_cpu_save will also act as our return point from when
293 * we resume as it saves its own register state and restores it
294 * during the resume. */
296 s3c_cpu_save(regs_save);
298 /* restore the cpu state using the kernel's cpu init code. */
300 cpu_init();
302 /* restore the system state */
304 s3c_pm_restore_core();
305 s3c_pm_restore_uarts();
306 s3c_pm_restore_gpios();
308 s3c_pm_debug_init();
310 /* check what irq (if any) restored the system */
312 s3c_pm_arch_show_resume_irqs();
314 S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
316 s3c_pm_check_restore();
318 /* ok, let's return from sleep */
320 S3C_PMDBG("S3C PM Resume (post-restore)\n");
321 return 0;
324 /* callback from assembly code */
325 void s3c_pm_cb_flushcache(void)
327 flush_cache_all();
330 static int s3c_pm_prepare(void)
332 /* prepare check area if configured */
334 s3c_pm_check_prepare();
335 return 0;
338 static void s3c_pm_finish(void)
340 s3c_pm_check_cleanup();
343 static struct platform_suspend_ops s3c_pm_ops = {
344 .enter = s3c_pm_enter,
345 .prepare = s3c_pm_prepare,
346 .finish = s3c_pm_finish,
347 .valid = suspend_valid_only_mem,
350 /* s3c_pm_init
352 * Attach the power management functions. This should be called
353 * from the board specific initialisation if the board supports
354 * it.
357 int __init s3c_pm_init(void)
359 printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
361 suspend_set_ops(&s3c_pm_ops);
362 return 0;