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tty: icount changeover for other main devices
[linux-2.6/btrfs-unstable.git] / drivers / char / pcmcia / synclink_cs.c
blob8e7c78131e324f640358bcee95482d4b84896924
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/seq_file.h>
55 #include <linux/slab.h>
56 #include <linux/netdevice.h>
57 #include <linux/vmalloc.h>
58 #include <linux/init.h>
59 #include <linux/delay.h>
60 #include <linux/ioctl.h>
61 #include <linux/synclink.h>
62
63 #include <asm/system.h>
64 #include <asm/io.h>
65 #include <asm/irq.h>
66 #include <asm/dma.h>
67 #include <linux/bitops.h>
68 #include <asm/types.h>
69 #include <linux/termios.h>
70 #include <linux/workqueue.h>
71 #include <linux/hdlc.h>
72
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79 #define SYNCLINK_GENERIC_HDLC 1
80 #else
81 #define SYNCLINK_GENERIC_HDLC 0
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 struct tty_port port;
142 void *if_ptr; /* General purpose pointer (used by SPPP) */
143 int magic;
144 int line;
145
146 struct mgsl_icount icount;
147
148 int timeout;
149 int x_char; /* xon/xoff character */
150 unsigned char read_status_mask;
151 unsigned char ignore_status_mask;
152
153 unsigned char *tx_buf;
154 int tx_put;
155 int tx_get;
156 int tx_count;
157
158 /* circular list of fixed length rx buffers */
159
160 unsigned char *rx_buf; /* memory allocated for all rx buffers */
161 int rx_buf_total_size; /* size of memory allocated for rx buffers */
162 int rx_put; /* index of next empty rx buffer */
163 int rx_get; /* index of next full rx buffer */
164 int rx_buf_size; /* size in bytes of single rx buffer */
165 int rx_buf_count; /* total number of rx buffers */
166 int rx_frame_count; /* number of full rx buffers */
167
168 wait_queue_head_t status_event_wait_q;
169 wait_queue_head_t event_wait_q;
170 struct timer_list tx_timer; /* HDLC transmit timeout timer */
171 struct _mgslpc_info *next_device; /* device list link */
172
173 unsigned short imra_value;
174 unsigned short imrb_value;
175 unsigned char pim_value;
176
177 spinlock_t lock;
178 struct work_struct task; /* task structure for scheduling bh */
179
180 u32 max_frame_size;
181
182 u32 pending_bh;
183
184 bool bh_running;
185 bool bh_requested;
186
187 int dcd_chkcount; /* check counts to prevent */
188 int cts_chkcount; /* too many IRQs if a signal */
189 int dsr_chkcount; /* is floating */
190 int ri_chkcount;
191
192 bool rx_enabled;
193 bool rx_overflow;
194
195 bool tx_enabled;
196 bool tx_active;
197 bool tx_aborting;
198 u32 idle_mode;
199
200 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
201
202 char device_name[25]; /* device instance name */
203
204 unsigned int io_base; /* base I/O address of adapter */
205 unsigned int irq_level;
206
207 MGSL_PARAMS params; /* communications parameters */
208
209 unsigned char serial_signals; /* current serial signal states */
210
211 bool irq_occurred; /* for diagnostics use */
212 char testing_irq;
213 unsigned int init_error; /* startup error (DIAGS) */
214
215 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
216 bool drop_rts_on_tx_done;
217
218 struct _input_signal_events input_signal_events;
219
220 /* PCMCIA support */
221 struct pcmcia_device *p_dev;
222 int stop;
223
224 /* SPPP/Cisco HDLC device parts */
225 int netcount;
226 spinlock_t netlock;
227
228 #if SYNCLINK_GENERIC_HDLC
229 struct net_device *netdev;
230 #endif
231
232 } MGSLPC_INFO;
233
234 #define MGSLPC_MAGIC 0x5402
235
236 /*
237 * The size of the serial xmit buffer is 1 page, or 4096 bytes
238 */
239 #define TXBUFSIZE 4096
240
241
242 #define CHA 0x00 /* channel A offset */
243 #define CHB 0x40 /* channel B offset */
244
245 /*
246 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
247 */
248 #undef PVR
249
250 #define RXFIFO 0
251 #define TXFIFO 0
252 #define STAR 0x20
253 #define CMDR 0x20
254 #define RSTA 0x21
255 #define PRE 0x21
256 #define MODE 0x22
257 #define TIMR 0x23
258 #define XAD1 0x24
259 #define XAD2 0x25
260 #define RAH1 0x26
261 #define RAH2 0x27
262 #define DAFO 0x27
263 #define RAL1 0x28
264 #define RFC 0x28
265 #define RHCR 0x29
266 #define RAL2 0x29
267 #define RBCL 0x2a
268 #define XBCL 0x2a
269 #define RBCH 0x2b
270 #define XBCH 0x2b
271 #define CCR0 0x2c
272 #define CCR1 0x2d
273 #define CCR2 0x2e
274 #define CCR3 0x2f
275 #define VSTR 0x34
276 #define BGR 0x34
277 #define RLCR 0x35
278 #define AML 0x36
279 #define AMH 0x37
280 #define GIS 0x38
281 #define IVA 0x38
282 #define IPC 0x39
283 #define ISR 0x3a
284 #define IMR 0x3a
285 #define PVR 0x3c
286 #define PIS 0x3d
287 #define PIM 0x3d
288 #define PCR 0x3e
289 #define CCR4 0x3f
290
291 // IMR/ISR
292
293 #define IRQ_BREAK_ON BIT15 // rx break detected
294 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
295 #define IRQ_ALLSENT BIT13 // all sent
296 #define IRQ_UNDERRUN BIT12 // transmit data underrun
297 #define IRQ_TIMER BIT11 // timer interrupt
298 #define IRQ_CTS BIT10 // CTS status change
299 #define IRQ_TXREPEAT BIT9 // tx message repeat
300 #define IRQ_TXFIFO BIT8 // transmit pool ready
301 #define IRQ_RXEOM BIT7 // receive message end
302 #define IRQ_EXITHUNT BIT6 // receive frame start
303 #define IRQ_RXTIME BIT6 // rx char timeout
304 #define IRQ_DCD BIT2 // carrier detect status change
305 #define IRQ_OVERRUN BIT1 // receive frame overflow
306 #define IRQ_RXFIFO BIT0 // receive pool full
307
308 // STAR
309
310 #define XFW BIT6 // transmit FIFO write enable
311 #define CEC BIT2 // command executing
312 #define CTS BIT1 // CTS state
313
314 #define PVR_DTR BIT0
315 #define PVR_DSR BIT1
316 #define PVR_RI BIT2
317 #define PVR_AUTOCTS BIT3
318 #define PVR_RS232 0x20 /* 0010b */
319 #define PVR_V35 0xe0 /* 1110b */
320 #define PVR_RS422 0x40 /* 0100b */
321
322 /* Register access functions */
323
324 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
325 #define read_reg(info, reg) inb((info)->io_base + (reg))
326
327 #define read_reg16(info, reg) inw((info)->io_base + (reg))
328 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
329
330 #define set_reg_bits(info, reg, mask) \
331 write_reg(info, (reg), \
332 (unsigned char) (read_reg(info, (reg)) | (mask)))
333 #define clear_reg_bits(info, reg, mask) \
334 write_reg(info, (reg), \
335 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
336 /*
337 * interrupt enable/disable routines
338 */
339 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
340 {
341 if (channel == CHA) {
342 info->imra_value |= mask;
343 write_reg16(info, CHA + IMR, info->imra_value);
344 } else {
345 info->imrb_value |= mask;
346 write_reg16(info, CHB + IMR, info->imrb_value);
347 }
348 }
349 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
350 {
351 if (channel == CHA) {
352 info->imra_value &= ~mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value &= ~mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358 }
359
360 #define port_irq_disable(info, mask) \
361 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
362
363 #define port_irq_enable(info, mask) \
364 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
365
366 static void rx_start(MGSLPC_INFO *info);
367 static void rx_stop(MGSLPC_INFO *info);
368
369 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
370 static void tx_stop(MGSLPC_INFO *info);
371 static void tx_set_idle(MGSLPC_INFO *info);
372
373 static void get_signals(MGSLPC_INFO *info);
374 static void set_signals(MGSLPC_INFO *info);
375
376 static void reset_device(MGSLPC_INFO *info);
377
378 static void hdlc_mode(MGSLPC_INFO *info);
379 static void async_mode(MGSLPC_INFO *info);
380
381 static void tx_timeout(unsigned long context);
382
383 static int carrier_raised(struct tty_port *port);
384 static void dtr_rts(struct tty_port *port, int onoff);
385
386 #if SYNCLINK_GENERIC_HDLC
387 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
388 static void hdlcdev_tx_done(MGSLPC_INFO *info);
389 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
390 static int hdlcdev_init(MGSLPC_INFO *info);
391 static void hdlcdev_exit(MGSLPC_INFO *info);
392 #endif
393
394 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
395
396 static bool register_test(MGSLPC_INFO *info);
397 static bool irq_test(MGSLPC_INFO *info);
398 static int adapter_test(MGSLPC_INFO *info);
399
400 static int claim_resources(MGSLPC_INFO *info);
401 static void release_resources(MGSLPC_INFO *info);
402 static void mgslpc_add_device(MGSLPC_INFO *info);
403 static void mgslpc_remove_device(MGSLPC_INFO *info);
404
405 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
406 static void rx_reset_buffers(MGSLPC_INFO *info);
407 static int rx_alloc_buffers(MGSLPC_INFO *info);
408 static void rx_free_buffers(MGSLPC_INFO *info);
409
410 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
411
412 /*
413 * Bottom half interrupt handlers
414 */
415 static void bh_handler(struct work_struct *work);
416 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
417 static void bh_status(MGSLPC_INFO *info);
418
419 /*
420 * ioctl handlers
421 */
422 static int tiocmget(struct tty_struct *tty, struct file *file);
423 static int tiocmset(struct tty_struct *tty, struct file *file,
424 unsigned int set, unsigned int clear);
425 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
426 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
427 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
428 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
429 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
430 static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
431 static int tx_abort(MGSLPC_INFO *info);
432 static int set_rxenable(MGSLPC_INFO *info, int enable);
433 static int wait_events(MGSLPC_INFO *info, int __user *mask);
434
435 static MGSLPC_INFO *mgslpc_device_list = NULL;
436 static int mgslpc_device_count = 0;
437
438 /*
439 * Set this param to non-zero to load eax with the
440 * .text section address and breakpoint on module load.
441 * This is useful for use with gdb and add-symbol-file command.
442 */
443 static int break_on_load=0;
444
445 /*
446 * Driver major number, defaults to zero to get auto
447 * assigned major number. May be forced as module parameter.
448 */
449 static int ttymajor=0;
450
451 static int debug_level = 0;
452 static int maxframe[MAX_DEVICE_COUNT] = {0,};
453
454 module_param(break_on_load, bool, 0);
455 module_param(ttymajor, int, 0);
456 module_param(debug_level, int, 0);
457 module_param_array(maxframe, int, NULL, 0);
458
459 MODULE_LICENSE("GPL");
460
461 static char *driver_name = "SyncLink PC Card driver";
462 static char *driver_version = "$Revision: 4.34 $";
463
464 static struct tty_driver *serial_driver;
465
466 /* number of characters left in xmit buffer before we ask for more */
467 #define WAKEUP_CHARS 256
468
469 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
470 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
471
472 /* PCMCIA prototypes */
473
474 static int mgslpc_config(struct pcmcia_device *link);
475 static void mgslpc_release(u_long arg);
476 static void mgslpc_detach(struct pcmcia_device *p_dev);
477
478 /*
479 * 1st function defined in .text section. Calling this function in
480 * init_module() followed by a breakpoint allows a remote debugger
481 * (gdb) to get the .text address for the add-symbol-file command.
482 * This allows remote debugging of dynamically loadable modules.
483 */
484 static void* mgslpc_get_text_ptr(void)
485 {
486 return mgslpc_get_text_ptr;
487 }
488
489 /**
490 * line discipline callback wrappers
491 *
492 * The wrappers maintain line discipline references
493 * while calling into the line discipline.
494 *
495 * ldisc_receive_buf - pass receive data to line discipline
496 */
497
498 static void ldisc_receive_buf(struct tty_struct *tty,
499 const __u8 *data, char *flags, int count)
500 {
501 struct tty_ldisc *ld;
502 if (!tty)
503 return;
504 ld = tty_ldisc_ref(tty);
505 if (ld) {
506 if (ld->ops->receive_buf)
507 ld->ops->receive_buf(tty, data, flags, count);
508 tty_ldisc_deref(ld);
509 }
510 }
511
512 static const struct tty_port_operations mgslpc_port_ops = {
513 .carrier_raised = carrier_raised,
514 .dtr_rts = dtr_rts
515 };
516
517 static int mgslpc_probe(struct pcmcia_device *link)
518 {
519 MGSLPC_INFO *info;
520 int ret;
521
522 if (debug_level >= DEBUG_LEVEL_INFO)
523 printk("mgslpc_attach\n");
524
525 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
526 if (!info) {
527 printk("Error can't allocate device instance data\n");
528 return -ENOMEM;
529 }
530
531 info->magic = MGSLPC_MAGIC;
532 tty_port_init(&info->port);
533 info->port.ops = &mgslpc_port_ops;
534 INIT_WORK(&info->task, bh_handler);
535 info->max_frame_size = 4096;
536 info->port.close_delay = 5*HZ/10;
537 info->port.closing_wait = 30*HZ;
538 init_waitqueue_head(&info->status_event_wait_q);
539 init_waitqueue_head(&info->event_wait_q);
540 spin_lock_init(&info->lock);
541 spin_lock_init(&info->netlock);
542 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
543 info->idle_mode = HDLC_TXIDLE_FLAGS;
544 info->imra_value = 0xffff;
545 info->imrb_value = 0xffff;
546 info->pim_value = 0xff;
547
548 info->p_dev = link;
549 link->priv = info;
550
551 /* Initialize the struct pcmcia_device structure */
552
553 link->conf.Attributes = 0;
554 link->conf.IntType = INT_MEMORY_AND_IO;
555
556 ret = mgslpc_config(link);
557 if (ret)
558 return ret;
559
560 mgslpc_add_device(info);
561
562 return 0;
563 }
564
565 /* Card has been inserted.
566 */
567
568 static int mgslpc_ioprobe(struct pcmcia_device *p_dev,
569 cistpl_cftable_entry_t *cfg,
570 cistpl_cftable_entry_t *dflt,
571 unsigned int vcc,
572 void *priv_data)
573 {
574 if (!cfg->io.nwin)
575 return -ENODEV;
576
577 p_dev->resource[0]->start = cfg->io.win[0].base;
578 p_dev->resource[0]->end = cfg->io.win[0].len;
579 p_dev->resource[0]->flags |= pcmcia_io_cfg_data_width(cfg->io.flags);
580 p_dev->io_lines = cfg->io.flags & CISTPL_IO_LINES_MASK;
581
582 return pcmcia_request_io(p_dev);
583 }
584
585 static int mgslpc_config(struct pcmcia_device *link)
586 {
587 MGSLPC_INFO *info = link->priv;
588 int ret;
589
590 if (debug_level >= DEBUG_LEVEL_INFO)
591 printk("mgslpc_config(0x%p)\n", link);
592
593 ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
594 if (ret != 0)
595 goto failed;
596
597 link->conf.Attributes = CONF_ENABLE_IRQ;
598 link->conf.IntType = INT_MEMORY_AND_IO;
599 link->conf.ConfigIndex = 8;
600 link->conf.Present = PRESENT_OPTION;
601
602 ret = pcmcia_request_irq(link, mgslpc_isr);
603 if (ret)
604 goto failed;
605 ret = pcmcia_request_configuration(link, &link->conf);
606 if (ret)
607 goto failed;
608
609 info->io_base = link->resource[0]->start;
610 info->irq_level = link->irq;
611
612 dev_info(&link->dev, "index 0x%02x:",
613 link->conf.ConfigIndex);
614 if (link->conf.Attributes & CONF_ENABLE_IRQ)
615 printk(", irq %d", link->irq);
616 if (link->resource[0])
617 printk(", io %pR", link->resource[0]);
618 printk("\n");
619 return 0;
620
621 failed:
622 mgslpc_release((u_long)link);
623 return -ENODEV;
624 }
625
626 /* Card has been removed.
627 * Unregister device and release PCMCIA configuration.
628 * If device is open, postpone until it is closed.
629 */
630 static void mgslpc_release(u_long arg)
631 {
632 struct pcmcia_device *link = (struct pcmcia_device *)arg;
633
634 if (debug_level >= DEBUG_LEVEL_INFO)
635 printk("mgslpc_release(0x%p)\n", link);
636
637 pcmcia_disable_device(link);
638 }
639
640 static void mgslpc_detach(struct pcmcia_device *link)
641 {
642 if (debug_level >= DEBUG_LEVEL_INFO)
643 printk("mgslpc_detach(0x%p)\n", link);
644
645 ((MGSLPC_INFO *)link->priv)->stop = 1;
646 mgslpc_release((u_long)link);
647
648 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
649 }
650
651 static int mgslpc_suspend(struct pcmcia_device *link)
652 {
653 MGSLPC_INFO *info = link->priv;
654
655 info->stop = 1;
656
657 return 0;
658 }
659
660 static int mgslpc_resume(struct pcmcia_device *link)
661 {
662 MGSLPC_INFO *info = link->priv;
663
664 info->stop = 0;
665
666 return 0;
667 }
668
669
670 static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
671 char *name, const char *routine)
672 {
673 #ifdef MGSLPC_PARANOIA_CHECK
674 static const char *badmagic =
675 "Warning: bad magic number for mgsl struct (%s) in %s\n";
676 static const char *badinfo =
677 "Warning: null mgslpc_info for (%s) in %s\n";
678
679 if (!info) {
680 printk(badinfo, name, routine);
681 return true;
682 }
683 if (info->magic != MGSLPC_MAGIC) {
684 printk(badmagic, name, routine);
685 return true;
686 }
687 #else
688 if (!info)
689 return true;
690 #endif
691 return false;
692 }
693
694
695 #define CMD_RXFIFO BIT7 // release current rx FIFO
696 #define CMD_RXRESET BIT6 // receiver reset
697 #define CMD_RXFIFO_READ BIT5
698 #define CMD_START_TIMER BIT4
699 #define CMD_TXFIFO BIT3 // release current tx FIFO
700 #define CMD_TXEOM BIT1 // transmit end message
701 #define CMD_TXRESET BIT0 // transmit reset
702
703 static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
704 {
705 int i = 0;
706 /* wait for command completion */
707 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
708 udelay(1);
709 if (i++ == 1000)
710 return false;
711 }
712 return true;
713 }
714
715 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
716 {
717 wait_command_complete(info, channel);
718 write_reg(info, (unsigned char) (channel + CMDR), cmd);
719 }
720
721 static void tx_pause(struct tty_struct *tty)
722 {
723 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
724 unsigned long flags;
725
726 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
727 return;
728 if (debug_level >= DEBUG_LEVEL_INFO)
729 printk("tx_pause(%s)\n",info->device_name);
730
731 spin_lock_irqsave(&info->lock,flags);
732 if (info->tx_enabled)
733 tx_stop(info);
734 spin_unlock_irqrestore(&info->lock,flags);
735 }
736
737 static void tx_release(struct tty_struct *tty)
738 {
739 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
740 unsigned long flags;
741
742 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
743 return;
744 if (debug_level >= DEBUG_LEVEL_INFO)
745 printk("tx_release(%s)\n",info->device_name);
746
747 spin_lock_irqsave(&info->lock,flags);
748 if (!info->tx_enabled)
749 tx_start(info, tty);
750 spin_unlock_irqrestore(&info->lock,flags);
751 }
752
753 /* Return next bottom half action to perform.
754 * or 0 if nothing to do.
755 */
756 static int bh_action(MGSLPC_INFO *info)
757 {
758 unsigned long flags;
759 int rc = 0;
760
761 spin_lock_irqsave(&info->lock,flags);
762
763 if (info->pending_bh & BH_RECEIVE) {
764 info->pending_bh &= ~BH_RECEIVE;
765 rc = BH_RECEIVE;
766 } else if (info->pending_bh & BH_TRANSMIT) {
767 info->pending_bh &= ~BH_TRANSMIT;
768 rc = BH_TRANSMIT;
769 } else if (info->pending_bh & BH_STATUS) {
770 info->pending_bh &= ~BH_STATUS;
771 rc = BH_STATUS;
772 }
773
774 if (!rc) {
775 /* Mark BH routine as complete */
776 info->bh_running = false;
777 info->bh_requested = false;
778 }
779
780 spin_unlock_irqrestore(&info->lock,flags);
781
782 return rc;
783 }
784
785 static void bh_handler(struct work_struct *work)
786 {
787 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
788 struct tty_struct *tty;
789 int action;
790
791 if (!info)
792 return;
793
794 if (debug_level >= DEBUG_LEVEL_BH)
795 printk( "%s(%d):bh_handler(%s) entry\n",
796 __FILE__,__LINE__,info->device_name);
797
798 info->bh_running = true;
799 tty = tty_port_tty_get(&info->port);
800
801 while((action = bh_action(info)) != 0) {
802
803 /* Process work item */
804 if ( debug_level >= DEBUG_LEVEL_BH )
805 printk( "%s(%d):bh_handler() work item action=%d\n",
806 __FILE__,__LINE__,action);
807
808 switch (action) {
809
810 case BH_RECEIVE:
811 while(rx_get_frame(info, tty));
812 break;
813 case BH_TRANSMIT:
814 bh_transmit(info, tty);
815 break;
816 case BH_STATUS:
817 bh_status(info);
818 break;
819 default:
820 /* unknown work item ID */
821 printk("Unknown work item ID=%08X!\n", action);
822 break;
823 }
824 }
825
826 tty_kref_put(tty);
827 if (debug_level >= DEBUG_LEVEL_BH)
828 printk( "%s(%d):bh_handler(%s) exit\n",
829 __FILE__,__LINE__,info->device_name);
830 }
831
832 static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
833 {
834 if (debug_level >= DEBUG_LEVEL_BH)
835 printk("bh_transmit() entry on %s\n", info->device_name);
836
837 if (tty)
838 tty_wakeup(tty);
839 }
840
841 static void bh_status(MGSLPC_INFO *info)
842 {
843 info->ri_chkcount = 0;
844 info->dsr_chkcount = 0;
845 info->dcd_chkcount = 0;
846 info->cts_chkcount = 0;
847 }
848
849 /* eom: non-zero = end of frame */
850 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
851 {
852 unsigned char data[2];
853 unsigned char fifo_count, read_count, i;
854 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
855
856 if (debug_level >= DEBUG_LEVEL_ISR)
857 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
858
859 if (!info->rx_enabled)
860 return;
861
862 if (info->rx_frame_count >= info->rx_buf_count) {
863 /* no more free buffers */
864 issue_command(info, CHA, CMD_RXRESET);
865 info->pending_bh |= BH_RECEIVE;
866 info->rx_overflow = true;
867 info->icount.buf_overrun++;
868 return;
869 }
870
871 if (eom) {
872 /* end of frame, get FIFO count from RBCL register */
873 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
874 fifo_count = 32;
875 } else
876 fifo_count = 32;
877
878 do {
879 if (fifo_count == 1) {
880 read_count = 1;
881 data[0] = read_reg(info, CHA + RXFIFO);
882 } else {
883 read_count = 2;
884 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
885 }
886 fifo_count -= read_count;
887 if (!fifo_count && eom)
888 buf->status = data[--read_count];
889
890 for (i = 0; i < read_count; i++) {
891 if (buf->count >= info->max_frame_size) {
892 /* frame too large, reset receiver and reset current buffer */
893 issue_command(info, CHA, CMD_RXRESET);
894 buf->count = 0;
895 return;
896 }
897 *(buf->data + buf->count) = data[i];
898 buf->count++;
899 }
900 } while (fifo_count);
901
902 if (eom) {
903 info->pending_bh |= BH_RECEIVE;
904 info->rx_frame_count++;
905 info->rx_put++;
906 if (info->rx_put >= info->rx_buf_count)
907 info->rx_put = 0;
908 }
909 issue_command(info, CHA, CMD_RXFIFO);
910 }
911
912 static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
913 {
914 unsigned char data, status, flag;
915 int fifo_count;
916 int work = 0;
917 struct mgsl_icount *icount = &info->icount;
918
919 if (tcd) {
920 /* early termination, get FIFO count from RBCL register */
921 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
922
923 /* Zero fifo count could mean 0 or 32 bytes available.
924 * If BIT5 of STAR is set then at least 1 byte is available.
925 */
926 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
927 fifo_count = 32;
928 } else
929 fifo_count = 32;
930
931 tty_buffer_request_room(tty, fifo_count);
932 /* Flush received async data to receive data buffer. */
933 while (fifo_count) {
934 data = read_reg(info, CHA + RXFIFO);
935 status = read_reg(info, CHA + RXFIFO);
936 fifo_count -= 2;
937
938 icount->rx++;
939 flag = TTY_NORMAL;
940
941 // if no frameing/crc error then save data
942 // BIT7:parity error
943 // BIT6:framing error
944
945 if (status & (BIT7 + BIT6)) {
946 if (status & BIT7)
947 icount->parity++;
948 else
949 icount->frame++;
950
951 /* discard char if tty control flags say so */
952 if (status & info->ignore_status_mask)
953 continue;
954
955 status &= info->read_status_mask;
956
957 if (status & BIT7)
958 flag = TTY_PARITY;
959 else if (status & BIT6)
960 flag = TTY_FRAME;
961 }
962 work += tty_insert_flip_char(tty, data, flag);
963 }
964 issue_command(info, CHA, CMD_RXFIFO);
965
966 if (debug_level >= DEBUG_LEVEL_ISR) {
967 printk("%s(%d):rx_ready_async",
968 __FILE__,__LINE__);
969 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
970 __FILE__,__LINE__,icount->rx,icount->brk,
971 icount->parity,icount->frame,icount->overrun);
972 }
973
974 if (work)
975 tty_flip_buffer_push(tty);
976 }
977
978
979 static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
980 {
981 if (!info->tx_active)
982 return;
983
984 info->tx_active = false;
985 info->tx_aborting = false;
986
987 if (info->params.mode == MGSL_MODE_ASYNC)
988 return;
989
990 info->tx_count = info->tx_put = info->tx_get = 0;
991 del_timer(&info->tx_timer);
992
993 if (info->drop_rts_on_tx_done) {
994 get_signals(info);
995 if (info->serial_signals & SerialSignal_RTS) {
996 info->serial_signals &= ~SerialSignal_RTS;
997 set_signals(info);
998 }
999 info->drop_rts_on_tx_done = false;
1000 }
1001
1002 #if SYNCLINK_GENERIC_HDLC
1003 if (info->netcount)
1004 hdlcdev_tx_done(info);
1005 else
1006 #endif
1007 {
1008 if (tty->stopped || tty->hw_stopped) {
1009 tx_stop(info);
1010 return;
1011 }
1012 info->pending_bh |= BH_TRANSMIT;
1013 }
1014 }
1015
1016 static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
1017 {
1018 unsigned char fifo_count = 32;
1019 int c;
1020
1021 if (debug_level >= DEBUG_LEVEL_ISR)
1022 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1023
1024 if (info->params.mode == MGSL_MODE_HDLC) {
1025 if (!info->tx_active)
1026 return;
1027 } else {
1028 if (tty->stopped || tty->hw_stopped) {
1029 tx_stop(info);
1030 return;
1031 }
1032 if (!info->tx_count)
1033 info->tx_active = false;
1034 }
1035
1036 if (!info->tx_count)
1037 return;
1038
1039 while (info->tx_count && fifo_count) {
1040 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1041
1042 if (c == 1) {
1043 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1044 } else {
1045 write_reg16(info, CHA + TXFIFO,
1046 *((unsigned short*)(info->tx_buf + info->tx_get)));
1047 }
1048 info->tx_count -= c;
1049 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1050 fifo_count -= c;
1051 }
1052
1053 if (info->params.mode == MGSL_MODE_ASYNC) {
1054 if (info->tx_count < WAKEUP_CHARS)
1055 info->pending_bh |= BH_TRANSMIT;
1056 issue_command(info, CHA, CMD_TXFIFO);
1057 } else {
1058 if (info->tx_count)
1059 issue_command(info, CHA, CMD_TXFIFO);
1060 else
1061 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1062 }
1063 }
1064
1065 static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
1066 {
1067 get_signals(info);
1068 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1069 irq_disable(info, CHB, IRQ_CTS);
1070 info->icount.cts++;
1071 if (info->serial_signals & SerialSignal_CTS)
1072 info->input_signal_events.cts_up++;
1073 else
1074 info->input_signal_events.cts_down++;
1075 wake_up_interruptible(&info->status_event_wait_q);
1076 wake_up_interruptible(&info->event_wait_q);
1077
1078 if (info->port.flags & ASYNC_CTS_FLOW) {
1079 if (tty->hw_stopped) {
1080 if (info->serial_signals & SerialSignal_CTS) {
1081 if (debug_level >= DEBUG_LEVEL_ISR)
1082 printk("CTS tx start...");
1083 if (tty)
1084 tty->hw_stopped = 0;
1085 tx_start(info, tty);
1086 info->pending_bh |= BH_TRANSMIT;
1087 return;
1088 }
1089 } else {
1090 if (!(info->serial_signals & SerialSignal_CTS)) {
1091 if (debug_level >= DEBUG_LEVEL_ISR)
1092 printk("CTS tx stop...");
1093 if (tty)
1094 tty->hw_stopped = 1;
1095 tx_stop(info);
1096 }
1097 }
1098 }
1099 info->pending_bh |= BH_STATUS;
1100 }
1101
1102 static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
1103 {
1104 get_signals(info);
1105 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1106 irq_disable(info, CHB, IRQ_DCD);
1107 info->icount.dcd++;
1108 if (info->serial_signals & SerialSignal_DCD) {
1109 info->input_signal_events.dcd_up++;
1110 }
1111 else
1112 info->input_signal_events.dcd_down++;
1113 #if SYNCLINK_GENERIC_HDLC
1114 if (info->netcount) {
1115 if (info->serial_signals & SerialSignal_DCD)
1116 netif_carrier_on(info->netdev);
1117 else
1118 netif_carrier_off(info->netdev);
1119 }
1120 #endif
1121 wake_up_interruptible(&info->status_event_wait_q);
1122 wake_up_interruptible(&info->event_wait_q);
1123
1124 if (info->port.flags & ASYNC_CHECK_CD) {
1125 if (debug_level >= DEBUG_LEVEL_ISR)
1126 printk("%s CD now %s...", info->device_name,
1127 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1128 if (info->serial_signals & SerialSignal_DCD)
1129 wake_up_interruptible(&info->port.open_wait);
1130 else {
1131 if (debug_level >= DEBUG_LEVEL_ISR)
1132 printk("doing serial hangup...");
1133 if (tty)
1134 tty_hangup(tty);
1135 }
1136 }
1137 info->pending_bh |= BH_STATUS;
1138 }
1139
1140 static void dsr_change(MGSLPC_INFO *info)
1141 {
1142 get_signals(info);
1143 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1144 port_irq_disable(info, PVR_DSR);
1145 info->icount.dsr++;
1146 if (info->serial_signals & SerialSignal_DSR)
1147 info->input_signal_events.dsr_up++;
1148 else
1149 info->input_signal_events.dsr_down++;
1150 wake_up_interruptible(&info->status_event_wait_q);
1151 wake_up_interruptible(&info->event_wait_q);
1152 info->pending_bh |= BH_STATUS;
1153 }
1154
1155 static void ri_change(MGSLPC_INFO *info)
1156 {
1157 get_signals(info);
1158 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1159 port_irq_disable(info, PVR_RI);
1160 info->icount.rng++;
1161 if (info->serial_signals & SerialSignal_RI)
1162 info->input_signal_events.ri_up++;
1163 else
1164 info->input_signal_events.ri_down++;
1165 wake_up_interruptible(&info->status_event_wait_q);
1166 wake_up_interruptible(&info->event_wait_q);
1167 info->pending_bh |= BH_STATUS;
1168 }
1169
1170 /* Interrupt service routine entry point.
1171 *
1172 * Arguments:
1173 *
1174 * irq interrupt number that caused interrupt
1175 * dev_id device ID supplied during interrupt registration
1176 */
1177 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1178 {
1179 MGSLPC_INFO *info = dev_id;
1180 struct tty_struct *tty;
1181 unsigned short isr;
1182 unsigned char gis, pis;
1183 int count=0;
1184
1185 if (debug_level >= DEBUG_LEVEL_ISR)
1186 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1187
1188 if (!(info->p_dev->_locked))
1189 return IRQ_HANDLED;
1190
1191 tty = tty_port_tty_get(&info->port);
1192
1193 spin_lock(&info->lock);
1194
1195 while ((gis = read_reg(info, CHA + GIS))) {
1196 if (debug_level >= DEBUG_LEVEL_ISR)
1197 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1198
1199 if ((gis & 0x70) || count > 1000) {
1200 printk("synclink_cs:hardware failed or ejected\n");
1201 break;
1202 }
1203 count++;
1204
1205 if (gis & (BIT1 + BIT0)) {
1206 isr = read_reg16(info, CHB + ISR);
1207 if (isr & IRQ_DCD)
1208 dcd_change(info, tty);
1209 if (isr & IRQ_CTS)
1210 cts_change(info, tty);
1211 }
1212 if (gis & (BIT3 + BIT2))
1213 {
1214 isr = read_reg16(info, CHA + ISR);
1215 if (isr & IRQ_TIMER) {
1216 info->irq_occurred = true;
1217 irq_disable(info, CHA, IRQ_TIMER);
1218 }
1219
1220 /* receive IRQs */
1221 if (isr & IRQ_EXITHUNT) {
1222 info->icount.exithunt++;
1223 wake_up_interruptible(&info->event_wait_q);
1224 }
1225 if (isr & IRQ_BREAK_ON) {
1226 info->icount.brk++;
1227 if (info->port.flags & ASYNC_SAK)
1228 do_SAK(tty);
1229 }
1230 if (isr & IRQ_RXTIME) {
1231 issue_command(info, CHA, CMD_RXFIFO_READ);
1232 }
1233 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1234 if (info->params.mode == MGSL_MODE_HDLC)
1235 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1236 else
1237 rx_ready_async(info, isr & IRQ_RXEOM, tty);
1238 }
1239
1240 /* transmit IRQs */
1241 if (isr & IRQ_UNDERRUN) {
1242 if (info->tx_aborting)
1243 info->icount.txabort++;
1244 else
1245 info->icount.txunder++;
1246 tx_done(info, tty);
1247 }
1248 else if (isr & IRQ_ALLSENT) {
1249 info->icount.txok++;
1250 tx_done(info, tty);
1251 }
1252 else if (isr & IRQ_TXFIFO)
1253 tx_ready(info, tty);
1254 }
1255 if (gis & BIT7) {
1256 pis = read_reg(info, CHA + PIS);
1257 if (pis & BIT1)
1258 dsr_change(info);
1259 if (pis & BIT2)
1260 ri_change(info);
1261 }
1262 }
1263
1264 /* Request bottom half processing if there's something
1265 * for it to do and the bh is not already running
1266 */
1267
1268 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1269 if ( debug_level >= DEBUG_LEVEL_ISR )
1270 printk("%s(%d):%s queueing bh task.\n",
1271 __FILE__,__LINE__,info->device_name);
1272 schedule_work(&info->task);
1273 info->bh_requested = true;
1274 }
1275
1276 spin_unlock(&info->lock);
1277 tty_kref_put(tty);
1278
1279 if (debug_level >= DEBUG_LEVEL_ISR)
1280 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1281 __FILE__, __LINE__, info->irq_level);
1282
1283 return IRQ_HANDLED;
1284 }
1285
1286 /* Initialize and start device.
1287 */
1288 static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
1289 {
1290 int retval = 0;
1291
1292 if (debug_level >= DEBUG_LEVEL_INFO)
1293 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1294
1295 if (info->port.flags & ASYNC_INITIALIZED)
1296 return 0;
1297
1298 if (!info->tx_buf) {
1299 /* allocate a page of memory for a transmit buffer */
1300 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1301 if (!info->tx_buf) {
1302 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1303 __FILE__,__LINE__,info->device_name);
1304 return -ENOMEM;
1305 }
1306 }
1307
1308 info->pending_bh = 0;
1309
1310 memset(&info->icount, 0, sizeof(info->icount));
1311
1312 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1313
1314 /* Allocate and claim adapter resources */
1315 retval = claim_resources(info);
1316
1317 /* perform existance check and diagnostics */
1318 if ( !retval )
1319 retval = adapter_test(info);
1320
1321 if ( retval ) {
1322 if (capable(CAP_SYS_ADMIN) && tty)
1323 set_bit(TTY_IO_ERROR, &tty->flags);
1324 release_resources(info);
1325 return retval;
1326 }
1327
1328 /* program hardware for current parameters */
1329 mgslpc_change_params(info, tty);
1330
1331 if (tty)
1332 clear_bit(TTY_IO_ERROR, &tty->flags);
1333
1334 info->port.flags |= ASYNC_INITIALIZED;
1335
1336 return 0;
1337 }
1338
1339 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1340 */
1341 static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
1342 {
1343 unsigned long flags;
1344
1345 if (!(info->port.flags & ASYNC_INITIALIZED))
1346 return;
1347
1348 if (debug_level >= DEBUG_LEVEL_INFO)
1349 printk("%s(%d):mgslpc_shutdown(%s)\n",
1350 __FILE__,__LINE__, info->device_name );
1351
1352 /* clear status wait queue because status changes */
1353 /* can't happen after shutting down the hardware */
1354 wake_up_interruptible(&info->status_event_wait_q);
1355 wake_up_interruptible(&info->event_wait_q);
1356
1357 del_timer_sync(&info->tx_timer);
1358
1359 if (info->tx_buf) {
1360 free_page((unsigned long) info->tx_buf);
1361 info->tx_buf = NULL;
1362 }
1363
1364 spin_lock_irqsave(&info->lock,flags);
1365
1366 rx_stop(info);
1367 tx_stop(info);
1368
1369 /* TODO:disable interrupts instead of reset to preserve signal states */
1370 reset_device(info);
1371
1372 if (!tty || tty->termios->c_cflag & HUPCL) {
1373 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1374 set_signals(info);
1375 }
1376
1377 spin_unlock_irqrestore(&info->lock,flags);
1378
1379 release_resources(info);
1380
1381 if (tty)
1382 set_bit(TTY_IO_ERROR, &tty->flags);
1383
1384 info->port.flags &= ~ASYNC_INITIALIZED;
1385 }
1386
1387 static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
1388 {
1389 unsigned long flags;
1390
1391 spin_lock_irqsave(&info->lock,flags);
1392
1393 rx_stop(info);
1394 tx_stop(info);
1395 info->tx_count = info->tx_put = info->tx_get = 0;
1396
1397 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1398 hdlc_mode(info);
1399 else
1400 async_mode(info);
1401
1402 set_signals(info);
1403
1404 info->dcd_chkcount = 0;
1405 info->cts_chkcount = 0;
1406 info->ri_chkcount = 0;
1407 info->dsr_chkcount = 0;
1408
1409 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1410 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1411 get_signals(info);
1412
1413 if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
1414 rx_start(info);
1415
1416 spin_unlock_irqrestore(&info->lock,flags);
1417 }
1418
1419 /* Reconfigure adapter based on new parameters
1420 */
1421 static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
1422 {
1423 unsigned cflag;
1424 int bits_per_char;
1425
1426 if (!tty || !tty->termios)
1427 return;
1428
1429 if (debug_level >= DEBUG_LEVEL_INFO)
1430 printk("%s(%d):mgslpc_change_params(%s)\n",
1431 __FILE__,__LINE__, info->device_name );
1432
1433 cflag = tty->termios->c_cflag;
1434
1435 /* if B0 rate (hangup) specified then negate DTR and RTS */
1436 /* otherwise assert DTR and RTS */
1437 if (cflag & CBAUD)
1438 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1439 else
1440 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1441
1442 /* byte size and parity */
1443
1444 switch (cflag & CSIZE) {
1445 case CS5: info->params.data_bits = 5; break;
1446 case CS6: info->params.data_bits = 6; break;
1447 case CS7: info->params.data_bits = 7; break;
1448 case CS8: info->params.data_bits = 8; break;
1449 default: info->params.data_bits = 7; break;
1450 }
1451
1452 if (cflag & CSTOPB)
1453 info->params.stop_bits = 2;
1454 else
1455 info->params.stop_bits = 1;
1456
1457 info->params.parity = ASYNC_PARITY_NONE;
1458 if (cflag & PARENB) {
1459 if (cflag & PARODD)
1460 info->params.parity = ASYNC_PARITY_ODD;
1461 else
1462 info->params.parity = ASYNC_PARITY_EVEN;
1463 #ifdef CMSPAR
1464 if (cflag & CMSPAR)
1465 info->params.parity = ASYNC_PARITY_SPACE;
1466 #endif
1467 }
1468
1469 /* calculate number of jiffies to transmit a full
1470 * FIFO (32 bytes) at specified data rate
1471 */
1472 bits_per_char = info->params.data_bits +
1473 info->params.stop_bits + 1;
1474
1475 /* if port data rate is set to 460800 or less then
1476 * allow tty settings to override, otherwise keep the
1477 * current data rate.
1478 */
1479 if (info->params.data_rate <= 460800) {
1480 info->params.data_rate = tty_get_baud_rate(tty);
1481 }
1482
1483 if ( info->params.data_rate ) {
1484 info->timeout = (32*HZ*bits_per_char) /
1485 info->params.data_rate;
1486 }
1487 info->timeout += HZ/50; /* Add .02 seconds of slop */
1488
1489 if (cflag & CRTSCTS)
1490 info->port.flags |= ASYNC_CTS_FLOW;
1491 else
1492 info->port.flags &= ~ASYNC_CTS_FLOW;
1493
1494 if (cflag & CLOCAL)
1495 info->port.flags &= ~ASYNC_CHECK_CD;
1496 else
1497 info->port.flags |= ASYNC_CHECK_CD;
1498
1499 /* process tty input control flags */
1500
1501 info->read_status_mask = 0;
1502 if (I_INPCK(tty))
1503 info->read_status_mask |= BIT7 | BIT6;
1504 if (I_IGNPAR(tty))
1505 info->ignore_status_mask |= BIT7 | BIT6;
1506
1507 mgslpc_program_hw(info, tty);
1508 }
1509
1510 /* Add a character to the transmit buffer
1511 */
1512 static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1513 {
1514 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1515 unsigned long flags;
1516
1517 if (debug_level >= DEBUG_LEVEL_INFO) {
1518 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1519 __FILE__,__LINE__,ch,info->device_name);
1520 }
1521
1522 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1523 return 0;
1524
1525 if (!info->tx_buf)
1526 return 0;
1527
1528 spin_lock_irqsave(&info->lock,flags);
1529
1530 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1531 if (info->tx_count < TXBUFSIZE - 1) {
1532 info->tx_buf[info->tx_put++] = ch;
1533 info->tx_put &= TXBUFSIZE-1;
1534 info->tx_count++;
1535 }
1536 }
1537
1538 spin_unlock_irqrestore(&info->lock,flags);
1539 return 1;
1540 }
1541
1542 /* Enable transmitter so remaining characters in the
1543 * transmit buffer are sent.
1544 */
1545 static void mgslpc_flush_chars(struct tty_struct *tty)
1546 {
1547 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1548 unsigned long flags;
1549
1550 if (debug_level >= DEBUG_LEVEL_INFO)
1551 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1552 __FILE__,__LINE__,info->device_name,info->tx_count);
1553
1554 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1555 return;
1556
1557 if (info->tx_count <= 0 || tty->stopped ||
1558 tty->hw_stopped || !info->tx_buf)
1559 return;
1560
1561 if (debug_level >= DEBUG_LEVEL_INFO)
1562 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1563 __FILE__,__LINE__,info->device_name);
1564
1565 spin_lock_irqsave(&info->lock,flags);
1566 if (!info->tx_active)
1567 tx_start(info, tty);
1568 spin_unlock_irqrestore(&info->lock,flags);
1569 }
1570
1571 /* Send a block of data
1572 *
1573 * Arguments:
1574 *
1575 * tty pointer to tty information structure
1576 * buf pointer to buffer containing send data
1577 * count size of send data in bytes
1578 *
1579 * Returns: number of characters written
1580 */
1581 static int mgslpc_write(struct tty_struct * tty,
1582 const unsigned char *buf, int count)
1583 {
1584 int c, ret = 0;
1585 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1586 unsigned long flags;
1587
1588 if (debug_level >= DEBUG_LEVEL_INFO)
1589 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1590 __FILE__,__LINE__,info->device_name,count);
1591
1592 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1593 !info->tx_buf)
1594 goto cleanup;
1595
1596 if (info->params.mode == MGSL_MODE_HDLC) {
1597 if (count > TXBUFSIZE) {
1598 ret = -EIO;
1599 goto cleanup;
1600 }
1601 if (info->tx_active)
1602 goto cleanup;
1603 else if (info->tx_count)
1604 goto start;
1605 }
1606
1607 for (;;) {
1608 c = min(count,
1609 min(TXBUFSIZE - info->tx_count - 1,
1610 TXBUFSIZE - info->tx_put));
1611 if (c <= 0)
1612 break;
1613
1614 memcpy(info->tx_buf + info->tx_put, buf, c);
1615
1616 spin_lock_irqsave(&info->lock,flags);
1617 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1618 info->tx_count += c;
1619 spin_unlock_irqrestore(&info->lock,flags);
1620
1621 buf += c;
1622 count -= c;
1623 ret += c;
1624 }
1625 start:
1626 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1627 spin_lock_irqsave(&info->lock,flags);
1628 if (!info->tx_active)
1629 tx_start(info, tty);
1630 spin_unlock_irqrestore(&info->lock,flags);
1631 }
1632 cleanup:
1633 if (debug_level >= DEBUG_LEVEL_INFO)
1634 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1635 __FILE__,__LINE__,info->device_name,ret);
1636 return ret;
1637 }
1638
1639 /* Return the count of free bytes in transmit buffer
1640 */
1641 static int mgslpc_write_room(struct tty_struct *tty)
1642 {
1643 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1644 int ret;
1645
1646 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1647 return 0;
1648
1649 if (info->params.mode == MGSL_MODE_HDLC) {
1650 /* HDLC (frame oriented) mode */
1651 if (info->tx_active)
1652 return 0;
1653 else
1654 return HDLC_MAX_FRAME_SIZE;
1655 } else {
1656 ret = TXBUFSIZE - info->tx_count - 1;
1657 if (ret < 0)
1658 ret = 0;
1659 }
1660
1661 if (debug_level >= DEBUG_LEVEL_INFO)
1662 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1663 __FILE__,__LINE__, info->device_name, ret);
1664 return ret;
1665 }
1666
1667 /* Return the count of bytes in transmit buffer
1668 */
1669 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1670 {
1671 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1672 int rc;
1673
1674 if (debug_level >= DEBUG_LEVEL_INFO)
1675 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1676 __FILE__,__LINE__, info->device_name );
1677
1678 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1679 return 0;
1680
1681 if (info->params.mode == MGSL_MODE_HDLC)
1682 rc = info->tx_active ? info->max_frame_size : 0;
1683 else
1684 rc = info->tx_count;
1685
1686 if (debug_level >= DEBUG_LEVEL_INFO)
1687 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1688 __FILE__,__LINE__, info->device_name, rc);
1689
1690 return rc;
1691 }
1692
1693 /* Discard all data in the send buffer
1694 */
1695 static void mgslpc_flush_buffer(struct tty_struct *tty)
1696 {
1697 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1698 unsigned long flags;
1699
1700 if (debug_level >= DEBUG_LEVEL_INFO)
1701 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1702 __FILE__,__LINE__, info->device_name );
1703
1704 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1705 return;
1706
1707 spin_lock_irqsave(&info->lock,flags);
1708 info->tx_count = info->tx_put = info->tx_get = 0;
1709 del_timer(&info->tx_timer);
1710 spin_unlock_irqrestore(&info->lock,flags);
1711
1712 wake_up_interruptible(&tty->write_wait);
1713 tty_wakeup(tty);
1714 }
1715
1716 /* Send a high-priority XON/XOFF character
1717 */
1718 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1719 {
1720 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1721 unsigned long flags;
1722
1723 if (debug_level >= DEBUG_LEVEL_INFO)
1724 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1725 __FILE__,__LINE__, info->device_name, ch );
1726
1727 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1728 return;
1729
1730 info->x_char = ch;
1731 if (ch) {
1732 spin_lock_irqsave(&info->lock,flags);
1733 if (!info->tx_enabled)
1734 tx_start(info, tty);
1735 spin_unlock_irqrestore(&info->lock,flags);
1736 }
1737 }
1738
1739 /* Signal remote device to throttle send data (our receive data)
1740 */
1741 static void mgslpc_throttle(struct tty_struct * tty)
1742 {
1743 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1744 unsigned long flags;
1745
1746 if (debug_level >= DEBUG_LEVEL_INFO)
1747 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1748 __FILE__,__LINE__, info->device_name );
1749
1750 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1751 return;
1752
1753 if (I_IXOFF(tty))
1754 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1755
1756 if (tty->termios->c_cflag & CRTSCTS) {
1757 spin_lock_irqsave(&info->lock,flags);
1758 info->serial_signals &= ~SerialSignal_RTS;
1759 set_signals(info);
1760 spin_unlock_irqrestore(&info->lock,flags);
1761 }
1762 }
1763
1764 /* Signal remote device to stop throttling send data (our receive data)
1765 */
1766 static void mgslpc_unthrottle(struct tty_struct * tty)
1767 {
1768 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1769 unsigned long flags;
1770
1771 if (debug_level >= DEBUG_LEVEL_INFO)
1772 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1773 __FILE__,__LINE__, info->device_name );
1774
1775 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1776 return;
1777
1778 if (I_IXOFF(tty)) {
1779 if (info->x_char)
1780 info->x_char = 0;
1781 else
1782 mgslpc_send_xchar(tty, START_CHAR(tty));
1783 }
1784
1785 if (tty->termios->c_cflag & CRTSCTS) {
1786 spin_lock_irqsave(&info->lock,flags);
1787 info->serial_signals |= SerialSignal_RTS;
1788 set_signals(info);
1789 spin_unlock_irqrestore(&info->lock,flags);
1790 }
1791 }
1792
1793 /* get the current serial statistics
1794 */
1795 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1796 {
1797 int err;
1798 if (debug_level >= DEBUG_LEVEL_INFO)
1799 printk("get_params(%s)\n", info->device_name);
1800 if (!user_icount) {
1801 memset(&info->icount, 0, sizeof(info->icount));
1802 } else {
1803 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1804 if (err)
1805 return -EFAULT;
1806 }
1807 return 0;
1808 }
1809
1810 /* get the current serial parameters
1811 */
1812 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1813 {
1814 int err;
1815 if (debug_level >= DEBUG_LEVEL_INFO)
1816 printk("get_params(%s)\n", info->device_name);
1817 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1818 if (err)
1819 return -EFAULT;
1820 return 0;
1821 }
1822
1823 /* set the serial parameters
1824 *
1825 * Arguments:
1826 *
1827 * info pointer to device instance data
1828 * new_params user buffer containing new serial params
1829 *
1830 * Returns: 0 if success, otherwise error code
1831 */
1832 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
1833 {
1834 unsigned long flags;
1835 MGSL_PARAMS tmp_params;
1836 int err;
1837
1838 if (debug_level >= DEBUG_LEVEL_INFO)
1839 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1840 info->device_name );
1841 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1842 if (err) {
1843 if ( debug_level >= DEBUG_LEVEL_INFO )
1844 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1845 __FILE__,__LINE__,info->device_name);
1846 return -EFAULT;
1847 }
1848
1849 spin_lock_irqsave(&info->lock,flags);
1850 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1851 spin_unlock_irqrestore(&info->lock,flags);
1852
1853 mgslpc_change_params(info, tty);
1854
1855 return 0;
1856 }
1857
1858 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1859 {
1860 int err;
1861 if (debug_level >= DEBUG_LEVEL_INFO)
1862 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1863 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1864 if (err)
1865 return -EFAULT;
1866 return 0;
1867 }
1868
1869 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1870 {
1871 unsigned long flags;
1872 if (debug_level >= DEBUG_LEVEL_INFO)
1873 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1874 spin_lock_irqsave(&info->lock,flags);
1875 info->idle_mode = idle_mode;
1876 tx_set_idle(info);
1877 spin_unlock_irqrestore(&info->lock,flags);
1878 return 0;
1879 }
1880
1881 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1882 {
1883 int err;
1884 if (debug_level >= DEBUG_LEVEL_INFO)
1885 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1886 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1887 if (err)
1888 return -EFAULT;
1889 return 0;
1890 }
1891
1892 static int set_interface(MGSLPC_INFO * info, int if_mode)
1893 {
1894 unsigned long flags;
1895 unsigned char val;
1896 if (debug_level >= DEBUG_LEVEL_INFO)
1897 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1898 spin_lock_irqsave(&info->lock,flags);
1899 info->if_mode = if_mode;
1900
1901 val = read_reg(info, PVR) & 0x0f;
1902 switch (info->if_mode)
1903 {
1904 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1905 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1906 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1907 }
1908 write_reg(info, PVR, val);
1909
1910 spin_unlock_irqrestore(&info->lock,flags);
1911 return 0;
1912 }
1913
1914 static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
1915 {
1916 unsigned long flags;
1917
1918 if (debug_level >= DEBUG_LEVEL_INFO)
1919 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1920
1921 spin_lock_irqsave(&info->lock,flags);
1922 if (enable) {
1923 if (!info->tx_enabled)
1924 tx_start(info, tty);
1925 } else {
1926 if (info->tx_enabled)
1927 tx_stop(info);
1928 }
1929 spin_unlock_irqrestore(&info->lock,flags);
1930 return 0;
1931 }
1932
1933 static int tx_abort(MGSLPC_INFO * info)
1934 {
1935 unsigned long flags;
1936
1937 if (debug_level >= DEBUG_LEVEL_INFO)
1938 printk("tx_abort(%s)\n", info->device_name);
1939
1940 spin_lock_irqsave(&info->lock,flags);
1941 if (info->tx_active && info->tx_count &&
1942 info->params.mode == MGSL_MODE_HDLC) {
1943 /* clear data count so FIFO is not filled on next IRQ.
1944 * This results in underrun and abort transmission.
1945 */
1946 info->tx_count = info->tx_put = info->tx_get = 0;
1947 info->tx_aborting = true;
1948 }
1949 spin_unlock_irqrestore(&info->lock,flags);
1950 return 0;
1951 }
1952
1953 static int set_rxenable(MGSLPC_INFO * info, int enable)
1954 {
1955 unsigned long flags;
1956
1957 if (debug_level >= DEBUG_LEVEL_INFO)
1958 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
1959
1960 spin_lock_irqsave(&info->lock,flags);
1961 if (enable) {
1962 if (!info->rx_enabled)
1963 rx_start(info);
1964 } else {
1965 if (info->rx_enabled)
1966 rx_stop(info);
1967 }
1968 spin_unlock_irqrestore(&info->lock,flags);
1969 return 0;
1970 }
1971
1972 /* wait for specified event to occur
1973 *
1974 * Arguments: info pointer to device instance data
1975 * mask pointer to bitmask of events to wait for
1976 * Return Value: 0 if successful and bit mask updated with
1977 * of events triggerred,
1978 * otherwise error code
1979 */
1980 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
1981 {
1982 unsigned long flags;
1983 int s;
1984 int rc=0;
1985 struct mgsl_icount cprev, cnow;
1986 int events;
1987 int mask;
1988 struct _input_signal_events oldsigs, newsigs;
1989 DECLARE_WAITQUEUE(wait, current);
1990
1991 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
1992 if (rc)
1993 return -EFAULT;
1994
1995 if (debug_level >= DEBUG_LEVEL_INFO)
1996 printk("wait_events(%s,%d)\n", info->device_name, mask);
1997
1998 spin_lock_irqsave(&info->lock,flags);
1999
2000 /* return immediately if state matches requested events */
2001 get_signals(info);
2002 s = info->serial_signals;
2003 events = mask &
2004 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2005 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2006 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2007 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2008 if (events) {
2009 spin_unlock_irqrestore(&info->lock,flags);
2010 goto exit;
2011 }
2012
2013 /* save current irq counts */
2014 cprev = info->icount;
2015 oldsigs = info->input_signal_events;
2016
2017 if ((info->params.mode == MGSL_MODE_HDLC) &&
2018 (mask & MgslEvent_ExitHuntMode))
2019 irq_enable(info, CHA, IRQ_EXITHUNT);
2020
2021 set_current_state(TASK_INTERRUPTIBLE);
2022 add_wait_queue(&info->event_wait_q, &wait);
2023
2024 spin_unlock_irqrestore(&info->lock,flags);
2025
2026
2027 for(;;) {
2028 schedule();
2029 if (signal_pending(current)) {
2030 rc = -ERESTARTSYS;
2031 break;
2032 }
2033
2034 /* get current irq counts */
2035 spin_lock_irqsave(&info->lock,flags);
2036 cnow = info->icount;
2037 newsigs = info->input_signal_events;
2038 set_current_state(TASK_INTERRUPTIBLE);
2039 spin_unlock_irqrestore(&info->lock,flags);
2040
2041 /* if no change, wait aborted for some reason */
2042 if (newsigs.dsr_up == oldsigs.dsr_up &&
2043 newsigs.dsr_down == oldsigs.dsr_down &&
2044 newsigs.dcd_up == oldsigs.dcd_up &&
2045 newsigs.dcd_down == oldsigs.dcd_down &&
2046 newsigs.cts_up == oldsigs.cts_up &&
2047 newsigs.cts_down == oldsigs.cts_down &&
2048 newsigs.ri_up == oldsigs.ri_up &&
2049 newsigs.ri_down == oldsigs.ri_down &&
2050 cnow.exithunt == cprev.exithunt &&
2051 cnow.rxidle == cprev.rxidle) {
2052 rc = -EIO;
2053 break;
2054 }
2055
2056 events = mask &
2057 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2058 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2059 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2060 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2061 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2062 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2063 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2064 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2065 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2066 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2067 if (events)
2068 break;
2069
2070 cprev = cnow;
2071 oldsigs = newsigs;
2072 }
2073
2074 remove_wait_queue(&info->event_wait_q, &wait);
2075 set_current_state(TASK_RUNNING);
2076
2077 if (mask & MgslEvent_ExitHuntMode) {
2078 spin_lock_irqsave(&info->lock,flags);
2079 if (!waitqueue_active(&info->event_wait_q))
2080 irq_disable(info, CHA, IRQ_EXITHUNT);
2081 spin_unlock_irqrestore(&info->lock,flags);
2082 }
2083 exit:
2084 if (rc == 0)
2085 PUT_USER(rc, events, mask_ptr);
2086 return rc;
2087 }
2088
2089 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2090 {
2091 unsigned long flags;
2092 int rc;
2093 struct mgsl_icount cprev, cnow;
2094 DECLARE_WAITQUEUE(wait, current);
2095
2096 /* save current irq counts */
2097 spin_lock_irqsave(&info->lock,flags);
2098 cprev = info->icount;
2099 add_wait_queue(&info->status_event_wait_q, &wait);
2100 set_current_state(TASK_INTERRUPTIBLE);
2101 spin_unlock_irqrestore(&info->lock,flags);
2102
2103 for(;;) {
2104 schedule();
2105 if (signal_pending(current)) {
2106 rc = -ERESTARTSYS;
2107 break;
2108 }
2109
2110 /* get new irq counts */
2111 spin_lock_irqsave(&info->lock,flags);
2112 cnow = info->icount;
2113 set_current_state(TASK_INTERRUPTIBLE);
2114 spin_unlock_irqrestore(&info->lock,flags);
2115
2116 /* if no change, wait aborted for some reason */
2117 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2118 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2119 rc = -EIO;
2120 break;
2121 }
2122
2123 /* check for change in caller specified modem input */
2124 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2125 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2126 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2127 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2128 rc = 0;
2129 break;
2130 }
2131
2132 cprev = cnow;
2133 }
2134 remove_wait_queue(&info->status_event_wait_q, &wait);
2135 set_current_state(TASK_RUNNING);
2136 return rc;
2137 }
2138
2139 /* return the state of the serial control and status signals
2140 */
2141 static int tiocmget(struct tty_struct *tty, struct file *file)
2142 {
2143 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2144 unsigned int result;
2145 unsigned long flags;
2146
2147 spin_lock_irqsave(&info->lock,flags);
2148 get_signals(info);
2149 spin_unlock_irqrestore(&info->lock,flags);
2150
2151 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2152 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2153 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2154 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2155 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2156 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2157
2158 if (debug_level >= DEBUG_LEVEL_INFO)
2159 printk("%s(%d):%s tiocmget() value=%08X\n",
2160 __FILE__,__LINE__, info->device_name, result );
2161 return result;
2162 }
2163
2164 /* set modem control signals (DTR/RTS)
2165 */
2166 static int tiocmset(struct tty_struct *tty, struct file *file,
2167 unsigned int set, unsigned int clear)
2168 {
2169 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2170 unsigned long flags;
2171
2172 if (debug_level >= DEBUG_LEVEL_INFO)
2173 printk("%s(%d):%s tiocmset(%x,%x)\n",
2174 __FILE__,__LINE__,info->device_name, set, clear);
2175
2176 if (set & TIOCM_RTS)
2177 info->serial_signals |= SerialSignal_RTS;
2178 if (set & TIOCM_DTR)
2179 info->serial_signals |= SerialSignal_DTR;
2180 if (clear & TIOCM_RTS)
2181 info->serial_signals &= ~SerialSignal_RTS;
2182 if (clear & TIOCM_DTR)
2183 info->serial_signals &= ~SerialSignal_DTR;
2184
2185 spin_lock_irqsave(&info->lock,flags);
2186 set_signals(info);
2187 spin_unlock_irqrestore(&info->lock,flags);
2188
2189 return 0;
2190 }
2191
2192 /* Set or clear transmit break condition
2193 *
2194 * Arguments: tty pointer to tty instance data
2195 * break_state -1=set break condition, 0=clear
2196 */
2197 static int mgslpc_break(struct tty_struct *tty, int break_state)
2198 {
2199 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2200 unsigned long flags;
2201
2202 if (debug_level >= DEBUG_LEVEL_INFO)
2203 printk("%s(%d):mgslpc_break(%s,%d)\n",
2204 __FILE__,__LINE__, info->device_name, break_state);
2205
2206 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2207 return -EINVAL;
2208
2209 spin_lock_irqsave(&info->lock,flags);
2210 if (break_state == -1)
2211 set_reg_bits(info, CHA+DAFO, BIT6);
2212 else
2213 clear_reg_bits(info, CHA+DAFO, BIT6);
2214 spin_unlock_irqrestore(&info->lock,flags);
2215 return 0;
2216 }
2217
2218 static int mgslpc_get_icount(struct tty_struct *tty,
2219 struct serial_icounter_struct *icount)
2220 {
2221 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2222 struct mgsl_icount cnow; /* kernel counter temps */
2223 unsigned long flags;
2224
2225 spin_lock_irqsave(&info->lock,flags);
2226 cnow = info->icount;
2227 spin_unlock_irqrestore(&info->lock,flags);
2228
2229 icount->cts = cnow.cts;
2230 icount->dsr = cnow.dsr;
2231 icount->rng = cnow.rng;
2232 icount->dcd = cnow.dcd;
2233 icount->rx = cnow.rx;
2234 icount->tx = cnow.tx;
2235 icount->frame = cnow.frame;
2236 icount->overrun = cnow.overrun;
2237 icount->parity = cnow.parity;
2238 icount->brk = cnow.brk;
2239 icount->buf_overrun = cnow.buf_overrun;
2240
2241 return 0;
2242 }
2243
2244 /* Service an IOCTL request
2245 *
2246 * Arguments:
2247 *
2248 * tty pointer to tty instance data
2249 * file pointer to associated file object for device
2250 * cmd IOCTL command code
2251 * arg command argument/context
2252 *
2253 * Return Value: 0 if success, otherwise error code
2254 */
2255 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2256 unsigned int cmd, unsigned long arg)
2257 {
2258 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2259 void __user *argp = (void __user *)arg;
2260
2261 if (debug_level >= DEBUG_LEVEL_INFO)
2262 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2263 info->device_name, cmd );
2264
2265 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2266 return -ENODEV;
2267
2268 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2269 (cmd != TIOCMIWAIT)) {
2270 if (tty->flags & (1 << TTY_IO_ERROR))
2271 return -EIO;
2272 }
2273
2274 switch (cmd) {
2275 case MGSL_IOCGPARAMS:
2276 return get_params(info, argp);
2277 case MGSL_IOCSPARAMS:
2278 return set_params(info, argp, tty);
2279 case MGSL_IOCGTXIDLE:
2280 return get_txidle(info, argp);
2281 case MGSL_IOCSTXIDLE:
2282 return set_txidle(info, (int)arg);
2283 case MGSL_IOCGIF:
2284 return get_interface(info, argp);
2285 case MGSL_IOCSIF:
2286 return set_interface(info,(int)arg);
2287 case MGSL_IOCTXENABLE:
2288 return set_txenable(info,(int)arg, tty);
2289 case MGSL_IOCRXENABLE:
2290 return set_rxenable(info,(int)arg);
2291 case MGSL_IOCTXABORT:
2292 return tx_abort(info);
2293 case MGSL_IOCGSTATS:
2294 return get_stats(info, argp);
2295 case MGSL_IOCWAITEVENT:
2296 return wait_events(info, argp);
2297 case TIOCMIWAIT:
2298 return modem_input_wait(info,(int)arg);
2299 default:
2300 return -ENOIOCTLCMD;
2301 }
2302 return 0;
2303 }
2304
2305 /* Set new termios settings
2306 *
2307 * Arguments:
2308 *
2309 * tty pointer to tty structure
2310 * termios pointer to buffer to hold returned old termios
2311 */
2312 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2313 {
2314 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2315 unsigned long flags;
2316
2317 if (debug_level >= DEBUG_LEVEL_INFO)
2318 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2319 tty->driver->name );
2320
2321 /* just return if nothing has changed */
2322 if ((tty->termios->c_cflag == old_termios->c_cflag)
2323 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2324 == RELEVANT_IFLAG(old_termios->c_iflag)))
2325 return;
2326
2327 mgslpc_change_params(info, tty);
2328
2329 /* Handle transition to B0 status */
2330 if (old_termios->c_cflag & CBAUD &&
2331 !(tty->termios->c_cflag & CBAUD)) {
2332 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2333 spin_lock_irqsave(&info->lock,flags);
2334 set_signals(info);
2335 spin_unlock_irqrestore(&info->lock,flags);
2336 }
2337
2338 /* Handle transition away from B0 status */
2339 if (!(old_termios->c_cflag & CBAUD) &&
2340 tty->termios->c_cflag & CBAUD) {
2341 info->serial_signals |= SerialSignal_DTR;
2342 if (!(tty->termios->c_cflag & CRTSCTS) ||
2343 !test_bit(TTY_THROTTLED, &tty->flags)) {
2344 info->serial_signals |= SerialSignal_RTS;
2345 }
2346 spin_lock_irqsave(&info->lock,flags);
2347 set_signals(info);
2348 spin_unlock_irqrestore(&info->lock,flags);
2349 }
2350
2351 /* Handle turning off CRTSCTS */
2352 if (old_termios->c_cflag & CRTSCTS &&
2353 !(tty->termios->c_cflag & CRTSCTS)) {
2354 tty->hw_stopped = 0;
2355 tx_release(tty);
2356 }
2357 }
2358
2359 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2360 {
2361 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2362 struct tty_port *port = &info->port;
2363
2364 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2365 return;
2366
2367 if (debug_level >= DEBUG_LEVEL_INFO)
2368 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2369 __FILE__,__LINE__, info->device_name, port->count);
2370
2371 WARN_ON(!port->count);
2372
2373 if (tty_port_close_start(port, tty, filp) == 0)
2374 goto cleanup;
2375
2376 if (port->flags & ASYNC_INITIALIZED)
2377 mgslpc_wait_until_sent(tty, info->timeout);
2378
2379 mgslpc_flush_buffer(tty);
2380
2381 tty_ldisc_flush(tty);
2382 shutdown(info, tty);
2383
2384 tty_port_close_end(port, tty);
2385 tty_port_tty_set(port, NULL);
2386 cleanup:
2387 if (debug_level >= DEBUG_LEVEL_INFO)
2388 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2389 tty->driver->name, port->count);
2390 }
2391
2392 /* Wait until the transmitter is empty.
2393 */
2394 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2395 {
2396 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2397 unsigned long orig_jiffies, char_time;
2398
2399 if (!info )
2400 return;
2401
2402 if (debug_level >= DEBUG_LEVEL_INFO)
2403 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2404 __FILE__,__LINE__, info->device_name );
2405
2406 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2407 return;
2408
2409 if (!(info->port.flags & ASYNC_INITIALIZED))
2410 goto exit;
2411
2412 orig_jiffies = jiffies;
2413
2414 /* Set check interval to 1/5 of estimated time to
2415 * send a character, and make it at least 1. The check
2416 * interval should also be less than the timeout.
2417 * Note: use tight timings here to satisfy the NIST-PCTS.
2418 */
2419
2420 if ( info->params.data_rate ) {
2421 char_time = info->timeout/(32 * 5);
2422 if (!char_time)
2423 char_time++;
2424 } else
2425 char_time = 1;
2426
2427 if (timeout)
2428 char_time = min_t(unsigned long, char_time, timeout);
2429
2430 if (info->params.mode == MGSL_MODE_HDLC) {
2431 while (info->tx_active) {
2432 msleep_interruptible(jiffies_to_msecs(char_time));
2433 if (signal_pending(current))
2434 break;
2435 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2436 break;
2437 }
2438 } else {
2439 while ((info->tx_count || info->tx_active) &&
2440 info->tx_enabled) {
2441 msleep_interruptible(jiffies_to_msecs(char_time));
2442 if (signal_pending(current))
2443 break;
2444 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2445 break;
2446 }
2447 }
2448
2449 exit:
2450 if (debug_level >= DEBUG_LEVEL_INFO)
2451 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2452 __FILE__,__LINE__, info->device_name );
2453 }
2454
2455 /* Called by tty_hangup() when a hangup is signaled.
2456 * This is the same as closing all open files for the port.
2457 */
2458 static void mgslpc_hangup(struct tty_struct *tty)
2459 {
2460 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2461
2462 if (debug_level >= DEBUG_LEVEL_INFO)
2463 printk("%s(%d):mgslpc_hangup(%s)\n",
2464 __FILE__,__LINE__, info->device_name );
2465
2466 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2467 return;
2468
2469 mgslpc_flush_buffer(tty);
2470 shutdown(info, tty);
2471 tty_port_hangup(&info->port);
2472 }
2473
2474 static int carrier_raised(struct tty_port *port)
2475 {
2476 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2477 unsigned long flags;
2478
2479 spin_lock_irqsave(&info->lock,flags);
2480 get_signals(info);
2481 spin_unlock_irqrestore(&info->lock,flags);
2482
2483 if (info->serial_signals & SerialSignal_DCD)
2484 return 1;
2485 return 0;
2486 }
2487
2488 static void dtr_rts(struct tty_port *port, int onoff)
2489 {
2490 MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
2491 unsigned long flags;
2492
2493 spin_lock_irqsave(&info->lock,flags);
2494 if (onoff)
2495 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2496 else
2497 info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
2498 set_signals(info);
2499 spin_unlock_irqrestore(&info->lock,flags);
2500 }
2501
2502
2503 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2504 {
2505 MGSLPC_INFO *info;
2506 struct tty_port *port;
2507 int retval, line;
2508 unsigned long flags;
2509
2510 /* verify range of specified line number */
2511 line = tty->index;
2512 if ((line < 0) || (line >= mgslpc_device_count)) {
2513 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2514 __FILE__,__LINE__,line);
2515 return -ENODEV;
2516 }
2517
2518 /* find the info structure for the specified line */
2519 info = mgslpc_device_list;
2520 while(info && info->line != line)
2521 info = info->next_device;
2522 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2523 return -ENODEV;
2524
2525 port = &info->port;
2526 tty->driver_data = info;
2527 tty_port_tty_set(port, tty);
2528
2529 if (debug_level >= DEBUG_LEVEL_INFO)
2530 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2531 __FILE__,__LINE__,tty->driver->name, port->count);
2532
2533 /* If port is closing, signal caller to try again */
2534 if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
2535 if (port->flags & ASYNC_CLOSING)
2536 interruptible_sleep_on(&port->close_wait);
2537 retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
2538 -EAGAIN : -ERESTARTSYS);
2539 goto cleanup;
2540 }
2541
2542 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2543
2544 spin_lock_irqsave(&info->netlock, flags);
2545 if (info->netcount) {
2546 retval = -EBUSY;
2547 spin_unlock_irqrestore(&info->netlock, flags);
2548 goto cleanup;
2549 }
2550 spin_lock(&port->lock);
2551 port->count++;
2552 spin_unlock(&port->lock);
2553 spin_unlock_irqrestore(&info->netlock, flags);
2554
2555 if (port->count == 1) {
2556 /* 1st open on this device, init hardware */
2557 retval = startup(info, tty);
2558 if (retval < 0)
2559 goto cleanup;
2560 }
2561
2562 retval = tty_port_block_til_ready(&info->port, tty, filp);
2563 if (retval) {
2564 if (debug_level >= DEBUG_LEVEL_INFO)
2565 printk("%s(%d):block_til_ready(%s) returned %d\n",
2566 __FILE__,__LINE__, info->device_name, retval);
2567 goto cleanup;
2568 }
2569
2570 if (debug_level >= DEBUG_LEVEL_INFO)
2571 printk("%s(%d):mgslpc_open(%s) success\n",
2572 __FILE__,__LINE__, info->device_name);
2573 retval = 0;
2574
2575 cleanup:
2576 return retval;
2577 }
2578
2579 /*
2580 * /proc fs routines....
2581 */
2582
2583 static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
2584 {
2585 char stat_buf[30];
2586 unsigned long flags;
2587
2588 seq_printf(m, "%s:io:%04X irq:%d",
2589 info->device_name, info->io_base, info->irq_level);
2590
2591 /* output current serial signal states */
2592 spin_lock_irqsave(&info->lock,flags);
2593 get_signals(info);
2594 spin_unlock_irqrestore(&info->lock,flags);
2595
2596 stat_buf[0] = 0;
2597 stat_buf[1] = 0;
2598 if (info->serial_signals & SerialSignal_RTS)
2599 strcat(stat_buf, "|RTS");
2600 if (info->serial_signals & SerialSignal_CTS)
2601 strcat(stat_buf, "|CTS");
2602 if (info->serial_signals & SerialSignal_DTR)
2603 strcat(stat_buf, "|DTR");
2604 if (info->serial_signals & SerialSignal_DSR)
2605 strcat(stat_buf, "|DSR");
2606 if (info->serial_signals & SerialSignal_DCD)
2607 strcat(stat_buf, "|CD");
2608 if (info->serial_signals & SerialSignal_RI)
2609 strcat(stat_buf, "|RI");
2610
2611 if (info->params.mode == MGSL_MODE_HDLC) {
2612 seq_printf(m, " HDLC txok:%d rxok:%d",
2613 info->icount.txok, info->icount.rxok);
2614 if (info->icount.txunder)
2615 seq_printf(m, " txunder:%d", info->icount.txunder);
2616 if (info->icount.txabort)
2617 seq_printf(m, " txabort:%d", info->icount.txabort);
2618 if (info->icount.rxshort)
2619 seq_printf(m, " rxshort:%d", info->icount.rxshort);
2620 if (info->icount.rxlong)
2621 seq_printf(m, " rxlong:%d", info->icount.rxlong);
2622 if (info->icount.rxover)
2623 seq_printf(m, " rxover:%d", info->icount.rxover);
2624 if (info->icount.rxcrc)
2625 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
2626 } else {
2627 seq_printf(m, " ASYNC tx:%d rx:%d",
2628 info->icount.tx, info->icount.rx);
2629 if (info->icount.frame)
2630 seq_printf(m, " fe:%d", info->icount.frame);
2631 if (info->icount.parity)
2632 seq_printf(m, " pe:%d", info->icount.parity);
2633 if (info->icount.brk)
2634 seq_printf(m, " brk:%d", info->icount.brk);
2635 if (info->icount.overrun)
2636 seq_printf(m, " oe:%d", info->icount.overrun);
2637 }
2638
2639 /* Append serial signal status to end */
2640 seq_printf(m, " %s\n", stat_buf+1);
2641
2642 seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2643 info->tx_active,info->bh_requested,info->bh_running,
2644 info->pending_bh);
2645 }
2646
2647 /* Called to print information about devices
2648 */
2649 static int mgslpc_proc_show(struct seq_file *m, void *v)
2650 {
2651 MGSLPC_INFO *info;
2652
2653 seq_printf(m, "synclink driver:%s\n", driver_version);
2654
2655 info = mgslpc_device_list;
2656 while( info ) {
2657 line_info(m, info);
2658 info = info->next_device;
2659 }
2660 return 0;
2661 }
2662
2663 static int mgslpc_proc_open(struct inode *inode, struct file *file)
2664 {
2665 return single_open(file, mgslpc_proc_show, NULL);
2666 }
2667
2668 static const struct file_operations mgslpc_proc_fops = {
2669 .owner = THIS_MODULE,
2670 .open = mgslpc_proc_open,
2671 .read = seq_read,
2672 .llseek = seq_lseek,
2673 .release = single_release,
2674 };
2675
2676 static int rx_alloc_buffers(MGSLPC_INFO *info)
2677 {
2678 /* each buffer has header and data */
2679 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2680
2681 /* calculate total allocation size for 8 buffers */
2682 info->rx_buf_total_size = info->rx_buf_size * 8;
2683
2684 /* limit total allocated memory */
2685 if (info->rx_buf_total_size > 0x10000)
2686 info->rx_buf_total_size = 0x10000;
2687
2688 /* calculate number of buffers */
2689 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2690
2691 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2692 if (info->rx_buf == NULL)
2693 return -ENOMEM;
2694
2695 rx_reset_buffers(info);
2696 return 0;
2697 }
2698
2699 static void rx_free_buffers(MGSLPC_INFO *info)
2700 {
2701 kfree(info->rx_buf);
2702 info->rx_buf = NULL;
2703 }
2704
2705 static int claim_resources(MGSLPC_INFO *info)
2706 {
2707 if (rx_alloc_buffers(info) < 0 ) {
2708 printk( "Cant allocate rx buffer %s\n", info->device_name);
2709 release_resources(info);
2710 return -ENODEV;
2711 }
2712 return 0;
2713 }
2714
2715 static void release_resources(MGSLPC_INFO *info)
2716 {
2717 if (debug_level >= DEBUG_LEVEL_INFO)
2718 printk("release_resources(%s)\n", info->device_name);
2719 rx_free_buffers(info);
2720 }
2721
2722 /* Add the specified device instance data structure to the
2723 * global linked list of devices and increment the device count.
2724 *
2725 * Arguments: info pointer to device instance data
2726 */
2727 static void mgslpc_add_device(MGSLPC_INFO *info)
2728 {
2729 info->next_device = NULL;
2730 info->line = mgslpc_device_count;
2731 sprintf(info->device_name,"ttySLP%d",info->line);
2732
2733 if (info->line < MAX_DEVICE_COUNT) {
2734 if (maxframe[info->line])
2735 info->max_frame_size = maxframe[info->line];
2736 }
2737
2738 mgslpc_device_count++;
2739
2740 if (!mgslpc_device_list)
2741 mgslpc_device_list = info;
2742 else {
2743 MGSLPC_INFO *current_dev = mgslpc_device_list;
2744 while( current_dev->next_device )
2745 current_dev = current_dev->next_device;
2746 current_dev->next_device = info;
2747 }
2748
2749 if (info->max_frame_size < 4096)
2750 info->max_frame_size = 4096;
2751 else if (info->max_frame_size > 65535)
2752 info->max_frame_size = 65535;
2753
2754 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2755 info->device_name, info->io_base, info->irq_level);
2756
2757 #if SYNCLINK_GENERIC_HDLC
2758 hdlcdev_init(info);
2759 #endif
2760 }
2761
2762 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2763 {
2764 MGSLPC_INFO *info = mgslpc_device_list;
2765 MGSLPC_INFO *last = NULL;
2766
2767 while(info) {
2768 if (info == remove_info) {
2769 if (last)
2770 last->next_device = info->next_device;
2771 else
2772 mgslpc_device_list = info->next_device;
2773 #if SYNCLINK_GENERIC_HDLC
2774 hdlcdev_exit(info);
2775 #endif
2776 release_resources(info);
2777 kfree(info);
2778 mgslpc_device_count--;
2779 return;
2780 }
2781 last = info;
2782 info = info->next_device;
2783 }
2784 }
2785
2786 static struct pcmcia_device_id mgslpc_ids[] = {
2787 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2788 PCMCIA_DEVICE_NULL
2789 };
2790 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2791
2792 static struct pcmcia_driver mgslpc_driver = {
2793 .owner = THIS_MODULE,
2794 .drv = {
2795 .name = "synclink_cs",
2796 },
2797 .probe = mgslpc_probe,
2798 .remove = mgslpc_detach,
2799 .id_table = mgslpc_ids,
2800 .suspend = mgslpc_suspend,
2801 .resume = mgslpc_resume,
2802 };
2803
2804 static const struct tty_operations mgslpc_ops = {
2805 .open = mgslpc_open,
2806 .close = mgslpc_close,
2807 .write = mgslpc_write,
2808 .put_char = mgslpc_put_char,
2809 .flush_chars = mgslpc_flush_chars,
2810 .write_room = mgslpc_write_room,
2811 .chars_in_buffer = mgslpc_chars_in_buffer,
2812 .flush_buffer = mgslpc_flush_buffer,
2813 .ioctl = mgslpc_ioctl,
2814 .throttle = mgslpc_throttle,
2815 .unthrottle = mgslpc_unthrottle,
2816 .send_xchar = mgslpc_send_xchar,
2817 .break_ctl = mgslpc_break,
2818 .wait_until_sent = mgslpc_wait_until_sent,
2819 .set_termios = mgslpc_set_termios,
2820 .stop = tx_pause,
2821 .start = tx_release,
2822 .hangup = mgslpc_hangup,
2823 .tiocmget = tiocmget,
2824 .tiocmset = tiocmset,
2825 .proc_fops = &mgslpc_proc_fops,
2826 };
2827
2828 static void synclink_cs_cleanup(void)
2829 {
2830 int rc;
2831
2832 printk("Unloading %s: version %s\n", driver_name, driver_version);
2833
2834 while(mgslpc_device_list)
2835 mgslpc_remove_device(mgslpc_device_list);
2836
2837 if (serial_driver) {
2838 if ((rc = tty_unregister_driver(serial_driver)))
2839 printk("%s(%d) failed to unregister tty driver err=%d\n",
2840 __FILE__,__LINE__,rc);
2841 put_tty_driver(serial_driver);
2842 }
2843
2844 pcmcia_unregister_driver(&mgslpc_driver);
2845 }
2846
2847 static int __init synclink_cs_init(void)
2848 {
2849 int rc;
2850
2851 if (break_on_load) {
2852 mgslpc_get_text_ptr();
2853 BREAKPOINT();
2854 }
2855
2856 printk("%s %s\n", driver_name, driver_version);
2857
2858 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
2859 return rc;
2860
2861 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
2862 if (!serial_driver) {
2863 rc = -ENOMEM;
2864 goto error;
2865 }
2866
2867 /* Initialize the tty_driver structure */
2868
2869 serial_driver->owner = THIS_MODULE;
2870 serial_driver->driver_name = "synclink_cs";
2871 serial_driver->name = "ttySLP";
2872 serial_driver->major = ttymajor;
2873 serial_driver->minor_start = 64;
2874 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2875 serial_driver->subtype = SERIAL_TYPE_NORMAL;
2876 serial_driver->init_termios = tty_std_termios;
2877 serial_driver->init_termios.c_cflag =
2878 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2879 serial_driver->flags = TTY_DRIVER_REAL_RAW;
2880 tty_set_operations(serial_driver, &mgslpc_ops);
2881
2882 if ((rc = tty_register_driver(serial_driver)) < 0) {
2883 printk("%s(%d):Couldn't register serial driver\n",
2884 __FILE__,__LINE__);
2885 put_tty_driver(serial_driver);
2886 serial_driver = NULL;
2887 goto error;
2888 }
2889
2890 printk("%s %s, tty major#%d\n",
2891 driver_name, driver_version,
2892 serial_driver->major);
2893
2894 return 0;
2895
2896 error:
2897 synclink_cs_cleanup();
2898 return rc;
2899 }
2900
2901 static void __exit synclink_cs_exit(void)
2902 {
2903 synclink_cs_cleanup();
2904 }
2905
2906 module_init(synclink_cs_init);
2907 module_exit(synclink_cs_exit);
2908
2909 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
2910 {
2911 unsigned int M, N;
2912 unsigned char val;
2913
2914 /* note:standard BRG mode is broken in V3.2 chip
2915 * so enhanced mode is always used
2916 */
2917
2918 if (rate) {
2919 N = 3686400 / rate;
2920 if (!N)
2921 N = 1;
2922 N >>= 1;
2923 for (M = 1; N > 64 && M < 16; M++)
2924 N >>= 1;
2925 N--;
2926
2927 /* BGR[5..0] = N
2928 * BGR[9..6] = M
2929 * BGR[7..0] contained in BGR register
2930 * BGR[9..8] contained in CCR2[7..6]
2931 * divisor = (N+1)*2^M
2932 *
2933 * Note: M *must* not be zero (causes asymetric duty cycle)
2934 */
2935 write_reg(info, (unsigned char) (channel + BGR),
2936 (unsigned char) ((M << 6) + N));
2937 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
2938 val |= ((M << 4) & 0xc0);
2939 write_reg(info, (unsigned char) (channel + CCR2), val);
2940 }
2941 }
2942
2943 /* Enabled the AUX clock output at the specified frequency.
2944 */
2945 static void enable_auxclk(MGSLPC_INFO *info)
2946 {
2947 unsigned char val;
2948
2949 /* MODE
2950 *
2951 * 07..06 MDS[1..0] 10 = transparent HDLC mode
2952 * 05 ADM Address Mode, 0 = no addr recognition
2953 * 04 TMD Timer Mode, 0 = external
2954 * 03 RAC Receiver Active, 0 = inactive
2955 * 02 RTS 0=RTS active during xmit, 1=RTS always active
2956 * 01 TRS Timer Resolution, 1=512
2957 * 00 TLP Test Loop, 0 = no loop
2958 *
2959 * 1000 0010
2960 */
2961 val = 0x82;
2962
2963 /* channel B RTS is used to enable AUXCLK driver on SP505 */
2964 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
2965 val |= BIT2;
2966 write_reg(info, CHB + MODE, val);
2967
2968 /* CCR0
2969 *
2970 * 07 PU Power Up, 1=active, 0=power down
2971 * 06 MCE Master Clock Enable, 1=enabled
2972 * 05 Reserved, 0
2973 * 04..02 SC[2..0] Encoding
2974 * 01..00 SM[1..0] Serial Mode, 00=HDLC
2975 *
2976 * 11000000
2977 */
2978 write_reg(info, CHB + CCR0, 0xc0);
2979
2980 /* CCR1
2981 *
2982 * 07 SFLG Shared Flag, 0 = disable shared flags
2983 * 06 GALP Go Active On Loop, 0 = not used
2984 * 05 GLP Go On Loop, 0 = not used
2985 * 04 ODS Output Driver Select, 1=TxD is push-pull output
2986 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
2987 * 02..00 CM[2..0] Clock Mode
2988 *
2989 * 0001 0111
2990 */
2991 write_reg(info, CHB + CCR1, 0x17);
2992
2993 /* CCR2 (Channel B)
2994 *
2995 * 07..06 BGR[9..8] Baud rate bits 9..8
2996 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
2997 * 04 SSEL Clock source select, 1=submode b
2998 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
2999 * 02 RWX Read/Write Exchange 0=disabled
3000 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3001 * 00 DIV, data inversion 0=disabled, 1=enabled
3002 *
3003 * 0011 1000
3004 */
3005 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3006 write_reg(info, CHB + CCR2, 0x38);
3007 else
3008 write_reg(info, CHB + CCR2, 0x30);
3009
3010 /* CCR4
3011 *
3012 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3013 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3014 * 05 TST1 Test Pin, 0=normal operation
3015 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3016 * 03..02 Reserved, must be 0
3017 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3018 *
3019 * 0101 0000
3020 */
3021 write_reg(info, CHB + CCR4, 0x50);
3022
3023 /* if auxclk not enabled, set internal BRG so
3024 * CTS transitions can be detected (requires TxC)
3025 */
3026 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3027 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3028 else
3029 mgslpc_set_rate(info, CHB, 921600);
3030 }
3031
3032 static void loopback_enable(MGSLPC_INFO *info)
3033 {
3034 unsigned char val;
3035
3036 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3037 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3038 write_reg(info, CHA + CCR1, val);
3039
3040 /* CCR2:04 SSEL Clock source select, 1=submode b */
3041 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3042 write_reg(info, CHA + CCR2, val);
3043
3044 /* set LinkSpeed if available, otherwise default to 2Mbps */
3045 if (info->params.clock_speed)
3046 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3047 else
3048 mgslpc_set_rate(info, CHA, 1843200);
3049
3050 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3051 val = read_reg(info, CHA + MODE) | BIT0;
3052 write_reg(info, CHA + MODE, val);
3053 }
3054
3055 static void hdlc_mode(MGSLPC_INFO *info)
3056 {
3057 unsigned char val;
3058 unsigned char clkmode, clksubmode;
3059
3060 /* disable all interrupts */
3061 irq_disable(info, CHA, 0xffff);
3062 irq_disable(info, CHB, 0xffff);
3063 port_irq_disable(info, 0xff);
3064
3065 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3066 clkmode = clksubmode = 0;
3067 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3068 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3069 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3070 clkmode = 7;
3071 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3072 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3073 /* clock mode 7b, rcv = BRG, xmt = BRG */
3074 clkmode = 7;
3075 clksubmode = 1;
3076 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3077 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3078 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3079 clkmode = 6;
3080 clksubmode = 1;
3081 } else {
3082 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3083 clkmode = 6;
3084 }
3085 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3086 /* clock mode 0b, rcv = RxC, xmt = BRG */
3087 clksubmode = 1;
3088 }
3089
3090 /* MODE
3091 *
3092 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3093 * 05 ADM Address Mode, 0 = no addr recognition
3094 * 04 TMD Timer Mode, 0 = external
3095 * 03 RAC Receiver Active, 0 = inactive
3096 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3097 * 01 TRS Timer Resolution, 1=512
3098 * 00 TLP Test Loop, 0 = no loop
3099 *
3100 * 1000 0010
3101 */
3102 val = 0x82;
3103 if (info->params.loopback)
3104 val |= BIT0;
3105
3106 /* preserve RTS state */
3107 if (info->serial_signals & SerialSignal_RTS)
3108 val |= BIT2;
3109 write_reg(info, CHA + MODE, val);
3110
3111 /* CCR0
3112 *
3113 * 07 PU Power Up, 1=active, 0=power down
3114 * 06 MCE Master Clock Enable, 1=enabled
3115 * 05 Reserved, 0
3116 * 04..02 SC[2..0] Encoding
3117 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3118 *
3119 * 11000000
3120 */
3121 val = 0xc0;
3122 switch (info->params.encoding)
3123 {
3124 case HDLC_ENCODING_NRZI:
3125 val |= BIT3;
3126 break;
3127 case HDLC_ENCODING_BIPHASE_SPACE:
3128 val |= BIT4;
3129 break; // FM0
3130 case HDLC_ENCODING_BIPHASE_MARK:
3131 val |= BIT4 + BIT2;
3132 break; // FM1
3133 case HDLC_ENCODING_BIPHASE_LEVEL:
3134 val |= BIT4 + BIT3;
3135 break; // Manchester
3136 }
3137 write_reg(info, CHA + CCR0, val);
3138
3139 /* CCR1
3140 *
3141 * 07 SFLG Shared Flag, 0 = disable shared flags
3142 * 06 GALP Go Active On Loop, 0 = not used
3143 * 05 GLP Go On Loop, 0 = not used
3144 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3145 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3146 * 02..00 CM[2..0] Clock Mode
3147 *
3148 * 0001 0000
3149 */
3150 val = 0x10 + clkmode;
3151 write_reg(info, CHA + CCR1, val);
3152
3153 /* CCR2
3154 *
3155 * 07..06 BGR[9..8] Baud rate bits 9..8
3156 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3157 * 04 SSEL Clock source select, 1=submode b
3158 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3159 * 02 RWX Read/Write Exchange 0=disabled
3160 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3161 * 00 DIV, data inversion 0=disabled, 1=enabled
3162 *
3163 * 0000 0000
3164 */
3165 val = 0x00;
3166 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3167 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3168 val |= BIT5;
3169 if (clksubmode)
3170 val |= BIT4;
3171 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3172 val |= BIT1;
3173 if (info->params.encoding == HDLC_ENCODING_NRZB)
3174 val |= BIT0;
3175 write_reg(info, CHA + CCR2, val);
3176
3177 /* CCR3
3178 *
3179 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3180 * 05 EPT Enable preamble transmission, 1=enabled
3181 * 04 RADD Receive address pushed to FIFO, 0=disabled
3182 * 03 CRL CRC Reset Level, 0=FFFF
3183 * 02 RCRC Rx CRC 0=On 1=Off
3184 * 01 TCRC Tx CRC 0=On 1=Off
3185 * 00 PSD DPLL Phase Shift Disable
3186 *
3187 * 0000 0000
3188 */
3189 val = 0x00;
3190 if (info->params.crc_type == HDLC_CRC_NONE)
3191 val |= BIT2 + BIT1;
3192 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3193 val |= BIT5;
3194 switch (info->params.preamble_length)
3195 {
3196 case HDLC_PREAMBLE_LENGTH_16BITS:
3197 val |= BIT6;
3198 break;
3199 case HDLC_PREAMBLE_LENGTH_32BITS:
3200 val |= BIT6;
3201 break;
3202 case HDLC_PREAMBLE_LENGTH_64BITS:
3203 val |= BIT7 + BIT6;
3204 break;
3205 }
3206 write_reg(info, CHA + CCR3, val);
3207
3208 /* PRE - Preamble pattern */
3209 val = 0;
3210 switch (info->params.preamble)
3211 {
3212 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3213 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3214 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3215 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3216 }
3217 write_reg(info, CHA + PRE, val);
3218
3219 /* CCR4
3220 *
3221 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3222 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3223 * 05 TST1 Test Pin, 0=normal operation
3224 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3225 * 03..02 Reserved, must be 0
3226 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3227 *
3228 * 0101 0000
3229 */
3230 val = 0x50;
3231 write_reg(info, CHA + CCR4, val);
3232 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3233 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3234 else
3235 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3236
3237 /* RLCR Receive length check register
3238 *
3239 * 7 1=enable receive length check
3240 * 6..0 Max frame length = (RL + 1) * 32
3241 */
3242 write_reg(info, CHA + RLCR, 0);
3243
3244 /* XBCH Transmit Byte Count High
3245 *
3246 * 07 DMA mode, 0 = interrupt driven
3247 * 06 NRM, 0=ABM (ignored)
3248 * 05 CAS Carrier Auto Start
3249 * 04 XC Transmit Continuously (ignored)
3250 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3251 *
3252 * 0000 0000
3253 */
3254 val = 0x00;
3255 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3256 val |= BIT5;
3257 write_reg(info, CHA + XBCH, val);
3258 enable_auxclk(info);
3259 if (info->params.loopback || info->testing_irq)
3260 loopback_enable(info);
3261 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3262 {
3263 irq_enable(info, CHB, IRQ_CTS);
3264 /* PVR[3] 1=AUTO CTS active */
3265 set_reg_bits(info, CHA + PVR, BIT3);
3266 } else
3267 clear_reg_bits(info, CHA + PVR, BIT3);
3268
3269 irq_enable(info, CHA,
3270 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3271 IRQ_UNDERRUN + IRQ_TXFIFO);
3272 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3273 wait_command_complete(info, CHA);
3274 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3275
3276 /* Master clock mode enabled above to allow reset commands
3277 * to complete even if no data clocks are present.
3278 *
3279 * Disable master clock mode for normal communications because
3280 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3281 * IRQ when in master clock mode.
3282 *
3283 * Leave master clock mode enabled for IRQ test because the
3284 * timer IRQ used by the test can only happen in master clock mode.
3285 */
3286 if (!info->testing_irq)
3287 clear_reg_bits(info, CHA + CCR0, BIT6);
3288
3289 tx_set_idle(info);
3290
3291 tx_stop(info);
3292 rx_stop(info);
3293 }
3294
3295 static void rx_stop(MGSLPC_INFO *info)
3296 {
3297 if (debug_level >= DEBUG_LEVEL_ISR)
3298 printk("%s(%d):rx_stop(%s)\n",
3299 __FILE__,__LINE__, info->device_name );
3300
3301 /* MODE:03 RAC Receiver Active, 0=inactive */
3302 clear_reg_bits(info, CHA + MODE, BIT3);
3303
3304 info->rx_enabled = false;
3305 info->rx_overflow = false;
3306 }
3307
3308 static void rx_start(MGSLPC_INFO *info)
3309 {
3310 if (debug_level >= DEBUG_LEVEL_ISR)
3311 printk("%s(%d):rx_start(%s)\n",
3312 __FILE__,__LINE__, info->device_name );
3313
3314 rx_reset_buffers(info);
3315 info->rx_enabled = false;
3316 info->rx_overflow = false;
3317
3318 /* MODE:03 RAC Receiver Active, 1=active */
3319 set_reg_bits(info, CHA + MODE, BIT3);
3320
3321 info->rx_enabled = true;
3322 }
3323
3324 static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
3325 {
3326 if (debug_level >= DEBUG_LEVEL_ISR)
3327 printk("%s(%d):tx_start(%s)\n",
3328 __FILE__,__LINE__, info->device_name );
3329
3330 if (info->tx_count) {
3331 /* If auto RTS enabled and RTS is inactive, then assert */
3332 /* RTS and set a flag indicating that the driver should */
3333 /* negate RTS when the transmission completes. */
3334 info->drop_rts_on_tx_done = false;
3335
3336 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3337 get_signals(info);
3338 if (!(info->serial_signals & SerialSignal_RTS)) {
3339 info->serial_signals |= SerialSignal_RTS;
3340 set_signals(info);
3341 info->drop_rts_on_tx_done = true;
3342 }
3343 }
3344
3345 if (info->params.mode == MGSL_MODE_ASYNC) {
3346 if (!info->tx_active) {
3347 info->tx_active = true;
3348 tx_ready(info, tty);
3349 }
3350 } else {
3351 info->tx_active = true;
3352 tx_ready(info, tty);
3353 mod_timer(&info->tx_timer, jiffies +
3354 msecs_to_jiffies(5000));
3355 }
3356 }
3357
3358 if (!info->tx_enabled)
3359 info->tx_enabled = true;
3360 }
3361
3362 static void tx_stop(MGSLPC_INFO *info)
3363 {
3364 if (debug_level >= DEBUG_LEVEL_ISR)
3365 printk("%s(%d):tx_stop(%s)\n",
3366 __FILE__,__LINE__, info->device_name );
3367
3368 del_timer(&info->tx_timer);
3369
3370 info->tx_enabled = false;
3371 info->tx_active = false;
3372 }
3373
3374 /* Reset the adapter to a known state and prepare it for further use.
3375 */
3376 static void reset_device(MGSLPC_INFO *info)
3377 {
3378 /* power up both channels (set BIT7) */
3379 write_reg(info, CHA + CCR0, 0x80);
3380 write_reg(info, CHB + CCR0, 0x80);
3381 write_reg(info, CHA + MODE, 0);
3382 write_reg(info, CHB + MODE, 0);
3383
3384 /* disable all interrupts */
3385 irq_disable(info, CHA, 0xffff);
3386 irq_disable(info, CHB, 0xffff);
3387 port_irq_disable(info, 0xff);
3388
3389 /* PCR Port Configuration Register
3390 *
3391 * 07..04 DEC[3..0] Serial I/F select outputs
3392 * 03 output, 1=AUTO CTS control enabled
3393 * 02 RI Ring Indicator input 0=active
3394 * 01 DSR input 0=active
3395 * 00 DTR output 0=active
3396 *
3397 * 0000 0110
3398 */
3399 write_reg(info, PCR, 0x06);
3400
3401 /* PVR Port Value Register
3402 *
3403 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3404 * 03 AUTO CTS output 1=enabled
3405 * 02 RI Ring Indicator input
3406 * 01 DSR input
3407 * 00 DTR output (1=inactive)
3408 *
3409 * 0000 0001
3410 */
3411 // write_reg(info, PVR, PVR_DTR);
3412
3413 /* IPC Interrupt Port Configuration
3414 *
3415 * 07 VIS 1=Masked interrupts visible
3416 * 06..05 Reserved, 0
3417 * 04..03 SLA Slave address, 00 ignored
3418 * 02 CASM Cascading Mode, 1=daisy chain
3419 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3420 *
3421 * 0000 0101
3422 */
3423 write_reg(info, IPC, 0x05);
3424 }
3425
3426 static void async_mode(MGSLPC_INFO *info)
3427 {
3428 unsigned char val;
3429
3430 /* disable all interrupts */
3431 irq_disable(info, CHA, 0xffff);
3432 irq_disable(info, CHB, 0xffff);
3433 port_irq_disable(info, 0xff);
3434
3435 /* MODE
3436 *
3437 * 07 Reserved, 0
3438 * 06 FRTS RTS State, 0=active
3439 * 05 FCTS Flow Control on CTS
3440 * 04 FLON Flow Control Enable
3441 * 03 RAC Receiver Active, 0 = inactive
3442 * 02 RTS 0=Auto RTS, 1=manual RTS
3443 * 01 TRS Timer Resolution, 1=512
3444 * 00 TLP Test Loop, 0 = no loop
3445 *
3446 * 0000 0110
3447 */
3448 val = 0x06;
3449 if (info->params.loopback)
3450 val |= BIT0;
3451
3452 /* preserve RTS state */
3453 if (!(info->serial_signals & SerialSignal_RTS))
3454 val |= BIT6;
3455 write_reg(info, CHA + MODE, val);
3456
3457 /* CCR0
3458 *
3459 * 07 PU Power Up, 1=active, 0=power down
3460 * 06 MCE Master Clock Enable, 1=enabled
3461 * 05 Reserved, 0
3462 * 04..02 SC[2..0] Encoding, 000=NRZ
3463 * 01..00 SM[1..0] Serial Mode, 11=Async
3464 *
3465 * 1000 0011
3466 */
3467 write_reg(info, CHA + CCR0, 0x83);
3468
3469 /* CCR1
3470 *
3471 * 07..05 Reserved, 0
3472 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3473 * 03 BCR Bit Clock Rate, 1=16x
3474 * 02..00 CM[2..0] Clock Mode, 111=BRG
3475 *
3476 * 0001 1111
3477 */
3478 write_reg(info, CHA + CCR1, 0x1f);
3479
3480 /* CCR2 (channel A)
3481 *
3482 * 07..06 BGR[9..8] Baud rate bits 9..8
3483 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3484 * 04 SSEL Clock source select, 1=submode b
3485 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3486 * 02 RWX Read/Write Exchange 0=disabled
3487 * 01 Reserved, 0
3488 * 00 DIV, data inversion 0=disabled, 1=enabled
3489 *
3490 * 0001 0000
3491 */
3492 write_reg(info, CHA + CCR2, 0x10);
3493
3494 /* CCR3
3495 *
3496 * 07..01 Reserved, 0
3497 * 00 PSD DPLL Phase Shift Disable
3498 *
3499 * 0000 0000
3500 */
3501 write_reg(info, CHA + CCR3, 0);
3502
3503 /* CCR4
3504 *
3505 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3506 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3507 * 05 TST1 Test Pin, 0=normal operation
3508 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3509 * 03..00 Reserved, must be 0
3510 *
3511 * 0101 0000
3512 */
3513 write_reg(info, CHA + CCR4, 0x50);
3514 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3515
3516 /* DAFO Data Format
3517 *
3518 * 07 Reserved, 0
3519 * 06 XBRK transmit break, 0=normal operation
3520 * 05 Stop bits (0=1, 1=2)
3521 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3522 * 02 PAREN Parity Enable
3523 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3524 *
3525 */
3526 val = 0x00;
3527 if (info->params.data_bits != 8)
3528 val |= BIT0; /* 7 bits */
3529 if (info->params.stop_bits != 1)
3530 val |= BIT5;
3531 if (info->params.parity != ASYNC_PARITY_NONE)
3532 {
3533 val |= BIT2; /* Parity enable */
3534 if (info->params.parity == ASYNC_PARITY_ODD)
3535 val |= BIT3;
3536 else
3537 val |= BIT4;
3538 }
3539 write_reg(info, CHA + DAFO, val);
3540
3541 /* RFC Rx FIFO Control
3542 *
3543 * 07 Reserved, 0
3544 * 06 DPS, 1=parity bit not stored in data byte
3545 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3546 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3547 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3548 * 01 Reserved, 0
3549 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3550 *
3551 * 0101 1100
3552 */
3553 write_reg(info, CHA + RFC, 0x5c);
3554
3555 /* RLCR Receive length check register
3556 *
3557 * Max frame length = (RL + 1) * 32
3558 */
3559 write_reg(info, CHA + RLCR, 0);
3560
3561 /* XBCH Transmit Byte Count High
3562 *
3563 * 07 DMA mode, 0 = interrupt driven
3564 * 06 NRM, 0=ABM (ignored)
3565 * 05 CAS Carrier Auto Start
3566 * 04 XC Transmit Continuously (ignored)
3567 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3568 *
3569 * 0000 0000
3570 */
3571 val = 0x00;
3572 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3573 val |= BIT5;
3574 write_reg(info, CHA + XBCH, val);
3575 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3576 irq_enable(info, CHA, IRQ_CTS);
3577
3578 /* MODE:03 RAC Receiver Active, 1=active */
3579 set_reg_bits(info, CHA + MODE, BIT3);
3580 enable_auxclk(info);
3581 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3582 irq_enable(info, CHB, IRQ_CTS);
3583 /* PVR[3] 1=AUTO CTS active */
3584 set_reg_bits(info, CHA + PVR, BIT3);
3585 } else
3586 clear_reg_bits(info, CHA + PVR, BIT3);
3587 irq_enable(info, CHA,
3588 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3589 IRQ_ALLSENT + IRQ_TXFIFO);
3590 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3591 wait_command_complete(info, CHA);
3592 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3593 }
3594
3595 /* Set the HDLC idle mode for the transmitter.
3596 */
3597 static void tx_set_idle(MGSLPC_INFO *info)
3598 {
3599 /* Note: ESCC2 only supports flags and one idle modes */
3600 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3601 set_reg_bits(info, CHA + CCR1, BIT3);
3602 else
3603 clear_reg_bits(info, CHA + CCR1, BIT3);
3604 }
3605
3606 /* get state of the V24 status (input) signals.
3607 */
3608 static void get_signals(MGSLPC_INFO *info)
3609 {
3610 unsigned char status = 0;
3611
3612 /* preserve DTR and RTS */
3613 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3614
3615 if (read_reg(info, CHB + VSTR) & BIT7)
3616 info->serial_signals |= SerialSignal_DCD;
3617 if (read_reg(info, CHB + STAR) & BIT1)
3618 info->serial_signals |= SerialSignal_CTS;
3619
3620 status = read_reg(info, CHA + PVR);
3621 if (!(status & PVR_RI))
3622 info->serial_signals |= SerialSignal_RI;
3623 if (!(status & PVR_DSR))
3624 info->serial_signals |= SerialSignal_DSR;
3625 }
3626
3627 /* Set the state of DTR and RTS based on contents of
3628 * serial_signals member of device extension.
3629 */
3630 static void set_signals(MGSLPC_INFO *info)
3631 {
3632 unsigned char val;
3633
3634 val = read_reg(info, CHA + MODE);
3635 if (info->params.mode == MGSL_MODE_ASYNC) {
3636 if (info->serial_signals & SerialSignal_RTS)
3637 val &= ~BIT6;
3638 else
3639 val |= BIT6;
3640 } else {
3641 if (info->serial_signals & SerialSignal_RTS)
3642 val |= BIT2;
3643 else
3644 val &= ~BIT2;
3645 }
3646 write_reg(info, CHA + MODE, val);
3647
3648 if (info->serial_signals & SerialSignal_DTR)
3649 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3650 else
3651 set_reg_bits(info, CHA + PVR, PVR_DTR);
3652 }
3653
3654 static void rx_reset_buffers(MGSLPC_INFO *info)
3655 {
3656 RXBUF *buf;
3657 int i;
3658
3659 info->rx_put = 0;
3660 info->rx_get = 0;
3661 info->rx_frame_count = 0;
3662 for (i=0 ; i < info->rx_buf_count ; i++) {
3663 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3664 buf->status = buf->count = 0;
3665 }
3666 }
3667
3668 /* Attempt to return a received HDLC frame
3669 * Only frames received without errors are returned.
3670 *
3671 * Returns true if frame returned, otherwise false
3672 */
3673 static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
3674 {
3675 unsigned short status;
3676 RXBUF *buf;
3677 unsigned int framesize = 0;
3678 unsigned long flags;
3679 bool return_frame = false;
3680
3681 if (info->rx_frame_count == 0)
3682 return false;
3683
3684 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3685
3686 status = buf->status;
3687
3688 /* 07 VFR 1=valid frame
3689 * 06 RDO 1=data overrun
3690 * 05 CRC 1=OK, 0=error
3691 * 04 RAB 1=frame aborted
3692 */
3693 if ((status & 0xf0) != 0xA0) {
3694 if (!(status & BIT7) || (status & BIT4))
3695 info->icount.rxabort++;
3696 else if (status & BIT6)
3697 info->icount.rxover++;
3698 else if (!(status & BIT5)) {
3699 info->icount.rxcrc++;
3700 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3701 return_frame = true;
3702 }
3703 framesize = 0;
3704 #if SYNCLINK_GENERIC_HDLC
3705 {
3706 info->netdev->stats.rx_errors++;
3707 info->netdev->stats.rx_frame_errors++;
3708 }
3709 #endif
3710 } else
3711 return_frame = true;
3712
3713 if (return_frame)
3714 framesize = buf->count;
3715
3716 if (debug_level >= DEBUG_LEVEL_BH)
3717 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3718 __FILE__,__LINE__,info->device_name,status,framesize);
3719
3720 if (debug_level >= DEBUG_LEVEL_DATA)
3721 trace_block(info, buf->data, framesize, 0);
3722
3723 if (framesize) {
3724 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3725 framesize+1 > info->max_frame_size) ||
3726 framesize > info->max_frame_size)
3727 info->icount.rxlong++;
3728 else {
3729 if (status & BIT5)
3730 info->icount.rxok++;
3731
3732 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3733 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3734 ++framesize;
3735 }
3736
3737 #if SYNCLINK_GENERIC_HDLC
3738 if (info->netcount)
3739 hdlcdev_rx(info, buf->data, framesize);
3740 else
3741 #endif
3742 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3743 }
3744 }
3745
3746 spin_lock_irqsave(&info->lock,flags);
3747 buf->status = buf->count = 0;
3748 info->rx_frame_count--;
3749 info->rx_get++;
3750 if (info->rx_get >= info->rx_buf_count)
3751 info->rx_get = 0;
3752 spin_unlock_irqrestore(&info->lock,flags);
3753
3754 return true;
3755 }
3756
3757 static bool register_test(MGSLPC_INFO *info)
3758 {
3759 static unsigned char patterns[] =
3760 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3761 static unsigned int count = ARRAY_SIZE(patterns);
3762 unsigned int i;
3763 bool rc = true;
3764 unsigned long flags;
3765
3766 spin_lock_irqsave(&info->lock,flags);
3767 reset_device(info);
3768
3769 for (i = 0; i < count; i++) {
3770 write_reg(info, XAD1, patterns[i]);
3771 write_reg(info, XAD2, patterns[(i + 1) % count]);
3772 if ((read_reg(info, XAD1) != patterns[i]) ||
3773 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3774 rc = false;
3775 break;
3776 }
3777 }
3778
3779 spin_unlock_irqrestore(&info->lock,flags);
3780 return rc;
3781 }
3782
3783 static bool irq_test(MGSLPC_INFO *info)
3784 {
3785 unsigned long end_time;
3786 unsigned long flags;
3787
3788 spin_lock_irqsave(&info->lock,flags);
3789 reset_device(info);
3790
3791 info->testing_irq = true;
3792 hdlc_mode(info);
3793
3794 info->irq_occurred = false;
3795
3796 /* init hdlc mode */
3797
3798 irq_enable(info, CHA, IRQ_TIMER);
3799 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3800 issue_command(info, CHA, CMD_START_TIMER);
3801
3802 spin_unlock_irqrestore(&info->lock,flags);
3803
3804 end_time=100;
3805 while(end_time-- && !info->irq_occurred) {
3806 msleep_interruptible(10);
3807 }
3808
3809 info->testing_irq = false;
3810
3811 spin_lock_irqsave(&info->lock,flags);
3812 reset_device(info);
3813 spin_unlock_irqrestore(&info->lock,flags);
3814
3815 return info->irq_occurred;
3816 }
3817
3818 static int adapter_test(MGSLPC_INFO *info)
3819 {
3820 if (!register_test(info)) {
3821 info->init_error = DiagStatus_AddressFailure;
3822 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
3823 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
3824 return -ENODEV;
3825 }
3826
3827 if (!irq_test(info)) {
3828 info->init_error = DiagStatus_IrqFailure;
3829 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
3830 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
3831 return -ENODEV;
3832 }
3833
3834 if (debug_level >= DEBUG_LEVEL_INFO)
3835 printk("%s(%d):device %s passed diagnostics\n",
3836 __FILE__,__LINE__,info->device_name);
3837 return 0;
3838 }
3839
3840 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
3841 {
3842 int i;
3843 int linecount;
3844 if (xmit)
3845 printk("%s tx data:\n",info->device_name);
3846 else
3847 printk("%s rx data:\n",info->device_name);
3848
3849 while(count) {
3850 if (count > 16)
3851 linecount = 16;
3852 else
3853 linecount = count;
3854
3855 for(i=0;i<linecount;i++)
3856 printk("%02X ",(unsigned char)data[i]);
3857 for(;i<17;i++)
3858 printk(" ");
3859 for(i=0;i<linecount;i++) {
3860 if (data[i]>=040 && data[i]<=0176)
3861 printk("%c",data[i]);
3862 else
3863 printk(".");
3864 }
3865 printk("\n");
3866
3867 data += linecount;
3868 count -= linecount;
3869 }
3870 }
3871
3872 /* HDLC frame time out
3873 * update stats and do tx completion processing
3874 */
3875 static void tx_timeout(unsigned long context)
3876 {
3877 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
3878 unsigned long flags;
3879
3880 if ( debug_level >= DEBUG_LEVEL_INFO )
3881 printk( "%s(%d):tx_timeout(%s)\n",
3882 __FILE__,__LINE__,info->device_name);
3883 if(info->tx_active &&
3884 info->params.mode == MGSL_MODE_HDLC) {
3885 info->icount.txtimeout++;
3886 }
3887 spin_lock_irqsave(&info->lock,flags);
3888 info->tx_active = false;
3889 info->tx_count = info->tx_put = info->tx_get = 0;
3890
3891 spin_unlock_irqrestore(&info->lock,flags);
3892
3893 #if SYNCLINK_GENERIC_HDLC
3894 if (info->netcount)
3895 hdlcdev_tx_done(info);
3896 else
3897 #endif
3898 {
3899 struct tty_struct *tty = tty_port_tty_get(&info->port);
3900 bh_transmit(info, tty);
3901 tty_kref_put(tty);
3902 }
3903 }
3904
3905 #if SYNCLINK_GENERIC_HDLC
3906
3907 /**
3908 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
3909 * set encoding and frame check sequence (FCS) options
3910 *
3911 * dev pointer to network device structure
3912 * encoding serial encoding setting
3913 * parity FCS setting
3914 *
3915 * returns 0 if success, otherwise error code
3916 */
3917 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
3918 unsigned short parity)
3919 {
3920 MGSLPC_INFO *info = dev_to_port(dev);
3921 struct tty_struct *tty;
3922 unsigned char new_encoding;
3923 unsigned short new_crctype;
3924
3925 /* return error if TTY interface open */
3926 if (info->port.count)
3927 return -EBUSY;
3928
3929 switch (encoding)
3930 {
3931 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
3932 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
3933 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
3934 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
3935 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
3936 default: return -EINVAL;
3937 }
3938
3939 switch (parity)
3940 {
3941 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
3942 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
3943 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
3944 default: return -EINVAL;
3945 }
3946
3947 info->params.encoding = new_encoding;
3948 info->params.crc_type = new_crctype;
3949
3950 /* if network interface up, reprogram hardware */
3951 if (info->netcount) {
3952 tty = tty_port_tty_get(&info->port);
3953 mgslpc_program_hw(info, tty);
3954 tty_kref_put(tty);
3955 }
3956
3957 return 0;
3958 }
3959
3960 /**
3961 * called by generic HDLC layer to send frame
3962 *
3963 * skb socket buffer containing HDLC frame
3964 * dev pointer to network device structure
3965 */
3966 static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
3967 struct net_device *dev)
3968 {
3969 MGSLPC_INFO *info = dev_to_port(dev);
3970 unsigned long flags;
3971
3972 if (debug_level >= DEBUG_LEVEL_INFO)
3973 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
3974
3975 /* stop sending until this frame completes */
3976 netif_stop_queue(dev);
3977
3978 /* copy data to device buffers */
3979 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
3980 info->tx_get = 0;
3981 info->tx_put = info->tx_count = skb->len;
3982
3983 /* update network statistics */
3984 dev->stats.tx_packets++;
3985 dev->stats.tx_bytes += skb->len;
3986
3987 /* done with socket buffer, so free it */
3988 dev_kfree_skb(skb);
3989
3990 /* save start time for transmit timeout detection */
3991 dev->trans_start = jiffies;
3992
3993 /* start hardware transmitter if necessary */
3994 spin_lock_irqsave(&info->lock,flags);
3995 if (!info->tx_active) {
3996 struct tty_struct *tty = tty_port_tty_get(&info->port);
3997 tx_start(info, tty);
3998 tty_kref_put(tty);
3999 }
4000 spin_unlock_irqrestore(&info->lock,flags);
4001
4002 return NETDEV_TX_OK;
4003 }
4004
4005 /**
4006 * called by network layer when interface enabled
4007 * claim resources and initialize hardware
4008 *
4009 * dev pointer to network device structure
4010 *
4011 * returns 0 if success, otherwise error code
4012 */
4013 static int hdlcdev_open(struct net_device *dev)
4014 {
4015 MGSLPC_INFO *info = dev_to_port(dev);
4016 struct tty_struct *tty;
4017 int rc;
4018 unsigned long flags;
4019
4020 if (debug_level >= DEBUG_LEVEL_INFO)
4021 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4022
4023 /* generic HDLC layer open processing */
4024 if ((rc = hdlc_open(dev)))
4025 return rc;
4026
4027 /* arbitrate between network and tty opens */
4028 spin_lock_irqsave(&info->netlock, flags);
4029 if (info->port.count != 0 || info->netcount != 0) {
4030 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4031 spin_unlock_irqrestore(&info->netlock, flags);
4032 return -EBUSY;
4033 }
4034 info->netcount=1;
4035 spin_unlock_irqrestore(&info->netlock, flags);
4036
4037 tty = tty_port_tty_get(&info->port);
4038 /* claim resources and init adapter */
4039 if ((rc = startup(info, tty)) != 0) {
4040 tty_kref_put(tty);
4041 spin_lock_irqsave(&info->netlock, flags);
4042 info->netcount=0;
4043 spin_unlock_irqrestore(&info->netlock, flags);
4044 return rc;
4045 }
4046 /* assert DTR and RTS, apply hardware settings */
4047 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4048 mgslpc_program_hw(info, tty);
4049 tty_kref_put(tty);
4050
4051 /* enable network layer transmit */
4052 dev->trans_start = jiffies;
4053 netif_start_queue(dev);
4054
4055 /* inform generic HDLC layer of current DCD status */
4056 spin_lock_irqsave(&info->lock, flags);
4057 get_signals(info);
4058 spin_unlock_irqrestore(&info->lock, flags);
4059 if (info->serial_signals & SerialSignal_DCD)
4060 netif_carrier_on(dev);
4061 else
4062 netif_carrier_off(dev);
4063 return 0;
4064 }
4065
4066 /**
4067 * called by network layer when interface is disabled
4068 * shutdown hardware and release resources
4069 *
4070 * dev pointer to network device structure
4071 *
4072 * returns 0 if success, otherwise error code
4073 */
4074 static int hdlcdev_close(struct net_device *dev)
4075 {
4076 MGSLPC_INFO *info = dev_to_port(dev);
4077 struct tty_struct *tty = tty_port_tty_get(&info->port);
4078 unsigned long flags;
4079
4080 if (debug_level >= DEBUG_LEVEL_INFO)
4081 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4082
4083 netif_stop_queue(dev);
4084
4085 /* shutdown adapter and release resources */
4086 shutdown(info, tty);
4087 tty_kref_put(tty);
4088 hdlc_close(dev);
4089
4090 spin_lock_irqsave(&info->netlock, flags);
4091 info->netcount=0;
4092 spin_unlock_irqrestore(&info->netlock, flags);
4093
4094 return 0;
4095 }
4096
4097 /**
4098 * called by network layer to process IOCTL call to network device
4099 *
4100 * dev pointer to network device structure
4101 * ifr pointer to network interface request structure
4102 * cmd IOCTL command code
4103 *
4104 * returns 0 if success, otherwise error code
4105 */
4106 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4107 {
4108 const size_t size = sizeof(sync_serial_settings);
4109 sync_serial_settings new_line;
4110 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4111 MGSLPC_INFO *info = dev_to_port(dev);
4112 unsigned int flags;
4113
4114 if (debug_level >= DEBUG_LEVEL_INFO)
4115 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4116
4117 /* return error if TTY interface open */
4118 if (info->port.count)
4119 return -EBUSY;
4120
4121 if (cmd != SIOCWANDEV)
4122 return hdlc_ioctl(dev, ifr, cmd);
4123
4124 switch(ifr->ifr_settings.type) {
4125 case IF_GET_IFACE: /* return current sync_serial_settings */
4126
4127 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4128 if (ifr->ifr_settings.size < size) {
4129 ifr->ifr_settings.size = size; /* data size wanted */
4130 return -ENOBUFS;
4131 }
4132
4133 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4134 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4135 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4136 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4137
4138 switch (flags){
4139 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4140 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4141 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4142 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4143 default: new_line.clock_type = CLOCK_DEFAULT;
4144 }
4145
4146 new_line.clock_rate = info->params.clock_speed;
4147 new_line.loopback = info->params.loopback ? 1:0;
4148
4149 if (copy_to_user(line, &new_line, size))
4150 return -EFAULT;
4151 return 0;
4152
4153 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4154
4155 if(!capable(CAP_NET_ADMIN))
4156 return -EPERM;
4157 if (copy_from_user(&new_line, line, size))
4158 return -EFAULT;
4159
4160 switch (new_line.clock_type)
4161 {
4162 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4163 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4164 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4165 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4166 case CLOCK_DEFAULT: flags = info->params.flags &
4167 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4168 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4169 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4170 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4171 default: return -EINVAL;
4172 }
4173
4174 if (new_line.loopback != 0 && new_line.loopback != 1)
4175 return -EINVAL;
4176
4177 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4178 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4179 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4180 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4181 info->params.flags |= flags;
4182
4183 info->params.loopback = new_line.loopback;
4184
4185 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4186 info->params.clock_speed = new_line.clock_rate;
4187 else
4188 info->params.clock_speed = 0;
4189
4190 /* if network interface up, reprogram hardware */
4191 if (info->netcount) {
4192 struct tty_struct *tty = tty_port_tty_get(&info->port);
4193 mgslpc_program_hw(info, tty);
4194 tty_kref_put(tty);
4195 }
4196 return 0;
4197
4198 default:
4199 return hdlc_ioctl(dev, ifr, cmd);
4200 }
4201 }
4202
4203 /**
4204 * called by network layer when transmit timeout is detected
4205 *
4206 * dev pointer to network device structure
4207 */
4208 static void hdlcdev_tx_timeout(struct net_device *dev)
4209 {
4210 MGSLPC_INFO *info = dev_to_port(dev);
4211 unsigned long flags;
4212
4213 if (debug_level >= DEBUG_LEVEL_INFO)
4214 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4215
4216 dev->stats.tx_errors++;
4217 dev->stats.tx_aborted_errors++;
4218
4219 spin_lock_irqsave(&info->lock,flags);
4220 tx_stop(info);
4221 spin_unlock_irqrestore(&info->lock,flags);
4222
4223 netif_wake_queue(dev);
4224 }
4225
4226 /**
4227 * called by device driver when transmit completes
4228 * reenable network layer transmit if stopped
4229 *
4230 * info pointer to device instance information
4231 */
4232 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4233 {
4234 if (netif_queue_stopped(info->netdev))
4235 netif_wake_queue(info->netdev);
4236 }
4237
4238 /**
4239 * called by device driver when frame received
4240 * pass frame to network layer
4241 *
4242 * info pointer to device instance information
4243 * buf pointer to buffer contianing frame data
4244 * size count of data bytes in buf
4245 */
4246 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4247 {
4248 struct sk_buff *skb = dev_alloc_skb(size);
4249 struct net_device *dev = info->netdev;
4250
4251 if (debug_level >= DEBUG_LEVEL_INFO)
4252 printk("hdlcdev_rx(%s)\n",dev->name);
4253
4254 if (skb == NULL) {
4255 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4256 dev->stats.rx_dropped++;
4257 return;
4258 }
4259
4260 memcpy(skb_put(skb, size), buf, size);
4261
4262 skb->protocol = hdlc_type_trans(skb, dev);
4263
4264 dev->stats.rx_packets++;
4265 dev->stats.rx_bytes += size;
4266
4267 netif_rx(skb);
4268 }
4269
4270 static const struct net_device_ops hdlcdev_ops = {
4271 .ndo_open = hdlcdev_open,
4272 .ndo_stop = hdlcdev_close,
4273 .ndo_change_mtu = hdlc_change_mtu,
4274 .ndo_start_xmit = hdlc_start_xmit,
4275 .ndo_do_ioctl = hdlcdev_ioctl,
4276 .ndo_tx_timeout = hdlcdev_tx_timeout,
4277 };
4278
4279 /**
4280 * called by device driver when adding device instance
4281 * do generic HDLC initialization
4282 *
4283 * info pointer to device instance information
4284 *
4285 * returns 0 if success, otherwise error code
4286 */
4287 static int hdlcdev_init(MGSLPC_INFO *info)
4288 {
4289 int rc;
4290 struct net_device *dev;
4291 hdlc_device *hdlc;
4292
4293 /* allocate and initialize network and HDLC layer objects */
4294
4295 if (!(dev = alloc_hdlcdev(info))) {
4296 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4297 return -ENOMEM;
4298 }
4299
4300 /* for network layer reporting purposes only */
4301 dev->base_addr = info->io_base;
4302 dev->irq = info->irq_level;
4303
4304 /* network layer callbacks and settings */
4305 dev->netdev_ops = &hdlcdev_ops;
4306 dev->watchdog_timeo = 10 * HZ;
4307 dev->tx_queue_len = 50;
4308
4309 /* generic HDLC layer callbacks and settings */
4310 hdlc = dev_to_hdlc(dev);
4311 hdlc->attach = hdlcdev_attach;
4312 hdlc->xmit = hdlcdev_xmit;
4313
4314 /* register objects with HDLC layer */
4315 if ((rc = register_hdlc_device(dev))) {
4316 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4317 free_netdev(dev);
4318 return rc;
4319 }
4320
4321 info->netdev = dev;
4322 return 0;
4323 }
4324
4325 /**
4326 * called by device driver when removing device instance
4327 * do generic HDLC cleanup
4328 *
4329 * info pointer to device instance information
4330 */
4331 static void hdlcdev_exit(MGSLPC_INFO *info)
4332 {
4333 unregister_hdlc_device(info->netdev);
4334 free_netdev(info->netdev);
4335 info->netdev = NULL;
4336 }
4337
4338 #endif /* CONFIG_HDLC */
4339
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