2 * P5020DS Device Tree Source
4 * Copyright 2010-2011 Freescale Semiconductor Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
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12 * documentation and/or other materials provided with the distribution.
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14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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38 model = "fsl,P5020DS";
39 compatible = "fsl,P5020DS";
42 interrupt-parent = <&mpic>;
80 cpu0: PowerPC,e5500@0 {
83 next-level-cache = <&L2_0>;
85 next-level-cache = <&cpc>;
88 cpu1: PowerPC,e5500@1 {
91 next-level-cache = <&L2_1>;
93 next-level-cache = <&cpc>;
99 device_type = "memory";
103 #address-cells = <1>;
106 compatible = "simple-bus";
107 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
108 reg = <0xf 0xfe000000 0 0x00001000>;
111 compatible = "fsl,soc-sram-error";
112 interrupts = <16 2 1 29>;
116 compatible = "fsl,corenet-law";
121 memory-controller@8000 {
122 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
123 reg = <0x8000 0x1000>;
124 interrupts = <16 2 1 23>;
127 memory-controller@9000 {
128 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
129 reg = <0x9000 0x1000>;
130 interrupts = <16 2 1 22>;
133 cpc: l3-cache-controller@10000 {
134 compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
135 reg = <0x10000 0x1000
137 interrupts = <16 2 1 27
142 compatible = "fsl,corenet-cf";
143 reg = <0x18000 0x1000>;
144 interrupts = <16 2 1 31>;
145 fsl,ccf-num-csdids = <32>;
146 fsl,ccf-num-snoopids = <32>;
150 compatible = "fsl,pamu-v1.0", "fsl,pamu";
151 reg = <0x20000 0x4000>;
158 clock-frequency = <0>;
159 interrupt-controller;
160 #address-cells = <0>;
161 #interrupt-cells = <4>;
162 reg = <0x40000 0x40000>;
163 compatible = "fsl,mpic", "chrp,open-pic";
164 device_type = "open-pic";
168 compatible = "fsl,mpic-msi";
169 reg = <0x41600 0x200>;
170 msi-available-ranges = <0 0x100>;
183 compatible = "fsl,mpic-msi";
184 reg = <0x41800 0x200>;
185 msi-available-ranges = <0 0x100>;
198 compatible = "fsl,mpic-msi";
199 reg = <0x41a00 0x200>;
200 msi-available-ranges = <0 0x100>;
212 guts: global-utilities@e0000 {
213 compatible = "fsl,qoriq-device-config-1.0";
214 reg = <0xe0000 0xe00>;
217 fsl,liodn-bits = <12>;
220 pins: global-utilities@e0e00 {
221 compatible = "fsl,qoriq-pin-control-1.0";
222 reg = <0xe0e00 0x200>;
226 clockgen: global-utilities@e1000 {
227 compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
228 reg = <0xe1000 0x1000>;
229 clock-frequency = <0>;
232 rcpm: global-utilities@e2000 {
233 compatible = "fsl,qoriq-rcpm-1.0";
234 reg = <0xe2000 0x1000>;
239 compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
240 reg = <0xe8000 0x1000>;
243 serdes: serdes@ea000 {
244 compatible = "fsl,p5020-serdes";
245 reg = <0xea000 0x1000>;
249 #address-cells = <1>;
251 compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
252 reg = <0x100300 0x4>;
253 ranges = <0x0 0x100100 0x200>;
256 compatible = "fsl,p5020-dma-channel",
257 "fsl,eloplus-dma-channel";
260 interrupts = <28 2 0 0>;
263 compatible = "fsl,p5020-dma-channel",
264 "fsl,eloplus-dma-channel";
267 interrupts = <29 2 0 0>;
270 compatible = "fsl,p5020-dma-channel",
271 "fsl,eloplus-dma-channel";
274 interrupts = <30 2 0 0>;
277 compatible = "fsl,p5020-dma-channel",
278 "fsl,eloplus-dma-channel";
281 interrupts = <31 2 0 0>;
286 #address-cells = <1>;
288 compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
289 reg = <0x101300 0x4>;
290 ranges = <0x0 0x101100 0x200>;
293 compatible = "fsl,p5020-dma-channel",
294 "fsl,eloplus-dma-channel";
297 interrupts = <32 2 0 0>;
300 compatible = "fsl,p5020-dma-channel",
301 "fsl,eloplus-dma-channel";
304 interrupts = <33 2 0 0>;
307 compatible = "fsl,p5020-dma-channel",
308 "fsl,eloplus-dma-channel";
311 interrupts = <34 2 0 0>;
314 compatible = "fsl,p5020-dma-channel",
315 "fsl,eloplus-dma-channel";
318 interrupts = <35 2 0 0>;
323 #address-cells = <1>;
325 compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
326 reg = <0x110000 0x1000>;
327 interrupts = <53 0x2 0 0>;
328 fsl,espi-num-chipselects = <4>;
331 #address-cells = <1>;
333 compatible = "spansion,s25sl12801";
335 spi-max-frequency = <40000000>; /* input clock */
338 reg = <0x00000000 0x00100000>;
343 reg = <0x00100000 0x00500000>;
348 reg = <0x00600000 0x00100000>;
352 label = "file system";
353 reg = <0x00700000 0x00900000>;
359 compatible = "fsl,p5020-esdhc", "fsl,esdhc";
360 reg = <0x114000 0x1000>;
361 interrupts = <48 2 0 0>;
363 clock-frequency = <0>;
367 #address-cells = <1>;
370 compatible = "fsl-i2c";
371 reg = <0x118000 0x100>;
372 interrupts = <38 2 0 0>;
377 #address-cells = <1>;
380 compatible = "fsl-i2c";
381 reg = <0x118100 0x100>;
382 interrupts = <38 2 0 0>;
385 compatible = "at24,24c256";
389 compatible = "at24,24c256";
395 #address-cells = <1>;
398 compatible = "fsl-i2c";
399 reg = <0x119000 0x100>;
400 interrupts = <39 2 0 0>;
405 #address-cells = <1>;
408 compatible = "fsl-i2c";
409 reg = <0x119100 0x100>;
410 interrupts = <39 2 0 0>;
413 compatible = "dallas,ds3232";
415 interrupts = <0x1 0x1 0 0>;
419 serial0: serial@11c500 {
421 device_type = "serial";
422 compatible = "ns16550";
423 reg = <0x11c500 0x100>;
424 clock-frequency = <0>;
425 interrupts = <36 2 0 0>;
428 serial1: serial@11c600 {
430 device_type = "serial";
431 compatible = "ns16550";
432 reg = <0x11c600 0x100>;
433 clock-frequency = <0>;
434 interrupts = <36 2 0 0>;
437 serial2: serial@11d500 {
439 device_type = "serial";
440 compatible = "ns16550";
441 reg = <0x11d500 0x100>;
442 clock-frequency = <0>;
443 interrupts = <37 2 0 0>;
446 serial3: serial@11d600 {
448 device_type = "serial";
449 compatible = "ns16550";
450 reg = <0x11d600 0x100>;
451 clock-frequency = <0>;
452 interrupts = <37 2 0 0>;
456 compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
457 reg = <0x130000 0x1000>;
458 interrupts = <55 2 0 0>;
464 compatible = "fsl,p5020-usb2-mph",
465 "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
466 reg = <0x210000 0x1000>;
467 #address-cells = <1>;
469 interrupts = <44 0x2 0 0>;
475 compatible = "fsl,p5020-usb2-dr",
476 "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
477 reg = <0x211000 0x1000>;
478 #address-cells = <1>;
480 interrupts = <45 0x2 0 0>;
486 compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
487 reg = <0x220000 0x1000>;
488 interrupts = <68 0x2 0 0>;
492 compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
493 reg = <0x221000 0x1000>;
494 interrupts = <69 0x2 0 0>;
497 crypto: crypto@300000 {
498 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
499 #address-cells = <1>;
501 reg = <0x300000 0x10000>;
502 ranges = <0 0x300000 0x10000>;
503 interrupts = <92 2 0 0>;
506 compatible = "fsl,sec-v4.2-job-ring",
507 "fsl,sec-v4.0-job-ring";
508 reg = <0x1000 0x1000>;
509 interrupts = <88 2 0 0>;
513 compatible = "fsl,sec-v4.2-job-ring",
514 "fsl,sec-v4.0-job-ring";
515 reg = <0x2000 0x1000>;
516 interrupts = <89 2 0 0>;
520 compatible = "fsl,sec-v4.2-job-ring",
521 "fsl,sec-v4.0-job-ring";
522 reg = <0x3000 0x1000>;
523 interrupts = <90 2 0 0>;
527 compatible = "fsl,sec-v4.2-job-ring",
528 "fsl,sec-v4.0-job-ring";
529 reg = <0x4000 0x1000>;
530 interrupts = <91 2 0 0>;
534 compatible = "fsl,sec-v4.2-rtic",
536 #address-cells = <1>;
538 reg = <0x6000 0x100>;
539 ranges = <0x0 0x6100 0xe00>;
542 compatible = "fsl,sec-v4.2-rtic-memory",
543 "fsl,sec-v4.0-rtic-memory";
544 reg = <0x00 0x20 0x100 0x80>;
548 compatible = "fsl,sec-v4.2-rtic-memory",
549 "fsl,sec-v4.0-rtic-memory";
550 reg = <0x20 0x20 0x200 0x80>;
554 compatible = "fsl,sec-v4.2-rtic-memory",
555 "fsl,sec-v4.0-rtic-memory";
556 reg = <0x40 0x20 0x300 0x80>;
560 compatible = "fsl,sec-v4.2-rtic-memory",
561 "fsl,sec-v4.0-rtic-memory";
562 reg = <0x60 0x20 0x500 0x80>;
567 sec_mon: sec_mon@314000 {
568 compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
569 reg = <0x314000 0x1000>;
570 interrupts = <93 2 0 0>;
575 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
576 reg = <0xf 0xfe124000 0 0x1000>;
577 interrupts = <25 2 0 0>;
578 #address-cells = <2>;
581 ranges = <0 0 0xf 0xe8000000 0x08000000
582 2 0 0xf 0xffa00000 0x00040000
583 3 0 0xf 0xffdf0000 0x00008000>;
586 compatible = "cfi-flash";
587 reg = <0 0 0x08000000>;
593 #address-cells = <1>;
595 compatible = "fsl,elbc-fcm-nand";
596 reg = <0x2 0x0 0x40000>;
599 label = "NAND U-Boot Image";
600 reg = <0x0 0x02000000>;
605 label = "NAND Root File System";
606 reg = <0x02000000 0x10000000>;
610 label = "NAND Compressed RFS Image";
611 reg = <0x12000000 0x08000000>;
615 label = "NAND Linux Kernel Image";
616 reg = <0x1a000000 0x04000000>;
620 label = "NAND DTB Image";
621 reg = <0x1e000000 0x01000000>;
625 label = "NAND Writable User area";
626 reg = <0x1f000000 0x21000000>;
631 compatible = "fsl,p5020ds-pixis";
636 pci0: pcie@ffe200000 {
637 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
640 #address-cells = <3>;
641 reg = <0xf 0xfe200000 0 0x1000>;
642 bus-range = <0x0 0xff>;
643 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
644 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
645 clock-frequency = <0x1fca055>;
647 interrupts = <16 2 1 15>;
651 #interrupt-cells = <1>;
653 #address-cells = <3>;
655 interrupts = <16 2 1 15>;
656 interrupt-map-mask = <0xf800 0 0 7>;
659 0000 0 0 1 &mpic 40 1 0 0
660 0000 0 0 2 &mpic 1 1 0 0
661 0000 0 0 3 &mpic 2 1 0 0
662 0000 0 0 4 &mpic 3 1 0 0
664 ranges = <0x02000000 0 0xe0000000
665 0x02000000 0 0xe0000000
668 0x01000000 0 0x00000000
669 0x01000000 0 0x00000000
674 pci1: pcie@ffe201000 {
675 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
678 #address-cells = <3>;
679 reg = <0xf 0xfe201000 0 0x1000>;
680 bus-range = <0 0xff>;
681 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
682 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
683 clock-frequency = <0x1fca055>;
685 interrupts = <16 2 1 14>;
688 #interrupt-cells = <1>;
690 #address-cells = <3>;
692 interrupts = <16 2 1 14>;
693 interrupt-map-mask = <0xf800 0 0 7>;
696 0000 0 0 1 &mpic 41 1 0 0
697 0000 0 0 2 &mpic 5 1 0 0
698 0000 0 0 3 &mpic 6 1 0 0
699 0000 0 0 4 &mpic 7 1 0 0
701 ranges = <0x02000000 0 0xe0000000
702 0x02000000 0 0xe0000000
705 0x01000000 0 0x00000000
706 0x01000000 0 0x00000000
711 pci2: pcie@ffe202000 {
712 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
715 #address-cells = <3>;
716 reg = <0xf 0xfe202000 0 0x1000>;
717 bus-range = <0x0 0xff>;
718 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
719 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
720 clock-frequency = <0x1fca055>;
722 interrupts = <16 2 1 13>;
725 #interrupt-cells = <1>;
727 #address-cells = <3>;
729 interrupts = <16 2 1 13>;
730 interrupt-map-mask = <0xf800 0 0 7>;
733 0000 0 0 1 &mpic 42 1 0 0
734 0000 0 0 2 &mpic 9 1 0 0
735 0000 0 0 3 &mpic 10 1 0 0
736 0000 0 0 4 &mpic 11 1 0 0
738 ranges = <0x02000000 0 0xe0000000
739 0x02000000 0 0xe0000000
742 0x01000000 0 0x00000000
743 0x01000000 0 0x00000000
748 pci3: pcie@ffe203000 {
749 compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
752 #address-cells = <3>;
753 reg = <0xf 0xfe203000 0 0x1000>;
754 bus-range = <0x0 0xff>;
755 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
756 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
757 clock-frequency = <0x1fca055>;
759 interrupts = <16 2 1 12>;
762 #interrupt-cells = <1>;
764 #address-cells = <3>;
766 interrupts = <16 2 1 12>;
767 interrupt-map-mask = <0xf800 0 0 7>;
770 0000 0 0 1 &mpic 43 1 0 0
771 0000 0 0 2 &mpic 0 1 0 0
772 0000 0 0 3 &mpic 4 1 0 0
773 0000 0 0 4 &mpic 8 1 0 0
775 ranges = <0x02000000 0 0xe0000000
776 0x02000000 0 0xe0000000
779 0x01000000 0 0x00000000
780 0x01000000 0 0x00000000