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V4L/DVB (13998): gscpa_ov519: Fix 320x240 on ov519 + ov7648
[linux-2.6/btrfs-unstable.git] / drivers / media / video / gspca / ov519.c
blobabd200a947db15ef628684e3ac9a8c8fd5f3c5ea
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include "gspca.h"
42
43 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
44 MODULE_DESCRIPTION("OV519 USB Camera Driver");
45 MODULE_LICENSE("GPL");
46
47 /* global parameters */
48 static int frame_rate;
49
50 /* Number of times to retry a failed I2C transaction. Increase this if you
51 * are getting "Failed to read sensor ID..." */
52 static int i2c_detect_tries = 10;
53
54 /* ov519 device descriptor */
55 struct sd {
56 struct gspca_dev gspca_dev; /* !! must be the first item */
57
58 __u8 packet_nr;
59
60 char bridge;
61 #define BRIDGE_OV511 0
62 #define BRIDGE_OV511PLUS 1
63 #define BRIDGE_OV518 2
64 #define BRIDGE_OV518PLUS 3
65 #define BRIDGE_OV519 4
66 #define BRIDGE_OVFX2 5
67 #define BRIDGE_W9968CF 6
68 #define BRIDGE_MASK 7
69
70 char invert_led;
71 #define BRIDGE_INVERT_LED 8
72
73 /* Determined by sensor type */
74 __u8 sif;
75
76 __u8 brightness;
77 __u8 contrast;
78 __u8 colors;
79 __u8 hflip;
80 __u8 vflip;
81 __u8 autobrightness;
82 __u8 freq;
83 __u8 quality;
84 #define QUALITY_MIN 50
85 #define QUALITY_MAX 70
86 #define QUALITY_DEF 50
87
88 __u8 stopped; /* Streaming is temporarily paused */
89
90 __u8 frame_rate; /* current Framerate */
91 __u8 clockdiv; /* clockdiv override */
92
93 char sensor; /* Type of image sensor chip (SEN_*) */
94 #define SEN_UNKNOWN 0
95 #define SEN_OV2610 1
96 #define SEN_OV3610 2
97 #define SEN_OV6620 3
98 #define SEN_OV6630 4
99 #define SEN_OV66308AF 5
100 #define SEN_OV7610 6
101 #define SEN_OV7620 7
102 #define SEN_OV7620AE 8
103 #define SEN_OV7640 9
104 #define SEN_OV7648 10
105 #define SEN_OV7670 11
106 #define SEN_OV76BE 12
107 #define SEN_OV8610 13
108
109 u8 sensor_addr;
110 int sensor_width;
111 int sensor_height;
112 int sensor_reg_cache[256];
113
114 u8 *jpeg_hdr;
115 };
116
117 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
118 the ov sensors which is already present here. When we have the time we
119 really should move the sensor drivers to v4l2 sub drivers. */
120 #include "w996Xcf.c"
121
122 /* V4L2 controls supported by the driver */
123 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
124 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
125 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
126 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
127 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
128 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
129 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
130 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
131 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
132 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
133 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
134 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
135 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
136 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
137 static void setbrightness(struct gspca_dev *gspca_dev);
138 static void setcontrast(struct gspca_dev *gspca_dev);
139 static void setcolors(struct gspca_dev *gspca_dev);
140 static void setautobrightness(struct sd *sd);
141 static void setfreq(struct sd *sd);
142
143 static const struct ctrl sd_ctrls[] = {
144 {
145 {
146 .id = V4L2_CID_BRIGHTNESS,
147 .type = V4L2_CTRL_TYPE_INTEGER,
148 .name = "Brightness",
149 .minimum = 0,
150 .maximum = 255,
151 .step = 1,
152 #define BRIGHTNESS_DEF 127
153 .default_value = BRIGHTNESS_DEF,
154 },
155 .set = sd_setbrightness,
156 .get = sd_getbrightness,
157 },
158 {
159 {
160 .id = V4L2_CID_CONTRAST,
161 .type = V4L2_CTRL_TYPE_INTEGER,
162 .name = "Contrast",
163 .minimum = 0,
164 .maximum = 255,
165 .step = 1,
166 #define CONTRAST_DEF 127
167 .default_value = CONTRAST_DEF,
168 },
169 .set = sd_setcontrast,
170 .get = sd_getcontrast,
171 },
172 {
173 {
174 .id = V4L2_CID_SATURATION,
175 .type = V4L2_CTRL_TYPE_INTEGER,
176 .name = "Color",
177 .minimum = 0,
178 .maximum = 255,
179 .step = 1,
180 #define COLOR_DEF 127
181 .default_value = COLOR_DEF,
182 },
183 .set = sd_setcolors,
184 .get = sd_getcolors,
185 },
186 /* The flip controls work with ov7670 only */
187 #define HFLIP_IDX 3
188 {
189 {
190 .id = V4L2_CID_HFLIP,
191 .type = V4L2_CTRL_TYPE_BOOLEAN,
192 .name = "Mirror",
193 .minimum = 0,
194 .maximum = 1,
195 .step = 1,
196 #define HFLIP_DEF 0
197 .default_value = HFLIP_DEF,
198 },
199 .set = sd_sethflip,
200 .get = sd_gethflip,
201 },
202 #define VFLIP_IDX 4
203 {
204 {
205 .id = V4L2_CID_VFLIP,
206 .type = V4L2_CTRL_TYPE_BOOLEAN,
207 .name = "Vflip",
208 .minimum = 0,
209 .maximum = 1,
210 .step = 1,
211 #define VFLIP_DEF 0
212 .default_value = VFLIP_DEF,
213 },
214 .set = sd_setvflip,
215 .get = sd_getvflip,
216 },
217 #define AUTOBRIGHT_IDX 5
218 {
219 {
220 .id = V4L2_CID_AUTOBRIGHTNESS,
221 .type = V4L2_CTRL_TYPE_BOOLEAN,
222 .name = "Auto Brightness",
223 .minimum = 0,
224 .maximum = 1,
225 .step = 1,
226 #define AUTOBRIGHT_DEF 1
227 .default_value = AUTOBRIGHT_DEF,
228 },
229 .set = sd_setautobrightness,
230 .get = sd_getautobrightness,
231 },
232 #define FREQ_IDX 6
233 {
234 {
235 .id = V4L2_CID_POWER_LINE_FREQUENCY,
236 .type = V4L2_CTRL_TYPE_MENU,
237 .name = "Light frequency filter",
238 .minimum = 0,
239 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
240 .step = 1,
241 #define FREQ_DEF 0
242 .default_value = FREQ_DEF,
243 },
244 .set = sd_setfreq,
245 .get = sd_getfreq,
246 },
247 #define OV7670_FREQ_IDX 7
248 {
249 {
250 .id = V4L2_CID_POWER_LINE_FREQUENCY,
251 .type = V4L2_CTRL_TYPE_MENU,
252 .name = "Light frequency filter",
253 .minimum = 0,
254 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
255 .step = 1,
256 #define OV7670_FREQ_DEF 3
257 .default_value = OV7670_FREQ_DEF,
258 },
259 .set = sd_setfreq,
260 .get = sd_getfreq,
261 },
262 };
263
264 static const struct v4l2_pix_format ov519_vga_mode[] = {
265 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
266 .bytesperline = 320,
267 .sizeimage = 320 * 240 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
269 .priv = 1},
270 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
271 .bytesperline = 640,
272 .sizeimage = 640 * 480 * 3 / 8 + 590,
273 .colorspace = V4L2_COLORSPACE_JPEG,
274 .priv = 0},
275 };
276 static const struct v4l2_pix_format ov519_sif_mode[] = {
277 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
278 .bytesperline = 160,
279 .sizeimage = 160 * 120 * 3 / 8 + 590,
280 .colorspace = V4L2_COLORSPACE_JPEG,
281 .priv = 3},
282 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
283 .bytesperline = 176,
284 .sizeimage = 176 * 144 * 3 / 8 + 590,
285 .colorspace = V4L2_COLORSPACE_JPEG,
286 .priv = 1},
287 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
288 .bytesperline = 320,
289 .sizeimage = 320 * 240 * 3 / 8 + 590,
290 .colorspace = V4L2_COLORSPACE_JPEG,
291 .priv = 2},
292 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
293 .bytesperline = 352,
294 .sizeimage = 352 * 288 * 3 / 8 + 590,
295 .colorspace = V4L2_COLORSPACE_JPEG,
296 .priv = 0},
297 };
298
299 /* Note some of the sizeimage values for the ov511 / ov518 may seem
300 larger then necessary, however they need to be this big as the ov511 /
301 ov518 always fills the entire isoc frame, using 0 padding bytes when
302 it doesn't have any data. So with low framerates the amount of data
303 transfered can become quite large (libv4l will remove all the 0 padding
304 in userspace). */
305 static const struct v4l2_pix_format ov518_vga_mode[] = {
306 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
307 .bytesperline = 320,
308 .sizeimage = 320 * 240 * 3,
309 .colorspace = V4L2_COLORSPACE_JPEG,
310 .priv = 1},
311 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
312 .bytesperline = 640,
313 .sizeimage = 640 * 480 * 2,
314 .colorspace = V4L2_COLORSPACE_JPEG,
315 .priv = 0},
316 };
317 static const struct v4l2_pix_format ov518_sif_mode[] = {
318 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
319 .bytesperline = 160,
320 .sizeimage = 70000,
321 .colorspace = V4L2_COLORSPACE_JPEG,
322 .priv = 3},
323 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
324 .bytesperline = 176,
325 .sizeimage = 70000,
326 .colorspace = V4L2_COLORSPACE_JPEG,
327 .priv = 1},
328 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
329 .bytesperline = 320,
330 .sizeimage = 320 * 240 * 3,
331 .colorspace = V4L2_COLORSPACE_JPEG,
332 .priv = 2},
333 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
334 .bytesperline = 352,
335 .sizeimage = 352 * 288 * 3,
336 .colorspace = V4L2_COLORSPACE_JPEG,
337 .priv = 0},
338 };
339
340 static const struct v4l2_pix_format ov511_vga_mode[] = {
341 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
342 .bytesperline = 320,
343 .sizeimage = 320 * 240 * 3,
344 .colorspace = V4L2_COLORSPACE_JPEG,
345 .priv = 1},
346 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
347 .bytesperline = 640,
348 .sizeimage = 640 * 480 * 2,
349 .colorspace = V4L2_COLORSPACE_JPEG,
350 .priv = 0},
351 };
352 static const struct v4l2_pix_format ov511_sif_mode[] = {
353 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
354 .bytesperline = 160,
355 .sizeimage = 70000,
356 .colorspace = V4L2_COLORSPACE_JPEG,
357 .priv = 3},
358 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
359 .bytesperline = 176,
360 .sizeimage = 70000,
361 .colorspace = V4L2_COLORSPACE_JPEG,
362 .priv = 1},
363 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
364 .bytesperline = 320,
365 .sizeimage = 320 * 240 * 3,
366 .colorspace = V4L2_COLORSPACE_JPEG,
367 .priv = 2},
368 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
369 .bytesperline = 352,
370 .sizeimage = 352 * 288 * 3,
371 .colorspace = V4L2_COLORSPACE_JPEG,
372 .priv = 0},
373 };
374
375 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
376 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
377 .bytesperline = 320,
378 .sizeimage = 320 * 240,
379 .colorspace = V4L2_COLORSPACE_SRGB,
380 .priv = 1},
381 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
382 .bytesperline = 640,
383 .sizeimage = 640 * 480,
384 .colorspace = V4L2_COLORSPACE_SRGB,
385 .priv = 0},
386 };
387 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
388 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
389 .bytesperline = 160,
390 .sizeimage = 160 * 120,
391 .colorspace = V4L2_COLORSPACE_SRGB,
392 .priv = 3},
393 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
394 .bytesperline = 176,
395 .sizeimage = 176 * 144,
396 .colorspace = V4L2_COLORSPACE_SRGB,
397 .priv = 1},
398 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
399 .bytesperline = 320,
400 .sizeimage = 320 * 240,
401 .colorspace = V4L2_COLORSPACE_SRGB,
402 .priv = 2},
403 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
404 .bytesperline = 352,
405 .sizeimage = 352 * 288,
406 .colorspace = V4L2_COLORSPACE_SRGB,
407 .priv = 0},
408 };
409 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
410 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
411 .bytesperline = 1600,
412 .sizeimage = 1600 * 1200,
413 .colorspace = V4L2_COLORSPACE_SRGB},
414 };
415 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
416 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
417 .bytesperline = 640,
418 .sizeimage = 640 * 480,
419 .colorspace = V4L2_COLORSPACE_SRGB,
420 .priv = 1},
421 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
422 .bytesperline = 800,
423 .sizeimage = 800 * 600,
424 .colorspace = V4L2_COLORSPACE_SRGB,
425 .priv = 1},
426 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
427 .bytesperline = 1024,
428 .sizeimage = 1024 * 768,
429 .colorspace = V4L2_COLORSPACE_SRGB,
430 .priv = 1},
431 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
432 .bytesperline = 1600,
433 .sizeimage = 1600 * 1200,
434 .colorspace = V4L2_COLORSPACE_SRGB,
435 .priv = 0},
436 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
437 .bytesperline = 2048,
438 .sizeimage = 2048 * 1536,
439 .colorspace = V4L2_COLORSPACE_SRGB,
440 .priv = 0},
441 };
442
443
444 /* Registers common to OV511 / OV518 */
445 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
446 #define R51x_SYS_RESET 0x50
447 /* Reset type flags */
448 #define OV511_RESET_OMNICE 0x08
449 #define R51x_SYS_INIT 0x53
450 #define R51x_SYS_SNAP 0x52
451 #define R51x_SYS_CUST_ID 0x5F
452 #define R51x_COMP_LUT_BEGIN 0x80
453
454 /* OV511 Camera interface register numbers */
455 #define R511_CAM_DELAY 0x10
456 #define R511_CAM_EDGE 0x11
457 #define R511_CAM_PXCNT 0x12
458 #define R511_CAM_LNCNT 0x13
459 #define R511_CAM_PXDIV 0x14
460 #define R511_CAM_LNDIV 0x15
461 #define R511_CAM_UV_EN 0x16
462 #define R511_CAM_LINE_MODE 0x17
463 #define R511_CAM_OPTS 0x18
464
465 #define R511_SNAP_FRAME 0x19
466 #define R511_SNAP_PXCNT 0x1A
467 #define R511_SNAP_LNCNT 0x1B
468 #define R511_SNAP_PXDIV 0x1C
469 #define R511_SNAP_LNDIV 0x1D
470 #define R511_SNAP_UV_EN 0x1E
471 #define R511_SNAP_UV_EN 0x1E
472 #define R511_SNAP_OPTS 0x1F
473
474 #define R511_DRAM_FLOW_CTL 0x20
475 #define R511_FIFO_OPTS 0x31
476 #define R511_I2C_CTL 0x40
477 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
478 #define R511_COMP_EN 0x78
479 #define R511_COMP_LUT_EN 0x79
480
481 /* OV518 Camera interface register numbers */
482 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
483 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
484
485 /* OV519 Camera interface register numbers */
486 #define OV519_R10_H_SIZE 0x10
487 #define OV519_R11_V_SIZE 0x11
488 #define OV519_R12_X_OFFSETL 0x12
489 #define OV519_R13_X_OFFSETH 0x13
490 #define OV519_R14_Y_OFFSETL 0x14
491 #define OV519_R15_Y_OFFSETH 0x15
492 #define OV519_R16_DIVIDER 0x16
493 #define OV519_R20_DFR 0x20
494 #define OV519_R25_FORMAT 0x25
495
496 /* OV519 System Controller register numbers */
497 #define OV519_SYS_RESET1 0x51
498 #define OV519_SYS_EN_CLK1 0x54
499
500 #define OV519_GPIO_DATA_OUT0 0x71
501 #define OV519_GPIO_IO_CTRL0 0x72
502
503 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
504
505 /*
506 * The FX2 chip does not give us a zero length read at end of frame.
507 * It does, however, give a short read at the end of a frame, if
508 * neccessary, rather than run two frames together.
509 *
510 * By choosing the right bulk transfer size, we are guaranteed to always
511 * get a short read for the last read of each frame. Frame sizes are
512 * always a composite number (width * height, or a multiple) so if we
513 * choose a prime number, we are guaranteed that the last read of a
514 * frame will be short.
515 *
516 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
517 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
518 * to figure out why. [PMiller]
519 *
520 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
521 *
522 * It isn't enough to know the number of bytes per frame, in case we
523 * have data dropouts or buffer overruns (even though the FX2 double
524 * buffers, there are some pretty strict real time constraints for
525 * isochronous transfer for larger frame sizes).
526 */
527 #define OVFX2_BULK_SIZE (13 * 4096)
528
529 /* I2C registers */
530 #define R51x_I2C_W_SID 0x41
531 #define R51x_I2C_SADDR_3 0x42
532 #define R51x_I2C_SADDR_2 0x43
533 #define R51x_I2C_R_SID 0x44
534 #define R51x_I2C_DATA 0x45
535 #define R518_I2C_CTL 0x47 /* OV518(+) only */
536 #define OVFX2_I2C_ADDR 0x00
537
538 /* I2C ADDRESSES */
539 #define OV7xx0_SID 0x42
540 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
541 #define OV8xx0_SID 0xa0
542 #define OV6xx0_SID 0xc0
543
544 /* OV7610 registers */
545 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
546 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
547 #define OV7610_REG_RED 0x02 /* red channel balance */
548 #define OV7610_REG_SAT 0x03 /* saturation */
549 #define OV8610_REG_HUE 0x04 /* 04 reserved */
550 #define OV7610_REG_CNT 0x05 /* Y contrast */
551 #define OV7610_REG_BRT 0x06 /* Y brightness */
552 #define OV7610_REG_COM_C 0x14 /* misc common regs */
553 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
554 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
555 #define OV7610_REG_COM_I 0x29 /* misc settings */
556
557 /* OV7670 registers */
558 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
559 #define OV7670_REG_BLUE 0x01 /* blue gain */
560 #define OV7670_REG_RED 0x02 /* red gain */
561 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
562 #define OV7670_REG_COM1 0x04 /* Control 1 */
563 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
564 #define OV7670_REG_COM3 0x0c /* Control 3 */
565 #define OV7670_REG_COM4 0x0d /* Control 4 */
566 #define OV7670_REG_COM5 0x0e /* All "reserved" */
567 #define OV7670_REG_COM6 0x0f /* Control 6 */
568 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
569 #define OV7670_REG_CLKRC 0x11 /* Clock control */
570 #define OV7670_REG_COM7 0x12 /* Control 7 */
571 #define OV7670_COM7_FMT_VGA 0x00
572 #define OV7670_COM7_YUV 0x00 /* YUV */
573 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
574 #define OV7670_COM7_FMT_MASK 0x38
575 #define OV7670_COM7_RESET 0x80 /* Register reset */
576 #define OV7670_REG_COM8 0x13 /* Control 8 */
577 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
578 #define OV7670_COM8_AWB 0x02 /* White balance enable */
579 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
580 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
581 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
582 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
583 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
584 #define OV7670_REG_COM10 0x15 /* Control 10 */
585 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
586 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
587 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
588 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
589 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
590 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
591 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
592 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
593 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
594 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
595 #define OV7670_REG_HREF 0x32 /* HREF pieces */
596 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
597 #define OV7670_REG_COM11 0x3b /* Control 11 */
598 #define OV7670_COM11_EXP 0x02
599 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
600 #define OV7670_REG_COM12 0x3c /* Control 12 */
601 #define OV7670_REG_COM13 0x3d /* Control 13 */
602 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
603 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
604 #define OV7670_REG_COM14 0x3e /* Control 14 */
605 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
606 #define OV7670_REG_COM15 0x40 /* Control 15 */
607 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
608 #define OV7670_REG_COM16 0x41 /* Control 16 */
609 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
610 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
611 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
612 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
613 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
614 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
615 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
616 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
617 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
618 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
619 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
620 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
621 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
622 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
623
624 struct ov_regvals {
625 __u8 reg;
626 __u8 val;
627 };
628 struct ov_i2c_regvals {
629 __u8 reg;
630 __u8 val;
631 };
632
633 /* Settings for OV2610 camera chip */
634 static const struct ov_i2c_regvals norm_2610[] =
635 {
636 { 0x12, 0x80 }, /* reset */
637 };
638
639 static const struct ov_i2c_regvals norm_3620b[] =
640 {
641 /*
642 * From the datasheet: "Note that after writing to register COMH
643 * (0x12) to change the sensor mode, registers related to the
644 * sensor’s cropping window will be reset back to their default
645 * values."
646 *
647 * "wait 4096 external clock ... to make sure the sensor is
648 * stable and ready to access registers" i.e. 160us at 24MHz
649 */
650
651 { 0x12, 0x80 }, /* COMH reset */
652 { 0x12, 0x00 }, /* QXGA, master */
653
654 /*
655 * 11 CLKRC "Clock Rate Control"
656 * [7] internal frequency doublers: on
657 * [6] video port mode: master
658 * [5:0] clock divider: 1
659 */
660 { 0x11, 0x80 },
661
662 /*
663 * 13 COMI "Common Control I"
664 * = 192 (0xC0) 11000000
665 * COMI[7] "AEC speed selection"
666 * = 1 (0x01) 1....... "Faster AEC correction"
667 * COMI[6] "AEC speed step selection"
668 * = 1 (0x01) .1...... "Big steps, fast"
669 * COMI[5] "Banding filter on off"
670 * = 0 (0x00) ..0..... "Off"
671 * COMI[4] "Banding filter option"
672 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
673 * the PLL is ON"
674 * COMI[3] "Reserved"
675 * = 0 (0x00) ....0...
676 * COMI[2] "AGC auto manual control selection"
677 * = 0 (0x00) .....0.. "Manual"
678 * COMI[1] "AWB auto manual control selection"
679 * = 0 (0x00) ......0. "Manual"
680 * COMI[0] "Exposure control"
681 * = 0 (0x00) .......0 "Manual"
682 */
683 { 0x13, 0xC0 },
684
685 /*
686 * 09 COMC "Common Control C"
687 * = 8 (0x08) 00001000
688 * COMC[7:5] "Reserved"
689 * = 0 (0x00) 000.....
690 * COMC[4] "Sleep Mode Enable"
691 * = 0 (0x00) ...0.... "Normal mode"
692 * COMC[3:2] "Sensor sampling reset timing selection"
693 * = 2 (0x02) ....10.. "Longer reset time"
694 * COMC[1:0] "Output drive current select"
695 * = 0 (0x00) ......00 "Weakest"
696 */
697 { 0x09, 0x08 },
698
699 /*
700 * 0C COMD "Common Control D"
701 * = 8 (0x08) 00001000
702 * COMD[7] "Reserved"
703 * = 0 (0x00) 0.......
704 * COMD[6] "Swap MSB and LSB at the output port"
705 * = 0 (0x00) .0...... "False"
706 * COMD[5:3] "Reserved"
707 * = 1 (0x01) ..001...
708 * COMD[2] "Output Average On Off"
709 * = 0 (0x00) .....0.. "Output Normal"
710 * COMD[1] "Sensor precharge voltage selection"
711 * = 0 (0x00) ......0. "Selects internal
712 * reference precharge
713 * voltage"
714 * COMD[0] "Snapshot option"
715 * = 0 (0x00) .......0 "Enable live video output
716 * after snapshot sequence"
717 */
718 { 0x0c, 0x08 },
719
720 /*
721 * 0D COME "Common Control E"
722 * = 161 (0xA1) 10100001
723 * COME[7] "Output average option"
724 * = 1 (0x01) 1....... "Output average of 4 pixels"
725 * COME[6] "Anti-blooming control"
726 * = 0 (0x00) .0...... "Off"
727 * COME[5:3] "Reserved"
728 * = 4 (0x04) ..100...
729 * COME[2] "Clock output power down pin status"
730 * = 0 (0x00) .....0.. "Tri-state data output pin
731 * on power down"
732 * COME[1] "Data output pin status selection at power down"
733 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
734 * HREF, and CHSYNC pins on
735 * power down"
736 * COME[0] "Auto zero circuit select"
737 * = 1 (0x01) .......1 "On"
738 */
739 { 0x0d, 0xA1 },
740
741 /*
742 * 0E COMF "Common Control F"
743 * = 112 (0x70) 01110000
744 * COMF[7] "System clock selection"
745 * = 0 (0x00) 0....... "Use 24 MHz system clock"
746 * COMF[6:4] "Reserved"
747 * = 7 (0x07) .111....
748 * COMF[3] "Manual auto negative offset canceling selection"
749 * = 0 (0x00) ....0... "Auto detect negative
750 * offset and cancel it"
751 * COMF[2:0] "Reserved"
752 * = 0 (0x00) .....000
753 */
754 { 0x0e, 0x70 },
755
756 /*
757 * 0F COMG "Common Control G"
758 * = 66 (0x42) 01000010
759 * COMG[7] "Optical black output selection"
760 * = 0 (0x00) 0....... "Disable"
761 * COMG[6] "Black level calibrate selection"
762 * = 1 (0x01) .1...... "Use optical black pixels
763 * to calibrate"
764 * COMG[5:4] "Reserved"
765 * = 0 (0x00) ..00....
766 * COMG[3] "Channel offset adjustment"
767 * = 0 (0x00) ....0... "Disable offset adjustment"
768 * COMG[2] "ADC black level calibration option"
769 * = 0 (0x00) .....0.. "Use B/G line and G/R
770 * line to calibrate each
771 * channel's black level"
772 * COMG[1] "Reserved"
773 * = 1 (0x01) ......1.
774 * COMG[0] "ADC black level calibration enable"
775 * = 0 (0x00) .......0 "Disable"
776 */
777 { 0x0f, 0x42 },
778
779 /*
780 * 14 COMJ "Common Control J"
781 * = 198 (0xC6) 11000110
782 * COMJ[7:6] "AGC gain ceiling"
783 * = 3 (0x03) 11...... "8x"
784 * COMJ[5:4] "Reserved"
785 * = 0 (0x00) ..00....
786 * COMJ[3] "Auto banding filter"
787 * = 0 (0x00) ....0... "Banding filter is always
788 * on off depending on
789 * COMI[5] setting"
790 * COMJ[2] "VSYNC drop option"
791 * = 1 (0x01) .....1.. "SYNC is dropped if frame
792 * data is dropped"
793 * COMJ[1] "Frame data drop"
794 * = 1 (0x01) ......1. "Drop frame data if
795 * exposure is not within
796 * tolerance. In AEC mode,
797 * data is normally dropped
798 * when data is out of
799 * range."
800 * COMJ[0] "Reserved"
801 * = 0 (0x00) .......0
802 */
803 { 0x14, 0xC6 },
804
805 /*
806 * 15 COMK "Common Control K"
807 * = 2 (0x02) 00000010
808 * COMK[7] "CHSYNC pin output swap"
809 * = 0 (0x00) 0....... "CHSYNC"
810 * COMK[6] "HREF pin output swap"
811 * = 0 (0x00) .0...... "HREF"
812 * COMK[5] "PCLK output selection"
813 * = 0 (0x00) ..0..... "PCLK always output"
814 * COMK[4] "PCLK edge selection"
815 * = 0 (0x00) ...0.... "Data valid on falling edge"
816 * COMK[3] "HREF output polarity"
817 * = 0 (0x00) ....0... "positive"
818 * COMK[2] "Reserved"
819 * = 0 (0x00) .....0..
820 * COMK[1] "VSYNC polarity"
821 * = 1 (0x01) ......1. "negative"
822 * COMK[0] "HSYNC polarity"
823 * = 0 (0x00) .......0 "positive"
824 */
825 { 0x15, 0x02 },
826
827 /*
828 * 33 CHLF "Current Control"
829 * = 9 (0x09) 00001001
830 * CHLF[7:6] "Sensor current control"
831 * = 0 (0x00) 00......
832 * CHLF[5] "Sensor current range control"
833 * = 0 (0x00) ..0..... "normal range"
834 * CHLF[4] "Sensor current"
835 * = 0 (0x00) ...0.... "normal current"
836 * CHLF[3] "Sensor buffer current control"
837 * = 1 (0x01) ....1... "half current"
838 * CHLF[2] "Column buffer current control"
839 * = 0 (0x00) .....0.. "normal current"
840 * CHLF[1] "Analog DSP current control"
841 * = 0 (0x00) ......0. "normal current"
842 * CHLF[1] "ADC current control"
843 * = 0 (0x00) ......0. "normal current"
844 */
845 { 0x33, 0x09 },
846
847 /*
848 * 34 VBLM "Blooming Control"
849 * = 80 (0x50) 01010000
850 * VBLM[7] "Hard soft reset switch"
851 * = 0 (0x00) 0....... "Hard reset"
852 * VBLM[6:4] "Blooming voltage selection"
853 * = 5 (0x05) .101....
854 * VBLM[3:0] "Sensor current control"
855 * = 0 (0x00) ....0000
856 */
857 { 0x34, 0x50 },
858
859 /*
860 * 36 VCHG "Sensor Precharge Voltage Control"
861 * = 0 (0x00) 00000000
862 * VCHG[7] "Reserved"
863 * = 0 (0x00) 0.......
864 * VCHG[6:4] "Sensor precharge voltage control"
865 * = 0 (0x00) .000....
866 * VCHG[3:0] "Sensor array common reference"
867 * = 0 (0x00) ....0000
868 */
869 { 0x36, 0x00 },
870
871 /*
872 * 37 ADC "ADC Reference Control"
873 * = 4 (0x04) 00000100
874 * ADC[7:4] "Reserved"
875 * = 0 (0x00) 0000....
876 * ADC[3] "ADC input signal range"
877 * = 0 (0x00) ....0... "Input signal 1.0x"
878 * ADC[2:0] "ADC range control"
879 * = 4 (0x04) .....100
880 */
881 { 0x37, 0x04 },
882
883 /*
884 * 38 ACOM "Analog Common Ground"
885 * = 82 (0x52) 01010010
886 * ACOM[7] "Analog gain control"
887 * = 0 (0x00) 0....... "Gain 1x"
888 * ACOM[6] "Analog black level calibration"
889 * = 1 (0x01) .1...... "On"
890 * ACOM[5:0] "Reserved"
891 * = 18 (0x12) ..010010
892 */
893 { 0x38, 0x52 },
894
895 /*
896 * 3A FREFA "Internal Reference Adjustment"
897 * = 0 (0x00) 00000000
898 * FREFA[7:0] "Range"
899 * = 0 (0x00) 00000000
900 */
901 { 0x3a, 0x00 },
902
903 /*
904 * 3C FVOPT "Internal Reference Adjustment"
905 * = 31 (0x1F) 00011111
906 * FVOPT[7:0] "Range"
907 * = 31 (0x1F) 00011111
908 */
909 { 0x3c, 0x1F },
910
911 /*
912 * 44 Undocumented = 0 (0x00) 00000000
913 * 44[7:0] "It's a secret"
914 * = 0 (0x00) 00000000
915 */
916 { 0x44, 0x00 },
917
918 /*
919 * 40 Undocumented = 0 (0x00) 00000000
920 * 40[7:0] "It's a secret"
921 * = 0 (0x00) 00000000
922 */
923 { 0x40, 0x00 },
924
925 /*
926 * 41 Undocumented = 0 (0x00) 00000000
927 * 41[7:0] "It's a secret"
928 * = 0 (0x00) 00000000
929 */
930 { 0x41, 0x00 },
931
932 /*
933 * 42 Undocumented = 0 (0x00) 00000000
934 * 42[7:0] "It's a secret"
935 * = 0 (0x00) 00000000
936 */
937 { 0x42, 0x00 },
938
939 /*
940 * 43 Undocumented = 0 (0x00) 00000000
941 * 43[7:0] "It's a secret"
942 * = 0 (0x00) 00000000
943 */
944 { 0x43, 0x00 },
945
946 /*
947 * 45 Undocumented = 128 (0x80) 10000000
948 * 45[7:0] "It's a secret"
949 * = 128 (0x80) 10000000
950 */
951 { 0x45, 0x80 },
952
953 /*
954 * 48 Undocumented = 192 (0xC0) 11000000
955 * 48[7:0] "It's a secret"
956 * = 192 (0xC0) 11000000
957 */
958 { 0x48, 0xC0 },
959
960 /*
961 * 49 Undocumented = 25 (0x19) 00011001
962 * 49[7:0] "It's a secret"
963 * = 25 (0x19) 00011001
964 */
965 { 0x49, 0x19 },
966
967 /*
968 * 4B Undocumented = 128 (0x80) 10000000
969 * 4B[7:0] "It's a secret"
970 * = 128 (0x80) 10000000
971 */
972 { 0x4B, 0x80 },
973
974 /*
975 * 4D Undocumented = 196 (0xC4) 11000100
976 * 4D[7:0] "It's a secret"
977 * = 196 (0xC4) 11000100
978 */
979 { 0x4D, 0xC4 },
980
981 /*
982 * 35 VREF "Reference Voltage Control"
983 * = 76 (0x4C) 01001100
984 * VREF[7:5] "Column high reference control"
985 * = 2 (0x02) 010..... "higher voltage"
986 * VREF[4:2] "Column low reference control"
987 * = 3 (0x03) ...011.. "Highest voltage"
988 * VREF[1:0] "Reserved"
989 * = 0 (0x00) ......00
990 */
991 { 0x35, 0x4C },
992
993 /*
994 * 3D Undocumented = 0 (0x00) 00000000
995 * 3D[7:0] "It's a secret"
996 * = 0 (0x00) 00000000
997 */
998 { 0x3D, 0x00 },
999
1000 /*
1001 * 3E Undocumented = 0 (0x00) 00000000
1002 * 3E[7:0] "It's a secret"
1003 * = 0 (0x00) 00000000
1004 */
1005 { 0x3E, 0x00 },
1006
1007 /*
1008 * 3B FREFB "Internal Reference Adjustment"
1009 * = 24 (0x18) 00011000
1010 * FREFB[7:0] "Range"
1011 * = 24 (0x18) 00011000
1012 */
1013 { 0x3b, 0x18 },
1014
1015 /*
1016 * 33 CHLF "Current Control"
1017 * = 25 (0x19) 00011001
1018 * CHLF[7:6] "Sensor current control"
1019 * = 0 (0x00) 00......
1020 * CHLF[5] "Sensor current range control"
1021 * = 0 (0x00) ..0..... "normal range"
1022 * CHLF[4] "Sensor current"
1023 * = 1 (0x01) ...1.... "double current"
1024 * CHLF[3] "Sensor buffer current control"
1025 * = 1 (0x01) ....1... "half current"
1026 * CHLF[2] "Column buffer current control"
1027 * = 0 (0x00) .....0.. "normal current"
1028 * CHLF[1] "Analog DSP current control"
1029 * = 0 (0x00) ......0. "normal current"
1030 * CHLF[1] "ADC current control"
1031 * = 0 (0x00) ......0. "normal current"
1032 */
1033 { 0x33, 0x19 },
1034
1035 /*
1036 * 34 VBLM "Blooming Control"
1037 * = 90 (0x5A) 01011010
1038 * VBLM[7] "Hard soft reset switch"
1039 * = 0 (0x00) 0....... "Hard reset"
1040 * VBLM[6:4] "Blooming voltage selection"
1041 * = 5 (0x05) .101....
1042 * VBLM[3:0] "Sensor current control"
1043 * = 10 (0x0A) ....1010
1044 */
1045 { 0x34, 0x5A },
1046
1047 /*
1048 * 3B FREFB "Internal Reference Adjustment"
1049 * = 0 (0x00) 00000000
1050 * FREFB[7:0] "Range"
1051 * = 0 (0x00) 00000000
1052 */
1053 { 0x3b, 0x00 },
1054
1055 /*
1056 * 33 CHLF "Current Control"
1057 * = 9 (0x09) 00001001
1058 * CHLF[7:6] "Sensor current control"
1059 * = 0 (0x00) 00......
1060 * CHLF[5] "Sensor current range control"
1061 * = 0 (0x00) ..0..... "normal range"
1062 * CHLF[4] "Sensor current"
1063 * = 0 (0x00) ...0.... "normal current"
1064 * CHLF[3] "Sensor buffer current control"
1065 * = 1 (0x01) ....1... "half current"
1066 * CHLF[2] "Column buffer current control"
1067 * = 0 (0x00) .....0.. "normal current"
1068 * CHLF[1] "Analog DSP current control"
1069 * = 0 (0x00) ......0. "normal current"
1070 * CHLF[1] "ADC current control"
1071 * = 0 (0x00) ......0. "normal current"
1072 */
1073 { 0x33, 0x09 },
1074
1075 /*
1076 * 34 VBLM "Blooming Control"
1077 * = 80 (0x50) 01010000
1078 * VBLM[7] "Hard soft reset switch"
1079 * = 0 (0x00) 0....... "Hard reset"
1080 * VBLM[6:4] "Blooming voltage selection"
1081 * = 5 (0x05) .101....
1082 * VBLM[3:0] "Sensor current control"
1083 * = 0 (0x00) ....0000
1084 */
1085 { 0x34, 0x50 },
1086
1087 /*
1088 * 12 COMH "Common Control H"
1089 * = 64 (0x40) 01000000
1090 * COMH[7] "SRST"
1091 * = 0 (0x00) 0....... "No-op"
1092 * COMH[6:4] "Resolution selection"
1093 * = 4 (0x04) .100.... "XGA"
1094 * COMH[3] "Master slave selection"
1095 * = 0 (0x00) ....0... "Master mode"
1096 * COMH[2] "Internal B/R channel option"
1097 * = 0 (0x00) .....0.. "B/R use same channel"
1098 * COMH[1] "Color bar test pattern"
1099 * = 0 (0x00) ......0. "Off"
1100 * COMH[0] "Reserved"
1101 * = 0 (0x00) .......0
1102 */
1103 { 0x12, 0x40 },
1104
1105 /*
1106 * 17 HREFST "Horizontal window start"
1107 * = 31 (0x1F) 00011111
1108 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1109 * = 31 (0x1F) 00011111
1110 */
1111 { 0x17, 0x1F },
1112
1113 /*
1114 * 18 HREFEND "Horizontal window end"
1115 * = 95 (0x5F) 01011111
1116 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1117 * = 95 (0x5F) 01011111
1118 */
1119 { 0x18, 0x5F },
1120
1121 /*
1122 * 19 VSTRT "Vertical window start"
1123 * = 0 (0x00) 00000000
1124 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1125 * = 0 (0x00) 00000000
1126 */
1127 { 0x19, 0x00 },
1128
1129 /*
1130 * 1A VEND "Vertical window end"
1131 * = 96 (0x60) 01100000
1132 * VEND[7:0] "Vertical Window End, 8 MSBs"
1133 * = 96 (0x60) 01100000
1134 */
1135 { 0x1a, 0x60 },
1136
1137 /*
1138 * 32 COMM "Common Control M"
1139 * = 18 (0x12) 00010010
1140 * COMM[7:6] "Pixel clock divide option"
1141 * = 0 (0x00) 00...... "/1"
1142 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1143 * = 2 (0x02) ..010...
1144 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1145 * = 2 (0x02) .....010
1146 */
1147 { 0x32, 0x12 },
1148
1149 /*
1150 * 03 COMA "Common Control A"
1151 * = 74 (0x4A) 01001010
1152 * COMA[7:4] "AWB Update Threshold"
1153 * = 4 (0x04) 0100....
1154 * COMA[3:2] "Vertical window end line control 2 LSBs"
1155 * = 2 (0x02) ....10..
1156 * COMA[1:0] "Vertical window start line control 2 LSBs"
1157 * = 2 (0x02) ......10
1158 */
1159 { 0x03, 0x4A },
1160
1161 /*
1162 * 11 CLKRC "Clock Rate Control"
1163 * = 128 (0x80) 10000000
1164 * CLKRC[7] "Internal frequency doublers on off seclection"
1165 * = 1 (0x01) 1....... "On"
1166 * CLKRC[6] "Digital video master slave selection"
1167 * = 0 (0x00) .0...... "Master mode, sensor
1168 * provides PCLK"
1169 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1170 * = 0 (0x00) ..000000
1171 */
1172 { 0x11, 0x80 },
1173
1174 /*
1175 * 12 COMH "Common Control H"
1176 * = 0 (0x00) 00000000
1177 * COMH[7] "SRST"
1178 * = 0 (0x00) 0....... "No-op"
1179 * COMH[6:4] "Resolution selection"
1180 * = 0 (0x00) .000.... "QXGA"
1181 * COMH[3] "Master slave selection"
1182 * = 0 (0x00) ....0... "Master mode"
1183 * COMH[2] "Internal B/R channel option"
1184 * = 0 (0x00) .....0.. "B/R use same channel"
1185 * COMH[1] "Color bar test pattern"
1186 * = 0 (0x00) ......0. "Off"
1187 * COMH[0] "Reserved"
1188 * = 0 (0x00) .......0
1189 */
1190 { 0x12, 0x00 },
1191
1192 /*
1193 * 12 COMH "Common Control H"
1194 * = 64 (0x40) 01000000
1195 * COMH[7] "SRST"
1196 * = 0 (0x00) 0....... "No-op"
1197 * COMH[6:4] "Resolution selection"
1198 * = 4 (0x04) .100.... "XGA"
1199 * COMH[3] "Master slave selection"
1200 * = 0 (0x00) ....0... "Master mode"
1201 * COMH[2] "Internal B/R channel option"
1202 * = 0 (0x00) .....0.. "B/R use same channel"
1203 * COMH[1] "Color bar test pattern"
1204 * = 0 (0x00) ......0. "Off"
1205 * COMH[0] "Reserved"
1206 * = 0 (0x00) .......0
1207 */
1208 { 0x12, 0x40 },
1209
1210 /*
1211 * 17 HREFST "Horizontal window start"
1212 * = 31 (0x1F) 00011111
1213 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1214 * = 31 (0x1F) 00011111
1215 */
1216 { 0x17, 0x1F },
1217
1218 /*
1219 * 18 HREFEND "Horizontal window end"
1220 * = 95 (0x5F) 01011111
1221 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1222 * = 95 (0x5F) 01011111
1223 */
1224 { 0x18, 0x5F },
1225
1226 /*
1227 * 19 VSTRT "Vertical window start"
1228 * = 0 (0x00) 00000000
1229 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1230 * = 0 (0x00) 00000000
1231 */
1232 { 0x19, 0x00 },
1233
1234 /*
1235 * 1A VEND "Vertical window end"
1236 * = 96 (0x60) 01100000
1237 * VEND[7:0] "Vertical Window End, 8 MSBs"
1238 * = 96 (0x60) 01100000
1239 */
1240 { 0x1a, 0x60 },
1241
1242 /*
1243 * 32 COMM "Common Control M"
1244 * = 18 (0x12) 00010010
1245 * COMM[7:6] "Pixel clock divide option"
1246 * = 0 (0x00) 00...... "/1"
1247 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1248 * = 2 (0x02) ..010...
1249 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1250 * = 2 (0x02) .....010
1251 */
1252 { 0x32, 0x12 },
1253
1254 /*
1255 * 03 COMA "Common Control A"
1256 * = 74 (0x4A) 01001010
1257 * COMA[7:4] "AWB Update Threshold"
1258 * = 4 (0x04) 0100....
1259 * COMA[3:2] "Vertical window end line control 2 LSBs"
1260 * = 2 (0x02) ....10..
1261 * COMA[1:0] "Vertical window start line control 2 LSBs"
1262 * = 2 (0x02) ......10
1263 */
1264 { 0x03, 0x4A },
1265
1266 /*
1267 * 02 RED "Red Gain Control"
1268 * = 175 (0xAF) 10101111
1269 * RED[7] "Action"
1270 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1271 * RED[6:0] "Value"
1272 * = 47 (0x2F) .0101111
1273 */
1274 { 0x02, 0xAF },
1275
1276 /*
1277 * 2D ADDVSL "VSYNC Pulse Width"
1278 * = 210 (0xD2) 11010010
1279 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1280 * = 210 (0xD2) 11010010
1281 */
1282 { 0x2d, 0xD2 },
1283
1284 /*
1285 * 00 GAIN = 24 (0x18) 00011000
1286 * GAIN[7:6] "Reserved"
1287 * = 0 (0x00) 00......
1288 * GAIN[5] "Double"
1289 * = 0 (0x00) ..0..... "False"
1290 * GAIN[4] "Double"
1291 * = 1 (0x01) ...1.... "True"
1292 * GAIN[3:0] "Range"
1293 * = 8 (0x08) ....1000
1294 */
1295 { 0x00, 0x18 },
1296
1297 /*
1298 * 01 BLUE "Blue Gain Control"
1299 * = 240 (0xF0) 11110000
1300 * BLUE[7] "Action"
1301 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1302 * BLUE[6:0] "Value"
1303 * = 112 (0x70) .1110000
1304 */
1305 { 0x01, 0xF0 },
1306
1307 /*
1308 * 10 AEC "Automatic Exposure Control"
1309 * = 10 (0x0A) 00001010
1310 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1311 * = 10 (0x0A) 00001010
1312 */
1313 { 0x10, 0x0A },
1314
1315 { 0xE1, 0x67 },
1316 { 0xE3, 0x03 },
1317 { 0xE4, 0x26 },
1318 { 0xE5, 0x3E },
1319 { 0xF8, 0x01 },
1320 { 0xFF, 0x01 },
1321 };
1322
1323 static const struct ov_i2c_regvals norm_6x20[] = {
1324 { 0x12, 0x80 }, /* reset */
1325 { 0x11, 0x01 },
1326 { 0x03, 0x60 },
1327 { 0x05, 0x7f }, /* For when autoadjust is off */
1328 { 0x07, 0xa8 },
1329 /* The ratio of 0x0c and 0x0d controls the white point */
1330 { 0x0c, 0x24 },
1331 { 0x0d, 0x24 },
1332 { 0x0f, 0x15 }, /* COMS */
1333 { 0x10, 0x75 }, /* AEC Exposure time */
1334 { 0x12, 0x24 }, /* Enable AGC */
1335 { 0x14, 0x04 },
1336 /* 0x16: 0x06 helps frame stability with moving objects */
1337 { 0x16, 0x06 },
1338 /* { 0x20, 0x30 }, * Aperture correction enable */
1339 { 0x26, 0xb2 }, /* BLC enable */
1340 /* 0x28: 0x05 Selects RGB format if RGB on */
1341 { 0x28, 0x05 },
1342 { 0x2a, 0x04 }, /* Disable framerate adjust */
1343 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1344 { 0x2d, 0x85 },
1345 { 0x33, 0xa0 }, /* Color Processing Parameter */
1346 { 0x34, 0xd2 }, /* Max A/D range */
1347 { 0x38, 0x8b },
1348 { 0x39, 0x40 },
1349
1350 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1351 { 0x3c, 0x3c }, /* Change AEC mode */
1352 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1353
1354 { 0x3d, 0x80 },
1355 /* These next two registers (0x4a, 0x4b) are undocumented.
1356 * They control the color balance */
1357 { 0x4a, 0x80 },
1358 { 0x4b, 0x80 },
1359 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1360 { 0x4e, 0xc1 },
1361 { 0x4f, 0x04 },
1362 /* Do 50-53 have any effect? */
1363 /* Toggle 0x12[2] off and on here? */
1364 };
1365
1366 static const struct ov_i2c_regvals norm_6x30[] = {
1367 { 0x12, 0x80 }, /* Reset */
1368 { 0x00, 0x1f }, /* Gain */
1369 { 0x01, 0x99 }, /* Blue gain */
1370 { 0x02, 0x7c }, /* Red gain */
1371 { 0x03, 0xc0 }, /* Saturation */
1372 { 0x05, 0x0a }, /* Contrast */
1373 { 0x06, 0x95 }, /* Brightness */
1374 { 0x07, 0x2d }, /* Sharpness */
1375 { 0x0c, 0x20 },
1376 { 0x0d, 0x20 },
1377 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1378 { 0x0f, 0x05 },
1379 { 0x10, 0x9a },
1380 { 0x11, 0x00 }, /* Pixel clock = fastest */
1381 { 0x12, 0x24 }, /* Enable AGC and AWB */
1382 { 0x13, 0x21 },
1383 { 0x14, 0x80 },
1384 { 0x15, 0x01 },
1385 { 0x16, 0x03 },
1386 { 0x17, 0x38 },
1387 { 0x18, 0xea },
1388 { 0x19, 0x04 },
1389 { 0x1a, 0x93 },
1390 { 0x1b, 0x00 },
1391 { 0x1e, 0xc4 },
1392 { 0x1f, 0x04 },
1393 { 0x20, 0x20 },
1394 { 0x21, 0x10 },
1395 { 0x22, 0x88 },
1396 { 0x23, 0xc0 }, /* Crystal circuit power level */
1397 { 0x25, 0x9a }, /* Increase AEC black ratio */
1398 { 0x26, 0xb2 }, /* BLC enable */
1399 { 0x27, 0xa2 },
1400 { 0x28, 0x00 },
1401 { 0x29, 0x00 },
1402 { 0x2a, 0x84 }, /* 60 Hz power */
1403 { 0x2b, 0xa8 }, /* 60 Hz power */
1404 { 0x2c, 0xa0 },
1405 { 0x2d, 0x95 }, /* Enable auto-brightness */
1406 { 0x2e, 0x88 },
1407 { 0x33, 0x26 },
1408 { 0x34, 0x03 },
1409 { 0x36, 0x8f },
1410 { 0x37, 0x80 },
1411 { 0x38, 0x83 },
1412 { 0x39, 0x80 },
1413 { 0x3a, 0x0f },
1414 { 0x3b, 0x3c },
1415 { 0x3c, 0x1a },
1416 { 0x3d, 0x80 },
1417 { 0x3e, 0x80 },
1418 { 0x3f, 0x0e },
1419 { 0x40, 0x00 }, /* White bal */
1420 { 0x41, 0x00 }, /* White bal */
1421 { 0x42, 0x80 },
1422 { 0x43, 0x3f }, /* White bal */
1423 { 0x44, 0x80 },
1424 { 0x45, 0x20 },
1425 { 0x46, 0x20 },
1426 { 0x47, 0x80 },
1427 { 0x48, 0x7f },
1428 { 0x49, 0x00 },
1429 { 0x4a, 0x00 },
1430 { 0x4b, 0x80 },
1431 { 0x4c, 0xd0 },
1432 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1433 { 0x4e, 0x40 },
1434 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1435 { 0x50, 0xff },
1436 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1437 { 0x55, 0xff },
1438 { 0x56, 0x12 },
1439 { 0x57, 0x81 },
1440 { 0x58, 0x75 },
1441 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1442 { 0x5a, 0x2c },
1443 { 0x5b, 0x0f }, /* AWB chrominance levels */
1444 { 0x5c, 0x10 },
1445 { 0x3d, 0x80 },
1446 { 0x27, 0xa6 },
1447 { 0x12, 0x20 }, /* Toggle AWB */
1448 { 0x12, 0x24 },
1449 };
1450
1451 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1452 *
1453 * Register 0x0f in the 7610 has the following effects:
1454 *
1455 * 0x85 (AEC method 1): Best overall, good contrast range
1456 * 0x45 (AEC method 2): Very overexposed
1457 * 0xa5 (spec sheet default): Ok, but the black level is
1458 * shifted resulting in loss of contrast
1459 * 0x05 (old driver setting): very overexposed, too much
1460 * contrast
1461 */
1462 static const struct ov_i2c_regvals norm_7610[] = {
1463 { 0x10, 0xff },
1464 { 0x16, 0x06 },
1465 { 0x28, 0x24 },
1466 { 0x2b, 0xac },
1467 { 0x12, 0x00 },
1468 { 0x38, 0x81 },
1469 { 0x28, 0x24 }, /* 0c */
1470 { 0x0f, 0x85 }, /* lg's setting */
1471 { 0x15, 0x01 },
1472 { 0x20, 0x1c },
1473 { 0x23, 0x2a },
1474 { 0x24, 0x10 },
1475 { 0x25, 0x8a },
1476 { 0x26, 0xa2 },
1477 { 0x27, 0xc2 },
1478 { 0x2a, 0x04 },
1479 { 0x2c, 0xfe },
1480 { 0x2d, 0x93 },
1481 { 0x30, 0x71 },
1482 { 0x31, 0x60 },
1483 { 0x32, 0x26 },
1484 { 0x33, 0x20 },
1485 { 0x34, 0x48 },
1486 { 0x12, 0x24 },
1487 { 0x11, 0x01 },
1488 { 0x0c, 0x24 },
1489 { 0x0d, 0x24 },
1490 };
1491
1492 static const struct ov_i2c_regvals norm_7620[] = {
1493 { 0x12, 0x80 }, /* reset */
1494 { 0x00, 0x00 }, /* gain */
1495 { 0x01, 0x80 }, /* blue gain */
1496 { 0x02, 0x80 }, /* red gain */
1497 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1498 { 0x06, 0x60 },
1499 { 0x07, 0x00 },
1500 { 0x0c, 0x24 },
1501 { 0x0c, 0x24 },
1502 { 0x0d, 0x24 },
1503 { 0x11, 0x01 },
1504 { 0x12, 0x24 },
1505 { 0x13, 0x01 },
1506 { 0x14, 0x84 },
1507 { 0x15, 0x01 },
1508 { 0x16, 0x03 },
1509 { 0x17, 0x2f },
1510 { 0x18, 0xcf },
1511 { 0x19, 0x06 },
1512 { 0x1a, 0xf5 },
1513 { 0x1b, 0x00 },
1514 { 0x20, 0x18 },
1515 { 0x21, 0x80 },
1516 { 0x22, 0x80 },
1517 { 0x23, 0x00 },
1518 { 0x26, 0xa2 },
1519 { 0x27, 0xea },
1520 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1521 { 0x29, 0x00 },
1522 { 0x2a, 0x10 },
1523 { 0x2b, 0x00 },
1524 { 0x2c, 0x88 },
1525 { 0x2d, 0x91 },
1526 { 0x2e, 0x80 },
1527 { 0x2f, 0x44 },
1528 { 0x60, 0x27 },
1529 { 0x61, 0x02 },
1530 { 0x62, 0x5f },
1531 { 0x63, 0xd5 },
1532 { 0x64, 0x57 },
1533 { 0x65, 0x83 },
1534 { 0x66, 0x55 },
1535 { 0x67, 0x92 },
1536 { 0x68, 0xcf },
1537 { 0x69, 0x76 },
1538 { 0x6a, 0x22 },
1539 { 0x6b, 0x00 },
1540 { 0x6c, 0x02 },
1541 { 0x6d, 0x44 },
1542 { 0x6e, 0x80 },
1543 { 0x6f, 0x1d },
1544 { 0x70, 0x8b },
1545 { 0x71, 0x00 },
1546 { 0x72, 0x14 },
1547 { 0x73, 0x54 },
1548 { 0x74, 0x00 },
1549 { 0x75, 0x8e },
1550 { 0x76, 0x00 },
1551 { 0x77, 0xff },
1552 { 0x78, 0x80 },
1553 { 0x79, 0x80 },
1554 { 0x7a, 0x80 },
1555 { 0x7b, 0xe2 },
1556 { 0x7c, 0x00 },
1557 };
1558
1559 /* 7640 and 7648. The defaults should be OK for most registers. */
1560 static const struct ov_i2c_regvals norm_7640[] = {
1561 { 0x12, 0x80 },
1562 { 0x12, 0x14 },
1563 };
1564
1565 /* 7670. Defaults taken from OmniVision provided data,
1566 * as provided by Jonathan Corbet of OLPC */
1567 static const struct ov_i2c_regvals norm_7670[] = {
1568 { OV7670_REG_COM7, OV7670_COM7_RESET },
1569 { OV7670_REG_TSLB, 0x04 }, /* OV */
1570 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1571 { OV7670_REG_CLKRC, 0x01 },
1572 /*
1573 * Set the hardware window. These values from OV don't entirely
1574 * make sense - hstop is less than hstart. But they work...
1575 */
1576 { OV7670_REG_HSTART, 0x13 },
1577 { OV7670_REG_HSTOP, 0x01 },
1578 { OV7670_REG_HREF, 0xb6 },
1579 { OV7670_REG_VSTART, 0x02 },
1580 { OV7670_REG_VSTOP, 0x7a },
1581 { OV7670_REG_VREF, 0x0a },
1582
1583 { OV7670_REG_COM3, 0x00 },
1584 { OV7670_REG_COM14, 0x00 },
1585 /* Mystery scaling numbers */
1586 { 0x70, 0x3a },
1587 { 0x71, 0x35 },
1588 { 0x72, 0x11 },
1589 { 0x73, 0xf0 },
1590 { 0xa2, 0x02 },
1591 /* { OV7670_REG_COM10, 0x0 }, */
1592
1593 /* Gamma curve values */
1594 { 0x7a, 0x20 },
1595 { 0x7b, 0x10 },
1596 { 0x7c, 0x1e },
1597 { 0x7d, 0x35 },
1598 { 0x7e, 0x5a },
1599 { 0x7f, 0x69 },
1600 { 0x80, 0x76 },
1601 { 0x81, 0x80 },
1602 { 0x82, 0x88 },
1603 { 0x83, 0x8f },
1604 { 0x84, 0x96 },
1605 { 0x85, 0xa3 },
1606 { 0x86, 0xaf },
1607 { 0x87, 0xc4 },
1608 { 0x88, 0xd7 },
1609 { 0x89, 0xe8 },
1610
1611 /* AGC and AEC parameters. Note we start by disabling those features,
1612 then turn them only after tweaking the values. */
1613 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1614 | OV7670_COM8_AECSTEP
1615 | OV7670_COM8_BFILT },
1616 { OV7670_REG_GAIN, 0x00 },
1617 { OV7670_REG_AECH, 0x00 },
1618 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1619 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1620 { OV7670_REG_BD50MAX, 0x05 },
1621 { OV7670_REG_BD60MAX, 0x07 },
1622 { OV7670_REG_AEW, 0x95 },
1623 { OV7670_REG_AEB, 0x33 },
1624 { OV7670_REG_VPT, 0xe3 },
1625 { OV7670_REG_HAECC1, 0x78 },
1626 { OV7670_REG_HAECC2, 0x68 },
1627 { 0xa1, 0x03 }, /* magic */
1628 { OV7670_REG_HAECC3, 0xd8 },
1629 { OV7670_REG_HAECC4, 0xd8 },
1630 { OV7670_REG_HAECC5, 0xf0 },
1631 { OV7670_REG_HAECC6, 0x90 },
1632 { OV7670_REG_HAECC7, 0x94 },
1633 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1634 | OV7670_COM8_AECSTEP
1635 | OV7670_COM8_BFILT
1636 | OV7670_COM8_AGC
1637 | OV7670_COM8_AEC },
1638
1639 /* Almost all of these are magic "reserved" values. */
1640 { OV7670_REG_COM5, 0x61 },
1641 { OV7670_REG_COM6, 0x4b },
1642 { 0x16, 0x02 },
1643 { OV7670_REG_MVFP, 0x07 },
1644 { 0x21, 0x02 },
1645 { 0x22, 0x91 },
1646 { 0x29, 0x07 },
1647 { 0x33, 0x0b },
1648 { 0x35, 0x0b },
1649 { 0x37, 0x1d },
1650 { 0x38, 0x71 },
1651 { 0x39, 0x2a },
1652 { OV7670_REG_COM12, 0x78 },
1653 { 0x4d, 0x40 },
1654 { 0x4e, 0x20 },
1655 { OV7670_REG_GFIX, 0x00 },
1656 { 0x6b, 0x4a },
1657 { 0x74, 0x10 },
1658 { 0x8d, 0x4f },
1659 { 0x8e, 0x00 },
1660 { 0x8f, 0x00 },
1661 { 0x90, 0x00 },
1662 { 0x91, 0x00 },
1663 { 0x96, 0x00 },
1664 { 0x9a, 0x00 },
1665 { 0xb0, 0x84 },
1666 { 0xb1, 0x0c },
1667 { 0xb2, 0x0e },
1668 { 0xb3, 0x82 },
1669 { 0xb8, 0x0a },
1670
1671 /* More reserved magic, some of which tweaks white balance */
1672 { 0x43, 0x0a },
1673 { 0x44, 0xf0 },
1674 { 0x45, 0x34 },
1675 { 0x46, 0x58 },
1676 { 0x47, 0x28 },
1677 { 0x48, 0x3a },
1678 { 0x59, 0x88 },
1679 { 0x5a, 0x88 },
1680 { 0x5b, 0x44 },
1681 { 0x5c, 0x67 },
1682 { 0x5d, 0x49 },
1683 { 0x5e, 0x0e },
1684 { 0x6c, 0x0a },
1685 { 0x6d, 0x55 },
1686 { 0x6e, 0x11 },
1687 { 0x6f, 0x9f },
1688 /* "9e for advance AWB" */
1689 { 0x6a, 0x40 },
1690 { OV7670_REG_BLUE, 0x40 },
1691 { OV7670_REG_RED, 0x60 },
1692 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1693 | OV7670_COM8_AECSTEP
1694 | OV7670_COM8_BFILT
1695 | OV7670_COM8_AGC
1696 | OV7670_COM8_AEC
1697 | OV7670_COM8_AWB },
1698
1699 /* Matrix coefficients */
1700 { 0x4f, 0x80 },
1701 { 0x50, 0x80 },
1702 { 0x51, 0x00 },
1703 { 0x52, 0x22 },
1704 { 0x53, 0x5e },
1705 { 0x54, 0x80 },
1706 { 0x58, 0x9e },
1707
1708 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1709 { OV7670_REG_EDGE, 0x00 },
1710 { 0x75, 0x05 },
1711 { 0x76, 0xe1 },
1712 { 0x4c, 0x00 },
1713 { 0x77, 0x01 },
1714 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1715 | OV7670_COM13_UVSAT
1716 | 2}, /* was 3 */
1717 { 0x4b, 0x09 },
1718 { 0xc9, 0x60 },
1719 { OV7670_REG_COM16, 0x38 },
1720 { 0x56, 0x40 },
1721
1722 { 0x34, 0x11 },
1723 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1724 { 0xa4, 0x88 },
1725 { 0x96, 0x00 },
1726 { 0x97, 0x30 },
1727 { 0x98, 0x20 },
1728 { 0x99, 0x30 },
1729 { 0x9a, 0x84 },
1730 { 0x9b, 0x29 },
1731 { 0x9c, 0x03 },
1732 { 0x9d, 0x4c },
1733 { 0x9e, 0x3f },
1734 { 0x78, 0x04 },
1735
1736 /* Extra-weird stuff. Some sort of multiplexor register */
1737 { 0x79, 0x01 },
1738 { 0xc8, 0xf0 },
1739 { 0x79, 0x0f },
1740 { 0xc8, 0x00 },
1741 { 0x79, 0x10 },
1742 { 0xc8, 0x7e },
1743 { 0x79, 0x0a },
1744 { 0xc8, 0x80 },
1745 { 0x79, 0x0b },
1746 { 0xc8, 0x01 },
1747 { 0x79, 0x0c },
1748 { 0xc8, 0x0f },
1749 { 0x79, 0x0d },
1750 { 0xc8, 0x20 },
1751 { 0x79, 0x09 },
1752 { 0xc8, 0x80 },
1753 { 0x79, 0x02 },
1754 { 0xc8, 0xc0 },
1755 { 0x79, 0x03 },
1756 { 0xc8, 0x40 },
1757 { 0x79, 0x05 },
1758 { 0xc8, 0x30 },
1759 { 0x79, 0x26 },
1760 };
1761
1762 static const struct ov_i2c_regvals norm_8610[] = {
1763 { 0x12, 0x80 },
1764 { 0x00, 0x00 },
1765 { 0x01, 0x80 },
1766 { 0x02, 0x80 },
1767 { 0x03, 0xc0 },
1768 { 0x04, 0x30 },
1769 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1770 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1771 { 0x0a, 0x86 },
1772 { 0x0b, 0xb0 },
1773 { 0x0c, 0x20 },
1774 { 0x0d, 0x20 },
1775 { 0x11, 0x01 },
1776 { 0x12, 0x25 },
1777 { 0x13, 0x01 },
1778 { 0x14, 0x04 },
1779 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1780 { 0x16, 0x03 },
1781 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1782 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1783 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1784 { 0x1a, 0xf5 },
1785 { 0x1b, 0x00 },
1786 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1787 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1788 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1789 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1790 { 0x26, 0xa2 },
1791 { 0x27, 0xea },
1792 { 0x28, 0x00 },
1793 { 0x29, 0x00 },
1794 { 0x2a, 0x80 },
1795 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1796 { 0x2c, 0xac },
1797 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1798 { 0x2e, 0x80 },
1799 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1800 { 0x4c, 0x00 },
1801 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1802 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1803 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1804 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1805 { 0x63, 0xff },
1806 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1807 * maybe thats wrong */
1808 { 0x65, 0x00 },
1809 { 0x66, 0x55 },
1810 { 0x67, 0xb0 },
1811 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1812 { 0x69, 0x02 },
1813 { 0x6a, 0x22 },
1814 { 0x6b, 0x00 },
1815 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1816 * deleting bit7 colors the first images red */
1817 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1818 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1819 { 0x6f, 0x01 },
1820 { 0x70, 0x8b },
1821 { 0x71, 0x00 },
1822 { 0x72, 0x14 },
1823 { 0x73, 0x54 },
1824 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1825 { 0x75, 0x0e },
1826 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1827 { 0x77, 0xff },
1828 { 0x78, 0x80 },
1829 { 0x79, 0x80 },
1830 { 0x7a, 0x80 },
1831 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1832 { 0x7c, 0x00 },
1833 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1834 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1835 { 0x7f, 0xfb },
1836 { 0x80, 0x28 },
1837 { 0x81, 0x00 },
1838 { 0x82, 0x23 },
1839 { 0x83, 0x0b },
1840 { 0x84, 0x00 },
1841 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1842 { 0x86, 0xc9 },
1843 { 0x87, 0x00 },
1844 { 0x88, 0x00 },
1845 { 0x89, 0x01 },
1846 { 0x12, 0x20 },
1847 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1848 };
1849
1850 static unsigned char ov7670_abs_to_sm(unsigned char v)
1851 {
1852 if (v > 127)
1853 return v & 0x7f;
1854 return (128 - v) | 0x80;
1855 }
1856
1857 /* Write a OV519 register */
1858 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1859 {
1860 int ret, req = 0;
1861
1862 switch (sd->bridge) {
1863 case BRIDGE_OV511:
1864 case BRIDGE_OV511PLUS:
1865 req = 2;
1866 break;
1867 case BRIDGE_OVFX2:
1868 req = 0x0a;
1869 /* fall through */
1870 case BRIDGE_W9968CF:
1871 ret = usb_control_msg(sd->gspca_dev.dev,
1872 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1873 req,
1874 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1875 value, index, NULL, 0, 500);
1876 goto leave;
1877 default:
1878 req = 1;
1879 }
1880
1881 sd->gspca_dev.usb_buf[0] = value;
1882 ret = usb_control_msg(sd->gspca_dev.dev,
1883 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1884 req,
1885 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1886 0, index,
1887 sd->gspca_dev.usb_buf, 1, 500);
1888 leave:
1889 if (ret < 0) {
1890 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1891 value, index);
1892 return ret;
1893 }
1894
1895 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1896 return 0;
1897 }
1898
1899 /* Read from a OV519 register, note not valid for the w9968cf!! */
1900 /* returns: negative is error, pos or zero is data */
1901 static int reg_r(struct sd *sd, __u16 index)
1902 {
1903 int ret;
1904 int req;
1905
1906 switch (sd->bridge) {
1907 case BRIDGE_OV511:
1908 case BRIDGE_OV511PLUS:
1909 req = 3;
1910 break;
1911 case BRIDGE_OVFX2:
1912 req = 0x0b;
1913 break;
1914 default:
1915 req = 1;
1916 }
1917
1918 ret = usb_control_msg(sd->gspca_dev.dev,
1919 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1920 req,
1921 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1922 0, index, sd->gspca_dev.usb_buf, 1, 500);
1923
1924 if (ret >= 0) {
1925 ret = sd->gspca_dev.usb_buf[0];
1926 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1927 } else
1928 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1929
1930 return ret;
1931 }
1932
1933 /* Read 8 values from a OV519 register */
1934 static int reg_r8(struct sd *sd,
1935 __u16 index)
1936 {
1937 int ret;
1938
1939 ret = usb_control_msg(sd->gspca_dev.dev,
1940 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1941 1, /* REQ_IO */
1942 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1943 0, index, sd->gspca_dev.usb_buf, 8, 500);
1944
1945 if (ret >= 0)
1946 ret = sd->gspca_dev.usb_buf[0];
1947 else
1948 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1949
1950 return ret;
1951 }
1952
1953 /*
1954 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1955 * the same position as 1's in "mask" are cleared and set to "value". Bits
1956 * that are in the same position as 0's in "mask" are preserved, regardless
1957 * of their respective state in "value".
1958 */
1959 static int reg_w_mask(struct sd *sd,
1960 __u16 index,
1961 __u8 value,
1962 __u8 mask)
1963 {
1964 int ret;
1965 __u8 oldval;
1966
1967 if (mask != 0xff) {
1968 value &= mask; /* Enforce mask on value */
1969 ret = reg_r(sd, index);
1970 if (ret < 0)
1971 return ret;
1972
1973 oldval = ret & ~mask; /* Clear the masked bits */
1974 value |= oldval; /* Set the desired bits */
1975 }
1976 return reg_w(sd, index, value);
1977 }
1978
1979 /*
1980 * Writes multiple (n) byte value to a single register. Only valid with certain
1981 * registers (0x30 and 0xc4 - 0xce).
1982 */
1983 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1984 {
1985 int ret;
1986
1987 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1988
1989 ret = usb_control_msg(sd->gspca_dev.dev,
1990 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1991 1 /* REG_IO */,
1992 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1993 0, index,
1994 sd->gspca_dev.usb_buf, n, 500);
1995 if (ret < 0) {
1996 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1997 return ret;
1998 }
1999
2000 return 0;
2001 }
2002
2003 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2004 {
2005 int rc, retries;
2006
2007 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2008
2009 /* Three byte write cycle */
2010 for (retries = 6; ; ) {
2011 /* Select camera register */
2012 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2013 if (rc < 0)
2014 return rc;
2015
2016 /* Write "value" to I2C data port of OV511 */
2017 rc = reg_w(sd, R51x_I2C_DATA, value);
2018 if (rc < 0)
2019 return rc;
2020
2021 /* Initiate 3-byte write cycle */
2022 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2023 if (rc < 0)
2024 return rc;
2025
2026 do {
2027 rc = reg_r(sd, R511_I2C_CTL);
2028 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2029
2030 if (rc < 0)
2031 return rc;
2032
2033 if ((rc & 2) == 0) /* Ack? */
2034 break;
2035 if (--retries < 0) {
2036 PDEBUG(D_USBO, "i2c write retries exhausted");
2037 return -1;
2038 }
2039 }
2040
2041 return 0;
2042 }
2043
2044 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2045 {
2046 int rc, value, retries;
2047
2048 /* Two byte write cycle */
2049 for (retries = 6; ; ) {
2050 /* Select camera register */
2051 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2052 if (rc < 0)
2053 return rc;
2054
2055 /* Initiate 2-byte write cycle */
2056 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2057 if (rc < 0)
2058 return rc;
2059
2060 do {
2061 rc = reg_r(sd, R511_I2C_CTL);
2062 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2063
2064 if (rc < 0)
2065 return rc;
2066
2067 if ((rc & 2) == 0) /* Ack? */
2068 break;
2069
2070 /* I2C abort */
2071 reg_w(sd, R511_I2C_CTL, 0x10);
2072
2073 if (--retries < 0) {
2074 PDEBUG(D_USBI, "i2c write retries exhausted");
2075 return -1;
2076 }
2077 }
2078
2079 /* Two byte read cycle */
2080 for (retries = 6; ; ) {
2081 /* Initiate 2-byte read cycle */
2082 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2083 if (rc < 0)
2084 return rc;
2085
2086 do {
2087 rc = reg_r(sd, R511_I2C_CTL);
2088 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2089
2090 if (rc < 0)
2091 return rc;
2092
2093 if ((rc & 2) == 0) /* Ack? */
2094 break;
2095
2096 /* I2C abort */
2097 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2098 if (rc < 0)
2099 return rc;
2100
2101 if (--retries < 0) {
2102 PDEBUG(D_USBI, "i2c read retries exhausted");
2103 return -1;
2104 }
2105 }
2106
2107 value = reg_r(sd, R51x_I2C_DATA);
2108
2109 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2110
2111 /* This is needed to make i2c_w() work */
2112 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2113 if (rc < 0)
2114 return rc;
2115
2116 return value;
2117 }
2118
2119 /*
2120 * The OV518 I2C I/O procedure is different, hence, this function.
2121 * This is normally only called from i2c_w(). Note that this function
2122 * always succeeds regardless of whether the sensor is present and working.
2123 */
2124 static int ov518_i2c_w(struct sd *sd,
2125 __u8 reg,
2126 __u8 value)
2127 {
2128 int rc;
2129
2130 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2131
2132 /* Select camera register */
2133 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2134 if (rc < 0)
2135 return rc;
2136
2137 /* Write "value" to I2C data port of OV511 */
2138 rc = reg_w(sd, R51x_I2C_DATA, value);
2139 if (rc < 0)
2140 return rc;
2141
2142 /* Initiate 3-byte write cycle */
2143 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2144 if (rc < 0)
2145 return rc;
2146
2147 /* wait for write complete */
2148 msleep(4);
2149 return reg_r8(sd, R518_I2C_CTL);
2150 }
2151
2152 /*
2153 * returns: negative is error, pos or zero is data
2154 *
2155 * The OV518 I2C I/O procedure is different, hence, this function.
2156 * This is normally only called from i2c_r(). Note that this function
2157 * always succeeds regardless of whether the sensor is present and working.
2158 */
2159 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2160 {
2161 int rc, value;
2162
2163 /* Select camera register */
2164 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2165 if (rc < 0)
2166 return rc;
2167
2168 /* Initiate 2-byte write cycle */
2169 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2170 if (rc < 0)
2171 return rc;
2172
2173 /* Initiate 2-byte read cycle */
2174 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2175 if (rc < 0)
2176 return rc;
2177 value = reg_r(sd, R51x_I2C_DATA);
2178 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2179 return value;
2180 }
2181
2182 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2183 {
2184 int ret;
2185
2186 ret = usb_control_msg(sd->gspca_dev.dev,
2187 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2188 0x02,
2189 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2190 (__u16)value, (__u16)reg, NULL, 0, 500);
2191
2192 if (ret < 0) {
2193 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
2194 return ret;
2195 }
2196
2197 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2198 return 0;
2199 }
2200
2201 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2202 {
2203 int ret;
2204
2205 ret = usb_control_msg(sd->gspca_dev.dev,
2206 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2207 0x03,
2208 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2209 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2210
2211 if (ret >= 0) {
2212 ret = sd->gspca_dev.usb_buf[0];
2213 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2214 } else
2215 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2216
2217 return ret;
2218 }
2219
2220 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2221 {
2222 int ret = -1;
2223
2224 if (sd->sensor_reg_cache[reg] == value)
2225 return 0;
2226
2227 switch (sd->bridge) {
2228 case BRIDGE_OV511:
2229 case BRIDGE_OV511PLUS:
2230 ret = ov511_i2c_w(sd, reg, value);
2231 break;
2232 case BRIDGE_OV518:
2233 case BRIDGE_OV518PLUS:
2234 case BRIDGE_OV519:
2235 ret = ov518_i2c_w(sd, reg, value);
2236 break;
2237 case BRIDGE_OVFX2:
2238 ret = ovfx2_i2c_w(sd, reg, value);
2239 break;
2240 case BRIDGE_W9968CF:
2241 ret = w9968cf_i2c_w(sd, reg, value);
2242 break;
2243 }
2244
2245 if (ret >= 0) {
2246 /* Up on sensor reset empty the register cache */
2247 if (reg == 0x12 && (value & 0x80))
2248 memset(sd->sensor_reg_cache, -1,
2249 sizeof(sd->sensor_reg_cache));
2250 else
2251 sd->sensor_reg_cache[reg] = value;
2252 }
2253
2254 return ret;
2255 }
2256
2257 static int i2c_r(struct sd *sd, __u8 reg)
2258 {
2259 int ret = -1;
2260
2261 if (sd->sensor_reg_cache[reg] != -1)
2262 return sd->sensor_reg_cache[reg];
2263
2264 switch (sd->bridge) {
2265 case BRIDGE_OV511:
2266 case BRIDGE_OV511PLUS:
2267 ret = ov511_i2c_r(sd, reg);
2268 break;
2269 case BRIDGE_OV518:
2270 case BRIDGE_OV518PLUS:
2271 case BRIDGE_OV519:
2272 ret = ov518_i2c_r(sd, reg);
2273 break;
2274 case BRIDGE_OVFX2:
2275 ret = ovfx2_i2c_r(sd, reg);
2276 break;
2277 case BRIDGE_W9968CF:
2278 ret = w9968cf_i2c_r(sd, reg);
2279 break;
2280 }
2281
2282 if (ret >= 0)
2283 sd->sensor_reg_cache[reg] = ret;
2284
2285 return ret;
2286 }
2287
2288 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2289 * the same position as 1's in "mask" are cleared and set to "value". Bits
2290 * that are in the same position as 0's in "mask" are preserved, regardless
2291 * of their respective state in "value".
2292 */
2293 static int i2c_w_mask(struct sd *sd,
2294 __u8 reg,
2295 __u8 value,
2296 __u8 mask)
2297 {
2298 int rc;
2299 __u8 oldval;
2300
2301 value &= mask; /* Enforce mask on value */
2302 rc = i2c_r(sd, reg);
2303 if (rc < 0)
2304 return rc;
2305 oldval = rc & ~mask; /* Clear the masked bits */
2306 value |= oldval; /* Set the desired bits */
2307 return i2c_w(sd, reg, value);
2308 }
2309
2310 /* Temporarily stops OV511 from functioning. Must do this before changing
2311 * registers while the camera is streaming */
2312 static inline int ov51x_stop(struct sd *sd)
2313 {
2314 PDEBUG(D_STREAM, "stopping");
2315 sd->stopped = 1;
2316 switch (sd->bridge) {
2317 case BRIDGE_OV511:
2318 case BRIDGE_OV511PLUS:
2319 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2320 case BRIDGE_OV518:
2321 case BRIDGE_OV518PLUS:
2322 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2323 case BRIDGE_OV519:
2324 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2325 case BRIDGE_OVFX2:
2326 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2327 case BRIDGE_W9968CF:
2328 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2329 }
2330
2331 return 0;
2332 }
2333
2334 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2335 * actually stopped (for performance). */
2336 static inline int ov51x_restart(struct sd *sd)
2337 {
2338 int rc;
2339
2340 PDEBUG(D_STREAM, "restarting");
2341 if (!sd->stopped)
2342 return 0;
2343 sd->stopped = 0;
2344
2345 /* Reinitialize the stream */
2346 switch (sd->bridge) {
2347 case BRIDGE_OV511:
2348 case BRIDGE_OV511PLUS:
2349 return reg_w(sd, R51x_SYS_RESET, 0x00);
2350 case BRIDGE_OV518:
2351 case BRIDGE_OV518PLUS:
2352 rc = reg_w(sd, 0x2f, 0x80);
2353 if (rc < 0)
2354 return rc;
2355 return reg_w(sd, R51x_SYS_RESET, 0x00);
2356 case BRIDGE_OV519:
2357 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2358 case BRIDGE_OVFX2:
2359 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2360 case BRIDGE_W9968CF:
2361 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2362 }
2363
2364 return 0;
2365 }
2366
2367 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2368
2369 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2370 * is synchronized. Returns <0 on failure.
2371 */
2372 static int init_ov_sensor(struct sd *sd, __u8 slave)
2373 {
2374 int i;
2375
2376 if (ov51x_set_slave_ids(sd, slave) < 0)
2377 return -EIO;
2378
2379 /* Reset the sensor */
2380 if (i2c_w(sd, 0x12, 0x80) < 0)
2381 return -EIO;
2382
2383 /* Wait for it to initialize */
2384 msleep(150);
2385
2386 for (i = 0; i < i2c_detect_tries; i++) {
2387 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2388 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2389 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2390 return 0;
2391 }
2392
2393 /* Reset the sensor */
2394 if (i2c_w(sd, 0x12, 0x80) < 0)
2395 return -EIO;
2396 /* Wait for it to initialize */
2397 msleep(150);
2398 /* Dummy read to sync I2C */
2399 if (i2c_r(sd, 0x00) < 0)
2400 return -EIO;
2401 }
2402 return -EIO;
2403 }
2404
2405 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2406 * and the read slave will be set to (slave + 1).
2407 * This should not be called from outside the i2c I/O functions.
2408 * Sets I2C read and write slave IDs. Returns <0 for error
2409 */
2410 static int ov51x_set_slave_ids(struct sd *sd,
2411 __u8 slave)
2412 {
2413 int rc;
2414
2415 switch (sd->bridge) {
2416 case BRIDGE_OVFX2:
2417 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2418 case BRIDGE_W9968CF:
2419 sd->sensor_addr = slave;
2420 return 0;
2421 }
2422
2423 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2424 if (rc < 0)
2425 return rc;
2426 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2427 }
2428
2429 static int write_regvals(struct sd *sd,
2430 const struct ov_regvals *regvals,
2431 int n)
2432 {
2433 int rc;
2434
2435 while (--n >= 0) {
2436 rc = reg_w(sd, regvals->reg, regvals->val);
2437 if (rc < 0)
2438 return rc;
2439 regvals++;
2440 }
2441 return 0;
2442 }
2443
2444 static int write_i2c_regvals(struct sd *sd,
2445 const struct ov_i2c_regvals *regvals,
2446 int n)
2447 {
2448 int rc;
2449
2450 while (--n >= 0) {
2451 rc = i2c_w(sd, regvals->reg, regvals->val);
2452 if (rc < 0)
2453 return rc;
2454 regvals++;
2455 }
2456 return 0;
2457 }
2458
2459 /****************************************************************************
2460 *
2461 * OV511 and sensor configuration
2462 *
2463 ***************************************************************************/
2464
2465 /* This initializes the OV2x10 / OV3610 / OV3620 */
2466 static int ov_hires_configure(struct sd *sd)
2467 {
2468 int high, low;
2469
2470 if (sd->bridge != BRIDGE_OVFX2) {
2471 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2472 return -1;
2473 }
2474
2475 PDEBUG(D_PROBE, "starting ov hires configuration");
2476
2477 /* Detect sensor (sub)type */
2478 high = i2c_r(sd, 0x0a);
2479 low = i2c_r(sd, 0x0b);
2480 /* info("%x, %x", high, low); */
2481 if (high == 0x96 && low == 0x40) {
2482 PDEBUG(D_PROBE, "Sensor is an OV2610");
2483 sd->sensor = SEN_OV2610;
2484 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2485 PDEBUG(D_PROBE, "Sensor is an OV3610");
2486 sd->sensor = SEN_OV3610;
2487 } else {
2488 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2489 high, low);
2490 return -1;
2491 }
2492
2493 /* Set sensor-specific vars */
2494 return 0;
2495 }
2496
2497
2498 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2499 * the same register settings as the OV8610, since they are very similar.
2500 */
2501 static int ov8xx0_configure(struct sd *sd)
2502 {
2503 int rc;
2504
2505 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2506
2507 /* Detect sensor (sub)type */
2508 rc = i2c_r(sd, OV7610_REG_COM_I);
2509 if (rc < 0) {
2510 PDEBUG(D_ERR, "Error detecting sensor type");
2511 return -1;
2512 }
2513 if ((rc & 3) == 1) {
2514 sd->sensor = SEN_OV8610;
2515 } else {
2516 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2517 return -1;
2518 }
2519
2520 /* Set sensor-specific vars */
2521 return 0;
2522 }
2523
2524 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2525 * the same register settings as the OV7610, since they are very similar.
2526 */
2527 static int ov7xx0_configure(struct sd *sd)
2528 {
2529 int rc, high, low;
2530
2531
2532 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2533
2534 /* Detect sensor (sub)type */
2535 rc = i2c_r(sd, OV7610_REG_COM_I);
2536
2537 /* add OV7670 here
2538 * it appears to be wrongly detected as a 7610 by default */
2539 if (rc < 0) {
2540 PDEBUG(D_ERR, "Error detecting sensor type");
2541 return -1;
2542 }
2543 if ((rc & 3) == 3) {
2544 /* quick hack to make OV7670s work */
2545 high = i2c_r(sd, 0x0a);
2546 low = i2c_r(sd, 0x0b);
2547 /* info("%x, %x", high, low); */
2548 if (high == 0x76 && low == 0x73) {
2549 PDEBUG(D_PROBE, "Sensor is an OV7670");
2550 sd->sensor = SEN_OV7670;
2551 } else {
2552 PDEBUG(D_PROBE, "Sensor is an OV7610");
2553 sd->sensor = SEN_OV7610;
2554 }
2555 } else if ((rc & 3) == 1) {
2556 /* I don't know what's different about the 76BE yet. */
2557 if (i2c_r(sd, 0x15) & 1) {
2558 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2559 sd->sensor = SEN_OV7620AE;
2560 } else {
2561 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2562 sd->sensor = SEN_OV76BE;
2563 }
2564 } else if ((rc & 3) == 0) {
2565 /* try to read product id registers */
2566 high = i2c_r(sd, 0x0a);
2567 if (high < 0) {
2568 PDEBUG(D_ERR, "Error detecting camera chip PID");
2569 return high;
2570 }
2571 low = i2c_r(sd, 0x0b);
2572 if (low < 0) {
2573 PDEBUG(D_ERR, "Error detecting camera chip VER");
2574 return low;
2575 }
2576 if (high == 0x76) {
2577 switch (low) {
2578 case 0x30:
2579 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
2580 PDEBUG(D_ERR,
2581 "7630 is not supported by this driver");
2582 return -1;
2583 case 0x40:
2584 PDEBUG(D_PROBE, "Sensor is an OV7645");
2585 sd->sensor = SEN_OV7640; /* FIXME */
2586 break;
2587 case 0x45:
2588 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2589 sd->sensor = SEN_OV7640; /* FIXME */
2590 break;
2591 case 0x48:
2592 PDEBUG(D_PROBE, "Sensor is an OV7648");
2593 sd->sensor = SEN_OV7648;
2594 break;
2595 default:
2596 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2597 return -1;
2598 }
2599 } else {
2600 PDEBUG(D_PROBE, "Sensor is an OV7620");
2601 sd->sensor = SEN_OV7620;
2602 }
2603 } else {
2604 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2605 return -1;
2606 }
2607
2608 /* Set sensor-specific vars */
2609 return 0;
2610 }
2611
2612 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2613 static int ov6xx0_configure(struct sd *sd)
2614 {
2615 int rc;
2616 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2617
2618 /* Detect sensor (sub)type */
2619 rc = i2c_r(sd, OV7610_REG_COM_I);
2620 if (rc < 0) {
2621 PDEBUG(D_ERR, "Error detecting sensor type");
2622 return -1;
2623 }
2624
2625 /* Ugh. The first two bits are the version bits, but
2626 * the entire register value must be used. I guess OVT
2627 * underestimated how many variants they would make. */
2628 switch (rc) {
2629 case 0x00:
2630 sd->sensor = SEN_OV6630;
2631 PDEBUG(D_ERR,
2632 "WARNING: Sensor is an OV66308. Your camera may have");
2633 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2634 break;
2635 case 0x01:
2636 sd->sensor = SEN_OV6620;
2637 PDEBUG(D_PROBE, "Sensor is an OV6620");
2638 break;
2639 case 0x02:
2640 sd->sensor = SEN_OV6630;
2641 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2642 break;
2643 case 0x03:
2644 sd->sensor = SEN_OV66308AF;
2645 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2646 break;
2647 case 0x90:
2648 sd->sensor = SEN_OV6630;
2649 PDEBUG(D_ERR,
2650 "WARNING: Sensor is an OV66307. Your camera may have");
2651 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2652 break;
2653 default:
2654 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2655 return -1;
2656 }
2657
2658 /* Set sensor-specific vars */
2659 sd->sif = 1;
2660
2661 return 0;
2662 }
2663
2664 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2665 static void ov51x_led_control(struct sd *sd, int on)
2666 {
2667 if (sd->invert_led)
2668 on = !on;
2669
2670 switch (sd->bridge) {
2671 /* OV511 has no LED control */
2672 case BRIDGE_OV511PLUS:
2673 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2674 break;
2675 case BRIDGE_OV518:
2676 case BRIDGE_OV518PLUS:
2677 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2678 break;
2679 case BRIDGE_OV519:
2680 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2681 break;
2682 }
2683 }
2684
2685 static int ov51x_upload_quan_tables(struct sd *sd)
2686 {
2687 const unsigned char yQuanTable511[] = {
2688 0, 1, 1, 2, 2, 3, 3, 4,
2689 1, 1, 1, 2, 2, 3, 4, 4,
2690 1, 1, 2, 2, 3, 4, 4, 4,
2691 2, 2, 2, 3, 4, 4, 4, 4,
2692 2, 2, 3, 4, 4, 5, 5, 5,
2693 3, 3, 4, 4, 5, 5, 5, 5,
2694 3, 4, 4, 4, 5, 5, 5, 5,
2695 4, 4, 4, 4, 5, 5, 5, 5
2696 };
2697
2698 const unsigned char uvQuanTable511[] = {
2699 0, 2, 2, 3, 4, 4, 4, 4,
2700 2, 2, 2, 4, 4, 4, 4, 4,
2701 2, 2, 3, 4, 4, 4, 4, 4,
2702 3, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4,
2704 4, 4, 4, 4, 4, 4, 4, 4,
2705 4, 4, 4, 4, 4, 4, 4, 4,
2706 4, 4, 4, 4, 4, 4, 4, 4
2707 };
2708
2709 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2710 const unsigned char yQuanTable518[] = {
2711 5, 4, 5, 6, 6, 7, 7, 7,
2712 5, 5, 5, 5, 6, 7, 7, 7,
2713 6, 6, 6, 6, 7, 7, 7, 8,
2714 7, 7, 6, 7, 7, 7, 8, 8
2715 };
2716
2717 const unsigned char uvQuanTable518[] = {
2718 6, 6, 6, 7, 7, 7, 7, 7,
2719 6, 6, 6, 7, 7, 7, 7, 7,
2720 6, 6, 6, 7, 7, 7, 7, 8,
2721 7, 7, 7, 7, 7, 7, 8, 8
2722 };
2723
2724 const unsigned char *pYTable, *pUVTable;
2725 unsigned char val0, val1;
2726 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2727
2728 PDEBUG(D_PROBE, "Uploading quantization tables");
2729
2730 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2731 pYTable = yQuanTable511;
2732 pUVTable = uvQuanTable511;
2733 size = 32;
2734 } else {
2735 pYTable = yQuanTable518;
2736 pUVTable = uvQuanTable518;
2737 size = 16;
2738 }
2739
2740 for (i = 0; i < size; i++) {
2741 val0 = *pYTable++;
2742 val1 = *pYTable++;
2743 val0 &= 0x0f;
2744 val1 &= 0x0f;
2745 val0 |= val1 << 4;
2746 rc = reg_w(sd, reg, val0);
2747 if (rc < 0)
2748 return rc;
2749
2750 val0 = *pUVTable++;
2751 val1 = *pUVTable++;
2752 val0 &= 0x0f;
2753 val1 &= 0x0f;
2754 val0 |= val1 << 4;
2755 rc = reg_w(sd, reg + size, val0);
2756 if (rc < 0)
2757 return rc;
2758
2759 reg++;
2760 }
2761
2762 return 0;
2763 }
2764
2765 /* This initializes the OV511/OV511+ and the sensor */
2766 static int ov511_configure(struct gspca_dev *gspca_dev)
2767 {
2768 struct sd *sd = (struct sd *) gspca_dev;
2769 int rc;
2770
2771 /* For 511 and 511+ */
2772 const struct ov_regvals init_511[] = {
2773 { R51x_SYS_RESET, 0x7f },
2774 { R51x_SYS_INIT, 0x01 },
2775 { R51x_SYS_RESET, 0x7f },
2776 { R51x_SYS_INIT, 0x01 },
2777 { R51x_SYS_RESET, 0x3f },
2778 { R51x_SYS_INIT, 0x01 },
2779 { R51x_SYS_RESET, 0x3d },
2780 };
2781
2782 const struct ov_regvals norm_511[] = {
2783 { R511_DRAM_FLOW_CTL, 0x01 },
2784 { R51x_SYS_SNAP, 0x00 },
2785 { R51x_SYS_SNAP, 0x02 },
2786 { R51x_SYS_SNAP, 0x00 },
2787 { R511_FIFO_OPTS, 0x1f },
2788 { R511_COMP_EN, 0x00 },
2789 { R511_COMP_LUT_EN, 0x03 },
2790 };
2791
2792 const struct ov_regvals norm_511_p[] = {
2793 { R511_DRAM_FLOW_CTL, 0xff },
2794 { R51x_SYS_SNAP, 0x00 },
2795 { R51x_SYS_SNAP, 0x02 },
2796 { R51x_SYS_SNAP, 0x00 },
2797 { R511_FIFO_OPTS, 0xff },
2798 { R511_COMP_EN, 0x00 },
2799 { R511_COMP_LUT_EN, 0x03 },
2800 };
2801
2802 const struct ov_regvals compress_511[] = {
2803 { 0x70, 0x1f },
2804 { 0x71, 0x05 },
2805 { 0x72, 0x06 },
2806 { 0x73, 0x06 },
2807 { 0x74, 0x14 },
2808 { 0x75, 0x03 },
2809 { 0x76, 0x04 },
2810 { 0x77, 0x04 },
2811 };
2812
2813 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2814
2815 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2816 if (rc < 0)
2817 return rc;
2818
2819 switch (sd->bridge) {
2820 case BRIDGE_OV511:
2821 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2822 if (rc < 0)
2823 return rc;
2824 break;
2825 case BRIDGE_OV511PLUS:
2826 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2827 if (rc < 0)
2828 return rc;
2829 break;
2830 }
2831
2832 /* Init compression */
2833 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2834 if (rc < 0)
2835 return rc;
2836
2837 rc = ov51x_upload_quan_tables(sd);
2838 if (rc < 0) {
2839 PDEBUG(D_ERR, "Error uploading quantization tables");
2840 return rc;
2841 }
2842
2843 return 0;
2844 }
2845
2846 /* This initializes the OV518/OV518+ and the sensor */
2847 static int ov518_configure(struct gspca_dev *gspca_dev)
2848 {
2849 struct sd *sd = (struct sd *) gspca_dev;
2850 int rc;
2851
2852 /* For 518 and 518+ */
2853 const struct ov_regvals init_518[] = {
2854 { R51x_SYS_RESET, 0x40 },
2855 { R51x_SYS_INIT, 0xe1 },
2856 { R51x_SYS_RESET, 0x3e },
2857 { R51x_SYS_INIT, 0xe1 },
2858 { R51x_SYS_RESET, 0x00 },
2859 { R51x_SYS_INIT, 0xe1 },
2860 { 0x46, 0x00 },
2861 { 0x5d, 0x03 },
2862 };
2863
2864 const struct ov_regvals norm_518[] = {
2865 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2866 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2867 { 0x31, 0x0f },
2868 { 0x5d, 0x03 },
2869 { 0x24, 0x9f },
2870 { 0x25, 0x90 },
2871 { 0x20, 0x00 },
2872 { 0x51, 0x04 },
2873 { 0x71, 0x19 },
2874 { 0x2f, 0x80 },
2875 };
2876
2877 const struct ov_regvals norm_518_p[] = {
2878 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2879 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2880 { 0x31, 0x0f },
2881 { 0x5d, 0x03 },
2882 { 0x24, 0x9f },
2883 { 0x25, 0x90 },
2884 { 0x20, 0x60 },
2885 { 0x51, 0x02 },
2886 { 0x71, 0x19 },
2887 { 0x40, 0xff },
2888 { 0x41, 0x42 },
2889 { 0x46, 0x00 },
2890 { 0x33, 0x04 },
2891 { 0x21, 0x19 },
2892 { 0x3f, 0x10 },
2893 { 0x2f, 0x80 },
2894 };
2895
2896 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2897 PDEBUG(D_PROBE, "Device revision %d",
2898 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2899
2900 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2901 if (rc < 0)
2902 return rc;
2903
2904 /* Set LED GPIO pin to output mode */
2905 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2906 if (rc < 0)
2907 return rc;
2908
2909 switch (sd->bridge) {
2910 case BRIDGE_OV518:
2911 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2912 if (rc < 0)
2913 return rc;
2914 break;
2915 case BRIDGE_OV518PLUS:
2916 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2917 if (rc < 0)
2918 return rc;
2919 break;
2920 }
2921
2922 rc = ov51x_upload_quan_tables(sd);
2923 if (rc < 0) {
2924 PDEBUG(D_ERR, "Error uploading quantization tables");
2925 return rc;
2926 }
2927
2928 rc = reg_w(sd, 0x2f, 0x80);
2929 if (rc < 0)
2930 return rc;
2931
2932 return 0;
2933 }
2934
2935 static int ov519_configure(struct sd *sd)
2936 {
2937 static const struct ov_regvals init_519[] = {
2938 { 0x5a, 0x6d }, /* EnableSystem */
2939 { 0x53, 0x9b },
2940 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2941 { 0x5d, 0x03 },
2942 { 0x49, 0x01 },
2943 { 0x48, 0x00 },
2944 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2945 * detection will fail. This deserves further investigation. */
2946 { OV519_GPIO_IO_CTRL0, 0xee },
2947 { 0x51, 0x0f }, /* SetUsbInit */
2948 { 0x51, 0x00 },
2949 { 0x22, 0x00 },
2950 /* windows reads 0x55 at this point*/
2951 };
2952
2953 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2954 }
2955
2956 static int ovfx2_configure(struct sd *sd)
2957 {
2958 static const struct ov_regvals init_fx2[] = {
2959 { 0x00, 0x60 },
2960 { 0x02, 0x01 },
2961 { 0x0f, 0x1d },
2962 { 0xe9, 0x82 },
2963 { 0xea, 0xc7 },
2964 { 0xeb, 0x10 },
2965 { 0xec, 0xf6 },
2966 };
2967
2968 sd->stopped = 1;
2969
2970 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2971 }
2972
2973 /* this function is called at probe time */
2974 static int sd_config(struct gspca_dev *gspca_dev,
2975 const struct usb_device_id *id)
2976 {
2977 struct sd *sd = (struct sd *) gspca_dev;
2978 struct cam *cam = &gspca_dev->cam;
2979 int ret = 0;
2980
2981 sd->bridge = id->driver_info & BRIDGE_MASK;
2982 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2983
2984 switch (sd->bridge) {
2985 case BRIDGE_OV511:
2986 case BRIDGE_OV511PLUS:
2987 ret = ov511_configure(gspca_dev);
2988 break;
2989 case BRIDGE_OV518:
2990 case BRIDGE_OV518PLUS:
2991 ret = ov518_configure(gspca_dev);
2992 break;
2993 case BRIDGE_OV519:
2994 ret = ov519_configure(sd);
2995 break;
2996 case BRIDGE_OVFX2:
2997 ret = ovfx2_configure(sd);
2998 cam->bulk_size = OVFX2_BULK_SIZE;
2999 cam->bulk_nurbs = MAX_NURBS;
3000 cam->bulk = 1;
3001 break;
3002 case BRIDGE_W9968CF:
3003 ret = w9968cf_configure(sd);
3004 cam->reverse_alts = 1;
3005 break;
3006 }
3007
3008 if (ret)
3009 goto error;
3010
3011 ov51x_led_control(sd, 0); /* turn LED off */
3012
3013 /* The OV519 must be more aggressive about sensor detection since
3014 * I2C write will never fail if the sensor is not present. We have
3015 * to try to initialize the sensor to detect its presence */
3016
3017 /* Test for 76xx */
3018 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3019 if (ov7xx0_configure(sd) < 0) {
3020 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3021 goto error;
3022 }
3023 /* Test for 6xx0 */
3024 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3025 if (ov6xx0_configure(sd) < 0) {
3026 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3027 goto error;
3028 }
3029 /* Test for 8xx0 */
3030 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3031 if (ov8xx0_configure(sd) < 0) {
3032 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3033 goto error;
3034 }
3035 /* Test for 3xxx / 2xxx */
3036 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3037 if (ov_hires_configure(sd) < 0) {
3038 PDEBUG(D_ERR, "Failed to configure high res OV");
3039 goto error;
3040 }
3041 } else {
3042 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3043 goto error;
3044 }
3045
3046 switch (sd->bridge) {
3047 case BRIDGE_OV511:
3048 case BRIDGE_OV511PLUS:
3049 if (!sd->sif) {
3050 cam->cam_mode = ov511_vga_mode;
3051 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3052 } else {
3053 cam->cam_mode = ov511_sif_mode;
3054 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3055 }
3056 break;
3057 case BRIDGE_OV518:
3058 case BRIDGE_OV518PLUS:
3059 if (!sd->sif) {
3060 cam->cam_mode = ov518_vga_mode;
3061 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3062 } else {
3063 cam->cam_mode = ov518_sif_mode;
3064 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3065 }
3066 break;
3067 case BRIDGE_OV519:
3068 if (!sd->sif) {
3069 cam->cam_mode = ov519_vga_mode;
3070 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3071 } else {
3072 cam->cam_mode = ov519_sif_mode;
3073 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3074 }
3075 break;
3076 case BRIDGE_OVFX2:
3077 if (sd->sensor == SEN_OV2610) {
3078 cam->cam_mode = ovfx2_ov2610_mode;
3079 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3080 } else if (sd->sensor == SEN_OV3610) {
3081 cam->cam_mode = ovfx2_ov3610_mode;
3082 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3083 } else if (!sd->sif) {
3084 cam->cam_mode = ov519_vga_mode;
3085 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3086 } else {
3087 cam->cam_mode = ov519_sif_mode;
3088 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3089 }
3090 break;
3091 case BRIDGE_W9968CF:
3092 cam->cam_mode = w9968cf_vga_mode;
3093 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3094 if (sd->sif)
3095 cam->nmodes--;
3096
3097 /* w9968cf needs initialisation once the sensor is known */
3098 if (w9968cf_init(sd) < 0)
3099 goto error;
3100 break;
3101 }
3102 sd->brightness = BRIGHTNESS_DEF;
3103 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3104 sd->contrast = 200; /* The default is too low for the ov6630 */
3105 else
3106 sd->contrast = CONTRAST_DEF;
3107 sd->colors = COLOR_DEF;
3108 sd->hflip = HFLIP_DEF;
3109 sd->vflip = VFLIP_DEF;
3110 sd->autobrightness = AUTOBRIGHT_DEF;
3111 if (sd->sensor == SEN_OV7670) {
3112 sd->freq = OV7670_FREQ_DEF;
3113 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
3114 } else {
3115 sd->freq = FREQ_DEF;
3116 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3117 (1 << OV7670_FREQ_IDX);
3118 }
3119 sd->quality = QUALITY_DEF;
3120 if (sd->sensor == SEN_OV7640 ||
3121 sd->sensor == SEN_OV7648 ||
3122 sd->sensor == SEN_OV7670)
3123 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3124 /* OV8610 Frequency filter control should work but needs testing */
3125 if (sd->sensor == SEN_OV8610)
3126 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
3127 /* No controls for the OV2610/OV3610 */
3128 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3129 gspca_dev->ctrl_dis |= 0xFF;
3130
3131 return 0;
3132 error:
3133 PDEBUG(D_ERR, "OV519 Config failed");
3134 return -EBUSY;
3135 }
3136
3137 /* this function is called at probe and resume time */
3138 static int sd_init(struct gspca_dev *gspca_dev)
3139 {
3140 struct sd *sd = (struct sd *) gspca_dev;
3141
3142 /* initialize the sensor */
3143 switch (sd->sensor) {
3144 case SEN_OV2610:
3145 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3146 return -EIO;
3147 /* Enable autogain, autoexpo, awb, bandfilter */
3148 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3149 return -EIO;
3150 break;
3151 case SEN_OV3610:
3152 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3153 return -EIO;
3154 /* Enable autogain, autoexpo, awb, bandfilter */
3155 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3156 return -EIO;
3157 break;
3158 case SEN_OV6620:
3159 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3160 return -EIO;
3161 break;
3162 case SEN_OV6630:
3163 case SEN_OV66308AF:
3164 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3165 return -EIO;
3166 break;
3167 default:
3168 /* case SEN_OV7610: */
3169 /* case SEN_OV76BE: */
3170 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3171 return -EIO;
3172 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3173 return -EIO;
3174 break;
3175 case SEN_OV7620:
3176 case SEN_OV7620AE:
3177 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3178 return -EIO;
3179 break;
3180 case SEN_OV7640:
3181 case SEN_OV7648:
3182 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3183 return -EIO;
3184 break;
3185 case SEN_OV7670:
3186 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3187 return -EIO;
3188 break;
3189 case SEN_OV8610:
3190 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3191 return -EIO;
3192 break;
3193 }
3194 return 0;
3195 }
3196
3197 /* Set up the OV511/OV511+ with the given image parameters.
3198 *
3199 * Do not put any sensor-specific code in here (including I2C I/O functions)
3200 */
3201 static int ov511_mode_init_regs(struct sd *sd)
3202 {
3203 int hsegs, vsegs, packet_size, fps, needed;
3204 int interlaced = 0;
3205 struct usb_host_interface *alt;
3206 struct usb_interface *intf;
3207
3208 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3209 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3210 if (!alt) {
3211 PDEBUG(D_ERR, "Couldn't get altsetting");
3212 return -EIO;
3213 }
3214
3215 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3216 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3217
3218 reg_w(sd, R511_CAM_UV_EN, 0x01);
3219 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3220 reg_w(sd, R511_SNAP_OPTS, 0x03);
3221
3222 /* Here I'm assuming that snapshot size == image size.
3223 * I hope that's always true. --claudio
3224 */
3225 hsegs = (sd->gspca_dev.width >> 3) - 1;
3226 vsegs = (sd->gspca_dev.height >> 3) - 1;
3227
3228 reg_w(sd, R511_CAM_PXCNT, hsegs);
3229 reg_w(sd, R511_CAM_LNCNT, vsegs);
3230 reg_w(sd, R511_CAM_PXDIV, 0x00);
3231 reg_w(sd, R511_CAM_LNDIV, 0x00);
3232
3233 /* YUV420, low pass filter on */
3234 reg_w(sd, R511_CAM_OPTS, 0x03);
3235
3236 /* Snapshot additions */
3237 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3238 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3239 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3240 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3241
3242 /******** Set the framerate ********/
3243 if (frame_rate > 0)
3244 sd->frame_rate = frame_rate;
3245
3246 switch (sd->sensor) {
3247 case SEN_OV6620:
3248 /* No framerate control, doesn't like higher rates yet */
3249 sd->clockdiv = 3;
3250 break;
3251
3252 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3253 for more sensors we need to do this for them too */
3254 case SEN_OV7620:
3255 case SEN_OV7620AE:
3256 case SEN_OV7640:
3257 case SEN_OV7648:
3258 case SEN_OV76BE:
3259 if (sd->gspca_dev.width == 320)
3260 interlaced = 1;
3261 /* Fall through */
3262 case SEN_OV6630:
3263 case SEN_OV7610:
3264 case SEN_OV7670:
3265 switch (sd->frame_rate) {
3266 case 30:
3267 case 25:
3268 /* Not enough bandwidth to do 640x480 @ 30 fps */
3269 if (sd->gspca_dev.width != 640) {
3270 sd->clockdiv = 0;
3271 break;
3272 }
3273 /* Fall through for 640x480 case */
3274 default:
3275 /* case 20: */
3276 /* case 15: */
3277 sd->clockdiv = 1;
3278 break;
3279 case 10:
3280 sd->clockdiv = 2;
3281 break;
3282 case 5:
3283 sd->clockdiv = 5;
3284 break;
3285 }
3286 if (interlaced) {
3287 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3288 /* Higher then 10 does not work */
3289 if (sd->clockdiv > 10)
3290 sd->clockdiv = 10;
3291 }
3292 break;
3293
3294 case SEN_OV8610:
3295 /* No framerate control ?? */
3296 sd->clockdiv = 0;
3297 break;
3298 }
3299
3300 /* Check if we have enough bandwidth to disable compression */
3301 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3302 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3303 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3304 if (needed > 1400 * packet_size) {
3305 /* Enable Y and UV quantization and compression */
3306 reg_w(sd, R511_COMP_EN, 0x07);
3307 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3308 } else {
3309 reg_w(sd, R511_COMP_EN, 0x06);
3310 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3311 }
3312
3313 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3314 reg_w(sd, R51x_SYS_RESET, 0);
3315
3316 return 0;
3317 }
3318
3319 /* Sets up the OV518/OV518+ with the given image parameters
3320 *
3321 * OV518 needs a completely different approach, until we can figure out what
3322 * the individual registers do. Also, only 15 FPS is supported now.
3323 *
3324 * Do not put any sensor-specific code in here (including I2C I/O functions)
3325 */
3326 static int ov518_mode_init_regs(struct sd *sd)
3327 {
3328 int hsegs, vsegs, packet_size;
3329 struct usb_host_interface *alt;
3330 struct usb_interface *intf;
3331
3332 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3333 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3334 if (!alt) {
3335 PDEBUG(D_ERR, "Couldn't get altsetting");
3336 return -EIO;
3337 }
3338
3339 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3340 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3341
3342 /******** Set the mode ********/
3343
3344 reg_w(sd, 0x2b, 0);
3345 reg_w(sd, 0x2c, 0);
3346 reg_w(sd, 0x2d, 0);
3347 reg_w(sd, 0x2e, 0);
3348 reg_w(sd, 0x3b, 0);
3349 reg_w(sd, 0x3c, 0);
3350 reg_w(sd, 0x3d, 0);
3351 reg_w(sd, 0x3e, 0);
3352
3353 if (sd->bridge == BRIDGE_OV518) {
3354 /* Set 8-bit (YVYU) input format */
3355 reg_w_mask(sd, 0x20, 0x08, 0x08);
3356
3357 /* Set 12-bit (4:2:0) output format */
3358 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3359 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3360 } else {
3361 reg_w(sd, 0x28, 0x80);
3362 reg_w(sd, 0x38, 0x80);
3363 }
3364
3365 hsegs = sd->gspca_dev.width / 16;
3366 vsegs = sd->gspca_dev.height / 4;
3367
3368 reg_w(sd, 0x29, hsegs);
3369 reg_w(sd, 0x2a, vsegs);
3370
3371 reg_w(sd, 0x39, hsegs);
3372 reg_w(sd, 0x3a, vsegs);
3373
3374 /* Windows driver does this here; who knows why */
3375 reg_w(sd, 0x2f, 0x80);
3376
3377 /******** Set the framerate ********/
3378 sd->clockdiv = 1;
3379
3380 /* Mode independent, but framerate dependent, regs */
3381 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3382 reg_w(sd, 0x51, 0x04);
3383 reg_w(sd, 0x22, 0x18);
3384 reg_w(sd, 0x23, 0xff);
3385
3386 if (sd->bridge == BRIDGE_OV518PLUS) {
3387 switch (sd->sensor) {
3388 case SEN_OV7620AE:
3389 if (sd->gspca_dev.width == 320) {
3390 reg_w(sd, 0x20, 0x00);
3391 reg_w(sd, 0x21, 0x19);
3392 } else {
3393 reg_w(sd, 0x20, 0x60);
3394 reg_w(sd, 0x21, 0x1f);
3395 }
3396 break;
3397 case SEN_OV7620:
3398 reg_w(sd, 0x20, 0x00);
3399 reg_w(sd, 0x21, 0x19);
3400 break;
3401 default:
3402 reg_w(sd, 0x21, 0x19);
3403 }
3404 } else
3405 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3406
3407 /* FIXME: Sensor-specific */
3408 /* Bit 5 is what matters here. Of course, it is "reserved" */
3409 i2c_w(sd, 0x54, 0x23);
3410
3411 reg_w(sd, 0x2f, 0x80);
3412
3413 if (sd->bridge == BRIDGE_OV518PLUS) {
3414 reg_w(sd, 0x24, 0x94);
3415 reg_w(sd, 0x25, 0x90);
3416 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3417 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3418 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3419 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3420 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3421 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3422 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3423 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3424 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3425 } else {
3426 reg_w(sd, 0x24, 0x9f);
3427 reg_w(sd, 0x25, 0x90);
3428 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3429 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3430 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3431 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3432 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3433 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3434 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3435 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3436 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3437 }
3438
3439 reg_w(sd, 0x2f, 0x80);
3440
3441 return 0;
3442 }
3443
3444
3445 /* Sets up the OV519 with the given image parameters
3446 *
3447 * OV519 needs a completely different approach, until we can figure out what
3448 * the individual registers do.
3449 *
3450 * Do not put any sensor-specific code in here (including I2C I/O functions)
3451 */
3452 static int ov519_mode_init_regs(struct sd *sd)
3453 {
3454 static const struct ov_regvals mode_init_519_ov7670[] = {
3455 { 0x5d, 0x03 }, /* Turn off suspend mode */
3456 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3457 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3458 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3459 { 0xa3, 0x18 },
3460 { 0xa4, 0x04 },
3461 { 0xa5, 0x28 },
3462 { 0x37, 0x00 }, /* SetUsbInit */
3463 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3464 /* Enable both fields, YUV Input, disable defect comp (why?) */
3465 { 0x20, 0x0c },
3466 { 0x21, 0x38 },
3467 { 0x22, 0x1d },
3468 { 0x17, 0x50 }, /* undocumented */
3469 { 0x37, 0x00 }, /* undocumented */
3470 { 0x40, 0xff }, /* I2C timeout counter */
3471 { 0x46, 0x00 }, /* I2C clock prescaler */
3472 { 0x59, 0x04 }, /* new from windrv 090403 */
3473 { 0xff, 0x00 }, /* undocumented */
3474 /* windows reads 0x55 at this point, why? */
3475 };
3476
3477 static const struct ov_regvals mode_init_519[] = {
3478 { 0x5d, 0x03 }, /* Turn off suspend mode */
3479 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3480 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3481 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3482 { 0xa3, 0x18 },
3483 { 0xa4, 0x04 },
3484 { 0xa5, 0x28 },
3485 { 0x37, 0x00 }, /* SetUsbInit */
3486 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3487 /* Enable both fields, YUV Input, disable defect comp (why?) */
3488 { 0x22, 0x1d },
3489 { 0x17, 0x50 }, /* undocumented */
3490 { 0x37, 0x00 }, /* undocumented */
3491 { 0x40, 0xff }, /* I2C timeout counter */
3492 { 0x46, 0x00 }, /* I2C clock prescaler */
3493 { 0x59, 0x04 }, /* new from windrv 090403 */
3494 { 0xff, 0x00 }, /* undocumented */
3495 /* windows reads 0x55 at this point, why? */
3496 };
3497
3498 /******** Set the mode ********/
3499 if (sd->sensor != SEN_OV7670) {
3500 if (write_regvals(sd, mode_init_519,
3501 ARRAY_SIZE(mode_init_519)))
3502 return -EIO;
3503 if (sd->sensor == SEN_OV7640 ||
3504 sd->sensor == SEN_OV7648) {
3505 /* Select 8-bit input mode */
3506 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3507 }
3508 } else {
3509 if (write_regvals(sd, mode_init_519_ov7670,
3510 ARRAY_SIZE(mode_init_519_ov7670)))
3511 return -EIO;
3512 }
3513
3514 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3515 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3516 if (sd->sensor == SEN_OV7670 &&
3517 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3518 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3519 else if (sd->sensor == SEN_OV7648 &&
3520 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3521 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3522 else
3523 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3524 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3525 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3526 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3527 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3528 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3529 reg_w(sd, 0x26, 0x00); /* Undocumented */
3530
3531 /******** Set the framerate ********/
3532 if (frame_rate > 0)
3533 sd->frame_rate = frame_rate;
3534
3535 /* FIXME: These are only valid at the max resolution. */
3536 sd->clockdiv = 0;
3537 switch (sd->sensor) {
3538 case SEN_OV7640:
3539 case SEN_OV7648:
3540 switch (sd->frame_rate) {
3541 default:
3542 /* case 30: */
3543 reg_w(sd, 0xa4, 0x0c);
3544 reg_w(sd, 0x23, 0xff);
3545 break;
3546 case 25:
3547 reg_w(sd, 0xa4, 0x0c);
3548 reg_w(sd, 0x23, 0x1f);
3549 break;
3550 case 20:
3551 reg_w(sd, 0xa4, 0x0c);
3552 reg_w(sd, 0x23, 0x1b);
3553 break;
3554 case 15:
3555 reg_w(sd, 0xa4, 0x04);
3556 reg_w(sd, 0x23, 0xff);
3557 sd->clockdiv = 1;
3558 break;
3559 case 10:
3560 reg_w(sd, 0xa4, 0x04);
3561 reg_w(sd, 0x23, 0x1f);
3562 sd->clockdiv = 1;
3563 break;
3564 case 5:
3565 reg_w(sd, 0xa4, 0x04);
3566 reg_w(sd, 0x23, 0x1b);
3567 sd->clockdiv = 1;
3568 break;
3569 }
3570 break;
3571 case SEN_OV8610:
3572 switch (sd->frame_rate) {
3573 default: /* 15 fps */
3574 /* case 15: */
3575 reg_w(sd, 0xa4, 0x06);
3576 reg_w(sd, 0x23, 0xff);
3577 break;
3578 case 10:
3579 reg_w(sd, 0xa4, 0x06);
3580 reg_w(sd, 0x23, 0x1f);
3581 break;
3582 case 5:
3583 reg_w(sd, 0xa4, 0x06);
3584 reg_w(sd, 0x23, 0x1b);
3585 break;
3586 }
3587 break;
3588 case SEN_OV7670: /* guesses, based on 7640 */
3589 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3590 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3591 reg_w(sd, 0xa4, 0x10);
3592 switch (sd->frame_rate) {
3593 case 30:
3594 reg_w(sd, 0x23, 0xff);
3595 break;
3596 case 20:
3597 reg_w(sd, 0x23, 0x1b);
3598 break;
3599 default:
3600 /* case 15: */
3601 reg_w(sd, 0x23, 0xff);
3602 sd->clockdiv = 1;
3603 break;
3604 }
3605 break;
3606 }
3607 return 0;
3608 }
3609
3610 static int mode_init_ov_sensor_regs(struct sd *sd)
3611 {
3612 struct gspca_dev *gspca_dev;
3613 int qvga, xstart, xend, ystart, yend;
3614 __u8 v;
3615
3616 gspca_dev = &sd->gspca_dev;
3617 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3618
3619 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3620 switch (sd->sensor) {
3621 case SEN_OV2610:
3622 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3623 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3624 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3625 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3626 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3627 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3628 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3629 return 0;
3630 case SEN_OV3610:
3631 if (qvga) {
3632 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3633 ystart = (776 - gspca_dev->height) / 2;
3634 } else {
3635 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3636 ystart = (1544 - gspca_dev->height) / 2;
3637 }
3638 xend = xstart + gspca_dev->width;
3639 yend = ystart + gspca_dev->height;
3640 /* Writing to the COMH register resets the other windowing regs
3641 to their default values, so we must do this first. */
3642 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3643 i2c_w_mask(sd, 0x32,
3644 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3645 0x3f);
3646 i2c_w_mask(sd, 0x03,
3647 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3648 0x0f);
3649 i2c_w(sd, 0x17, xstart >> 4);
3650 i2c_w(sd, 0x18, xend >> 4);
3651 i2c_w(sd, 0x19, ystart >> 3);
3652 i2c_w(sd, 0x1a, yend >> 3);
3653 return 0;
3654 case SEN_OV8610:
3655 /* For OV8610 qvga means qsvga */
3656 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3657 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3658 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3659 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3660 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3661 break;
3662 case SEN_OV7610:
3663 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3664 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3665 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3666 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3667 break;
3668 case SEN_OV7620:
3669 case SEN_OV7620AE:
3670 case SEN_OV76BE:
3671 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3672 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3673 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3674 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3675 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3676 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3677 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3678 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3679 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3680 if (sd->sensor == SEN_OV76BE)
3681 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3682 break;
3683 case SEN_OV7640:
3684 case SEN_OV7648:
3685 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3686 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3687 /* The following 5 lines where commented out before with a
3688 comment wondering if they did anything. This was because
3689 the old driver did only 640x480, at 320x240 these 5 writes
3690 *significantly* improve the image quality. */
3691 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3692 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3693 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3694 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3695 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3696 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3697 break;
3698 case SEN_OV7670:
3699 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3700 * do we need to set anything else?
3701 * HSTART etc are set in set_ov_sensor_window itself */
3702 i2c_w_mask(sd, OV7670_REG_COM7,
3703 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3704 OV7670_COM7_FMT_MASK);
3705 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3706 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3707 OV7670_COM8_AWB);
3708 if (qvga) { /* QVGA from ov7670.c by
3709 * Jonathan Corbet */
3710 xstart = 164;
3711 xend = 28;
3712 ystart = 14;
3713 yend = 494;
3714 } else { /* VGA */
3715 xstart = 158;
3716 xend = 14;
3717 ystart = 10;
3718 yend = 490;
3719 }
3720 /* OV7670 hardware window registers are split across
3721 * multiple locations */
3722 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3723 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3724 v = i2c_r(sd, OV7670_REG_HREF);
3725 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3726 msleep(10); /* need to sleep between read and write to
3727 * same reg! */
3728 i2c_w(sd, OV7670_REG_HREF, v);
3729
3730 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3731 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3732 v = i2c_r(sd, OV7670_REG_VREF);
3733 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3734 msleep(10); /* need to sleep between read and write to
3735 * same reg! */
3736 i2c_w(sd, OV7670_REG_VREF, v);
3737 break;
3738 case SEN_OV6620:
3739 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3740 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3741 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3742 break;
3743 case SEN_OV6630:
3744 case SEN_OV66308AF:
3745 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3746 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3747 break;
3748 default:
3749 return -EINVAL;
3750 }
3751
3752 /******** Clock programming ********/
3753 i2c_w(sd, 0x11, sd->clockdiv);
3754
3755 return 0;
3756 }
3757
3758 static void sethvflip(struct sd *sd)
3759 {
3760 if (sd->sensor != SEN_OV7670)
3761 return;
3762 if (sd->gspca_dev.streaming)
3763 ov51x_stop(sd);
3764 i2c_w_mask(sd, OV7670_REG_MVFP,
3765 OV7670_MVFP_MIRROR * sd->hflip
3766 | OV7670_MVFP_VFLIP * sd->vflip,
3767 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3768 if (sd->gspca_dev.streaming)
3769 ov51x_restart(sd);
3770 }
3771
3772 static int set_ov_sensor_window(struct sd *sd)
3773 {
3774 struct gspca_dev *gspca_dev;
3775 int qvga, crop;
3776 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3777 int ret;
3778
3779 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3780 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3781 sd->sensor == SEN_OV7670)
3782 return mode_init_ov_sensor_regs(sd);
3783
3784 gspca_dev = &sd->gspca_dev;
3785 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3786 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3787
3788 /* The different sensor ICs handle setting up of window differently.
3789 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3790 switch (sd->sensor) {
3791 case SEN_OV8610:
3792 hwsbase = 0x1e;
3793 hwebase = 0x1e;
3794 vwsbase = 0x02;
3795 vwebase = 0x02;
3796 break;
3797 case SEN_OV7610:
3798 case SEN_OV76BE:
3799 hwsbase = 0x38;
3800 hwebase = 0x3a;
3801 vwsbase = vwebase = 0x05;
3802 break;
3803 case SEN_OV6620:
3804 case SEN_OV6630:
3805 case SEN_OV66308AF:
3806 hwsbase = 0x38;
3807 hwebase = 0x3a;
3808 vwsbase = 0x05;
3809 vwebase = 0x06;
3810 if (sd->sensor == SEN_OV66308AF && qvga)
3811 /* HDG: this fixes U and V getting swapped */
3812 hwsbase++;
3813 if (crop) {
3814 hwsbase += 8;
3815 hwebase += 8;
3816 vwsbase += 11;
3817 vwebase += 11;
3818 }
3819 break;
3820 case SEN_OV7620:
3821 case SEN_OV7620AE:
3822 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3823 hwebase = 0x2f;
3824 vwsbase = vwebase = 0x05;
3825 break;
3826 case SEN_OV7640:
3827 case SEN_OV7648:
3828 hwsbase = 0x1a;
3829 hwebase = 0x1a;
3830 vwsbase = vwebase = 0x03;
3831 break;
3832 default:
3833 return -EINVAL;
3834 }
3835
3836 switch (sd->sensor) {
3837 case SEN_OV6620:
3838 case SEN_OV6630:
3839 case SEN_OV66308AF:
3840 if (qvga) { /* QCIF */
3841 hwscale = 0;
3842 vwscale = 0;
3843 } else { /* CIF */
3844 hwscale = 1;
3845 vwscale = 1; /* The datasheet says 0;
3846 * it's wrong */
3847 }
3848 break;
3849 case SEN_OV8610:
3850 if (qvga) { /* QSVGA */
3851 hwscale = 1;
3852 vwscale = 1;
3853 } else { /* SVGA */
3854 hwscale = 2;
3855 vwscale = 2;
3856 }
3857 break;
3858 default: /* SEN_OV7xx0 */
3859 if (qvga) { /* QVGA */
3860 hwscale = 1;
3861 vwscale = 0;
3862 } else { /* VGA */
3863 hwscale = 2;
3864 vwscale = 1;
3865 }
3866 }
3867
3868 ret = mode_init_ov_sensor_regs(sd);
3869 if (ret < 0)
3870 return ret;
3871
3872 i2c_w(sd, 0x17, hwsbase);
3873 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3874 i2c_w(sd, 0x19, vwsbase);
3875 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3876
3877 return 0;
3878 }
3879
3880 /* -- start the camera -- */
3881 static int sd_start(struct gspca_dev *gspca_dev)
3882 {
3883 struct sd *sd = (struct sd *) gspca_dev;
3884 int ret = 0;
3885
3886 /* Default for most bridges, allow bridge_mode_init_regs to override */
3887 sd->sensor_width = sd->gspca_dev.width;
3888 sd->sensor_height = sd->gspca_dev.height;
3889
3890 switch (sd->bridge) {
3891 case BRIDGE_OV511:
3892 case BRIDGE_OV511PLUS:
3893 ret = ov511_mode_init_regs(sd);
3894 break;
3895 case BRIDGE_OV518:
3896 case BRIDGE_OV518PLUS:
3897 ret = ov518_mode_init_regs(sd);
3898 break;
3899 case BRIDGE_OV519:
3900 ret = ov519_mode_init_regs(sd);
3901 break;
3902 /* case BRIDGE_OVFX2: nothing to do */
3903 case BRIDGE_W9968CF:
3904 ret = w9968cf_mode_init_regs(sd);
3905 break;
3906 }
3907 if (ret < 0)
3908 goto out;
3909
3910 ret = set_ov_sensor_window(sd);
3911 if (ret < 0)
3912 goto out;
3913
3914 setcontrast(gspca_dev);
3915 setbrightness(gspca_dev);
3916 setcolors(gspca_dev);
3917 sethvflip(sd);
3918 setautobrightness(sd);
3919 setfreq(sd);
3920
3921 ret = ov51x_restart(sd);
3922 if (ret < 0)
3923 goto out;
3924 ov51x_led_control(sd, 1);
3925 return 0;
3926 out:
3927 PDEBUG(D_ERR, "camera start error:%d", ret);
3928 return ret;
3929 }
3930
3931 static void sd_stopN(struct gspca_dev *gspca_dev)
3932 {
3933 struct sd *sd = (struct sd *) gspca_dev;
3934
3935 ov51x_stop(sd);
3936 ov51x_led_control(sd, 0);
3937 }
3938
3939 static void sd_stop0(struct gspca_dev *gspca_dev)
3940 {
3941 struct sd *sd = (struct sd *) gspca_dev;
3942
3943 if (sd->bridge == BRIDGE_W9968CF)
3944 w9968cf_stop0(sd);
3945 }
3946
3947 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3948 u8 *in, /* isoc packet */
3949 int len) /* iso packet length */
3950 {
3951 struct sd *sd = (struct sd *) gspca_dev;
3952
3953 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3954 * byte non-zero. The EOF packet has image width/height in the
3955 * 10th and 11th bytes. The 9th byte is given as follows:
3956 *
3957 * bit 7: EOF
3958 * 6: compression enabled
3959 * 5: 422/420/400 modes
3960 * 4: 422/420/400 modes
3961 * 3: 1
3962 * 2: snapshot button on
3963 * 1: snapshot frame
3964 * 0: even/odd field
3965 */
3966 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3967 (in[8] & 0x08)) {
3968 if (in[8] & 0x80) {
3969 /* Frame end */
3970 if ((in[9] + 1) * 8 != gspca_dev->width ||
3971 (in[10] + 1) * 8 != gspca_dev->height) {
3972 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
3973 " requested: %dx%d\n",
3974 (in[9] + 1) * 8, (in[10] + 1) * 8,
3975 gspca_dev->width, gspca_dev->height);
3976 gspca_dev->last_packet_type = DISCARD_PACKET;
3977 return;
3978 }
3979 /* Add 11 byte footer to frame, might be usefull */
3980 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
3981 return;
3982 } else {
3983 /* Frame start */
3984 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
3985 sd->packet_nr = 0;
3986 }
3987 }
3988
3989 /* Ignore the packet number */
3990 len--;
3991
3992 /* intermediate packet */
3993 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
3994 }
3995
3996 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3997 u8 *data, /* isoc packet */
3998 int len) /* iso packet length */
3999 {
4000 struct sd *sd = (struct sd *) gspca_dev;
4001
4002 /* A false positive here is likely, until OVT gives me
4003 * the definitive SOF/EOF format */
4004 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4005 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4006 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4007 sd->packet_nr = 0;
4008 }
4009
4010 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4011 return;
4012
4013 /* Does this device use packet numbers ? */
4014 if (len & 7) {
4015 len--;
4016 if (sd->packet_nr == data[len])
4017 sd->packet_nr++;
4018 /* The last few packets of the frame (which are all 0's
4019 except that they may contain part of the footer), are
4020 numbered 0 */
4021 else if (sd->packet_nr == 0 || data[len]) {
4022 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4023 (int)data[len], (int)sd->packet_nr);
4024 gspca_dev->last_packet_type = DISCARD_PACKET;
4025 return;
4026 }
4027 }
4028
4029 /* intermediate packet */
4030 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4031 }
4032
4033 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4034 u8 *data, /* isoc packet */
4035 int len) /* iso packet length */
4036 {
4037 /* Header of ov519 is 16 bytes:
4038 * Byte Value Description
4039 * 0 0xff magic
4040 * 1 0xff magic
4041 * 2 0xff magic
4042 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4043 * 9 0xXX 0x01 initial frame without data,
4044 * 0x00 standard frame with image
4045 * 14 Lo in EOF: length of image data / 8
4046 * 15 Hi
4047 */
4048
4049 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4050 switch (data[3]) {
4051 case 0x50: /* start of frame */
4052 #define HDRSZ 16
4053 data += HDRSZ;
4054 len -= HDRSZ;
4055 #undef HDRSZ
4056 if (data[0] == 0xff || data[1] == 0xd8)
4057 gspca_frame_add(gspca_dev, FIRST_PACKET,
4058 data, len);
4059 else
4060 gspca_dev->last_packet_type = DISCARD_PACKET;
4061 return;
4062 case 0x51: /* end of frame */
4063 if (data[9] != 0)
4064 gspca_dev->last_packet_type = DISCARD_PACKET;
4065 gspca_frame_add(gspca_dev, LAST_PACKET,
4066 NULL, 0);
4067 return;
4068 }
4069 }
4070
4071 /* intermediate packet */
4072 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4073 }
4074
4075 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4076 u8 *data, /* isoc packet */
4077 int len) /* iso packet length */
4078 {
4079 /* A short read signals EOF */
4080 if (len < OVFX2_BULK_SIZE) {
4081 gspca_frame_add(gspca_dev, LAST_PACKET, data, len);
4082 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4083 return;
4084 }
4085 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4086 }
4087
4088 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4089 u8 *data, /* isoc packet */
4090 int len) /* iso packet length */
4091 {
4092 struct sd *sd = (struct sd *) gspca_dev;
4093
4094 switch (sd->bridge) {
4095 case BRIDGE_OV511:
4096 case BRIDGE_OV511PLUS:
4097 ov511_pkt_scan(gspca_dev, data, len);
4098 break;
4099 case BRIDGE_OV518:
4100 case BRIDGE_OV518PLUS:
4101 ov518_pkt_scan(gspca_dev, data, len);
4102 break;
4103 case BRIDGE_OV519:
4104 ov519_pkt_scan(gspca_dev, data, len);
4105 break;
4106 case BRIDGE_OVFX2:
4107 ovfx2_pkt_scan(gspca_dev, data, len);
4108 break;
4109 case BRIDGE_W9968CF:
4110 w9968cf_pkt_scan(gspca_dev, data, len);
4111 break;
4112 }
4113 }
4114
4115 /* -- management routines -- */
4116
4117 static void setbrightness(struct gspca_dev *gspca_dev)
4118 {
4119 struct sd *sd = (struct sd *) gspca_dev;
4120 int val;
4121
4122 val = sd->brightness;
4123 switch (sd->sensor) {
4124 case SEN_OV8610:
4125 case SEN_OV7610:
4126 case SEN_OV76BE:
4127 case SEN_OV6620:
4128 case SEN_OV6630:
4129 case SEN_OV66308AF:
4130 case SEN_OV7640:
4131 case SEN_OV7648:
4132 i2c_w(sd, OV7610_REG_BRT, val);
4133 break;
4134 case SEN_OV7620:
4135 case SEN_OV7620AE:
4136 /* 7620 doesn't like manual changes when in auto mode */
4137 if (!sd->autobrightness)
4138 i2c_w(sd, OV7610_REG_BRT, val);
4139 break;
4140 case SEN_OV7670:
4141 /*win trace
4142 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4143 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4144 break;
4145 }
4146 }
4147
4148 static void setcontrast(struct gspca_dev *gspca_dev)
4149 {
4150 struct sd *sd = (struct sd *) gspca_dev;
4151 int val;
4152
4153 val = sd->contrast;
4154 switch (sd->sensor) {
4155 case SEN_OV7610:
4156 case SEN_OV6620:
4157 i2c_w(sd, OV7610_REG_CNT, val);
4158 break;
4159 case SEN_OV6630:
4160 case SEN_OV66308AF:
4161 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4162 break;
4163 case SEN_OV8610: {
4164 static const __u8 ctab[] = {
4165 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4166 };
4167
4168 /* Use Y gamma control instead. Bit 0 enables it. */
4169 i2c_w(sd, 0x64, ctab[val >> 5]);
4170 break;
4171 }
4172 case SEN_OV7620:
4173 case SEN_OV7620AE: {
4174 static const __u8 ctab[] = {
4175 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4176 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4177 };
4178
4179 /* Use Y gamma control instead. Bit 0 enables it. */
4180 i2c_w(sd, 0x64, ctab[val >> 4]);
4181 break;
4182 }
4183 case SEN_OV7640:
4184 case SEN_OV7648:
4185 /* Use gain control instead. */
4186 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
4187 break;
4188 case SEN_OV7670:
4189 /* check that this isn't just the same as ov7610 */
4190 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4191 break;
4192 }
4193 }
4194
4195 static void setcolors(struct gspca_dev *gspca_dev)
4196 {
4197 struct sd *sd = (struct sd *) gspca_dev;
4198 int val;
4199
4200 val = sd->colors;
4201 switch (sd->sensor) {
4202 case SEN_OV8610:
4203 case SEN_OV7610:
4204 case SEN_OV76BE:
4205 case SEN_OV6620:
4206 case SEN_OV6630:
4207 case SEN_OV66308AF:
4208 i2c_w(sd, OV7610_REG_SAT, val);
4209 break;
4210 case SEN_OV7620:
4211 case SEN_OV7620AE:
4212 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4213 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4214 if (rc < 0)
4215 goto out; */
4216 i2c_w(sd, OV7610_REG_SAT, val);
4217 break;
4218 case SEN_OV7640:
4219 case SEN_OV7648:
4220 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4221 break;
4222 case SEN_OV7670:
4223 /* supported later once I work out how to do it
4224 * transparently fail now! */
4225 /* set REG_COM13 values for UV sat auto mode */
4226 break;
4227 }
4228 }
4229
4230 static void setautobrightness(struct sd *sd)
4231 {
4232 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4233 sd->sensor == SEN_OV7670 ||
4234 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4235 return;
4236
4237 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4238 }
4239
4240 static void setfreq(struct sd *sd)
4241 {
4242 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4243 return;
4244
4245 if (sd->sensor == SEN_OV7670) {
4246 switch (sd->freq) {
4247 case 0: /* Banding filter disabled */
4248 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4249 break;
4250 case 1: /* 50 hz */
4251 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4252 OV7670_COM8_BFILT);
4253 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4254 break;
4255 case 2: /* 60 hz */
4256 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4257 OV7670_COM8_BFILT);
4258 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4259 break;
4260 case 3: /* Auto hz */
4261 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4262 OV7670_COM8_BFILT);
4263 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4264 0x18);
4265 break;
4266 }
4267 } else {
4268 switch (sd->freq) {
4269 case 0: /* Banding filter disabled */
4270 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4271 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4272 break;
4273 case 1: /* 50 hz (filter on and framerate adj) */
4274 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4275 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4276 /* 20 fps -> 16.667 fps */
4277 if (sd->sensor == SEN_OV6620 ||
4278 sd->sensor == SEN_OV6630 ||
4279 sd->sensor == SEN_OV66308AF)
4280 i2c_w(sd, 0x2b, 0x5e);
4281 else
4282 i2c_w(sd, 0x2b, 0xac);
4283 break;
4284 case 2: /* 60 hz (filter on, ...) */
4285 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4286 if (sd->sensor == SEN_OV6620 ||
4287 sd->sensor == SEN_OV6630 ||
4288 sd->sensor == SEN_OV66308AF) {
4289 /* 20 fps -> 15 fps */
4290 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4291 i2c_w(sd, 0x2b, 0xa8);
4292 } else {
4293 /* no framerate adj. */
4294 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4295 }
4296 break;
4297 }
4298 }
4299 }
4300
4301 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4302 {
4303 struct sd *sd = (struct sd *) gspca_dev;
4304
4305 sd->brightness = val;
4306 if (gspca_dev->streaming)
4307 setbrightness(gspca_dev);
4308 return 0;
4309 }
4310
4311 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4312 {
4313 struct sd *sd = (struct sd *) gspca_dev;
4314
4315 *val = sd->brightness;
4316 return 0;
4317 }
4318
4319 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4320 {
4321 struct sd *sd = (struct sd *) gspca_dev;
4322
4323 sd->contrast = val;
4324 if (gspca_dev->streaming)
4325 setcontrast(gspca_dev);
4326 return 0;
4327 }
4328
4329 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4330 {
4331 struct sd *sd = (struct sd *) gspca_dev;
4332
4333 *val = sd->contrast;
4334 return 0;
4335 }
4336
4337 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4338 {
4339 struct sd *sd = (struct sd *) gspca_dev;
4340
4341 sd->colors = val;
4342 if (gspca_dev->streaming)
4343 setcolors(gspca_dev);
4344 return 0;
4345 }
4346
4347 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4348 {
4349 struct sd *sd = (struct sd *) gspca_dev;
4350
4351 *val = sd->colors;
4352 return 0;
4353 }
4354
4355 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4356 {
4357 struct sd *sd = (struct sd *) gspca_dev;
4358
4359 sd->hflip = val;
4360 if (gspca_dev->streaming)
4361 sethvflip(sd);
4362 return 0;
4363 }
4364
4365 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4366 {
4367 struct sd *sd = (struct sd *) gspca_dev;
4368
4369 *val = sd->hflip;
4370 return 0;
4371 }
4372
4373 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4374 {
4375 struct sd *sd = (struct sd *) gspca_dev;
4376
4377 sd->vflip = val;
4378 if (gspca_dev->streaming)
4379 sethvflip(sd);
4380 return 0;
4381 }
4382
4383 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4384 {
4385 struct sd *sd = (struct sd *) gspca_dev;
4386
4387 *val = sd->vflip;
4388 return 0;
4389 }
4390
4391 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4392 {
4393 struct sd *sd = (struct sd *) gspca_dev;
4394
4395 sd->autobrightness = val;
4396 if (gspca_dev->streaming)
4397 setautobrightness(sd);
4398 return 0;
4399 }
4400
4401 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4402 {
4403 struct sd *sd = (struct sd *) gspca_dev;
4404
4405 *val = sd->autobrightness;
4406 return 0;
4407 }
4408
4409 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4410 {
4411 struct sd *sd = (struct sd *) gspca_dev;
4412
4413 sd->freq = val;
4414 if (gspca_dev->streaming) {
4415 setfreq(sd);
4416 /* Ugly but necessary */
4417 if (sd->bridge == BRIDGE_W9968CF)
4418 w9968cf_set_crop_window(sd);
4419 }
4420 return 0;
4421 }
4422
4423 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4424 {
4425 struct sd *sd = (struct sd *) gspca_dev;
4426
4427 *val = sd->freq;
4428 return 0;
4429 }
4430
4431 static int sd_querymenu(struct gspca_dev *gspca_dev,
4432 struct v4l2_querymenu *menu)
4433 {
4434 struct sd *sd = (struct sd *) gspca_dev;
4435
4436 switch (menu->id) {
4437 case V4L2_CID_POWER_LINE_FREQUENCY:
4438 switch (menu->index) {
4439 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4440 strcpy((char *) menu->name, "NoFliker");
4441 return 0;
4442 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4443 strcpy((char *) menu->name, "50 Hz");
4444 return 0;
4445 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4446 strcpy((char *) menu->name, "60 Hz");
4447 return 0;
4448 case 3:
4449 if (sd->sensor != SEN_OV7670)
4450 return -EINVAL;
4451
4452 strcpy((char *) menu->name, "Automatic");
4453 return 0;
4454 }
4455 break;
4456 }
4457 return -EINVAL;
4458 }
4459
4460 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4461 struct v4l2_jpegcompression *jcomp)
4462 {
4463 struct sd *sd = (struct sd *) gspca_dev;
4464
4465 if (sd->bridge != BRIDGE_W9968CF)
4466 return -EINVAL;
4467
4468 memset(jcomp, 0, sizeof *jcomp);
4469 jcomp->quality = sd->quality;
4470 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4471 V4L2_JPEG_MARKER_DRI;
4472 return 0;
4473 }
4474
4475 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4476 struct v4l2_jpegcompression *jcomp)
4477 {
4478 struct sd *sd = (struct sd *) gspca_dev;
4479
4480 if (sd->bridge != BRIDGE_W9968CF)
4481 return -EINVAL;
4482
4483 if (gspca_dev->streaming)
4484 return -EBUSY;
4485
4486 if (jcomp->quality < QUALITY_MIN)
4487 sd->quality = QUALITY_MIN;
4488 else if (jcomp->quality > QUALITY_MAX)
4489 sd->quality = QUALITY_MAX;
4490 else
4491 sd->quality = jcomp->quality;
4492
4493 /* Return resulting jcomp params to app */
4494 sd_get_jcomp(gspca_dev, jcomp);
4495
4496 return 0;
4497 }
4498
4499 /* sub-driver description */
4500 static const struct sd_desc sd_desc = {
4501 .name = MODULE_NAME,
4502 .ctrls = sd_ctrls,
4503 .nctrls = ARRAY_SIZE(sd_ctrls),
4504 .config = sd_config,
4505 .init = sd_init,
4506 .start = sd_start,
4507 .stopN = sd_stopN,
4508 .stop0 = sd_stop0,
4509 .pkt_scan = sd_pkt_scan,
4510 .querymenu = sd_querymenu,
4511 .get_jcomp = sd_get_jcomp,
4512 .set_jcomp = sd_set_jcomp,
4513 };
4514
4515 /* -- module initialisation -- */
4516 static const __devinitdata struct usb_device_id device_table[] = {
4517 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4518 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4519 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4520 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4521 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4522 {USB_DEVICE(0x041e, 0x4064),
4523 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4524 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4525 {USB_DEVICE(0x041e, 0x4068),
4526 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4527 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4528 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4529 {USB_DEVICE(0x054c, 0x0155),
4530 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4531 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4532 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4533 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4534 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4535 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4536 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4537 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4538 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4539 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4540 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4541 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4542 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4543 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4544 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4545 {}
4546 };
4547
4548 MODULE_DEVICE_TABLE(usb, device_table);
4549
4550 /* -- device connect -- */
4551 static int sd_probe(struct usb_interface *intf,
4552 const struct usb_device_id *id)
4553 {
4554 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4555 THIS_MODULE);
4556 }
4557
4558 static struct usb_driver sd_driver = {
4559 .name = MODULE_NAME,
4560 .id_table = device_table,
4561 .probe = sd_probe,
4562 .disconnect = gspca_disconnect,
4563 #ifdef CONFIG_PM
4564 .suspend = gspca_suspend,
4565 .resume = gspca_resume,
4566 #endif
4567 };
4568
4569 /* -- module insert / remove -- */
4570 static int __init sd_mod_init(void)
4571 {
4572 int ret;
4573 ret = usb_register(&sd_driver);
4574 if (ret < 0)
4575 return ret;
4576 PDEBUG(D_PROBE, "registered");
4577 return 0;
4578 }
4579 static void __exit sd_mod_exit(void)
4580 {
4581 usb_deregister(&sd_driver);
4582 PDEBUG(D_PROBE, "deregistered");
4583 }
4584
4585 module_init(sd_mod_init);
4586 module_exit(sd_mod_exit);
4587
4588 module_param(frame_rate, int, 0644);
4589 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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