2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
10 * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
22 #include "edac_core.h"
23 #include "edac_module.h"
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue
= 1;
27 static int edac_mc_log_ce
= 1;
28 static int edac_mc_panic_on_ue
;
29 static int edac_mc_poll_msec
= 1000;
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
34 return edac_mc_log_ue
;
37 int edac_mc_get_log_ce(void)
39 return edac_mc_log_ce
;
42 int edac_mc_get_panic_on_ue(void)
44 return edac_mc_panic_on_ue
;
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
50 return edac_mc_poll_msec
;
53 static int edac_set_poll_msec(const char *val
, struct kernel_param
*kp
)
61 ret
= strict_strtol(val
, 0, &l
);
62 if (ret
== -EINVAL
|| ((int)l
!= l
))
64 *((int *)kp
->arg
) = l
;
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l
);
72 /* Parameter declarations for above */
73 module_param(edac_mc_panic_on_ue
, int, 0644);
74 MODULE_PARM_DESC(edac_mc_panic_on_ue
, "Panic on uncorrected error: 0=off 1=on");
75 module_param(edac_mc_log_ue
, int, 0644);
76 MODULE_PARM_DESC(edac_mc_log_ue
,
77 "Log uncorrectable error to console: 0=off 1=on");
78 module_param(edac_mc_log_ce
, int, 0644);
79 MODULE_PARM_DESC(edac_mc_log_ce
,
80 "Log correctable error to console: 0=off 1=on");
81 module_param_call(edac_mc_poll_msec
, edac_set_poll_msec
, param_get_int
,
82 &edac_mc_poll_msec
, 0644);
83 MODULE_PARM_DESC(edac_mc_poll_msec
, "Polling period in milliseconds");
85 static struct device
*mci_pdev
;
88 * various constants for Memory Controllers
90 static const char *mem_types
[] = {
91 [MEM_EMPTY
] = "Empty",
92 [MEM_RESERVED
] = "Reserved",
93 [MEM_UNKNOWN
] = "Unknown",
97 [MEM_SDR
] = "Unbuffered-SDR",
98 [MEM_RDR
] = "Registered-SDR",
99 [MEM_DDR
] = "Unbuffered-DDR",
100 [MEM_RDDR
] = "Registered-DDR",
102 [MEM_DDR2
] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2
] = "FullyBuffered-DDR2",
104 [MEM_RDDR2
] = "Registered-DDR2",
106 [MEM_DDR3
] = "Unbuffered-DDR3",
107 [MEM_RDDR3
] = "Registered-DDR3"
110 static const char *dev_types
[] = {
111 [DEV_UNKNOWN
] = "Unknown",
121 static const char *edac_caps
[] = {
122 [EDAC_UNKNOWN
] = "Unknown",
123 [EDAC_NONE
] = "None",
124 [EDAC_RESERVED
] = "Reserved",
125 [EDAC_PARITY
] = "PARITY",
127 [EDAC_SECDED
] = "SECDED",
128 [EDAC_S2ECD2ED
] = "S2ECD2ED",
129 [EDAC_S4ECD4ED
] = "S4ECD4ED",
130 [EDAC_S8ECD8ED
] = "S8ECD8ED",
131 [EDAC_S16ECD16ED
] = "S16ECD16ED"
134 #ifdef CONFIG_EDAC_LEGACY_SYSFS
136 * EDAC sysfs CSROW data structures and methods
139 #define to_csrow(k) container_of(k, struct csrow_info, dev)
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
148 struct dev_ch_attribute
{
149 struct device_attribute attr
;
153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
159 /* Set of more default csrow<id> attribute show/store functions */
160 static ssize_t
csrow_ue_count_show(struct device
*dev
,
161 struct device_attribute
*mattr
, char *data
)
163 struct csrow_info
*csrow
= to_csrow(dev
);
165 return sprintf(data
, "%u\n", csrow
->ue_count
);
168 static ssize_t
csrow_ce_count_show(struct device
*dev
,
169 struct device_attribute
*mattr
, char *data
)
171 struct csrow_info
*csrow
= to_csrow(dev
);
173 return sprintf(data
, "%u\n", csrow
->ce_count
);
176 static ssize_t
csrow_size_show(struct device
*dev
,
177 struct device_attribute
*mattr
, char *data
)
179 struct csrow_info
*csrow
= to_csrow(dev
);
183 if (csrow
->mci
->csbased
)
184 return sprintf(data
, "%u\n", PAGES_TO_MiB(csrow
->nr_pages
));
186 for (i
= 0; i
< csrow
->nr_channels
; i
++)
187 nr_pages
+= csrow
->channels
[i
]->dimm
->nr_pages
;
188 return sprintf(data
, "%u\n", PAGES_TO_MiB(nr_pages
));
191 static ssize_t
csrow_mem_type_show(struct device
*dev
,
192 struct device_attribute
*mattr
, char *data
)
194 struct csrow_info
*csrow
= to_csrow(dev
);
196 return sprintf(data
, "%s\n", mem_types
[csrow
->channels
[0]->dimm
->mtype
]);
199 static ssize_t
csrow_dev_type_show(struct device
*dev
,
200 struct device_attribute
*mattr
, char *data
)
202 struct csrow_info
*csrow
= to_csrow(dev
);
204 return sprintf(data
, "%s\n", dev_types
[csrow
->channels
[0]->dimm
->dtype
]);
207 static ssize_t
csrow_edac_mode_show(struct device
*dev
,
208 struct device_attribute
*mattr
,
211 struct csrow_info
*csrow
= to_csrow(dev
);
213 return sprintf(data
, "%s\n", edac_caps
[csrow
->channels
[0]->dimm
->edac_mode
]);
216 /* show/store functions for DIMM Label attributes */
217 static ssize_t
channel_dimm_label_show(struct device
*dev
,
218 struct device_attribute
*mattr
,
221 struct csrow_info
*csrow
= to_csrow(dev
);
222 unsigned chan
= to_channel(mattr
);
223 struct rank_info
*rank
= csrow
->channels
[chan
];
225 /* if field has not been initialized, there is nothing to send */
226 if (!rank
->dimm
->label
[0])
229 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n",
233 static ssize_t
channel_dimm_label_store(struct device
*dev
,
234 struct device_attribute
*mattr
,
235 const char *data
, size_t count
)
237 struct csrow_info
*csrow
= to_csrow(dev
);
238 unsigned chan
= to_channel(mattr
);
239 struct rank_info
*rank
= csrow
->channels
[chan
];
241 ssize_t max_size
= 0;
243 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
244 strncpy(rank
->dimm
->label
, data
, max_size
);
245 rank
->dimm
->label
[max_size
] = '\0';
250 /* show function for dynamic chX_ce_count attribute */
251 static ssize_t
channel_ce_count_show(struct device
*dev
,
252 struct device_attribute
*mattr
, char *data
)
254 struct csrow_info
*csrow
= to_csrow(dev
);
255 unsigned chan
= to_channel(mattr
);
256 struct rank_info
*rank
= csrow
->channels
[chan
];
258 return sprintf(data
, "%u\n", rank
->ce_count
);
261 /* cwrow<id>/attribute files */
262 DEVICE_ATTR_LEGACY(size_mb
, S_IRUGO
, csrow_size_show
, NULL
);
263 DEVICE_ATTR_LEGACY(dev_type
, S_IRUGO
, csrow_dev_type_show
, NULL
);
264 DEVICE_ATTR_LEGACY(mem_type
, S_IRUGO
, csrow_mem_type_show
, NULL
);
265 DEVICE_ATTR_LEGACY(edac_mode
, S_IRUGO
, csrow_edac_mode_show
, NULL
);
266 DEVICE_ATTR_LEGACY(ue_count
, S_IRUGO
, csrow_ue_count_show
, NULL
);
267 DEVICE_ATTR_LEGACY(ce_count
, S_IRUGO
, csrow_ce_count_show
, NULL
);
269 /* default attributes of the CSROW<id> object */
270 static struct attribute
*csrow_attrs
[] = {
271 &dev_attr_legacy_dev_type
.attr
,
272 &dev_attr_legacy_mem_type
.attr
,
273 &dev_attr_legacy_edac_mode
.attr
,
274 &dev_attr_legacy_size_mb
.attr
,
275 &dev_attr_legacy_ue_count
.attr
,
276 &dev_attr_legacy_ce_count
.attr
,
280 static struct attribute_group csrow_attr_grp
= {
281 .attrs
= csrow_attrs
,
284 static const struct attribute_group
*csrow_attr_groups
[] = {
289 static void csrow_attr_release(struct device
*dev
)
291 struct csrow_info
*csrow
= container_of(dev
, struct csrow_info
, dev
);
293 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
297 static struct device_type csrow_attr_type
= {
298 .groups
= csrow_attr_groups
,
299 .release
= csrow_attr_release
,
303 * possible dynamic channel DIMM Label attribute files
307 #define EDAC_NR_CHANNELS 6
309 DEVICE_CHANNEL(ch0_dimm_label
, S_IRUGO
| S_IWUSR
,
310 channel_dimm_label_show
, channel_dimm_label_store
, 0);
311 DEVICE_CHANNEL(ch1_dimm_label
, S_IRUGO
| S_IWUSR
,
312 channel_dimm_label_show
, channel_dimm_label_store
, 1);
313 DEVICE_CHANNEL(ch2_dimm_label
, S_IRUGO
| S_IWUSR
,
314 channel_dimm_label_show
, channel_dimm_label_store
, 2);
315 DEVICE_CHANNEL(ch3_dimm_label
, S_IRUGO
| S_IWUSR
,
316 channel_dimm_label_show
, channel_dimm_label_store
, 3);
317 DEVICE_CHANNEL(ch4_dimm_label
, S_IRUGO
| S_IWUSR
,
318 channel_dimm_label_show
, channel_dimm_label_store
, 4);
319 DEVICE_CHANNEL(ch5_dimm_label
, S_IRUGO
| S_IWUSR
,
320 channel_dimm_label_show
, channel_dimm_label_store
, 5);
322 /* Total possible dynamic DIMM Label attribute file table */
323 static struct device_attribute
*dynamic_csrow_dimm_attr
[] = {
324 &dev_attr_legacy_ch0_dimm_label
.attr
,
325 &dev_attr_legacy_ch1_dimm_label
.attr
,
326 &dev_attr_legacy_ch2_dimm_label
.attr
,
327 &dev_attr_legacy_ch3_dimm_label
.attr
,
328 &dev_attr_legacy_ch4_dimm_label
.attr
,
329 &dev_attr_legacy_ch5_dimm_label
.attr
332 /* possible dynamic channel ce_count attribute files */
333 DEVICE_CHANNEL(ch0_ce_count
, S_IRUGO
| S_IWUSR
,
334 channel_ce_count_show
, NULL
, 0);
335 DEVICE_CHANNEL(ch1_ce_count
, S_IRUGO
| S_IWUSR
,
336 channel_ce_count_show
, NULL
, 1);
337 DEVICE_CHANNEL(ch2_ce_count
, S_IRUGO
| S_IWUSR
,
338 channel_ce_count_show
, NULL
, 2);
339 DEVICE_CHANNEL(ch3_ce_count
, S_IRUGO
| S_IWUSR
,
340 channel_ce_count_show
, NULL
, 3);
341 DEVICE_CHANNEL(ch4_ce_count
, S_IRUGO
| S_IWUSR
,
342 channel_ce_count_show
, NULL
, 4);
343 DEVICE_CHANNEL(ch5_ce_count
, S_IRUGO
| S_IWUSR
,
344 channel_ce_count_show
, NULL
, 5);
346 /* Total possible dynamic ce_count attribute file table */
347 static struct device_attribute
*dynamic_csrow_ce_count_attr
[] = {
348 &dev_attr_legacy_ch0_ce_count
.attr
,
349 &dev_attr_legacy_ch1_ce_count
.attr
,
350 &dev_attr_legacy_ch2_ce_count
.attr
,
351 &dev_attr_legacy_ch3_ce_count
.attr
,
352 &dev_attr_legacy_ch4_ce_count
.attr
,
353 &dev_attr_legacy_ch5_ce_count
.attr
356 static inline int nr_pages_per_csrow(struct csrow_info
*csrow
)
358 int chan
, nr_pages
= 0;
360 for (chan
= 0; chan
< csrow
->nr_channels
; chan
++)
361 nr_pages
+= csrow
->channels
[chan
]->dimm
->nr_pages
;
366 /* Create a CSROW object under specifed edac_mc_device */
367 static int edac_create_csrow_object(struct mem_ctl_info
*mci
,
368 struct csrow_info
*csrow
, int index
)
372 if (csrow
->nr_channels
>= EDAC_NR_CHANNELS
)
375 csrow
->dev
.type
= &csrow_attr_type
;
376 csrow
->dev
.bus
= &mci
->bus
;
377 device_initialize(&csrow
->dev
);
378 csrow
->dev
.parent
= &mci
->dev
;
380 dev_set_name(&csrow
->dev
, "csrow%d", index
);
381 dev_set_drvdata(&csrow
->dev
, csrow
);
383 edac_dbg(0, "creating (virtual) csrow node %s\n",
384 dev_name(&csrow
->dev
));
386 err
= device_add(&csrow
->dev
);
390 for (chan
= 0; chan
< csrow
->nr_channels
; chan
++) {
391 /* Only expose populated DIMMs */
392 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
394 err
= device_create_file(&csrow
->dev
,
395 dynamic_csrow_dimm_attr
[chan
]);
398 err
= device_create_file(&csrow
->dev
,
399 dynamic_csrow_ce_count_attr
[chan
]);
401 device_remove_file(&csrow
->dev
,
402 dynamic_csrow_dimm_attr
[chan
]);
410 for (--chan
; chan
>= 0; chan
--) {
411 device_remove_file(&csrow
->dev
,
412 dynamic_csrow_dimm_attr
[chan
]);
413 device_remove_file(&csrow
->dev
,
414 dynamic_csrow_ce_count_attr
[chan
]);
416 put_device(&csrow
->dev
);
421 /* Create a CSROW object under specifed edac_mc_device */
422 static int edac_create_csrow_objects(struct mem_ctl_info
*mci
)
425 struct csrow_info
*csrow
;
427 for (i
= 0; i
< mci
->nr_csrows
; i
++) {
428 csrow
= mci
->csrows
[i
];
429 if (!nr_pages_per_csrow(csrow
))
431 err
= edac_create_csrow_object(mci
, mci
->csrows
[i
], i
);
438 for (--i
; i
>= 0; i
--) {
439 csrow
= mci
->csrows
[i
];
440 if (!nr_pages_per_csrow(csrow
))
442 for (chan
= csrow
->nr_channels
- 1; chan
>= 0; chan
--) {
443 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
445 device_remove_file(&csrow
->dev
,
446 dynamic_csrow_dimm_attr
[chan
]);
447 device_remove_file(&csrow
->dev
,
448 dynamic_csrow_ce_count_attr
[chan
]);
450 put_device(&mci
->csrows
[i
]->dev
);
456 static void edac_delete_csrow_objects(struct mem_ctl_info
*mci
)
459 struct csrow_info
*csrow
;
461 for (i
= mci
->nr_csrows
- 1; i
>= 0; i
--) {
462 csrow
= mci
->csrows
[i
];
463 if (!nr_pages_per_csrow(csrow
))
465 for (chan
= csrow
->nr_channels
- 1; chan
>= 0; chan
--) {
466 if (!csrow
->channels
[chan
]->dimm
->nr_pages
)
468 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
470 device_remove_file(&csrow
->dev
,
471 dynamic_csrow_dimm_attr
[chan
]);
472 device_remove_file(&csrow
->dev
,
473 dynamic_csrow_ce_count_attr
[chan
]);
475 device_unregister(&mci
->csrows
[i
]->dev
);
481 * Per-dimm (or per-rank) devices
484 #define to_dimm(k) container_of(k, struct dimm_info, dev)
486 /* show/store functions for DIMM Label attributes */
487 static ssize_t
dimmdev_location_show(struct device
*dev
,
488 struct device_attribute
*mattr
, char *data
)
490 struct dimm_info
*dimm
= to_dimm(dev
);
492 return edac_dimm_info_location(dimm
, data
, PAGE_SIZE
);
495 static ssize_t
dimmdev_label_show(struct device
*dev
,
496 struct device_attribute
*mattr
, char *data
)
498 struct dimm_info
*dimm
= to_dimm(dev
);
500 /* if field has not been initialized, there is nothing to send */
504 return snprintf(data
, EDAC_MC_LABEL_LEN
, "%s\n", dimm
->label
);
507 static ssize_t
dimmdev_label_store(struct device
*dev
,
508 struct device_attribute
*mattr
,
512 struct dimm_info
*dimm
= to_dimm(dev
);
514 ssize_t max_size
= 0;
516 max_size
= min((ssize_t
) count
, (ssize_t
) EDAC_MC_LABEL_LEN
- 1);
517 strncpy(dimm
->label
, data
, max_size
);
518 dimm
->label
[max_size
] = '\0';
523 static ssize_t
dimmdev_size_show(struct device
*dev
,
524 struct device_attribute
*mattr
, char *data
)
526 struct dimm_info
*dimm
= to_dimm(dev
);
528 return sprintf(data
, "%u\n", PAGES_TO_MiB(dimm
->nr_pages
));
531 static ssize_t
dimmdev_mem_type_show(struct device
*dev
,
532 struct device_attribute
*mattr
, char *data
)
534 struct dimm_info
*dimm
= to_dimm(dev
);
536 return sprintf(data
, "%s\n", mem_types
[dimm
->mtype
]);
539 static ssize_t
dimmdev_dev_type_show(struct device
*dev
,
540 struct device_attribute
*mattr
, char *data
)
542 struct dimm_info
*dimm
= to_dimm(dev
);
544 return sprintf(data
, "%s\n", dev_types
[dimm
->dtype
]);
547 static ssize_t
dimmdev_edac_mode_show(struct device
*dev
,
548 struct device_attribute
*mattr
,
551 struct dimm_info
*dimm
= to_dimm(dev
);
553 return sprintf(data
, "%s\n", edac_caps
[dimm
->edac_mode
]);
556 /* dimm/rank attribute files */
557 static DEVICE_ATTR(dimm_label
, S_IRUGO
| S_IWUSR
,
558 dimmdev_label_show
, dimmdev_label_store
);
559 static DEVICE_ATTR(dimm_location
, S_IRUGO
, dimmdev_location_show
, NULL
);
560 static DEVICE_ATTR(size
, S_IRUGO
, dimmdev_size_show
, NULL
);
561 static DEVICE_ATTR(dimm_mem_type
, S_IRUGO
, dimmdev_mem_type_show
, NULL
);
562 static DEVICE_ATTR(dimm_dev_type
, S_IRUGO
, dimmdev_dev_type_show
, NULL
);
563 static DEVICE_ATTR(dimm_edac_mode
, S_IRUGO
, dimmdev_edac_mode_show
, NULL
);
565 /* attributes of the dimm<id>/rank<id> object */
566 static struct attribute
*dimm_attrs
[] = {
567 &dev_attr_dimm_label
.attr
,
568 &dev_attr_dimm_location
.attr
,
570 &dev_attr_dimm_mem_type
.attr
,
571 &dev_attr_dimm_dev_type
.attr
,
572 &dev_attr_dimm_edac_mode
.attr
,
576 static struct attribute_group dimm_attr_grp
= {
580 static const struct attribute_group
*dimm_attr_groups
[] = {
585 static void dimm_attr_release(struct device
*dev
)
587 struct dimm_info
*dimm
= container_of(dev
, struct dimm_info
, dev
);
589 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev
));
593 static struct device_type dimm_attr_type
= {
594 .groups
= dimm_attr_groups
,
595 .release
= dimm_attr_release
,
598 /* Create a DIMM object under specifed memory controller device */
599 static int edac_create_dimm_object(struct mem_ctl_info
*mci
,
600 struct dimm_info
*dimm
,
606 dimm
->dev
.type
= &dimm_attr_type
;
607 dimm
->dev
.bus
= &mci
->bus
;
608 device_initialize(&dimm
->dev
);
610 dimm
->dev
.parent
= &mci
->dev
;
611 if (mci
->mem_is_per_rank
)
612 dev_set_name(&dimm
->dev
, "rank%d", index
);
614 dev_set_name(&dimm
->dev
, "dimm%d", index
);
615 dev_set_drvdata(&dimm
->dev
, dimm
);
616 pm_runtime_forbid(&mci
->dev
);
618 err
= device_add(&dimm
->dev
);
620 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm
->dev
));
626 * Memory controller device
629 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
631 static ssize_t
mci_reset_counters_store(struct device
*dev
,
632 struct device_attribute
*mattr
,
633 const char *data
, size_t count
)
635 struct mem_ctl_info
*mci
= to_mci(dev
);
636 int cnt
, row
, chan
, i
;
639 mci
->ue_noinfo_count
= 0;
640 mci
->ce_noinfo_count
= 0;
642 for (row
= 0; row
< mci
->nr_csrows
; row
++) {
643 struct csrow_info
*ri
= mci
->csrows
[row
];
648 for (chan
= 0; chan
< ri
->nr_channels
; chan
++)
649 ri
->channels
[chan
]->ce_count
= 0;
653 for (i
= 0; i
< mci
->n_layers
; i
++) {
654 cnt
*= mci
->layers
[i
].size
;
655 memset(mci
->ce_per_layer
[i
], 0, cnt
* sizeof(u32
));
656 memset(mci
->ue_per_layer
[i
], 0, cnt
* sizeof(u32
));
659 mci
->start_time
= jiffies
;
663 /* Memory scrubbing interface:
665 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
666 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
667 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
669 * Negative value still means that an error has occurred while setting
672 static ssize_t
mci_sdram_scrub_rate_store(struct device
*dev
,
673 struct device_attribute
*mattr
,
674 const char *data
, size_t count
)
676 struct mem_ctl_info
*mci
= to_mci(dev
);
677 unsigned long bandwidth
= 0;
680 if (!mci
->set_sdram_scrub_rate
)
683 if (strict_strtoul(data
, 10, &bandwidth
) < 0)
686 new_bw
= mci
->set_sdram_scrub_rate(mci
, bandwidth
);
688 edac_printk(KERN_WARNING
, EDAC_MC
,
689 "Error setting scrub rate to: %lu\n", bandwidth
);
697 * ->get_sdram_scrub_rate() return value semantics same as above.
699 static ssize_t
mci_sdram_scrub_rate_show(struct device
*dev
,
700 struct device_attribute
*mattr
,
703 struct mem_ctl_info
*mci
= to_mci(dev
);
706 if (!mci
->get_sdram_scrub_rate
)
709 bandwidth
= mci
->get_sdram_scrub_rate(mci
);
711 edac_printk(KERN_DEBUG
, EDAC_MC
, "Error reading scrub rate\n");
715 return sprintf(data
, "%d\n", bandwidth
);
718 /* default attribute files for the MCI object */
719 static ssize_t
mci_ue_count_show(struct device
*dev
,
720 struct device_attribute
*mattr
,
723 struct mem_ctl_info
*mci
= to_mci(dev
);
725 return sprintf(data
, "%d\n", mci
->ue_mc
);
728 static ssize_t
mci_ce_count_show(struct device
*dev
,
729 struct device_attribute
*mattr
,
732 struct mem_ctl_info
*mci
= to_mci(dev
);
734 return sprintf(data
, "%d\n", mci
->ce_mc
);
737 static ssize_t
mci_ce_noinfo_show(struct device
*dev
,
738 struct device_attribute
*mattr
,
741 struct mem_ctl_info
*mci
= to_mci(dev
);
743 return sprintf(data
, "%d\n", mci
->ce_noinfo_count
);
746 static ssize_t
mci_ue_noinfo_show(struct device
*dev
,
747 struct device_attribute
*mattr
,
750 struct mem_ctl_info
*mci
= to_mci(dev
);
752 return sprintf(data
, "%d\n", mci
->ue_noinfo_count
);
755 static ssize_t
mci_seconds_show(struct device
*dev
,
756 struct device_attribute
*mattr
,
759 struct mem_ctl_info
*mci
= to_mci(dev
);
761 return sprintf(data
, "%ld\n", (jiffies
- mci
->start_time
) / HZ
);
764 static ssize_t
mci_ctl_name_show(struct device
*dev
,
765 struct device_attribute
*mattr
,
768 struct mem_ctl_info
*mci
= to_mci(dev
);
770 return sprintf(data
, "%s\n", mci
->ctl_name
);
773 static ssize_t
mci_size_mb_show(struct device
*dev
,
774 struct device_attribute
*mattr
,
777 struct mem_ctl_info
*mci
= to_mci(dev
);
778 int total_pages
= 0, csrow_idx
, j
;
780 for (csrow_idx
= 0; csrow_idx
< mci
->nr_csrows
; csrow_idx
++) {
781 struct csrow_info
*csrow
= mci
->csrows
[csrow_idx
];
783 if (csrow
->mci
->csbased
) {
784 total_pages
+= csrow
->nr_pages
;
786 for (j
= 0; j
< csrow
->nr_channels
; j
++) {
787 struct dimm_info
*dimm
= csrow
->channels
[j
]->dimm
;
789 total_pages
+= dimm
->nr_pages
;
794 return sprintf(data
, "%u\n", PAGES_TO_MiB(total_pages
));
797 static ssize_t
mci_max_location_show(struct device
*dev
,
798 struct device_attribute
*mattr
,
801 struct mem_ctl_info
*mci
= to_mci(dev
);
805 for (i
= 0; i
< mci
->n_layers
; i
++) {
806 p
+= sprintf(p
, "%s %d ",
807 edac_layer_name
[mci
->layers
[i
].type
],
808 mci
->layers
[i
].size
- 1);
814 #ifdef CONFIG_EDAC_DEBUG
815 static ssize_t
edac_fake_inject_write(struct file
*file
,
816 const char __user
*data
,
817 size_t count
, loff_t
*ppos
)
819 struct device
*dev
= file
->private_data
;
820 struct mem_ctl_info
*mci
= to_mci(dev
);
821 static enum hw_event_mc_err_type type
;
822 u16 errcount
= mci
->fake_inject_count
;
827 type
= mci
->fake_inject_ue
? HW_EVENT_ERR_UNCORRECTED
828 : HW_EVENT_ERR_CORRECTED
;
831 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
833 (type
== HW_EVENT_ERR_UNCORRECTED
) ? "UE" : "CE",
834 errcount
> 1 ? "s" : "",
835 mci
->fake_inject_layer
[0],
836 mci
->fake_inject_layer
[1],
837 mci
->fake_inject_layer
[2]
839 edac_mc_handle_error(type
, mci
, errcount
, 0, 0, 0,
840 mci
->fake_inject_layer
[0],
841 mci
->fake_inject_layer
[1],
842 mci
->fake_inject_layer
[2],
843 "FAKE ERROR", "for EDAC testing only");
848 static const struct file_operations debug_fake_inject_fops
= {
850 .write
= edac_fake_inject_write
,
851 .llseek
= generic_file_llseek
,
855 /* default Control file */
856 DEVICE_ATTR(reset_counters
, S_IWUSR
, NULL
, mci_reset_counters_store
);
858 /* default Attribute files */
859 DEVICE_ATTR(mc_name
, S_IRUGO
, mci_ctl_name_show
, NULL
);
860 DEVICE_ATTR(size_mb
, S_IRUGO
, mci_size_mb_show
, NULL
);
861 DEVICE_ATTR(seconds_since_reset
, S_IRUGO
, mci_seconds_show
, NULL
);
862 DEVICE_ATTR(ue_noinfo_count
, S_IRUGO
, mci_ue_noinfo_show
, NULL
);
863 DEVICE_ATTR(ce_noinfo_count
, S_IRUGO
, mci_ce_noinfo_show
, NULL
);
864 DEVICE_ATTR(ue_count
, S_IRUGO
, mci_ue_count_show
, NULL
);
865 DEVICE_ATTR(ce_count
, S_IRUGO
, mci_ce_count_show
, NULL
);
866 DEVICE_ATTR(max_location
, S_IRUGO
, mci_max_location_show
, NULL
);
868 /* memory scrubber attribute file */
869 DEVICE_ATTR(sdram_scrub_rate
, S_IRUGO
| S_IWUSR
, mci_sdram_scrub_rate_show
,
870 mci_sdram_scrub_rate_store
);
872 static struct attribute
*mci_attrs
[] = {
873 &dev_attr_reset_counters
.attr
,
874 &dev_attr_mc_name
.attr
,
875 &dev_attr_size_mb
.attr
,
876 &dev_attr_seconds_since_reset
.attr
,
877 &dev_attr_ue_noinfo_count
.attr
,
878 &dev_attr_ce_noinfo_count
.attr
,
879 &dev_attr_ue_count
.attr
,
880 &dev_attr_ce_count
.attr
,
881 &dev_attr_sdram_scrub_rate
.attr
,
882 &dev_attr_max_location
.attr
,
886 static struct attribute_group mci_attr_grp
= {
890 static const struct attribute_group
*mci_attr_groups
[] = {
895 static void mci_attr_release(struct device
*dev
)
897 struct mem_ctl_info
*mci
= container_of(dev
, struct mem_ctl_info
, dev
);
899 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev
));
903 static struct device_type mci_attr_type
= {
904 .groups
= mci_attr_groups
,
905 .release
= mci_attr_release
,
908 #ifdef CONFIG_EDAC_DEBUG
909 static struct dentry
*edac_debugfs
;
911 int __init
edac_debugfs_init(void)
913 edac_debugfs
= debugfs_create_dir("edac", NULL
);
914 if (IS_ERR(edac_debugfs
)) {
921 void __exit
edac_debugfs_exit(void)
923 debugfs_remove(edac_debugfs
);
926 int edac_create_debug_nodes(struct mem_ctl_info
*mci
)
928 struct dentry
*d
, *parent
;
935 d
= debugfs_create_dir(mci
->dev
.kobj
.name
, edac_debugfs
);
940 for (i
= 0; i
< mci
->n_layers
; i
++) {
941 sprintf(name
, "fake_inject_%s",
942 edac_layer_name
[mci
->layers
[i
].type
]);
943 d
= debugfs_create_u8(name
, S_IRUGO
| S_IWUSR
, parent
,
944 &mci
->fake_inject_layer
[i
]);
949 d
= debugfs_create_bool("fake_inject_ue", S_IRUGO
| S_IWUSR
, parent
,
950 &mci
->fake_inject_ue
);
954 d
= debugfs_create_u16("fake_inject_count", S_IRUGO
| S_IWUSR
, parent
,
955 &mci
->fake_inject_count
);
959 d
= debugfs_create_file("fake_inject", S_IWUSR
, parent
,
961 &debug_fake_inject_fops
);
965 mci
->debugfs
= parent
;
968 debugfs_remove(mci
->debugfs
);
974 * Create a new Memory Controller kobject instance,
975 * mc<id> under the 'mc' directory
981 int edac_create_sysfs_mci_device(struct mem_ctl_info
*mci
)
986 * The memory controller needs its own bus, in order to avoid
987 * namespace conflicts at /sys/bus/edac.
989 mci
->bus
.name
= kasprintf(GFP_KERNEL
, "mc%d", mci
->mc_idx
);
992 edac_dbg(0, "creating bus %s\n", mci
->bus
.name
);
993 err
= bus_register(&mci
->bus
);
997 /* get the /sys/devices/system/edac subsys reference */
998 mci
->dev
.type
= &mci_attr_type
;
999 device_initialize(&mci
->dev
);
1001 mci
->dev
.parent
= mci_pdev
;
1002 mci
->dev
.bus
= &mci
->bus
;
1003 dev_set_name(&mci
->dev
, "mc%d", mci
->mc_idx
);
1004 dev_set_drvdata(&mci
->dev
, mci
);
1005 pm_runtime_forbid(&mci
->dev
);
1007 edac_dbg(0, "creating device %s\n", dev_name(&mci
->dev
));
1008 err
= device_add(&mci
->dev
);
1010 bus_unregister(&mci
->bus
);
1011 kfree(mci
->bus
.name
);
1016 * Create the dimm/rank devices
1018 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1019 struct dimm_info
*dimm
= mci
->dimms
[i
];
1020 /* Only expose populated DIMMs */
1021 if (dimm
->nr_pages
== 0)
1023 #ifdef CONFIG_EDAC_DEBUG
1024 edac_dbg(1, "creating dimm%d, located at ", i
);
1025 if (edac_debug_level
>= 1) {
1027 for (lay
= 0; lay
< mci
->n_layers
; lay
++)
1028 printk(KERN_CONT
"%s %d ",
1029 edac_layer_name
[mci
->layers
[lay
].type
],
1030 dimm
->location
[lay
]);
1031 printk(KERN_CONT
"\n");
1034 err
= edac_create_dimm_object(mci
, dimm
, i
);
1036 edac_dbg(1, "failure: create dimm %d obj\n", i
);
1041 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1042 err
= edac_create_csrow_objects(mci
);
1047 #ifdef CONFIG_EDAC_DEBUG
1048 edac_create_debug_nodes(mci
);
1053 for (i
--; i
>= 0; i
--) {
1054 struct dimm_info
*dimm
= mci
->dimms
[i
];
1055 if (dimm
->nr_pages
== 0)
1057 device_unregister(&dimm
->dev
);
1059 device_unregister(&mci
->dev
);
1060 bus_unregister(&mci
->bus
);
1061 kfree(mci
->bus
.name
);
1066 * remove a Memory Controller instance
1068 void edac_remove_sysfs_mci_device(struct mem_ctl_info
*mci
)
1074 #ifdef CONFIG_EDAC_DEBUG
1075 debugfs_remove(mci
->debugfs
);
1077 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1078 edac_delete_csrow_objects(mci
);
1081 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1082 struct dimm_info
*dimm
= mci
->dimms
[i
];
1083 if (dimm
->nr_pages
== 0)
1085 edac_dbg(0, "removing device %s\n", dev_name(&dimm
->dev
));
1086 device_unregister(&dimm
->dev
);
1090 void edac_unregister_sysfs(struct mem_ctl_info
*mci
)
1092 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci
->dev
));
1093 device_unregister(&mci
->dev
);
1094 bus_unregister(&mci
->bus
);
1095 kfree(mci
->bus
.name
);
1098 static void mc_attr_release(struct device
*dev
)
1101 * There's no container structure here, as this is just the mci
1102 * parent device, used to create the /sys/devices/mc sysfs node.
1103 * So, there are no attributes on it.
1105 edac_dbg(1, "Releasing device %s\n", dev_name(dev
));
1109 static struct device_type mc_attr_type
= {
1110 .release
= mc_attr_release
,
1113 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1115 int __init
edac_mc_sysfs_init(void)
1117 struct bus_type
*edac_subsys
;
1120 /* get the /sys/devices/system/edac subsys reference */
1121 edac_subsys
= edac_get_sysfs_subsys();
1122 if (edac_subsys
== NULL
) {
1123 edac_dbg(1, "no edac_subsys\n");
1128 mci_pdev
= kzalloc(sizeof(*mci_pdev
), GFP_KERNEL
);
1134 mci_pdev
->bus
= edac_subsys
;
1135 mci_pdev
->type
= &mc_attr_type
;
1136 device_initialize(mci_pdev
);
1137 dev_set_name(mci_pdev
, "mc");
1139 err
= device_add(mci_pdev
);
1143 edac_dbg(0, "device %s created\n", dev_name(mci_pdev
));
1150 edac_put_sysfs_subsys();
1155 void __exit
edac_mc_sysfs_exit(void)
1157 device_unregister(mci_pdev
);
1158 edac_put_sysfs_subsys();