drivers/net/sfc/spi.h

   1 /****************************************************************************
   2  * Driver for Solarflare Solarstorm network controllers and boards
   3  * Copyright 2005 Fen Systems Ltd.
   4  * Copyright 2006 Solarflare Communications Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation, incorporated herein by reference.
   9  */
  10
  11 #ifndef EFX_SPI_H
  12 #define EFX_SPI_H
  13
  14 #include "net_driver.h"
  15
  16 /**************************************************************************
  17  *
  18  * Basic SPI command set and bit definitions
  19  *
  20  *************************************************************************/
  21
  22 /*
  23  * Commands common to all known devices.
  24  *
  25  */
  26
  27 /* Write status register */
  28 #define SPI_WRSR 0x01
  29
  30 /* Write data to memory array */
  31 #define SPI_WRITE 0x02
  32
  33 /* Read data from memory array */
  34 #define SPI_READ 0x03
  35
  36 /* Reset write enable latch */
  37 #define SPI_WRDI 0x04
  38
  39 /* Read status register */
  40 #define SPI_RDSR 0x05
  41
  42 /* Set write enable latch */
  43 #define SPI_WREN 0x06
  44
  45 /* SST: Enable write to status register */
  46 #define SPI_SST_EWSR 0x50
  47
  48 /*
  49  * Status register bits.  Not all bits are supported on all devices.
  50  *
  51  */
  52
  53 /* Write-protect pin enabled */
  54 #define SPI_STATUS_WPEN 0x80
  55
  56 /* Block protection bit 2 */
  57 #define SPI_STATUS_BP2 0x10
  58
  59 /* Block protection bit 1 */
  60 #define SPI_STATUS_BP1 0x08
  61
  62 /* Block protection bit 0 */
  63 #define SPI_STATUS_BP0 0x04
  64
  65 /* State of the write enable latch */
  66 #define SPI_STATUS_WEN 0x02
  67
  68 /* Device busy flag */
  69 #define SPI_STATUS_NRDY 0x01
  70
  71 #endif /* EFX_SPI_H */