1 #ifndef __SPARC64_MMU_CONTEXT_H
2 #define __SPARC64_MMU_CONTEXT_H
4 /* Derived heavily from Linus's Alpha/AXP ASN code... */
8 #include <linux/spinlock.h>
9 #include <linux/mm_types.h>
10 #include <linux/smp.h>
12 #include <asm/spitfire.h>
13 #include <asm-generic/mm_hooks.h>
14 #include <asm/percpu.h>
16 static inline void enter_lazy_tlb(struct mm_struct
*mm
, struct task_struct
*tsk
)
20 extern spinlock_t ctx_alloc_lock
;
21 extern unsigned long tlb_context_cache
;
22 extern unsigned long mmu_context_bmap
[];
24 DECLARE_PER_CPU(struct mm_struct
*, per_cpu_secondary_mm
);
25 void get_new_mmu_context(struct mm_struct
*mm
);
26 int init_new_context(struct task_struct
*tsk
, struct mm_struct
*mm
);
27 void destroy_context(struct mm_struct
*mm
);
29 void __tsb_context_switch(unsigned long pgd_pa
,
30 struct tsb_config
*tsb_base
,
31 struct tsb_config
*tsb_huge
,
32 unsigned long tsb_descr_pa
,
33 unsigned long secondary_ctx
);
35 static inline void tsb_context_switch_ctx(struct mm_struct
*mm
,
38 __tsb_context_switch(__pa(mm
->pgd
),
39 &mm
->context
.tsb_block
[MM_TSB_BASE
],
40 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
41 (mm
->context
.tsb_block
[MM_TSB_HUGE
].tsb
?
42 &mm
->context
.tsb_block
[MM_TSB_HUGE
] :
47 , __pa(&mm
->context
.tsb_descr
[MM_TSB_BASE
]),
51 #define tsb_context_switch(X) tsb_context_switch_ctx(X, 0)
53 void tsb_grow(struct mm_struct
*mm
,
54 unsigned long tsb_index
,
55 unsigned long mm_rss
);
57 void smp_tsb_sync(struct mm_struct
*mm
);
59 #define smp_tsb_sync(__mm) do { } while (0)
62 /* Set MMU context in the actual hardware. */
63 #define load_secondary_context(__mm) \
64 __asm__ __volatile__( \
65 "\n661: stxa %0, [%1] %2\n" \
66 " .section .sun4v_1insn_patch, \"ax\"\n" \
68 " stxa %0, [%1] %3\n" \
72 : "r" (CTX_HWBITS((__mm)->context)), \
73 "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU))
75 void __flush_tlb_mm(unsigned long, unsigned long);
77 /* Switch the current MM context. */
78 static inline void switch_mm(struct mm_struct
*old_mm
, struct mm_struct
*mm
, struct task_struct
*tsk
)
80 unsigned long ctx_valid
, flags
;
81 int cpu
= smp_processor_id();
83 per_cpu(per_cpu_secondary_mm
, cpu
) = mm
;
84 if (unlikely(mm
== &init_mm
))
87 spin_lock_irqsave(&mm
->context
.lock
, flags
);
88 ctx_valid
= CTX_VALID(mm
->context
);
90 get_new_mmu_context(mm
);
92 /* We have to be extremely careful here or else we will miss
93 * a TSB grow if we switch back and forth between a kernel
94 * thread and an address space which has it's TSB size increased
95 * on another processor.
97 * It is possible to play some games in order to optimize the
98 * switch, but the safest thing to do is to unconditionally
99 * perform the secondary context load and the TSB context switch.
101 * For reference the bad case is, for address space "A":
104 * run address space A
105 * set cpu0's bits in cpu_vm_mask
106 * switch to kernel thread, borrow
107 * address space A via entry_lazy_tlb
108 * run address space A
109 * set cpu1's bit in cpu_vm_mask
110 * flush_tlb_pending()
111 * reset cpu_vm_mask to just cpu1
113 * run address space A
114 * context was valid, so skip
117 * At that point cpu0 continues to use a stale TSB, the one from
118 * before the TSB grow performed on cpu1. cpu1 did not cross-call
119 * cpu0 to update it's TSB because at that point the cpu_vm_mask
120 * only had cpu1 set in it.
122 tsb_context_switch_ctx(mm
, CTX_HWBITS(mm
->context
));
124 /* Any time a processor runs a context on an address space
125 * for the first time, we must flush that context out of the
128 if (!ctx_valid
|| !cpumask_test_cpu(cpu
, mm_cpumask(mm
))) {
129 cpumask_set_cpu(cpu
, mm_cpumask(mm
));
130 __flush_tlb_mm(CTX_HWBITS(mm
->context
),
133 spin_unlock_irqrestore(&mm
->context
.lock
, flags
);
136 #define deactivate_mm(tsk,mm) do { } while (0)
137 #define activate_mm(active_mm, mm) switch_mm(active_mm, mm, NULL)
138 #endif /* !(__ASSEMBLY__) */
140 #endif /* !(__SPARC64_MMU_CONTEXT_H) */