1 /* linux/arch/arm/mach-exynos4/mach-origen.c
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/serial_core.h>
12 #include <linux/leds.h>
13 #include <linux/gpio.h>
14 #include <linux/mmc/host.h>
15 #include <linux/platform_device.h>
17 #include <linux/input.h>
18 #include <linux/pwm.h>
19 #include <linux/pwm_backlight.h>
20 #include <linux/gpio_keys.h>
21 #include <linux/i2c.h>
22 #include <linux/regulator/machine.h>
23 #include <linux/mfd/max8997.h>
24 #include <linux/lcd.h>
25 #include <linux/rfkill-gpio.h>
26 #include <linux/platform_data/i2c-s3c2410.h>
27 #include <linux/platform_data/s3c-hsotg.h>
28 #include <linux/platform_data/usb-ehci-s5p.h>
29 #include <linux/platform_data/usb-exynos.h>
31 #include <asm/mach/arch.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/mach-types.h>
35 #include <video/platform_lcd.h>
36 #include <video/samsung_fimd.h>
38 #include <plat/regs-serial.h>
40 #include <plat/devs.h>
41 #include <plat/sdhci.h>
42 #include <plat/clock.h>
43 #include <plat/gpio-cfg.h>
44 #include <plat/backlight.h>
47 #include <plat/hdmi.h>
51 #include <drm/exynos_drm.h>
54 /* Following are default values for UCON, ULCON and UFCON UART registers */
55 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
56 S3C2410_UCON_RXILEVEL | \
57 S3C2410_UCON_TXIRQMODE | \
58 S3C2410_UCON_RXIRQMODE | \
59 S3C2410_UCON_RXFIFO_TOI | \
60 S3C2443_UCON_RXERR_IRQEN)
62 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
64 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
65 S5PV210_UFCON_TXTRIG4 | \
66 S5PV210_UFCON_RXTRIG4)
68 static struct s3c2410_uartcfg origen_uartcfgs
[] __initdata
= {
72 .ucon
= ORIGEN_UCON_DEFAULT
,
73 .ulcon
= ORIGEN_ULCON_DEFAULT
,
74 .ufcon
= ORIGEN_UFCON_DEFAULT
,
79 .ucon
= ORIGEN_UCON_DEFAULT
,
80 .ulcon
= ORIGEN_ULCON_DEFAULT
,
81 .ufcon
= ORIGEN_UFCON_DEFAULT
,
86 .ucon
= ORIGEN_UCON_DEFAULT
,
87 .ulcon
= ORIGEN_ULCON_DEFAULT
,
88 .ufcon
= ORIGEN_UFCON_DEFAULT
,
93 .ucon
= ORIGEN_UCON_DEFAULT
,
94 .ulcon
= ORIGEN_ULCON_DEFAULT
,
95 .ufcon
= ORIGEN_UFCON_DEFAULT
,
99 static struct regulator_consumer_supply __initdata ldo3_consumer
[] = {
100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
103 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */
105 static struct regulator_consumer_supply __initdata ldo6_consumer
[] = {
106 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
108 static struct regulator_consumer_supply __initdata ldo7_consumer
[] = {
109 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
111 static struct regulator_consumer_supply __initdata ldo8_consumer
[] = {
112 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
113 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
114 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */
116 static struct regulator_consumer_supply __initdata ldo9_consumer
[] = {
117 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
119 static struct regulator_consumer_supply __initdata ldo11_consumer
[] = {
120 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
122 static struct regulator_consumer_supply __initdata ldo14_consumer
[] = {
123 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
125 static struct regulator_consumer_supply __initdata ldo17_consumer
[] = {
126 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
128 static struct regulator_consumer_supply __initdata buck1_consumer
[] = {
129 REGULATOR_SUPPLY("vdd_arm", NULL
), /* CPUFREQ */
131 static struct regulator_consumer_supply __initdata buck2_consumer
[] = {
132 REGULATOR_SUPPLY("vdd_int", NULL
), /* CPUFREQ */
134 static struct regulator_consumer_supply __initdata buck3_consumer
[] = {
135 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
137 static struct regulator_consumer_supply __initdata buck7_consumer
[] = {
138 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
141 static struct regulator_init_data __initdata max8997_ldo1_data
= {
143 .name
= "VDD_ABB_3.3V",
153 static struct regulator_init_data __initdata max8997_ldo2_data
= {
155 .name
= "VDD_ALIVE_1.1V",
166 static struct regulator_init_data __initdata max8997_ldo3_data
= {
168 .name
= "VMIPI_1.1V",
172 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
177 .num_consumer_supplies
= ARRAY_SIZE(ldo3_consumer
),
178 .consumer_supplies
= ldo3_consumer
,
181 static struct regulator_init_data __initdata max8997_ldo4_data
= {
183 .name
= "VDD_RTC_1.8V",
194 static struct regulator_init_data __initdata max8997_ldo6_data
= {
196 .name
= "VMIPI_1.8V",
200 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
205 .num_consumer_supplies
= ARRAY_SIZE(ldo6_consumer
),
206 .consumer_supplies
= ldo6_consumer
,
209 static struct regulator_init_data __initdata max8997_ldo7_data
= {
211 .name
= "VDD_AUD_1.8V",
215 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
220 .num_consumer_supplies
= ARRAY_SIZE(ldo7_consumer
),
221 .consumer_supplies
= ldo7_consumer
,
224 static struct regulator_init_data __initdata max8997_ldo8_data
= {
230 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
235 .num_consumer_supplies
= ARRAY_SIZE(ldo8_consumer
),
236 .consumer_supplies
= ldo8_consumer
,
239 static struct regulator_init_data __initdata max8997_ldo9_data
= {
241 .name
= "DVDD_SWB_2.8V",
246 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
251 .num_consumer_supplies
= ARRAY_SIZE(ldo9_consumer
),
252 .consumer_supplies
= ldo9_consumer
,
255 static struct regulator_init_data __initdata max8997_ldo10_data
= {
257 .name
= "VDD_PLL_1.1V",
268 static struct regulator_init_data __initdata max8997_ldo11_data
= {
270 .name
= "VDD_AUD_3V",
274 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
279 .num_consumer_supplies
= ARRAY_SIZE(ldo11_consumer
),
280 .consumer_supplies
= ldo11_consumer
,
283 static struct regulator_init_data __initdata max8997_ldo14_data
= {
285 .name
= "AVDD18_SWB_1.8V",
290 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
295 .num_consumer_supplies
= ARRAY_SIZE(ldo14_consumer
),
296 .consumer_supplies
= ldo14_consumer
,
299 static struct regulator_init_data __initdata max8997_ldo17_data
= {
301 .name
= "VDD_SWB_3.3V",
306 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
311 .num_consumer_supplies
= ARRAY_SIZE(ldo17_consumer
),
312 .consumer_supplies
= ldo17_consumer
,
315 static struct regulator_init_data __initdata max8997_ldo21_data
= {
317 .name
= "VDD_MIF_1.2V",
328 static struct regulator_init_data __initdata max8997_buck1_data
= {
330 .name
= "VDD_ARM_1.2V",
335 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
340 .num_consumer_supplies
= ARRAY_SIZE(buck1_consumer
),
341 .consumer_supplies
= buck1_consumer
,
344 static struct regulator_init_data __initdata max8997_buck2_data
= {
346 .name
= "VDD_INT_1.1V",
351 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
356 .num_consumer_supplies
= ARRAY_SIZE(buck2_consumer
),
357 .consumer_supplies
= buck2_consumer
,
360 static struct regulator_init_data __initdata max8997_buck3_data
= {
362 .name
= "VDD_G3D_1.1V",
365 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
366 REGULATOR_CHANGE_STATUS
,
371 .num_consumer_supplies
= ARRAY_SIZE(buck3_consumer
),
372 .consumer_supplies
= buck3_consumer
,
375 static struct regulator_init_data __initdata max8997_buck5_data
= {
377 .name
= "VDDQ_M1M2_1.2V",
388 static struct regulator_init_data __initdata max8997_buck7_data
= {
390 .name
= "VDD_LCD_3.3V",
395 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
400 .num_consumer_supplies
= ARRAY_SIZE(buck7_consumer
),
401 .consumer_supplies
= buck7_consumer
,
404 static struct max8997_regulator_data __initdata origen_max8997_regulators
[] = {
405 { MAX8997_LDO1
, &max8997_ldo1_data
},
406 { MAX8997_LDO2
, &max8997_ldo2_data
},
407 { MAX8997_LDO3
, &max8997_ldo3_data
},
408 { MAX8997_LDO4
, &max8997_ldo4_data
},
409 { MAX8997_LDO6
, &max8997_ldo6_data
},
410 { MAX8997_LDO7
, &max8997_ldo7_data
},
411 { MAX8997_LDO8
, &max8997_ldo8_data
},
412 { MAX8997_LDO9
, &max8997_ldo9_data
},
413 { MAX8997_LDO10
, &max8997_ldo10_data
},
414 { MAX8997_LDO11
, &max8997_ldo11_data
},
415 { MAX8997_LDO14
, &max8997_ldo14_data
},
416 { MAX8997_LDO17
, &max8997_ldo17_data
},
417 { MAX8997_LDO21
, &max8997_ldo21_data
},
418 { MAX8997_BUCK1
, &max8997_buck1_data
},
419 { MAX8997_BUCK2
, &max8997_buck2_data
},
420 { MAX8997_BUCK3
, &max8997_buck3_data
},
421 { MAX8997_BUCK5
, &max8997_buck5_data
},
422 { MAX8997_BUCK7
, &max8997_buck7_data
},
425 static struct max8997_platform_data __initdata origen_max8997_pdata
= {
426 .num_regulators
= ARRAY_SIZE(origen_max8997_regulators
),
427 .regulators
= origen_max8997_regulators
,
430 .buck1_gpiodvs
= false,
431 .buck2_gpiodvs
= false,
432 .buck5_gpiodvs
= false,
434 .ignore_gpiodvs_side_effect
= true,
435 .buck125_default_idx
= 0x0,
437 .buck125_gpios
[0] = EXYNOS4_GPX0(0),
438 .buck125_gpios
[1] = EXYNOS4_GPX0(1),
439 .buck125_gpios
[2] = EXYNOS4_GPX0(2),
441 .buck1_voltage
[0] = 1350000,
442 .buck1_voltage
[1] = 1300000,
443 .buck1_voltage
[2] = 1250000,
444 .buck1_voltage
[3] = 1200000,
445 .buck1_voltage
[4] = 1150000,
446 .buck1_voltage
[5] = 1100000,
447 .buck1_voltage
[6] = 1000000,
448 .buck1_voltage
[7] = 950000,
450 .buck2_voltage
[0] = 1100000,
451 .buck2_voltage
[1] = 1100000,
452 .buck2_voltage
[2] = 1100000,
453 .buck2_voltage
[3] = 1100000,
454 .buck2_voltage
[4] = 1000000,
455 .buck2_voltage
[5] = 1000000,
456 .buck2_voltage
[6] = 1000000,
457 .buck2_voltage
[7] = 1000000,
459 .buck5_voltage
[0] = 1200000,
460 .buck5_voltage
[1] = 1200000,
461 .buck5_voltage
[2] = 1200000,
462 .buck5_voltage
[3] = 1200000,
463 .buck5_voltage
[4] = 1200000,
464 .buck5_voltage
[5] = 1200000,
465 .buck5_voltage
[6] = 1200000,
466 .buck5_voltage
[7] = 1200000,
470 static struct i2c_board_info i2c0_devs
[] __initdata
= {
472 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
473 .platform_data
= &origen_max8997_pdata
,
478 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata
= {
479 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
482 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata
= {
483 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
487 static struct s5p_ehci_platdata origen_ehci_pdata
;
489 static void __init
origen_ehci_init(void)
491 struct s5p_ehci_platdata
*pdata
= &origen_ehci_pdata
;
493 s5p_ehci_set_platdata(pdata
);
497 static struct exynos4_ohci_platdata origen_ohci_pdata
;
499 static void __init
origen_ohci_init(void)
501 struct exynos4_ohci_platdata
*pdata
= &origen_ohci_pdata
;
503 exynos4_ohci_set_platdata(pdata
);
507 static struct s3c_hsotg_plat origen_hsotg_pdata
;
509 static struct gpio_led origen_gpio_leds
[] = {
511 .name
= "origen::status1",
512 .default_trigger
= "heartbeat",
513 .gpio
= EXYNOS4_GPX1(3),
517 .name
= "origen::status2",
518 .default_trigger
= "mmc0",
519 .gpio
= EXYNOS4_GPX1(4),
524 static struct gpio_led_platform_data origen_gpio_led_info
= {
525 .leds
= origen_gpio_leds
,
526 .num_leds
= ARRAY_SIZE(origen_gpio_leds
),
529 static struct platform_device origen_leds_gpio
= {
533 .platform_data
= &origen_gpio_led_info
,
537 static struct gpio_keys_button origen_gpio_keys_table
[] = {
540 .gpio
= EXYNOS4_GPX1(5),
541 .desc
= "gpio-keys: KEY_MENU",
545 .debounce_interval
= 1,
548 .gpio
= EXYNOS4_GPX1(6),
549 .desc
= "gpio-keys: KEY_HOME",
553 .debounce_interval
= 1,
556 .gpio
= EXYNOS4_GPX1(7),
557 .desc
= "gpio-keys: KEY_BACK",
561 .debounce_interval
= 1,
564 .gpio
= EXYNOS4_GPX2(0),
565 .desc
= "gpio-keys: KEY_UP",
569 .debounce_interval
= 1,
572 .gpio
= EXYNOS4_GPX2(1),
573 .desc
= "gpio-keys: KEY_DOWN",
577 .debounce_interval
= 1,
581 static struct gpio_keys_platform_data origen_gpio_keys_data
= {
582 .buttons
= origen_gpio_keys_table
,
583 .nbuttons
= ARRAY_SIZE(origen_gpio_keys_table
),
586 static struct platform_device origen_device_gpiokeys
= {
589 .platform_data
= &origen_gpio_keys_data
,
593 static void lcd_hv070wsa_set_power(struct plat_lcd_data
*pd
, unsigned int power
)
598 ret
= gpio_request_one(EXYNOS4_GPE3(4),
599 GPIOF_OUT_INIT_HIGH
, "GPE3_4");
601 ret
= gpio_request_one(EXYNOS4_GPE3(4),
602 GPIOF_OUT_INIT_LOW
, "GPE3_4");
604 gpio_free(EXYNOS4_GPE3(4));
607 pr_err("failed to request gpio for LCD power: %d\n", ret
);
610 static struct plat_lcd_data origen_lcd_hv070wsa_data
= {
611 .set_power
= lcd_hv070wsa_set_power
,
614 static struct platform_device origen_lcd_hv070wsa
= {
615 .name
= "platform-lcd",
616 .dev
.parent
= &s5p_device_fimd0
.dev
,
617 .dev
.platform_data
= &origen_lcd_hv070wsa_data
,
620 static struct pwm_lookup origen_pwm_lookup
[] = {
621 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL
),
624 #ifdef CONFIG_DRM_EXYNOS_FIMD
625 static struct exynos_drm_fimd_pdata drm_fimd_pdata
= {
638 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
639 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
|
645 static struct s3c_fb_pd_win origen_fb_win0
= {
651 .virtual_y
= 2 * 600,
654 static struct fb_videomode origen_lcd_timing
= {
665 static struct s3c_fb_platdata origen_lcd_pdata __initdata
= {
666 .win
[0] = &origen_fb_win0
,
667 .vtiming
= &origen_lcd_timing
,
668 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
669 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
|
671 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
675 /* Bluetooth rfkill gpio platform data */
676 static struct rfkill_gpio_platform_data origen_bt_pdata
= {
677 .reset_gpio
= EXYNOS4_GPX2(2),
679 .type
= RFKILL_TYPE_BLUETOOTH
,
683 /* Bluetooth Platform device */
684 static struct platform_device origen_device_bluetooth
= {
685 .name
= "rfkill_gpio",
688 .platform_data
= &origen_bt_pdata
,
692 static struct platform_device
*origen_devices
[] __initdata
= {
697 &s3c_device_usb_hsotg
,
708 &s5p_device_i2c_hdmiphy
,
714 &exynos4_device_ohci
,
715 &origen_device_gpiokeys
,
716 &origen_lcd_hv070wsa
,
718 &origen_device_bluetooth
,
721 /* LCD Backlight data */
722 static struct samsung_bl_gpio_info origen_bl_gpio_info
= {
723 .no
= EXYNOS4_GPD0(0),
724 .func
= S3C_GPIO_SFN(2),
727 static struct platform_pwm_backlight_data origen_bl_data
= {
729 .pwm_period_ns
= 1000,
732 static void __init
origen_bt_setup(void)
734 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
735 /* 4 UART Pins configuration */
736 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
737 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
738 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT
);
739 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE
);
742 /* I2C module and id for HDMIPHY */
743 static struct i2c_board_info hdmiphy_info
= {
744 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
747 static void s5p_tv_setup(void)
749 /* Direct HPD to HDMI chip */
750 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
751 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
752 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
755 static void __init
origen_map_io(void)
757 exynos_init_io(NULL
, 0);
758 s3c24xx_init_clocks(clk_xusbxti
.rate
);
759 s3c24xx_init_uarts(origen_uartcfgs
, ARRAY_SIZE(origen_uartcfgs
));
762 static void __init
origen_power_init(void)
764 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
765 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
766 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE
);
769 static void __init
origen_reserve(void)
771 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
774 static void __init
origen_machine_init(void)
778 s3c_i2c0_set_platdata(NULL
);
779 i2c_register_board_info(0, i2c0_devs
, ARRAY_SIZE(i2c0_devs
));
782 * Since sdhci instance 2 can contain a bootable media,
783 * sdhci instance 0 is registered after instance 2.
785 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata
);
786 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata
);
790 s3c_hsotg_set_platdata(&origen_hsotg_pdata
);
793 s5p_i2c_hdmiphy_set_platdata(NULL
);
794 s5p_hdmi_set_platdata(&hdmiphy_info
, NULL
, 0);
796 #ifdef CONFIG_DRM_EXYNOS_FIMD
797 s5p_device_fimd0
.dev
.platform_data
= &drm_fimd_pdata
;
798 exynos4_fimd0_gpio_setup_24bpp();
800 s5p_fimd0_set_platdata(&origen_lcd_pdata
);
803 platform_add_devices(origen_devices
, ARRAY_SIZE(origen_devices
));
805 pwm_add_table(origen_pwm_lookup
, ARRAY_SIZE(origen_pwm_lookup
));
806 samsung_bl_set(&origen_bl_gpio_info
, &origen_bl_data
);
811 MACHINE_START(ORIGEN
, "ORIGEN")
812 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
813 .atag_offset
= 0x100,
814 .smp
= smp_ops(exynos_smp_ops
),
815 .init_irq
= exynos4_init_irq
,
816 .map_io
= origen_map_io
,
817 .handle_irq
= gic_handle_irq
,
818 .init_machine
= origen_machine_init
,
819 .init_late
= exynos_init_late
,
820 .timer
= &exynos4_timer
,
821 .reserve
= &origen_reserve
,
822 .restart
= exynos4_restart
,