2 * Based on documentation provided by Dave Jones. Thanks!
4 * Licensed under the terms of the GNU GPL License version 2.
6 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/cpufreq.h>
13 #include <linux/ioport.h>
14 #include <linux/slab.h>
15 #include <linux/timex.h>
17 #include <linux/delay.h>
22 #define EPS_BRAND_C7M 0
23 #define EPS_BRAND_C7 1
24 #define EPS_BRAND_EDEN 2
25 #define EPS_BRAND_C3 3
26 #define EPS_BRAND_C7D 4
30 struct cpufreq_frequency_table freq_table
[];
33 static struct eps_cpu_data
*eps_cpu
[NR_CPUS
];
36 static unsigned int eps_get(unsigned int cpu
)
38 struct eps_cpu_data
*centaur
;
43 centaur
= eps_cpu
[cpu
];
47 /* Return current frequency */
48 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
49 return centaur
->fsb
* ((lo
>> 8) & 0xff);
52 static int eps_set_state(struct eps_cpu_data
*centaur
,
56 struct cpufreq_freqs freqs
;
61 freqs
.old
= eps_get(cpu
);
62 freqs
.new = centaur
->fsb
* ((dest_state
>> 8) & 0xff);
64 cpufreq_notify_transition(&freqs
, CPUFREQ_PRECHANGE
);
66 /* Wait while CPU is busy */
67 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
69 while (lo
& ((1 << 16) | (1 << 17))) {
71 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
73 if (unlikely(i
> 64)) {
78 /* Set new multiplier and voltage */
79 wrmsr(MSR_IA32_PERF_CTL
, dest_state
& 0xffff, 0);
80 /* Wait until transition end */
84 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
86 if (unlikely(i
> 64)) {
90 } while (lo
& ((1 << 16) | (1 << 17)));
92 /* Return current frequency */
94 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
95 freqs
.new = centaur
->fsb
* ((lo
>> 8) & 0xff);
99 u8 current_multiplier
, current_voltage
;
101 /* Print voltage and multiplier */
102 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
103 current_voltage
= lo
& 0xff;
104 printk(KERN_INFO
"eps: Current voltage = %dmV\n",
105 current_voltage
* 16 + 700);
106 current_multiplier
= (lo
>> 8) & 0xff;
107 printk(KERN_INFO
"eps: Current multiplier = %d\n",
111 cpufreq_notify_transition(&freqs
, CPUFREQ_POSTCHANGE
);
115 static int eps_target(struct cpufreq_policy
*policy
,
116 unsigned int target_freq
,
117 unsigned int relation
)
119 struct eps_cpu_data
*centaur
;
120 unsigned int newstate
= 0;
121 unsigned int cpu
= policy
->cpu
;
122 unsigned int dest_state
;
125 if (unlikely(eps_cpu
[cpu
] == NULL
))
127 centaur
= eps_cpu
[cpu
];
129 if (unlikely(cpufreq_frequency_table_target(policy
,
130 &eps_cpu
[cpu
]->freq_table
[0],
137 /* Make frequency transition */
138 dest_state
= centaur
->freq_table
[newstate
].index
& 0xffff;
139 ret
= eps_set_state(centaur
, cpu
, dest_state
);
141 printk(KERN_ERR
"eps: Timeout!\n");
145 static int eps_verify(struct cpufreq_policy
*policy
)
147 return cpufreq_frequency_table_verify(policy
,
148 &eps_cpu
[policy
->cpu
]->freq_table
[0]);
151 static int eps_cpu_init(struct cpufreq_policy
*policy
)
156 u8 current_multiplier
, current_voltage
;
157 u8 max_multiplier
, max_voltage
;
158 u8 min_multiplier
, min_voltage
;
161 struct eps_cpu_data
*centaur
;
162 struct cpuinfo_x86
*c
= &cpu_data(0);
163 struct cpufreq_frequency_table
*f_table
;
164 int k
, step
, voltage
;
168 if (policy
->cpu
!= 0)
172 printk(KERN_INFO
"eps: Detected VIA ");
174 switch (c
->x86_model
) {
176 rdmsr(0x1153, lo
, hi
);
177 brand
= (((lo
>> 2) ^ lo
) >> 18) & 3;
178 printk(KERN_CONT
"Model A ");
181 rdmsr(0x1154, lo
, hi
);
182 brand
= (((lo
>> 4) ^ (lo
>> 2))) & 0x000000ff;
183 printk(KERN_CONT
"Model D ");
189 printk(KERN_CONT
"C7-M\n");
192 printk(KERN_CONT
"C7\n");
195 printk(KERN_CONT
"Eden\n");
198 printk(KERN_CONT
"C7-D\n");
201 printk(KERN_CONT
"C3\n");
205 /* Enable Enhanced PowerSaver */
206 rdmsrl(MSR_IA32_MISC_ENABLE
, val
);
207 if (!(val
& MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP
)) {
208 val
|= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP
;
209 wrmsrl(MSR_IA32_MISC_ENABLE
, val
);
210 /* Can be locked at 0 */
211 rdmsrl(MSR_IA32_MISC_ENABLE
, val
);
212 if (!(val
& MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP
)) {
213 printk(KERN_INFO
"eps: Can't enable Enhanced PowerSaver\n");
218 /* Print voltage and multiplier */
219 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
220 current_voltage
= lo
& 0xff;
221 printk(KERN_INFO
"eps: Current voltage = %dmV\n",
222 current_voltage
* 16 + 700);
223 current_multiplier
= (lo
>> 8) & 0xff;
224 printk(KERN_INFO
"eps: Current multiplier = %d\n", current_multiplier
);
227 max_voltage
= hi
& 0xff;
228 printk(KERN_INFO
"eps: Highest voltage = %dmV\n",
229 max_voltage
* 16 + 700);
230 max_multiplier
= (hi
>> 8) & 0xff;
231 printk(KERN_INFO
"eps: Highest multiplier = %d\n", max_multiplier
);
232 min_voltage
= (hi
>> 16) & 0xff;
233 printk(KERN_INFO
"eps: Lowest voltage = %dmV\n",
234 min_voltage
* 16 + 700);
235 min_multiplier
= (hi
>> 24) & 0xff;
236 printk(KERN_INFO
"eps: Lowest multiplier = %d\n", min_multiplier
);
239 if (current_multiplier
== 0 || max_multiplier
== 0
240 || min_multiplier
== 0)
242 if (current_multiplier
> max_multiplier
243 || max_multiplier
<= min_multiplier
)
245 if (current_voltage
> 0x1f || max_voltage
> 0x1f)
247 if (max_voltage
< min_voltage
)
251 fsb
= cpu_khz
/ current_multiplier
;
252 /* Calc number of p-states supported */
253 if (brand
== EPS_BRAND_C7M
)
254 states
= max_multiplier
- min_multiplier
+ 1;
258 /* Allocate private data and frequency table for current cpu */
259 centaur
= kzalloc(sizeof(struct eps_cpu_data
)
260 + (states
+ 1) * sizeof(struct cpufreq_frequency_table
),
264 eps_cpu
[0] = centaur
;
266 /* Copy basic values */
269 /* Fill frequency and MSR value table */
270 f_table
= ¢aur
->freq_table
[0];
271 if (brand
!= EPS_BRAND_C7M
) {
272 f_table
[0].frequency
= fsb
* min_multiplier
;
273 f_table
[0].index
= (min_multiplier
<< 8) | min_voltage
;
274 f_table
[1].frequency
= fsb
* max_multiplier
;
275 f_table
[1].index
= (max_multiplier
<< 8) | max_voltage
;
276 f_table
[2].frequency
= CPUFREQ_TABLE_END
;
279 step
= ((max_voltage
- min_voltage
) * 256)
280 / (max_multiplier
- min_multiplier
);
281 for (i
= min_multiplier
; i
<= max_multiplier
; i
++) {
282 voltage
= (k
* step
) / 256 + min_voltage
;
283 f_table
[k
].frequency
= fsb
* i
;
284 f_table
[k
].index
= (i
<< 8) | voltage
;
287 f_table
[k
].frequency
= CPUFREQ_TABLE_END
;
290 policy
->cpuinfo
.transition_latency
= 140000; /* 844mV -> 700mV in ns */
291 policy
->cur
= fsb
* current_multiplier
;
293 ret
= cpufreq_frequency_table_cpuinfo(policy
, ¢aur
->freq_table
[0]);
299 cpufreq_frequency_table_get_attr(¢aur
->freq_table
[0], policy
->cpu
);
303 static int eps_cpu_exit(struct cpufreq_policy
*policy
)
305 unsigned int cpu
= policy
->cpu
;
306 struct eps_cpu_data
*centaur
;
309 if (eps_cpu
[cpu
] == NULL
)
311 centaur
= eps_cpu
[cpu
];
313 /* Get max frequency */
314 rdmsr(MSR_IA32_PERF_STATUS
, lo
, hi
);
315 /* Set max frequency */
316 eps_set_state(centaur
, cpu
, hi
& 0xffff);
318 cpufreq_frequency_table_put_attr(policy
->cpu
);
324 static struct freq_attr
*eps_attr
[] = {
325 &cpufreq_freq_attr_scaling_available_freqs
,
329 static struct cpufreq_driver eps_driver
= {
330 .verify
= eps_verify
,
331 .target
= eps_target
,
332 .init
= eps_cpu_init
,
333 .exit
= eps_cpu_exit
,
335 .name
= "e_powersaver",
336 .owner
= THIS_MODULE
,
340 static int __init
eps_init(void)
342 struct cpuinfo_x86
*c
= &cpu_data(0);
344 /* This driver will work only on Centaur C7 processors with
345 * Enhanced SpeedStep/PowerSaver registers */
346 if (c
->x86_vendor
!= X86_VENDOR_CENTAUR
347 || c
->x86
!= 6 || c
->x86_model
< 10)
349 if (!cpu_has(c
, X86_FEATURE_EST
))
352 if (cpufreq_register_driver(&eps_driver
))
357 static void __exit
eps_exit(void)
359 cpufreq_unregister_driver(&eps_driver
);
362 MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
363 MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
364 MODULE_LICENSE("GPL");
366 module_init(eps_init
);
367 module_exit(eps_exit
);