2 * Interrupt controller support for MAX8998
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
18 #include <linux/mfd/max8998-private.h>
20 struct max8998_irq_data
{
25 static struct max8998_irq_data max8998_irqs
[] = {
26 [MAX8998_IRQ_DCINF
] = {
28 .mask
= MAX8998_IRQ_DCINF_MASK
,
30 [MAX8998_IRQ_DCINR
] = {
32 .mask
= MAX8998_IRQ_DCINR_MASK
,
34 [MAX8998_IRQ_JIGF
] = {
36 .mask
= MAX8998_IRQ_JIGF_MASK
,
38 [MAX8998_IRQ_JIGR
] = {
40 .mask
= MAX8998_IRQ_JIGR_MASK
,
42 [MAX8998_IRQ_PWRONF
] = {
44 .mask
= MAX8998_IRQ_PWRONF_MASK
,
46 [MAX8998_IRQ_PWRONR
] = {
48 .mask
= MAX8998_IRQ_PWRONR_MASK
,
50 [MAX8998_IRQ_WTSREVNT
] = {
52 .mask
= MAX8998_IRQ_WTSREVNT_MASK
,
54 [MAX8998_IRQ_SMPLEVNT
] = {
56 .mask
= MAX8998_IRQ_SMPLEVNT_MASK
,
58 [MAX8998_IRQ_ALARM1
] = {
60 .mask
= MAX8998_IRQ_ALARM1_MASK
,
62 [MAX8998_IRQ_ALARM0
] = {
64 .mask
= MAX8998_IRQ_ALARM0_MASK
,
66 [MAX8998_IRQ_ONKEY1S
] = {
68 .mask
= MAX8998_IRQ_ONKEY1S_MASK
,
70 [MAX8998_IRQ_TOPOFFR
] = {
72 .mask
= MAX8998_IRQ_TOPOFFR_MASK
,
74 [MAX8998_IRQ_DCINOVPR
] = {
76 .mask
= MAX8998_IRQ_DCINOVPR_MASK
,
78 [MAX8998_IRQ_CHGRSTF
] = {
80 .mask
= MAX8998_IRQ_CHGRSTF_MASK
,
82 [MAX8998_IRQ_DONER
] = {
84 .mask
= MAX8998_IRQ_DONER_MASK
,
86 [MAX8998_IRQ_CHGFAULT
] = {
88 .mask
= MAX8998_IRQ_CHGFAULT_MASK
,
90 [MAX8998_IRQ_LOBAT1
] = {
92 .mask
= MAX8998_IRQ_LOBAT1_MASK
,
94 [MAX8998_IRQ_LOBAT2
] = {
96 .mask
= MAX8998_IRQ_LOBAT2_MASK
,
100 static inline struct max8998_irq_data
*
101 irq_to_max8998_irq(struct max8998_dev
*max8998
, int irq
)
103 struct irq_data
*data
= irq_get_irq_data(irq
);
104 return &max8998_irqs
[data
->hwirq
];
107 static void max8998_irq_lock(struct irq_data
*data
)
109 struct max8998_dev
*max8998
= irq_data_get_irq_chip_data(data
);
111 mutex_lock(&max8998
->irqlock
);
114 static void max8998_irq_sync_unlock(struct irq_data
*data
)
116 struct max8998_dev
*max8998
= irq_data_get_irq_chip_data(data
);
119 for (i
= 0; i
< ARRAY_SIZE(max8998
->irq_masks_cur
); i
++) {
121 * If there's been a change in the mask write it back
124 if (max8998
->irq_masks_cur
[i
] != max8998
->irq_masks_cache
[i
]) {
125 max8998
->irq_masks_cache
[i
] = max8998
->irq_masks_cur
[i
];
126 max8998_write_reg(max8998
->i2c
, MAX8998_REG_IRQM1
+ i
,
127 max8998
->irq_masks_cur
[i
]);
131 mutex_unlock(&max8998
->irqlock
);
134 static void max8998_irq_unmask(struct irq_data
*data
)
136 struct max8998_dev
*max8998
= irq_data_get_irq_chip_data(data
);
137 struct max8998_irq_data
*irq_data
= irq_to_max8998_irq(max8998
,
140 max8998
->irq_masks_cur
[irq_data
->reg
- 1] &= ~irq_data
->mask
;
143 static void max8998_irq_mask(struct irq_data
*data
)
145 struct max8998_dev
*max8998
= irq_data_get_irq_chip_data(data
);
146 struct max8998_irq_data
*irq_data
= irq_to_max8998_irq(max8998
,
149 max8998
->irq_masks_cur
[irq_data
->reg
- 1] |= irq_data
->mask
;
152 static struct irq_chip max8998_irq_chip
= {
154 .irq_bus_lock
= max8998_irq_lock
,
155 .irq_bus_sync_unlock
= max8998_irq_sync_unlock
,
156 .irq_mask
= max8998_irq_mask
,
157 .irq_unmask
= max8998_irq_unmask
,
160 static irqreturn_t
max8998_irq_thread(int irq
, void *data
)
162 struct max8998_dev
*max8998
= data
;
163 u8 irq_reg
[MAX8998_NUM_IRQ_REGS
];
167 ret
= max8998_bulk_read(max8998
->i2c
, MAX8998_REG_IRQ1
,
168 MAX8998_NUM_IRQ_REGS
, irq_reg
);
170 dev_err(max8998
->dev
, "Failed to read interrupt register: %d\n",
176 for (i
= 0; i
< MAX8998_NUM_IRQ_REGS
; i
++)
177 irq_reg
[i
] &= ~max8998
->irq_masks_cur
[i
];
180 for (i
= 0; i
< MAX8998_IRQ_NR
; i
++) {
181 if (irq_reg
[max8998_irqs
[i
].reg
- 1] & max8998_irqs
[i
].mask
) {
182 irq
= irq_find_mapping(max8998
->irq_domain
, i
);
184 disable_irq_nosync(max8998
->irq
);
187 handle_nested_irq(irq
);
194 int max8998_irq_resume(struct max8998_dev
*max8998
)
196 if (max8998
->irq
&& max8998
->irq_domain
)
197 max8998_irq_thread(max8998
->irq
, max8998
);
201 static int max8998_irq_domain_map(struct irq_domain
*d
, unsigned int irq
,
204 struct max8997_dev
*max8998
= d
->host_data
;
206 irq_set_chip_data(irq
, max8998
);
207 irq_set_chip_and_handler(irq
, &max8998_irq_chip
, handle_edge_irq
);
208 irq_set_nested_thread(irq
, 1);
210 set_irq_flags(irq
, IRQF_VALID
);
212 irq_set_noprobe(irq
);
217 static struct irq_domain_ops max8998_irq_domain_ops
= {
218 .map
= max8998_irq_domain_map
,
221 int max8998_irq_init(struct max8998_dev
*max8998
)
225 struct irq_domain
*domain
;
228 dev_warn(max8998
->dev
,
229 "No interrupt specified, no interrupts\n");
233 mutex_init(&max8998
->irqlock
);
235 /* Mask the individual interrupt sources */
236 for (i
= 0; i
< MAX8998_NUM_IRQ_REGS
; i
++) {
237 max8998
->irq_masks_cur
[i
] = 0xff;
238 max8998
->irq_masks_cache
[i
] = 0xff;
239 max8998_write_reg(max8998
->i2c
, MAX8998_REG_IRQM1
+ i
, 0xff);
242 max8998_write_reg(max8998
->i2c
, MAX8998_REG_STATUSM1
, 0xff);
243 max8998_write_reg(max8998
->i2c
, MAX8998_REG_STATUSM2
, 0xff);
245 domain
= irq_domain_add_simple(NULL
, MAX8998_IRQ_NR
,
246 max8998
->irq_base
, &max8998_irq_domain_ops
, max8998
);
248 dev_err(max8998
->dev
, "could not create irq domain\n");
251 max8998
->irq_domain
= domain
;
253 ret
= request_threaded_irq(max8998
->irq
, NULL
, max8998_irq_thread
,
254 IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
,
255 "max8998-irq", max8998
);
257 dev_err(max8998
->dev
, "Failed to request IRQ %d: %d\n",
265 ret
= request_threaded_irq(max8998
->ono
, NULL
, max8998_irq_thread
,
266 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
|
267 IRQF_ONESHOT
, "max8998-ono", max8998
);
269 dev_err(max8998
->dev
, "Failed to request IRQ %d: %d\n",
275 void max8998_irq_exit(struct max8998_dev
*max8998
)
278 free_irq(max8998
->ono
, max8998
);
281 free_irq(max8998
->irq
, max8998
);