2 * comedi/drivers/dt9812.c
3 * COMEDI driver for DataTranslation DT9812 USB module
5 * Copyright (C) 2005 Anders Blomdell <anders.blomdell@control.lth.se>
7 * COMEDI - Linux Control and Measurement Device Interface
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
22 Description: Data Translation DT9812 USB module
23 Author: anders.blomdell@control.lth.se (Anders Blomdell)
24 Status: in development
25 Devices: [Data Translation] DT9812 (dt9812)
26 Updated: Sun Nov 20 20:18:34 EST 2005
28 This driver works, but bulk transfers not implemented. Might be a starting point
29 for someone else. I found out too late that USB has too high latencies (>1 ms)
35 * 1. All writes to command pipe has to be 32 bytes (ISP1181B SHRTP=0 ?)
36 * 2. The DDK source (as of sep 2005) is in error regarding the
37 * input MUX bits (example code says P4, but firmware schematics
41 #include <linux/kernel.h>
42 #include <linux/errno.h>
43 #include <linux/init.h>
44 #include <linux/slab.h>
45 #include <linux/module.h>
46 #include <linux/uaccess.h>
47 #include <linux/usb.h>
49 #include "../comedidev.h"
51 #define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
52 #define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
53 #define DT9812_MAX_READ_CMD_PIPE_SIZE 32
55 /* usb_bulk_msg() timout in milliseconds */
56 #define DT9812_USB_TIMEOUT 1000
59 * See Silican Laboratories C8051F020/1/2/3 manual
61 #define F020_SFR_P4 0x84
62 #define F020_SFR_P1 0x90
63 #define F020_SFR_P2 0xa0
64 #define F020_SFR_P3 0xb0
65 #define F020_SFR_AMX0CF 0xba
66 #define F020_SFR_AMX0SL 0xbb
67 #define F020_SFR_ADC0CF 0xbc
68 #define F020_SFR_ADC0L 0xbe
69 #define F020_SFR_ADC0H 0xbf
70 #define F020_SFR_DAC0L 0xd2
71 #define F020_SFR_DAC0H 0xd3
72 #define F020_SFR_DAC0CN 0xd4
73 #define F020_SFR_DAC1L 0xd5
74 #define F020_SFR_DAC1H 0xd6
75 #define F020_SFR_DAC1CN 0xd7
76 #define F020_SFR_ADC0CN 0xe8
78 #define F020_MASK_ADC0CF_AMP0GN0 0x01
79 #define F020_MASK_ADC0CF_AMP0GN1 0x02
80 #define F020_MASK_ADC0CF_AMP0GN2 0x04
82 #define F020_MASK_ADC0CN_AD0EN 0x80
83 #define F020_MASK_ADC0CN_AD0INT 0x20
84 #define F020_MASK_ADC0CN_AD0BUSY 0x10
86 #define F020_MASK_DACxCN_DACxEN 0x80
89 /* A/D D/A DI DO CT */
90 DT9812_DEVID_DT9812_10
, /* 8 2 8 8 1 +/- 10V */
91 DT9812_DEVID_DT9812_2PT5
, /* 8 2 8 8 1 0-2.44V */
93 DT9812_DEVID_DT9813
, /* 16 2 4 4 1 +/- 10V */
94 DT9812_DEVID_DT9814
/* 24 2 0 0 1 +/- 10V */
99 DT9812_GAIN_0PT25
= 1,
100 DT9812_GAIN_0PT5
= 2,
109 DT9812_LEAST_USB_FIRMWARE_CMD_CODE
= 0,
110 /* Write Flash memory */
111 DT9812_W_FLASH_DATA
= 0,
112 /* Read Flash memory misc config info */
113 DT9812_R_FLASH_DATA
= 1,
116 * Register read/write commands for processor
119 /* Read a single byte of USB memory */
120 DT9812_R_SINGLE_BYTE_REG
= 2,
121 /* Write a single byte of USB memory */
122 DT9812_W_SINGLE_BYTE_REG
= 3,
123 /* Multiple Reads of USB memory */
124 DT9812_R_MULTI_BYTE_REG
= 4,
125 /* Multiple Writes of USB memory */
126 DT9812_W_MULTI_BYTE_REG
= 5,
127 /* Read, (AND) with mask, OR value, then write (single) */
128 DT9812_RMW_SINGLE_BYTE_REG
= 6,
129 /* Read, (AND) with mask, OR value, then write (multiple) */
130 DT9812_RMW_MULTI_BYTE_REG
= 7,
133 * Register read/write commands for SMBus
136 /* Read a single byte of SMBus */
137 DT9812_R_SINGLE_BYTE_SMBUS
= 8,
138 /* Write a single byte of SMBus */
139 DT9812_W_SINGLE_BYTE_SMBUS
= 9,
140 /* Multiple Reads of SMBus */
141 DT9812_R_MULTI_BYTE_SMBUS
= 10,
142 /* Multiple Writes of SMBus */
143 DT9812_W_MULTI_BYTE_SMBUS
= 11,
146 * Register read/write commands for a device
149 /* Read a single byte of a device */
150 DT9812_R_SINGLE_BYTE_DEV
= 12,
151 /* Write a single byte of a device */
152 DT9812_W_SINGLE_BYTE_DEV
= 13,
153 /* Multiple Reads of a device */
154 DT9812_R_MULTI_BYTE_DEV
= 14,
155 /* Multiple Writes of a device */
156 DT9812_W_MULTI_BYTE_DEV
= 15,
158 /* Not sure if we'll need this */
159 DT9812_W_DAC_THRESHOLD
= 16,
161 /* Set interrupt on change mask */
162 DT9812_W_INT_ON_CHANGE_MASK
= 17,
164 /* Write (or Clear) the CGL for the ADC */
166 /* Multiple Reads of USB memory */
167 DT9812_R_MULTI_BYTE_USBMEM
= 19,
168 /* Multiple Writes to USB memory */
169 DT9812_W_MULTI_BYTE_USBMEM
= 20,
171 /* Issue a start command to a given subsystem */
172 DT9812_START_SUBSYSTEM
= 21,
173 /* Issue a stop command to a given subsystem */
174 DT9812_STOP_SUBSYSTEM
= 22,
176 /* calibrate the board using CAL_POT_CMD */
177 DT9812_CALIBRATE_POT
= 23,
178 /* set the DAC FIFO size */
179 DT9812_W_DAC_FIFO_SIZE
= 24,
180 /* Write or Clear the CGL for the DAC */
181 DT9812_W_CGL_DAC
= 25,
182 /* Read a single value from a subsystem */
183 DT9812_R_SINGLE_VALUE_CMD
= 26,
184 /* Write a single value to a subsystem */
185 DT9812_W_SINGLE_VALUE_CMD
= 27,
186 /* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
187 DT9812_MAX_USB_FIRMWARE_CMD_CODE
,
190 struct dt9812_flash_data
{
195 #define DT9812_MAX_NUM_MULTI_BYTE_RDS \
196 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
198 struct dt9812_read_multi
{
200 u8 address
[DT9812_MAX_NUM_MULTI_BYTE_RDS
];
203 struct dt9812_write_byte
{
208 #define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
209 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
210 sizeof(struct dt9812_write_byte))
212 struct dt9812_write_multi
{
214 struct dt9812_write_byte write
[DT9812_MAX_NUM_MULTI_BYTE_WRTS
];
217 struct dt9812_rmw_byte
{
223 #define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
224 ((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / \
225 sizeof(struct dt9812_rmw_byte))
227 struct dt9812_rmw_multi
{
229 struct dt9812_rmw_byte rmw
[DT9812_MAX_NUM_MULTI_BYTE_RMWS
];
232 struct dt9812_usb_cmd
{
235 struct dt9812_flash_data flash_data_info
;
236 struct dt9812_read_multi read_multi_info
;
237 struct dt9812_write_multi write_multi_info
;
238 struct dt9812_rmw_multi rmw_multi_info
;
242 struct dt9812_private
{
243 struct semaphore sem
;
252 static int dt9812_read_info(struct comedi_device
*dev
,
253 int offset
, void *buf
, size_t buf_size
)
255 struct usb_device
*usb
= comedi_to_usb_dev(dev
);
256 struct dt9812_private
*devpriv
= dev
->private;
257 struct dt9812_usb_cmd cmd
;
260 cmd
.cmd
= cpu_to_le32(DT9812_R_FLASH_DATA
);
261 cmd
.u
.flash_data_info
.address
=
262 cpu_to_le16(DT9812_DIAGS_BOARD_INFO_ADDR
+ offset
);
263 cmd
.u
.flash_data_info
.numbytes
= cpu_to_le16(buf_size
);
265 /* DT9812 only responds to 32 byte writes!! */
266 ret
= usb_bulk_msg(usb
, usb_sndbulkpipe(usb
, devpriv
->cmd_wr
.addr
),
267 &cmd
, 32, &count
, DT9812_USB_TIMEOUT
);
271 return usb_bulk_msg(usb
, usb_rcvbulkpipe(usb
, devpriv
->cmd_rd
.addr
),
272 buf
, buf_size
, &count
, DT9812_USB_TIMEOUT
);
275 static int dt9812_read_multiple_registers(struct comedi_device
*dev
,
276 int reg_count
, u8
*address
,
279 struct usb_device
*usb
= comedi_to_usb_dev(dev
);
280 struct dt9812_private
*devpriv
= dev
->private;
281 struct dt9812_usb_cmd cmd
;
284 cmd
.cmd
= cpu_to_le32(DT9812_R_MULTI_BYTE_REG
);
285 cmd
.u
.read_multi_info
.count
= reg_count
;
286 for (i
= 0; i
< reg_count
; i
++)
287 cmd
.u
.read_multi_info
.address
[i
] = address
[i
];
289 /* DT9812 only responds to 32 byte writes!! */
290 ret
= usb_bulk_msg(usb
, usb_sndbulkpipe(usb
, devpriv
->cmd_wr
.addr
),
291 &cmd
, 32, &count
, DT9812_USB_TIMEOUT
);
295 return usb_bulk_msg(usb
, usb_rcvbulkpipe(usb
, devpriv
->cmd_rd
.addr
),
296 value
, reg_count
, &count
, DT9812_USB_TIMEOUT
);
299 static int dt9812_write_multiple_registers(struct comedi_device
*dev
,
300 int reg_count
, u8
*address
,
303 struct usb_device
*usb
= comedi_to_usb_dev(dev
);
304 struct dt9812_private
*devpriv
= dev
->private;
305 struct dt9812_usb_cmd cmd
;
308 cmd
.cmd
= cpu_to_le32(DT9812_W_MULTI_BYTE_REG
);
309 cmd
.u
.read_multi_info
.count
= reg_count
;
310 for (i
= 0; i
< reg_count
; i
++) {
311 cmd
.u
.write_multi_info
.write
[i
].address
= address
[i
];
312 cmd
.u
.write_multi_info
.write
[i
].value
= value
[i
];
315 /* DT9812 only responds to 32 byte writes!! */
316 return usb_bulk_msg(usb
, usb_sndbulkpipe(usb
, devpriv
->cmd_wr
.addr
),
317 &cmd
, 32, &count
, DT9812_USB_TIMEOUT
);
320 static int dt9812_rmw_multiple_registers(struct comedi_device
*dev
,
322 struct dt9812_rmw_byte
*rmw
)
324 struct usb_device
*usb
= comedi_to_usb_dev(dev
);
325 struct dt9812_private
*devpriv
= dev
->private;
326 struct dt9812_usb_cmd cmd
;
329 cmd
.cmd
= cpu_to_le32(DT9812_RMW_MULTI_BYTE_REG
);
330 cmd
.u
.rmw_multi_info
.count
= reg_count
;
331 for (i
= 0; i
< reg_count
; i
++)
332 cmd
.u
.rmw_multi_info
.rmw
[i
] = rmw
[i
];
334 /* DT9812 only responds to 32 byte writes!! */
335 return usb_bulk_msg(usb
, usb_sndbulkpipe(usb
, devpriv
->cmd_wr
.addr
),
336 &cmd
, 32, &count
, DT9812_USB_TIMEOUT
);
339 static int dt9812_digital_in(struct comedi_device
*dev
, u8
*bits
)
341 struct dt9812_private
*devpriv
= dev
->private;
342 u8 reg
[2] = { F020_SFR_P3
, F020_SFR_P1
};
347 ret
= dt9812_read_multiple_registers(dev
, 2, reg
, value
);
350 * bits 0-6 in F020_SFR_P3 are bits 0-6 in the digital
351 * input port bit 3 in F020_SFR_P1 is bit 7 in the
354 *bits
= (value
[0] & 0x7f) | ((value
[1] & 0x08) << 4);
361 static int dt9812_digital_out(struct comedi_device
*dev
, u8 bits
)
363 struct dt9812_private
*devpriv
= dev
->private;
364 u8 reg
[1] = { F020_SFR_P2
};
365 u8 value
[1] = { bits
};
369 ret
= dt9812_write_multiple_registers(dev
, 1, reg
, value
);
375 static void dt9812_configure_mux(struct comedi_device
*dev
,
376 struct dt9812_rmw_byte
*rmw
, int channel
)
378 struct dt9812_private
*devpriv
= dev
->private;
380 if (devpriv
->device
== DT9812_DEVID_DT9812_10
) {
381 /* In the DT9812/10V MUX is selected by P1.5-7 */
382 rmw
->address
= F020_SFR_P1
;
383 rmw
->and_mask
= 0xe0;
384 rmw
->or_value
= channel
<< 5;
386 /* In the DT9812/2.5V, internal mux is selected by bits 0:2 */
387 rmw
->address
= F020_SFR_AMX0SL
;
388 rmw
->and_mask
= 0xff;
389 rmw
->or_value
= channel
& 0x07;
393 static void dt9812_configure_gain(struct comedi_device
*dev
,
394 struct dt9812_rmw_byte
*rmw
,
395 enum dt9812_gain gain
)
397 struct dt9812_private
*devpriv
= dev
->private;
399 /* In the DT9812/10V, there is an external gain of 0.5 */
400 if (devpriv
->device
== DT9812_DEVID_DT9812_10
)
403 rmw
->address
= F020_SFR_ADC0CF
;
404 rmw
->and_mask
= F020_MASK_ADC0CF_AMP0GN2
|
405 F020_MASK_ADC0CF_AMP0GN1
|
406 F020_MASK_ADC0CF_AMP0GN0
;
417 case DT9812_GAIN_0PT5
:
418 rmw
->or_value
= F020_MASK_ADC0CF_AMP0GN2
|
419 F020_MASK_ADC0CF_AMP0GN1
;
422 /* this should never happen, just use a gain of 1 */
424 rmw
->or_value
= 0x00;
427 rmw
->or_value
= F020_MASK_ADC0CF_AMP0GN0
;
430 rmw
->or_value
= F020_MASK_ADC0CF_AMP0GN1
;
433 rmw
->or_value
= F020_MASK_ADC0CF_AMP0GN1
|
434 F020_MASK_ADC0CF_AMP0GN0
;
437 rmw
->or_value
= F020_MASK_ADC0CF_AMP0GN2
;
442 static int dt9812_analog_in(struct comedi_device
*dev
,
443 int channel
, u16
*value
, enum dt9812_gain gain
)
445 struct dt9812_private
*devpriv
= dev
->private;
446 struct dt9812_rmw_byte rmw
[3];
457 /* 1 select the gain */
458 dt9812_configure_gain(dev
, &rmw
[0], gain
);
460 /* 2 set the MUX to select the channel */
461 dt9812_configure_mux(dev
, &rmw
[1], channel
);
463 /* 3 start conversion */
464 rmw
[2].address
= F020_SFR_ADC0CN
;
465 rmw
[2].and_mask
= 0xff;
466 rmw
[2].or_value
= F020_MASK_ADC0CN_AD0EN
| F020_MASK_ADC0CN_AD0BUSY
;
468 ret
= dt9812_rmw_multiple_registers(dev
, 3, rmw
);
472 /* read the status and ADC */
473 ret
= dt9812_read_multiple_registers(dev
, 3, reg
, val
);
478 * An ADC conversion takes 16 SAR clocks cycles, i.e. about 9us.
479 * Therefore, between the instant that AD0BUSY was set via
480 * dt9812_rmw_multiple_registers and the read of AD0BUSY via
481 * dt9812_read_multiple_registers, the conversion should be complete
482 * since these two operations require two USB transactions each taking
483 * at least a millisecond to complete. However, lets make sure that
484 * conversion is finished.
486 if ((val
[0] & (F020_MASK_ADC0CN_AD0INT
| F020_MASK_ADC0CN_AD0BUSY
)) ==
487 F020_MASK_ADC0CN_AD0INT
) {
488 switch (devpriv
->device
) {
489 case DT9812_DEVID_DT9812_10
:
491 * For DT9812-10V the personality module set the
492 * encoding to 2's complement. Hence, convert it before
495 *value
= ((val
[1] << 8) | val
[2]) + 0x800;
497 case DT9812_DEVID_DT9812_2PT5
:
498 *value
= (val
[1] << 8) | val
[2];
509 static int dt9812_analog_out(struct comedi_device
*dev
, int channel
, u16 value
)
511 struct dt9812_private
*devpriv
= dev
->private;
512 struct dt9812_rmw_byte rmw
[3];
519 /* 1. Set DAC mode */
520 rmw
[0].address
= F020_SFR_DAC0CN
;
521 rmw
[0].and_mask
= 0xff;
522 rmw
[0].or_value
= F020_MASK_DACxCN_DACxEN
;
524 /* 2 load low byte of DAC value first */
525 rmw
[1].address
= F020_SFR_DAC0L
;
526 rmw
[1].and_mask
= 0xff;
527 rmw
[1].or_value
= value
& 0xff;
529 /* 3 load high byte of DAC value next to latch the
531 rmw
[2].address
= F020_SFR_DAC0H
;
532 rmw
[2].and_mask
= 0xff;
533 rmw
[2].or_value
= (value
>> 8) & 0xf;
537 /* 1. Set DAC mode */
538 rmw
[0].address
= F020_SFR_DAC1CN
;
539 rmw
[0].and_mask
= 0xff;
540 rmw
[0].or_value
= F020_MASK_DACxCN_DACxEN
;
542 /* 2 load low byte of DAC value first */
543 rmw
[1].address
= F020_SFR_DAC1L
;
544 rmw
[1].and_mask
= 0xff;
545 rmw
[1].or_value
= value
& 0xff;
547 /* 3 load high byte of DAC value next to latch the
549 rmw
[2].address
= F020_SFR_DAC1H
;
550 rmw
[2].and_mask
= 0xff;
551 rmw
[2].or_value
= (value
>> 8) & 0xf;
554 ret
= dt9812_rmw_multiple_registers(dev
, 3, rmw
);
555 devpriv
->ao_shadow
[channel
] = value
;
562 static int dt9812_di_insn_bits(struct comedi_device
*dev
,
563 struct comedi_subdevice
*s
,
564 struct comedi_insn
*insn
,
570 ret
= dt9812_digital_in(dev
, &bits
);
579 static int dt9812_do_insn_bits(struct comedi_device
*dev
,
580 struct comedi_subdevice
*s
,
581 struct comedi_insn
*insn
,
584 unsigned int mask
= data
[0];
585 unsigned int bits
= data
[1];
589 s
->state
|= (bits
& mask
);
591 dt9812_digital_out(dev
, s
->state
);
599 static int dt9812_ai_insn_read(struct comedi_device
*dev
,
600 struct comedi_subdevice
*s
,
601 struct comedi_insn
*insn
,
604 unsigned int chan
= CR_CHAN(insn
->chanspec
);
609 for (i
= 0; i
< insn
->n
; i
++) {
610 ret
= dt9812_analog_in(dev
, chan
, &val
, DT9812_GAIN_1
);
619 static int dt9812_ao_insn_read(struct comedi_device
*dev
,
620 struct comedi_subdevice
*s
,
621 struct comedi_insn
*insn
,
624 struct dt9812_private
*devpriv
= dev
->private;
625 unsigned int chan
= CR_CHAN(insn
->chanspec
);
629 for (i
= 0; i
< insn
->n
; i
++)
630 data
[i
] = devpriv
->ao_shadow
[chan
];
636 static int dt9812_ao_insn_write(struct comedi_device
*dev
,
637 struct comedi_subdevice
*s
,
638 struct comedi_insn
*insn
,
641 unsigned int chan
= CR_CHAN(insn
->chanspec
);
645 for (i
= 0; i
< insn
->n
; i
++) {
646 ret
= dt9812_analog_out(dev
, chan
, data
[i
]);
654 static int dt9812_find_endpoints(struct comedi_device
*dev
)
656 struct usb_interface
*intf
= comedi_to_usb_interface(dev
);
657 struct usb_host_interface
*host
= intf
->cur_altsetting
;
658 struct dt9812_private
*devpriv
= dev
->private;
659 struct usb_endpoint_descriptor
*ep
;
662 if (host
->desc
.bNumEndpoints
!= 5) {
663 dev_err(dev
->class_dev
, "Wrong number of endpoints\n");
667 for (i
= 0; i
< host
->desc
.bNumEndpoints
; ++i
) {
669 ep
= &host
->endpoint
[i
].desc
;
672 /* unused message pipe */
677 devpriv
->cmd_wr
.addr
= ep
->bEndpointAddress
;
678 devpriv
->cmd_wr
.size
= le16_to_cpu(ep
->wMaxPacketSize
);
682 devpriv
->cmd_rd
.addr
= ep
->bEndpointAddress
;
683 devpriv
->cmd_rd
.size
= le16_to_cpu(ep
->wMaxPacketSize
);
686 /* unused write stream */
690 /* unused read stream */
694 if ((ep
->bEndpointAddress
& USB_DIR_IN
) != dir
) {
695 dev_err(dev
->class_dev
,
696 "Endpoint has wrong direction\n");
703 static int dt9812_reset_device(struct comedi_device
*dev
)
705 struct usb_device
*usb
= comedi_to_usb_dev(dev
);
706 struct dt9812_private
*devpriv
= dev
->private;
715 ret
= dt9812_read_info(dev
, 0, &tmp8
, sizeof(tmp8
));
718 * Seems like a configuration reset is necessary if driver is
719 * reloaded while device is attached
721 usb_reset_configuration(usb
);
722 for (i
= 0; i
< 10; i
++) {
723 ret
= dt9812_read_info(dev
, 1, &tmp8
, sizeof(tmp8
));
728 dev_err(dev
->class_dev
,
729 "unable to reset configuration\n");
734 ret
= dt9812_read_info(dev
, 1, &vendor
, sizeof(vendor
));
736 dev_err(dev
->class_dev
, "failed to read vendor id\n");
739 vendor
= le16_to_cpu(vendor
);
741 ret
= dt9812_read_info(dev
, 3, &product
, sizeof(product
));
743 dev_err(dev
->class_dev
, "failed to read product id\n");
746 product
= le16_to_cpu(product
);
748 ret
= dt9812_read_info(dev
, 5, &tmp16
, sizeof(tmp16
));
750 dev_err(dev
->class_dev
, "failed to read device id\n");
753 devpriv
->device
= le16_to_cpu(tmp16
);
755 ret
= dt9812_read_info(dev
, 7, &serial
, sizeof(serial
));
757 dev_err(dev
->class_dev
, "failed to read serial number\n");
760 serial
= le32_to_cpu(serial
);
762 /* let the user know what node this device is now attached to */
763 dev_info(dev
->class_dev
, "USB DT9812 (%4.4x.%4.4x.%4.4x) #0x%8.8x\n",
764 vendor
, product
, devpriv
->device
, serial
);
766 if (devpriv
->device
!= DT9812_DEVID_DT9812_10
&&
767 devpriv
->device
!= DT9812_DEVID_DT9812_2PT5
) {
768 dev_err(dev
->class_dev
, "Unsupported device!\n");
775 static int dt9812_auto_attach(struct comedi_device
*dev
,
776 unsigned long context
)
778 struct usb_interface
*intf
= comedi_to_usb_interface(dev
);
779 struct dt9812_private
*devpriv
;
780 struct comedi_subdevice
*s
;
784 devpriv
= kzalloc(sizeof(*devpriv
), GFP_KERNEL
);
787 dev
->private = devpriv
;
789 sema_init(&devpriv
->sem
, 1);
790 usb_set_intfdata(intf
, devpriv
);
792 ret
= dt9812_find_endpoints(dev
);
796 ret
= dt9812_reset_device(dev
);
800 is_unipolar
= (devpriv
->device
== DT9812_DEVID_DT9812_2PT5
);
802 ret
= comedi_alloc_subdevices(dev
, 4);
806 /* Digital Input subdevice */
807 s
= &dev
->subdevices
[0];
808 s
->type
= COMEDI_SUBD_DI
;
809 s
->subdev_flags
= SDF_READABLE
;
812 s
->range_table
= &range_digital
;
813 s
->insn_bits
= dt9812_di_insn_bits
;
815 /* Digital Output subdevice */
816 s
= &dev
->subdevices
[1];
817 s
->type
= COMEDI_SUBD_DO
;
818 s
->subdev_flags
= SDF_WRITEABLE
;
821 s
->range_table
= &range_digital
;
822 s
->insn_bits
= dt9812_do_insn_bits
;
824 /* Analog Input subdevice */
825 s
= &dev
->subdevices
[2];
826 s
->type
= COMEDI_SUBD_AI
;
827 s
->subdev_flags
= SDF_READABLE
| SDF_GROUND
;
830 s
->range_table
= is_unipolar
? &range_unipolar2_5
: &range_bipolar10
;
831 s
->insn_read
= dt9812_ai_insn_read
;
833 /* Analog Output subdevice */
834 s
= &dev
->subdevices
[3];
835 s
->type
= COMEDI_SUBD_AO
;
836 s
->subdev_flags
= SDF_WRITEABLE
;
839 s
->range_table
= is_unipolar
? &range_unipolar2_5
: &range_bipolar10
;
840 s
->insn_write
= dt9812_ao_insn_write
;
841 s
->insn_read
= dt9812_ao_insn_read
;
843 devpriv
->ao_shadow
[0] = is_unipolar
? 0x0000 : 0x0800;
844 devpriv
->ao_shadow
[1] = is_unipolar
? 0x0000 : 0x0800;
849 static void dt9812_detach(struct comedi_device
*dev
)
851 struct usb_interface
*intf
= comedi_to_usb_interface(dev
);
852 struct dt9812_private
*devpriv
= dev
->private;
859 usb_set_intfdata(intf
, NULL
);
864 static struct comedi_driver dt9812_driver
= {
865 .driver_name
= "dt9812",
866 .module
= THIS_MODULE
,
867 .auto_attach
= dt9812_auto_attach
,
868 .detach
= dt9812_detach
,
871 static int dt9812_usb_probe(struct usb_interface
*intf
,
872 const struct usb_device_id
*id
)
874 return comedi_usb_auto_config(intf
, &dt9812_driver
, id
->driver_info
);
877 static const struct usb_device_id dt9812_usb_table
[] = {
878 { USB_DEVICE(0x0867, 0x9812) },
881 MODULE_DEVICE_TABLE(usb
, dt9812_usb_table
);
883 static struct usb_driver dt9812_usb_driver
= {
885 .id_table
= dt9812_usb_table
,
886 .probe
= dt9812_usb_probe
,
887 .disconnect
= comedi_usb_auto_unconfig
,
889 module_comedi_usb_driver(dt9812_driver
, dt9812_usb_driver
);
891 MODULE_AUTHOR("Anders Blomdell <anders.blomdell@control.lth.se>");
892 MODULE_DESCRIPTION("Comedi DT9812 driver");
893 MODULE_LICENSE("GPL");