2 comedi/drivers/amplc_dio200_common.c
4 Common support code for "amplc_dio200" and "amplc_dio200_pci".
6 Copyright (C) 2005-2013 MEV Ltd. <http://www.mev.co.uk/>
8 COMEDI - Linux Control and Measurement Device Interface
9 Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
22 #include <linux/interrupt.h>
23 #include <linux/slab.h>
25 #include "../comedidev.h"
27 #include "amplc_dio200.h"
28 #include "comedi_fc.h"
31 /* 8255 control register bits */
32 #define CR_C_LO_IO 0x01
34 #define CR_B_MODE 0x04
35 #define CR_C_HI_IO 0x08
37 #define CR_A_MODE(a) ((a)<<5)
40 /* 200 series registers */
41 #define DIO200_IO_SIZE 0x20
42 #define DIO200_PCIE_IO_SIZE 0x4000
43 #define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
44 #define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
45 #define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
46 #define DIO200_XGAT_SCE 0x1b /* Group X gate selection register */
47 #define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
48 #define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
49 #define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
50 /* Extra registers for new PCIe boards */
51 #define DIO200_ENHANCE 0x20 /* 1 to enable enhanced features */
52 #define DIO200_VERSION 0x24 /* Hardware version register */
53 #define DIO200_TS_CONFIG 0x600 /* Timestamp timer config register */
54 #define DIO200_TS_COUNT 0x602 /* Timestamp timer count register */
57 * Functions for constructing value for DIO_200_?CLK_SCE and
58 * DIO_200_?GAT_SCE registers:
60 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
61 * 'chan' is the channel: 0, 1 or 2.
62 * 'source' is the signal source: 0 to 7, or 0 to 31 for "enhanced" boards.
64 static unsigned char clk_gat_sce(unsigned int which
, unsigned int chan
,
67 return (which
<< 5) | (chan
<< 3) |
68 ((source
& 030) << 3) | (source
& 007);
71 static unsigned char clk_sce(unsigned int which
, unsigned int chan
,
74 return clk_gat_sce(which
, chan
, source
);
77 static unsigned char gat_sce(unsigned int which
, unsigned int chan
,
80 return clk_gat_sce(which
, chan
, source
);
84 * Periods of the internal clock sources in nanoseconds.
86 static const unsigned int clock_period
[32] = {
87 [1] = 100, /* 10 MHz */
88 [2] = 1000, /* 1 MHz */
89 [3] = 10000, /* 100 kHz */
90 [4] = 100000, /* 10 kHz */
91 [5] = 1000000, /* 1 kHz */
92 [11] = 50, /* 20 MHz (enhanced boards) */
93 /* clock sources 12 and later reserved for enhanced boards */
97 * Timestamp timer configuration register (for new PCIe boards).
99 #define TS_CONFIG_RESET 0x100 /* Reset counter to zero. */
100 #define TS_CONFIG_CLK_SRC_MASK 0x0FF /* Clock source. */
101 #define TS_CONFIG_MAX_CLK_SRC 2 /* Maximum clock source value. */
104 * Periods of the timestamp timer clock sources in nanoseconds.
106 static const unsigned int ts_clock_period
[TS_CONFIG_MAX_CLK_SRC
+ 1] = {
107 1, /* 1 nanosecond (but with 20 ns granularity). */
108 1000, /* 1 microsecond. */
109 1000000, /* 1 millisecond. */
112 struct dio200_subdev_8254
{
113 unsigned int ofs
; /* Counter base offset */
114 unsigned int clk_sce_ofs
; /* CLK_SCE base address */
115 unsigned int gat_sce_ofs
; /* GAT_SCE base address */
116 int which
; /* Bit 5 of CLK_SCE or GAT_SCE */
117 unsigned int clock_src
[3]; /* Current clock sources */
118 unsigned int gate_src
[3]; /* Current gate sources */
122 struct dio200_subdev_8255
{
123 unsigned int ofs
; /* DIO base offset */
126 struct dio200_subdev_intr
{
129 unsigned int valid_isns
;
130 unsigned int enabled_isns
;
131 unsigned int stopcount
;
136 static inline const struct dio200_layout
*
137 dio200_board_layout(const struct dio200_board
*board
)
139 return &board
->layout
;
142 static inline const struct dio200_layout
*
143 dio200_dev_layout(struct comedi_device
*dev
)
145 return dio200_board_layout(comedi_board(dev
));
149 * Read 8-bit register.
151 static unsigned char dio200_read8(struct comedi_device
*dev
,
154 const struct dio200_board
*thisboard
= comedi_board(dev
);
155 struct dio200_private
*devpriv
= dev
->private;
157 offset
<<= thisboard
->mainshift
;
158 if (devpriv
->io
.regtype
== io_regtype
)
159 return inb(devpriv
->io
.u
.iobase
+ offset
);
161 return readb(devpriv
->io
.u
.membase
+ offset
);
165 * Write 8-bit register.
167 static void dio200_write8(struct comedi_device
*dev
, unsigned int offset
,
170 const struct dio200_board
*thisboard
= comedi_board(dev
);
171 struct dio200_private
*devpriv
= dev
->private;
173 offset
<<= thisboard
->mainshift
;
174 if (devpriv
->io
.regtype
== io_regtype
)
175 outb(val
, devpriv
->io
.u
.iobase
+ offset
);
177 writeb(val
, devpriv
->io
.u
.membase
+ offset
);
181 * Read 32-bit register.
183 static unsigned int dio200_read32(struct comedi_device
*dev
,
186 const struct dio200_board
*thisboard
= comedi_board(dev
);
187 struct dio200_private
*devpriv
= dev
->private;
189 offset
<<= thisboard
->mainshift
;
190 if (devpriv
->io
.regtype
== io_regtype
)
191 return inl(devpriv
->io
.u
.iobase
+ offset
);
193 return readl(devpriv
->io
.u
.membase
+ offset
);
197 * Write 32-bit register.
199 static void dio200_write32(struct comedi_device
*dev
, unsigned int offset
,
202 const struct dio200_board
*thisboard
= comedi_board(dev
);
203 struct dio200_private
*devpriv
= dev
->private;
205 offset
<<= thisboard
->mainshift
;
206 if (devpriv
->io
.regtype
== io_regtype
)
207 outl(val
, devpriv
->io
.u
.iobase
+ offset
);
209 writel(val
, devpriv
->io
.u
.membase
+ offset
);
213 * 'insn_bits' function for an 'INTERRUPT' subdevice.
216 dio200_subdev_intr_insn_bits(struct comedi_device
*dev
,
217 struct comedi_subdevice
*s
,
218 struct comedi_insn
*insn
, unsigned int *data
)
220 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
221 struct dio200_subdev_intr
*subpriv
= s
->private;
223 if (layout
->has_int_sce
) {
224 /* Just read the interrupt status register. */
225 data
[1] = dio200_read8(dev
, subpriv
->ofs
) & subpriv
->valid_isns
;
227 /* No interrupt status register. */
235 * Called to stop acquisition for an 'INTERRUPT' subdevice.
237 static void dio200_stop_intr(struct comedi_device
*dev
,
238 struct comedi_subdevice
*s
)
240 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
241 struct dio200_subdev_intr
*subpriv
= s
->private;
243 subpriv
->active
= false;
244 subpriv
->enabled_isns
= 0;
245 if (layout
->has_int_sce
)
246 dio200_write8(dev
, subpriv
->ofs
, 0);
250 * Called to start acquisition for an 'INTERRUPT' subdevice.
252 static int dio200_start_intr(struct comedi_device
*dev
,
253 struct comedi_subdevice
*s
)
257 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
258 struct dio200_subdev_intr
*subpriv
= s
->private;
259 struct comedi_cmd
*cmd
= &s
->async
->cmd
;
262 if (!subpriv
->continuous
&& subpriv
->stopcount
== 0) {
263 /* An empty acquisition! */
264 s
->async
->events
|= COMEDI_CB_EOA
;
265 subpriv
->active
= false;
268 /* Determine interrupt sources to enable. */
271 for (n
= 0; n
< cmd
->chanlist_len
; n
++)
272 isn_bits
|= (1U << CR_CHAN(cmd
->chanlist
[n
]));
274 isn_bits
&= subpriv
->valid_isns
;
275 /* Enable interrupt sources. */
276 subpriv
->enabled_isns
= isn_bits
;
277 if (layout
->has_int_sce
)
278 dio200_write8(dev
, subpriv
->ofs
, isn_bits
);
285 * Internal trigger function to start acquisition for an 'INTERRUPT' subdevice.
288 dio200_inttrig_start_intr(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
289 unsigned int trignum
)
291 struct dio200_subdev_intr
*subpriv
;
298 subpriv
= s
->private;
300 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
301 s
->async
->inttrig
= NULL
;
303 event
= dio200_start_intr(dev
, s
);
305 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
308 comedi_event(dev
, s
);
313 static void dio200_read_scan_intr(struct comedi_device
*dev
,
314 struct comedi_subdevice
*s
,
315 unsigned int triggered
)
317 struct dio200_subdev_intr
*subpriv
= s
->private;
319 unsigned int n
, ch
, len
;
322 len
= s
->async
->cmd
.chanlist_len
;
323 for (n
= 0; n
< len
; n
++) {
324 ch
= CR_CHAN(s
->async
->cmd
.chanlist
[n
]);
325 if (triggered
& (1U << ch
))
328 /* Write the scan to the buffer. */
329 if (comedi_buf_put(s
->async
, val
)) {
330 s
->async
->events
|= (COMEDI_CB_BLOCK
| COMEDI_CB_EOS
);
332 /* Error! Stop acquisition. */
333 dio200_stop_intr(dev
, s
);
334 s
->async
->events
|= COMEDI_CB_ERROR
| COMEDI_CB_OVERFLOW
;
335 comedi_error(dev
, "buffer overflow");
338 /* Check for end of acquisition. */
339 if (!subpriv
->continuous
) {
340 /* stop_src == TRIG_COUNT */
341 if (subpriv
->stopcount
> 0) {
342 subpriv
->stopcount
--;
343 if (subpriv
->stopcount
== 0) {
344 s
->async
->events
|= COMEDI_CB_EOA
;
345 dio200_stop_intr(dev
, s
);
352 * This is called from the interrupt service routine to handle a read
353 * scan on an 'INTERRUPT' subdevice.
355 static int dio200_handle_read_intr(struct comedi_device
*dev
,
356 struct comedi_subdevice
*s
)
358 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
359 struct dio200_subdev_intr
*subpriv
= s
->private;
362 unsigned cur_enabled
;
363 unsigned int oldevents
;
368 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
369 oldevents
= s
->async
->events
;
370 if (layout
->has_int_sce
) {
372 * Collect interrupt sources that have triggered and disable
373 * them temporarily. Loop around until no extra interrupt
374 * sources have triggered, at which point, the valid part of
375 * the interrupt status register will read zero, clearing the
376 * cause of the interrupt.
378 * Mask off interrupt sources already seen to avoid infinite
379 * loop in case of misconfiguration.
381 cur_enabled
= subpriv
->enabled_isns
;
382 while ((intstat
= (dio200_read8(dev
, subpriv
->ofs
) &
383 subpriv
->valid_isns
& ~triggered
)) != 0) {
384 triggered
|= intstat
;
385 cur_enabled
&= ~triggered
;
386 dio200_write8(dev
, subpriv
->ofs
, cur_enabled
);
390 * No interrupt status register. Assume the single interrupt
391 * source has triggered.
393 triggered
= subpriv
->enabled_isns
;
398 * Some interrupt sources have triggered and have been
399 * temporarily disabled to clear the cause of the interrupt.
401 * Reenable them NOW to minimize the time they are disabled.
403 cur_enabled
= subpriv
->enabled_isns
;
404 if (layout
->has_int_sce
)
405 dio200_write8(dev
, subpriv
->ofs
, cur_enabled
);
407 if (subpriv
->active
) {
409 * The command is still active.
411 * Ignore interrupt sources that the command isn't
412 * interested in (just in case there's a race
415 if (triggered
& subpriv
->enabled_isns
)
416 /* Collect scan data. */
417 dio200_read_scan_intr(dev
, s
, triggered
);
420 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
422 if (oldevents
!= s
->async
->events
)
423 comedi_event(dev
, s
);
425 return (triggered
!= 0);
429 * 'cancel' function for an 'INTERRUPT' subdevice.
431 static int dio200_subdev_intr_cancel(struct comedi_device
*dev
,
432 struct comedi_subdevice
*s
)
434 struct dio200_subdev_intr
*subpriv
= s
->private;
437 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
439 dio200_stop_intr(dev
, s
);
441 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
447 * 'do_cmdtest' function for an 'INTERRUPT' subdevice.
450 dio200_subdev_intr_cmdtest(struct comedi_device
*dev
,
451 struct comedi_subdevice
*s
, struct comedi_cmd
*cmd
)
455 /* Step 1 : check if triggers are trivially valid */
457 err
|= cfc_check_trigger_src(&cmd
->start_src
, TRIG_NOW
| TRIG_INT
);
458 err
|= cfc_check_trigger_src(&cmd
->scan_begin_src
, TRIG_EXT
);
459 err
|= cfc_check_trigger_src(&cmd
->convert_src
, TRIG_NOW
);
460 err
|= cfc_check_trigger_src(&cmd
->scan_end_src
, TRIG_COUNT
);
461 err
|= cfc_check_trigger_src(&cmd
->stop_src
, TRIG_COUNT
| TRIG_NONE
);
466 /* Step 2a : make sure trigger sources are unique */
468 err
|= cfc_check_trigger_is_unique(cmd
->start_src
);
469 err
|= cfc_check_trigger_is_unique(cmd
->stop_src
);
471 /* Step 2b : and mutually compatible */
476 /* Step 3: check if arguments are trivially valid */
478 err
|= cfc_check_trigger_arg_is(&cmd
->start_arg
, 0);
479 err
|= cfc_check_trigger_arg_is(&cmd
->scan_begin_arg
, 0);
480 err
|= cfc_check_trigger_arg_is(&cmd
->convert_arg
, 0);
481 err
|= cfc_check_trigger_arg_is(&cmd
->scan_end_arg
, cmd
->chanlist_len
);
483 switch (cmd
->stop_src
) {
485 /* any count allowed */
488 err
|= cfc_check_trigger_arg_is(&cmd
->stop_arg
, 0);
497 /* step 4: fix up any arguments */
499 /* if (err) return 4; */
505 * 'do_cmd' function for an 'INTERRUPT' subdevice.
507 static int dio200_subdev_intr_cmd(struct comedi_device
*dev
,
508 struct comedi_subdevice
*s
)
510 struct comedi_cmd
*cmd
= &s
->async
->cmd
;
511 struct dio200_subdev_intr
*subpriv
= s
->private;
515 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
518 /* Set up end of acquisition. */
519 switch (cmd
->stop_src
) {
521 subpriv
->continuous
= false;
522 subpriv
->stopcount
= cmd
->stop_arg
;
526 subpriv
->continuous
= true;
527 subpriv
->stopcount
= 0;
531 /* Set up start of acquisition. */
532 switch (cmd
->start_src
) {
534 s
->async
->inttrig
= dio200_inttrig_start_intr
;
538 event
= dio200_start_intr(dev
, s
);
541 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
544 comedi_event(dev
, s
);
550 * This function initializes an 'INTERRUPT' subdevice.
553 dio200_subdev_intr_init(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
554 unsigned int offset
, unsigned valid_isns
)
556 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
557 struct dio200_subdev_intr
*subpriv
;
559 subpriv
= comedi_alloc_spriv(s
, sizeof(*subpriv
));
563 subpriv
->ofs
= offset
;
564 subpriv
->valid_isns
= valid_isns
;
565 spin_lock_init(&subpriv
->spinlock
);
567 if (layout
->has_int_sce
)
568 /* Disable interrupt sources. */
569 dio200_write8(dev
, subpriv
->ofs
, 0);
571 s
->type
= COMEDI_SUBD_DI
;
572 s
->subdev_flags
= SDF_READABLE
| SDF_CMD_READ
;
573 if (layout
->has_int_sce
) {
574 s
->n_chan
= DIO200_MAX_ISNS
;
575 s
->len_chanlist
= DIO200_MAX_ISNS
;
577 /* No interrupt source register. Support single channel. */
581 s
->range_table
= &range_digital
;
583 s
->insn_bits
= dio200_subdev_intr_insn_bits
;
584 s
->do_cmdtest
= dio200_subdev_intr_cmdtest
;
585 s
->do_cmd
= dio200_subdev_intr_cmd
;
586 s
->cancel
= dio200_subdev_intr_cancel
;
592 * Interrupt service routine.
594 static irqreturn_t
dio200_interrupt(int irq
, void *d
)
596 struct comedi_device
*dev
= d
;
597 struct dio200_private
*devpriv
= dev
->private;
598 struct comedi_subdevice
*s
;
604 if (devpriv
->intr_sd
>= 0) {
605 s
= &dev
->subdevices
[devpriv
->intr_sd
];
606 handled
= dio200_handle_read_intr(dev
, s
);
611 return IRQ_RETVAL(handled
);
615 * Read an '8254' counter subdevice channel.
618 dio200_subdev_8254_read_chan(struct comedi_device
*dev
,
619 struct comedi_subdevice
*s
, unsigned int chan
)
621 struct dio200_subdev_8254
*subpriv
= s
->private;
626 dio200_write8(dev
, subpriv
->ofs
+ i8254_control_reg
, val
);
628 val
= dio200_read8(dev
, subpriv
->ofs
+ chan
);
629 val
+= dio200_read8(dev
, subpriv
->ofs
+ chan
) << 8;
634 * Write an '8254' subdevice channel.
637 dio200_subdev_8254_write_chan(struct comedi_device
*dev
,
638 struct comedi_subdevice
*s
, unsigned int chan
,
641 struct dio200_subdev_8254
*subpriv
= s
->private;
644 dio200_write8(dev
, subpriv
->ofs
+ chan
, count
& 0xff);
645 dio200_write8(dev
, subpriv
->ofs
+ chan
, (count
>> 8) & 0xff);
649 * Set mode of an '8254' subdevice channel.
652 dio200_subdev_8254_set_mode(struct comedi_device
*dev
,
653 struct comedi_subdevice
*s
, unsigned int chan
,
656 struct dio200_subdev_8254
*subpriv
= s
->private;
660 byte
|= 0x30; /* access order: lsb, msb */
661 byte
|= (mode
& 0xf); /* counter mode and BCD|binary */
662 dio200_write8(dev
, subpriv
->ofs
+ i8254_control_reg
, byte
);
666 * Read status byte of an '8254' counter subdevice channel.
669 dio200_subdev_8254_status(struct comedi_device
*dev
,
670 struct comedi_subdevice
*s
, unsigned int chan
)
672 struct dio200_subdev_8254
*subpriv
= s
->private;
675 dio200_write8(dev
, subpriv
->ofs
+ i8254_control_reg
,
678 return dio200_read8(dev
, subpriv
->ofs
+ chan
);
682 * Handle 'insn_read' for an '8254' counter subdevice.
685 dio200_subdev_8254_read(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
686 struct comedi_insn
*insn
, unsigned int *data
)
688 struct dio200_subdev_8254
*subpriv
= s
->private;
689 int chan
= CR_CHAN(insn
->chanspec
);
693 for (n
= 0; n
< insn
->n
; n
++) {
694 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
695 data
[n
] = dio200_subdev_8254_read_chan(dev
, s
, chan
);
696 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
702 * Handle 'insn_write' for an '8254' counter subdevice.
705 dio200_subdev_8254_write(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
706 struct comedi_insn
*insn
, unsigned int *data
)
708 struct dio200_subdev_8254
*subpriv
= s
->private;
709 int chan
= CR_CHAN(insn
->chanspec
);
713 for (n
= 0; n
< insn
->n
; n
++) {
714 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
715 dio200_subdev_8254_write_chan(dev
, s
, chan
, data
[n
]);
716 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
722 * Set gate source for an '8254' counter subdevice channel.
725 dio200_subdev_8254_set_gate_src(struct comedi_device
*dev
,
726 struct comedi_subdevice
*s
,
727 unsigned int counter_number
,
728 unsigned int gate_src
)
730 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
731 struct dio200_subdev_8254
*subpriv
= s
->private;
734 if (!layout
->has_clk_gat_sce
)
736 if (counter_number
> 2)
738 if (gate_src
> (layout
->has_enhancements
? 31 : 7))
741 subpriv
->gate_src
[counter_number
] = gate_src
;
742 byte
= gat_sce(subpriv
->which
, counter_number
, gate_src
);
743 dio200_write8(dev
, subpriv
->gat_sce_ofs
, byte
);
749 * Get gate source for an '8254' counter subdevice channel.
752 dio200_subdev_8254_get_gate_src(struct comedi_device
*dev
,
753 struct comedi_subdevice
*s
,
754 unsigned int counter_number
)
756 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
757 struct dio200_subdev_8254
*subpriv
= s
->private;
759 if (!layout
->has_clk_gat_sce
)
761 if (counter_number
> 2)
764 return subpriv
->gate_src
[counter_number
];
768 * Set clock source for an '8254' counter subdevice channel.
771 dio200_subdev_8254_set_clock_src(struct comedi_device
*dev
,
772 struct comedi_subdevice
*s
,
773 unsigned int counter_number
,
774 unsigned int clock_src
)
776 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
777 struct dio200_subdev_8254
*subpriv
= s
->private;
780 if (!layout
->has_clk_gat_sce
)
782 if (counter_number
> 2)
784 if (clock_src
> (layout
->has_enhancements
? 31 : 7))
787 subpriv
->clock_src
[counter_number
] = clock_src
;
788 byte
= clk_sce(subpriv
->which
, counter_number
, clock_src
);
789 dio200_write8(dev
, subpriv
->clk_sce_ofs
, byte
);
795 * Get clock source for an '8254' counter subdevice channel.
798 dio200_subdev_8254_get_clock_src(struct comedi_device
*dev
,
799 struct comedi_subdevice
*s
,
800 unsigned int counter_number
,
801 unsigned int *period_ns
)
803 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
804 struct dio200_subdev_8254
*subpriv
= s
->private;
807 if (!layout
->has_clk_gat_sce
)
809 if (counter_number
> 2)
812 clock_src
= subpriv
->clock_src
[counter_number
];
813 *period_ns
= clock_period
[clock_src
];
818 * Handle 'insn_config' for an '8254' counter subdevice.
821 dio200_subdev_8254_config(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
822 struct comedi_insn
*insn
, unsigned int *data
)
824 struct dio200_subdev_8254
*subpriv
= s
->private;
826 int chan
= CR_CHAN(insn
->chanspec
);
829 spin_lock_irqsave(&subpriv
->spinlock
, flags
);
831 case INSN_CONFIG_SET_COUNTER_MODE
:
832 if (data
[1] > (I8254_MODE5
| I8254_BINARY
))
835 dio200_subdev_8254_set_mode(dev
, s
, chan
, data
[1]);
837 case INSN_CONFIG_8254_READ_STATUS
:
838 data
[1] = dio200_subdev_8254_status(dev
, s
, chan
);
840 case INSN_CONFIG_SET_GATE_SRC
:
841 ret
= dio200_subdev_8254_set_gate_src(dev
, s
, chan
, data
[2]);
845 case INSN_CONFIG_GET_GATE_SRC
:
846 ret
= dio200_subdev_8254_get_gate_src(dev
, s
, chan
);
853 case INSN_CONFIG_SET_CLOCK_SRC
:
854 ret
= dio200_subdev_8254_set_clock_src(dev
, s
, chan
, data
[1]);
858 case INSN_CONFIG_GET_CLOCK_SRC
:
859 ret
= dio200_subdev_8254_get_clock_src(dev
, s
, chan
, &data
[2]);
870 spin_unlock_irqrestore(&subpriv
->spinlock
, flags
);
871 return ret
< 0 ? ret
: insn
->n
;
875 * This function initializes an '8254' counter subdevice.
878 dio200_subdev_8254_init(struct comedi_device
*dev
, struct comedi_subdevice
*s
,
881 const struct dio200_layout
*layout
= dio200_dev_layout(dev
);
882 struct dio200_subdev_8254
*subpriv
;
885 subpriv
= comedi_alloc_spriv(s
, sizeof(*subpriv
));
889 s
->type
= COMEDI_SUBD_COUNTER
;
890 s
->subdev_flags
= SDF_WRITABLE
| SDF_READABLE
;
893 s
->insn_read
= dio200_subdev_8254_read
;
894 s
->insn_write
= dio200_subdev_8254_write
;
895 s
->insn_config
= dio200_subdev_8254_config
;
897 spin_lock_init(&subpriv
->spinlock
);
898 subpriv
->ofs
= offset
;
899 if (layout
->has_clk_gat_sce
) {
900 /* Derive CLK_SCE and GAT_SCE register offsets from
902 subpriv
->clk_sce_ofs
= DIO200_XCLK_SCE
+ (offset
>> 3);
903 subpriv
->gat_sce_ofs
= DIO200_XGAT_SCE
+ (offset
>> 3);
904 subpriv
->which
= (offset
>> 2) & 1;
907 /* Initialize channels. */
908 for (chan
= 0; chan
< 3; chan
++) {
909 dio200_subdev_8254_set_mode(dev
, s
, chan
,
910 I8254_MODE0
| I8254_BINARY
);
911 if (layout
->has_clk_gat_sce
) {
912 /* Gate source 0 is VCC (logic 1). */
913 dio200_subdev_8254_set_gate_src(dev
, s
, chan
, 0);
914 /* Clock source 0 is the dedicated clock input. */
915 dio200_subdev_8254_set_clock_src(dev
, s
, chan
, 0);
923 * This function sets I/O directions for an '8255' DIO subdevice.
925 static void dio200_subdev_8255_set_dir(struct comedi_device
*dev
,
926 struct comedi_subdevice
*s
)
928 struct dio200_subdev_8255
*subpriv
= s
->private;
932 /* 1 in io_bits indicates output, 1 in config indicates input */
933 if (!(s
->io_bits
& 0x0000ff))
935 if (!(s
->io_bits
& 0x00ff00))
937 if (!(s
->io_bits
& 0x0f0000))
938 config
|= CR_C_LO_IO
;
939 if (!(s
->io_bits
& 0xf00000))
940 config
|= CR_C_HI_IO
;
941 dio200_write8(dev
, subpriv
->ofs
+ 3, config
);
945 * Handle 'insn_bits' for an '8255' DIO subdevice.
947 static int dio200_subdev_8255_bits(struct comedi_device
*dev
,
948 struct comedi_subdevice
*s
,
949 struct comedi_insn
*insn
, unsigned int *data
)
951 struct dio200_subdev_8255
*subpriv
= s
->private;
954 s
->state
&= ~data
[0];
955 s
->state
|= (data
[0] & data
[1]);
957 dio200_write8(dev
, subpriv
->ofs
, s
->state
& 0xff);
958 if (data
[0] & 0xff00)
959 dio200_write8(dev
, subpriv
->ofs
+ 1,
960 (s
->state
>> 8) & 0xff);
961 if (data
[0] & 0xff0000)
962 dio200_write8(dev
, subpriv
->ofs
+ 2,
963 (s
->state
>> 16) & 0xff);
965 data
[1] = dio200_read8(dev
, subpriv
->ofs
);
966 data
[1] |= dio200_read8(dev
, subpriv
->ofs
+ 1) << 8;
967 data
[1] |= dio200_read8(dev
, subpriv
->ofs
+ 2) << 16;
972 * Handle 'insn_config' for an '8255' DIO subdevice.
974 static int dio200_subdev_8255_config(struct comedi_device
*dev
,
975 struct comedi_subdevice
*s
,
976 struct comedi_insn
*insn
,
982 mask
= 1 << CR_CHAN(insn
->chanspec
);
985 else if (mask
& 0x00ff00)
987 else if (mask
& 0x0f0000)
992 case INSN_CONFIG_DIO_INPUT
:
995 case INSN_CONFIG_DIO_OUTPUT
:
998 case INSN_CONFIG_DIO_QUERY
:
999 data
[1] = (s
->io_bits
& bits
) ? COMEDI_OUTPUT
: COMEDI_INPUT
;
1005 dio200_subdev_8255_set_dir(dev
, s
);
1010 * This function initializes an '8255' DIO subdevice.
1012 * offset is the offset to the 8255 chip.
1014 static int dio200_subdev_8255_init(struct comedi_device
*dev
,
1015 struct comedi_subdevice
*s
,
1016 unsigned int offset
)
1018 struct dio200_subdev_8255
*subpriv
;
1020 subpriv
= comedi_alloc_spriv(s
, sizeof(*subpriv
));
1024 subpriv
->ofs
= offset
;
1026 s
->type
= COMEDI_SUBD_DIO
;
1027 s
->subdev_flags
= SDF_READABLE
| SDF_WRITABLE
;
1029 s
->range_table
= &range_digital
;
1031 s
->insn_bits
= dio200_subdev_8255_bits
;
1032 s
->insn_config
= dio200_subdev_8255_config
;
1035 dio200_subdev_8255_set_dir(dev
, s
);
1040 * Handle 'insn_read' for a timer subdevice.
1042 static int dio200_subdev_timer_read(struct comedi_device
*dev
,
1043 struct comedi_subdevice
*s
,
1044 struct comedi_insn
*insn
,
1049 for (n
= 0; n
< insn
->n
; n
++)
1050 data
[n
] = dio200_read32(dev
, DIO200_TS_COUNT
);
1055 * Reset timer subdevice.
1057 static void dio200_subdev_timer_reset(struct comedi_device
*dev
,
1058 struct comedi_subdevice
*s
)
1062 clock
= dio200_read32(dev
, DIO200_TS_CONFIG
) & TS_CONFIG_CLK_SRC_MASK
;
1063 dio200_write32(dev
, DIO200_TS_CONFIG
, clock
| TS_CONFIG_RESET
);
1064 dio200_write32(dev
, DIO200_TS_CONFIG
, clock
);
1068 * Get timer subdevice clock source and period.
1070 static void dio200_subdev_timer_get_clock_src(struct comedi_device
*dev
,
1071 struct comedi_subdevice
*s
,
1073 unsigned int *period
)
1077 clk
= dio200_read32(dev
, DIO200_TS_CONFIG
) & TS_CONFIG_CLK_SRC_MASK
;
1079 *period
= (clk
< ARRAY_SIZE(ts_clock_period
)) ?
1080 ts_clock_period
[clk
] : 0;
1084 * Set timer subdevice clock source.
1086 static int dio200_subdev_timer_set_clock_src(struct comedi_device
*dev
,
1087 struct comedi_subdevice
*s
,
1090 if (src
> TS_CONFIG_MAX_CLK_SRC
)
1092 dio200_write32(dev
, DIO200_TS_CONFIG
, src
);
1097 * Handle 'insn_config' for a timer subdevice.
1099 static int dio200_subdev_timer_config(struct comedi_device
*dev
,
1100 struct comedi_subdevice
*s
,
1101 struct comedi_insn
*insn
,
1107 case INSN_CONFIG_RESET
:
1108 dio200_subdev_timer_reset(dev
, s
);
1110 case INSN_CONFIG_SET_CLOCK_SRC
:
1111 ret
= dio200_subdev_timer_set_clock_src(dev
, s
, data
[1]);
1115 case INSN_CONFIG_GET_CLOCK_SRC
:
1116 dio200_subdev_timer_get_clock_src(dev
, s
, &data
[1], &data
[2]);
1122 return ret
< 0 ? ret
: insn
->n
;
1126 * This function initializes a timer subdevice.
1128 * Uses the timestamp timer registers. There is only one timestamp timer.
1130 static int dio200_subdev_timer_init(struct comedi_device
*dev
,
1131 struct comedi_subdevice
*s
)
1133 s
->type
= COMEDI_SUBD_TIMER
;
1134 s
->subdev_flags
= SDF_READABLE
| SDF_LSAMPL
;
1136 s
->maxdata
= 0xFFFFFFFF;
1137 s
->insn_read
= dio200_subdev_timer_read
;
1138 s
->insn_config
= dio200_subdev_timer_config
;
1142 void amplc_dio200_set_enhance(struct comedi_device
*dev
, unsigned char val
)
1144 dio200_write8(dev
, DIO200_ENHANCE
, val
);
1146 EXPORT_SYMBOL_GPL(amplc_dio200_set_enhance
);
1148 int amplc_dio200_common_attach(struct comedi_device
*dev
, unsigned int irq
,
1149 unsigned long req_irq_flags
)
1151 const struct dio200_board
*thisboard
= comedi_board(dev
);
1152 struct dio200_private
*devpriv
= dev
->private;
1153 const struct dio200_layout
*layout
= dio200_board_layout(thisboard
);
1154 struct comedi_subdevice
*s
;
1159 devpriv
->intr_sd
= -1;
1161 ret
= comedi_alloc_subdevices(dev
, layout
->n_subdevs
);
1165 for (n
= 0; n
< dev
->n_subdevices
; n
++) {
1166 s
= &dev
->subdevices
[n
];
1167 switch (layout
->sdtype
[n
]) {
1169 /* counter subdevice (8254) */
1170 ret
= dio200_subdev_8254_init(dev
, s
,
1176 /* digital i/o subdevice (8255) */
1177 ret
= dio200_subdev_8255_init(dev
, s
,
1183 /* 'INTERRUPT' subdevice */
1185 ret
= dio200_subdev_intr_init(dev
, s
,
1191 devpriv
->intr_sd
= n
;
1193 s
->type
= COMEDI_SUBD_UNUSED
;
1197 ret
= dio200_subdev_timer_init(dev
, s
);
1202 s
->type
= COMEDI_SUBD_UNUSED
;
1206 sdx
= devpriv
->intr_sd
;
1207 if (sdx
>= 0 && sdx
< dev
->n_subdevices
)
1208 dev
->read_subdev
= &dev
->subdevices
[sdx
];
1210 if (request_irq(irq
, dio200_interrupt
, req_irq_flags
,
1211 dev
->board_name
, dev
) >= 0) {
1214 dev_warn(dev
->class_dev
,
1215 "warning! irq %u unavailable!\n", irq
);
1218 dev_info(dev
->class_dev
, "attached\n");
1221 EXPORT_SYMBOL_GPL(amplc_dio200_common_attach
);
1223 void amplc_dio200_common_detach(struct comedi_device
*dev
)
1225 const struct dio200_board
*thisboard
= comedi_board(dev
);
1226 struct dio200_private
*devpriv
= dev
->private;
1228 if (!thisboard
|| !devpriv
)
1231 free_irq(dev
->irq
, dev
);
1233 EXPORT_SYMBOL_GPL(amplc_dio200_common_detach
);
1235 static int __init
amplc_dio200_common_init(void)
1239 module_init(amplc_dio200_common_init
);
1241 static void __exit
amplc_dio200_common_exit(void)
1244 module_exit(amplc_dio200_common_exit
);
1246 MODULE_AUTHOR("Comedi http://www.comedi.org");
1247 MODULE_DESCRIPTION("Comedi helper for amplc_dio200 and amplc_dio200_pci");
1248 MODULE_LICENSE("GPL");