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Merge branch 'for-3.11' of git://linux-nfs.org/~bfields/linux
[linux-2.6.git] / drivers / block / cciss.c
blob62b6c2cc80b5e9d7ef68a7ff84a447e24bb7ade5
1 /*
2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/pci-aspm.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <linux/bitmap.h>
45 #include <linux/io.h>
46 #include <asm/uaccess.h>
47
48 #include <linux/dma-mapping.h>
49 #include <linux/blkdev.h>
50 #include <linux/genhd.h>
51 #include <linux/completion.h>
52 #include <scsi/scsi.h>
53 #include <scsi/sg.h>
54 #include <scsi/scsi_ioctl.h>
55 #include <linux/cdrom.h>
56 #include <linux/scatterlist.h>
57 #include <linux/kthread.h>
58
59 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
60 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
62
63 /* Embedded module documentation macros - see modules.h */
64 MODULE_AUTHOR("Hewlett-Packard Company");
65 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
66 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67 MODULE_VERSION("3.6.26");
68 MODULE_LICENSE("GPL");
69 static int cciss_tape_cmds = 6;
70 module_param(cciss_tape_cmds, int, 0644);
71 MODULE_PARM_DESC(cciss_tape_cmds,
72 "number of commands to allocate for tape devices (default: 6)");
73 static int cciss_simple_mode;
74 module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(cciss_simple_mode,
76 "Use 'simple mode' rather than 'performant mode'");
77
78 static int cciss_allow_hpsa;
79 module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
80 MODULE_PARM_DESC(cciss_allow_hpsa,
81 "Prevent cciss driver from accessing hardware known to be "
82 " supported by the hpsa driver");
83
84 static DEFINE_MUTEX(cciss_mutex);
85 static struct proc_dir_entry *proc_cciss;
86
87 #include "cciss_cmd.h"
88 #include "cciss.h"
89 #include <linux/cciss_ioctl.h>
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id cciss_pci_device_id[] = {
93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
113 {0,}
114 };
115
116 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
118 /* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
120 * access = Address of the struct of function pointers
121 */
122 static struct board_type products[] = {
123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
133 {0x3223103C, "Smart Array P800", &SA5_access},
134 {0x3234103C, "Smart Array P400", &SA5_access},
135 {0x3235103C, "Smart Array P400i", &SA5_access},
136 {0x3211103C, "Smart Array E200i", &SA5_access},
137 {0x3212103C, "Smart Array E200", &SA5_access},
138 {0x3213103C, "Smart Array E200i", &SA5_access},
139 {0x3214103C, "Smart Array E200i", &SA5_access},
140 {0x3215103C, "Smart Array E200i", &SA5_access},
141 {0x3237103C, "Smart Array E500", &SA5_access},
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 };
146
147 /* How long to wait (in milliseconds) for board to go into simple mode */
148 #define MAX_CONFIG_WAIT 30000
149 #define MAX_IOCTL_CONFIG_WAIT 1000
150
151 /*define how many times we will try a command because of bus resets */
152 #define MAX_CMD_RETRIES 3
153
154 #define MAX_CTLR 32
155
156 /* Originally cciss driver only supports 8 major numbers */
157 #define MAX_CTLR_ORIG 8
158
159 static ctlr_info_t *hba[MAX_CTLR];
160
161 static struct task_struct *cciss_scan_thread;
162 static DEFINE_MUTEX(scan_mutex);
163 static LIST_HEAD(scan_q);
164
165 static void do_cciss_request(struct request_queue *q);
166 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
167 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
168 static int cciss_open(struct block_device *bdev, fmode_t mode);
169 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
170 static void cciss_release(struct gendisk *disk, fmode_t mode);
171 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
172 unsigned int cmd, unsigned long arg);
173 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
174
175 static int cciss_revalidate(struct gendisk *disk);
176 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
177 static int deregister_disk(ctlr_info_t *h, int drv_index,
178 int clear_all, int via_ioctl);
179
180 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
181 sector_t *total_size, unsigned int *block_size);
182 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
183 sector_t *total_size, unsigned int *block_size);
184 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
185 sector_t total_size,
186 unsigned int block_size, InquiryData_struct *inq_buff,
187 drive_info_struct *drv);
188 static void cciss_interrupt_mode(ctlr_info_t *);
189 static int cciss_enter_simple_mode(struct ctlr_info *h);
190 static void start_io(ctlr_info_t *h);
191 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
192 __u8 page_code, unsigned char scsi3addr[],
193 int cmd_type);
194 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
195 int attempt_retry);
196 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
197
198 static int add_to_scan_list(struct ctlr_info *h);
199 static int scan_thread(void *data);
200 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
201 static void cciss_hba_release(struct device *dev);
202 static void cciss_device_release(struct device *dev);
203 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
204 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
205 static inline u32 next_command(ctlr_info_t *h);
206 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
207 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
208 u64 *cfg_offset);
209 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
210 unsigned long *memory_bar);
211 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
212 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
213
214 /* performant mode helper functions */
215 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
216 int *bucket_map);
217 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
218
219 #ifdef CONFIG_PROC_FS
220 static void cciss_procinit(ctlr_info_t *h);
221 #else
222 static void cciss_procinit(ctlr_info_t *h)
223 {
224 }
225 #endif /* CONFIG_PROC_FS */
226
227 #ifdef CONFIG_COMPAT
228 static int cciss_compat_ioctl(struct block_device *, fmode_t,
229 unsigned, unsigned long);
230 #endif
231
232 static const struct block_device_operations cciss_fops = {
233 .owner = THIS_MODULE,
234 .open = cciss_unlocked_open,
235 .release = cciss_release,
236 .ioctl = cciss_ioctl,
237 .getgeo = cciss_getgeo,
238 #ifdef CONFIG_COMPAT
239 .compat_ioctl = cciss_compat_ioctl,
240 #endif
241 .revalidate_disk = cciss_revalidate,
242 };
243
244 /* set_performant_mode: Modify the tag for cciss performant
245 * set bit 0 for pull model, bits 3-1 for block fetch
246 * register number
247 */
248 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
249 {
250 if (likely(h->transMethod & CFGTBL_Trans_Performant))
251 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
252 }
253
254 /*
255 * Enqueuing and dequeuing functions for cmdlists.
256 */
257 static inline void addQ(struct list_head *list, CommandList_struct *c)
258 {
259 list_add_tail(&c->list, list);
260 }
261
262 static inline void removeQ(CommandList_struct *c)
263 {
264 /*
265 * After kexec/dump some commands might still
266 * be in flight, which the firmware will try
267 * to complete. Resetting the firmware doesn't work
268 * with old fw revisions, so we have to mark
269 * them off as 'stale' to prevent the driver from
270 * falling over.
271 */
272 if (WARN_ON(list_empty(&c->list))) {
273 c->cmd_type = CMD_MSG_STALE;
274 return;
275 }
276
277 list_del_init(&c->list);
278 }
279
280 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
281 CommandList_struct *c)
282 {
283 unsigned long flags;
284 set_performant_mode(h, c);
285 spin_lock_irqsave(&h->lock, flags);
286 addQ(&h->reqQ, c);
287 h->Qdepth++;
288 if (h->Qdepth > h->maxQsinceinit)
289 h->maxQsinceinit = h->Qdepth;
290 start_io(h);
291 spin_unlock_irqrestore(&h->lock, flags);
292 }
293
294 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
295 int nr_cmds)
296 {
297 int i;
298
299 if (!cmd_sg_list)
300 return;
301 for (i = 0; i < nr_cmds; i++) {
302 kfree(cmd_sg_list[i]);
303 cmd_sg_list[i] = NULL;
304 }
305 kfree(cmd_sg_list);
306 }
307
308 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
309 ctlr_info_t *h, int chainsize, int nr_cmds)
310 {
311 int j;
312 SGDescriptor_struct **cmd_sg_list;
313
314 if (chainsize <= 0)
315 return NULL;
316
317 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
318 if (!cmd_sg_list)
319 return NULL;
320
321 /* Build up chain blocks for each command */
322 for (j = 0; j < nr_cmds; j++) {
323 /* Need a block of chainsized s/g elements. */
324 cmd_sg_list[j] = kmalloc((chainsize *
325 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
326 if (!cmd_sg_list[j]) {
327 dev_err(&h->pdev->dev, "Cannot get memory "
328 "for s/g chains.\n");
329 goto clean;
330 }
331 }
332 return cmd_sg_list;
333 clean:
334 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
335 return NULL;
336 }
337
338 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
339 {
340 SGDescriptor_struct *chain_sg;
341 u64bit temp64;
342
343 if (c->Header.SGTotal <= h->max_cmd_sgentries)
344 return;
345
346 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
347 temp64.val32.lower = chain_sg->Addr.lower;
348 temp64.val32.upper = chain_sg->Addr.upper;
349 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
350 }
351
352 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
353 SGDescriptor_struct *chain_block, int len)
354 {
355 SGDescriptor_struct *chain_sg;
356 u64bit temp64;
357
358 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
359 chain_sg->Ext = CCISS_SG_CHAIN;
360 chain_sg->Len = len;
361 temp64.val = pci_map_single(h->pdev, chain_block, len,
362 PCI_DMA_TODEVICE);
363 chain_sg->Addr.lower = temp64.val32.lower;
364 chain_sg->Addr.upper = temp64.val32.upper;
365 }
366
367 #include "cciss_scsi.c" /* For SCSI tape support */
368
369 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
370 "UNKNOWN"
371 };
372 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
373
374 #ifdef CONFIG_PROC_FS
375
376 /*
377 * Report information about this controller.
378 */
379 #define ENG_GIG 1000000000
380 #define ENG_GIG_FACTOR (ENG_GIG/512)
381 #define ENGAGE_SCSI "engage scsi"
382
383 static void cciss_seq_show_header(struct seq_file *seq)
384 {
385 ctlr_info_t *h = seq->private;
386
387 seq_printf(seq, "%s: HP %s Controller\n"
388 "Board ID: 0x%08lx\n"
389 "Firmware Version: %c%c%c%c\n"
390 "IRQ: %d\n"
391 "Logical drives: %d\n"
392 "Current Q depth: %d\n"
393 "Current # commands on controller: %d\n"
394 "Max Q depth since init: %d\n"
395 "Max # commands on controller since init: %d\n"
396 "Max SG entries since init: %d\n",
397 h->devname,
398 h->product_name,
399 (unsigned long)h->board_id,
400 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
401 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
402 h->num_luns,
403 h->Qdepth, h->commands_outstanding,
404 h->maxQsinceinit, h->max_outstanding, h->maxSG);
405
406 #ifdef CONFIG_CISS_SCSI_TAPE
407 cciss_seq_tape_report(seq, h);
408 #endif /* CONFIG_CISS_SCSI_TAPE */
409 }
410
411 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
412 {
413 ctlr_info_t *h = seq->private;
414 unsigned long flags;
415
416 /* prevent displaying bogus info during configuration
417 * or deconfiguration of a logical volume
418 */
419 spin_lock_irqsave(&h->lock, flags);
420 if (h->busy_configuring) {
421 spin_unlock_irqrestore(&h->lock, flags);
422 return ERR_PTR(-EBUSY);
423 }
424 h->busy_configuring = 1;
425 spin_unlock_irqrestore(&h->lock, flags);
426
427 if (*pos == 0)
428 cciss_seq_show_header(seq);
429
430 return pos;
431 }
432
433 static int cciss_seq_show(struct seq_file *seq, void *v)
434 {
435 sector_t vol_sz, vol_sz_frac;
436 ctlr_info_t *h = seq->private;
437 unsigned ctlr = h->ctlr;
438 loff_t *pos = v;
439 drive_info_struct *drv = h->drv[*pos];
440
441 if (*pos > h->highest_lun)
442 return 0;
443
444 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
445 return 0;
446
447 if (drv->heads == 0)
448 return 0;
449
450 vol_sz = drv->nr_blocks;
451 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
452 vol_sz_frac *= 100;
453 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
454
455 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
456 drv->raid_level = RAID_UNKNOWN;
457 seq_printf(seq, "cciss/c%dd%d:"
458 "\t%4u.%02uGB\tRAID %s\n",
459 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
460 raid_label[drv->raid_level]);
461 return 0;
462 }
463
464 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
465 {
466 ctlr_info_t *h = seq->private;
467
468 if (*pos > h->highest_lun)
469 return NULL;
470 *pos += 1;
471
472 return pos;
473 }
474
475 static void cciss_seq_stop(struct seq_file *seq, void *v)
476 {
477 ctlr_info_t *h = seq->private;
478
479 /* Only reset h->busy_configuring if we succeeded in setting
480 * it during cciss_seq_start. */
481 if (v == ERR_PTR(-EBUSY))
482 return;
483
484 h->busy_configuring = 0;
485 }
486
487 static const struct seq_operations cciss_seq_ops = {
488 .start = cciss_seq_start,
489 .show = cciss_seq_show,
490 .next = cciss_seq_next,
491 .stop = cciss_seq_stop,
492 };
493
494 static int cciss_seq_open(struct inode *inode, struct file *file)
495 {
496 int ret = seq_open(file, &cciss_seq_ops);
497 struct seq_file *seq = file->private_data;
498
499 if (!ret)
500 seq->private = PDE_DATA(inode);
501
502 return ret;
503 }
504
505 static ssize_t
506 cciss_proc_write(struct file *file, const char __user *buf,
507 size_t length, loff_t *ppos)
508 {
509 int err;
510 char *buffer;
511
512 #ifndef CONFIG_CISS_SCSI_TAPE
513 return -EINVAL;
514 #endif
515
516 if (!buf || length > PAGE_SIZE - 1)
517 return -EINVAL;
518
519 buffer = (char *)__get_free_page(GFP_KERNEL);
520 if (!buffer)
521 return -ENOMEM;
522
523 err = -EFAULT;
524 if (copy_from_user(buffer, buf, length))
525 goto out;
526 buffer[length] = '\0';
527
528 #ifdef CONFIG_CISS_SCSI_TAPE
529 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
530 struct seq_file *seq = file->private_data;
531 ctlr_info_t *h = seq->private;
532
533 err = cciss_engage_scsi(h);
534 if (err == 0)
535 err = length;
536 } else
537 #endif /* CONFIG_CISS_SCSI_TAPE */
538 err = -EINVAL;
539 /* might be nice to have "disengage" too, but it's not
540 safely possible. (only 1 module use count, lock issues.) */
541
542 out:
543 free_page((unsigned long)buffer);
544 return err;
545 }
546
547 static const struct file_operations cciss_proc_fops = {
548 .owner = THIS_MODULE,
549 .open = cciss_seq_open,
550 .read = seq_read,
551 .llseek = seq_lseek,
552 .release = seq_release,
553 .write = cciss_proc_write,
554 };
555
556 static void cciss_procinit(ctlr_info_t *h)
557 {
558 struct proc_dir_entry *pde;
559
560 if (proc_cciss == NULL)
561 proc_cciss = proc_mkdir("driver/cciss", NULL);
562 if (!proc_cciss)
563 return;
564 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
565 S_IROTH, proc_cciss,
566 &cciss_proc_fops, h);
567 }
568 #endif /* CONFIG_PROC_FS */
569
570 #define MAX_PRODUCT_NAME_LEN 19
571
572 #define to_hba(n) container_of(n, struct ctlr_info, dev)
573 #define to_drv(n) container_of(n, drive_info_struct, dev)
574
575 /* List of controllers which cannot be hard reset on kexec with reset_devices */
576 static u32 unresettable_controller[] = {
577 0x324a103C, /* Smart Array P712m */
578 0x324b103C, /* SmartArray P711m */
579 0x3223103C, /* Smart Array P800 */
580 0x3234103C, /* Smart Array P400 */
581 0x3235103C, /* Smart Array P400i */
582 0x3211103C, /* Smart Array E200i */
583 0x3212103C, /* Smart Array E200 */
584 0x3213103C, /* Smart Array E200i */
585 0x3214103C, /* Smart Array E200i */
586 0x3215103C, /* Smart Array E200i */
587 0x3237103C, /* Smart Array E500 */
588 0x323D103C, /* Smart Array P700m */
589 0x409C0E11, /* Smart Array 6400 */
590 0x409D0E11, /* Smart Array 6400 EM */
591 };
592
593 /* List of controllers which cannot even be soft reset */
594 static u32 soft_unresettable_controller[] = {
595 0x409C0E11, /* Smart Array 6400 */
596 0x409D0E11, /* Smart Array 6400 EM */
597 };
598
599 static int ctlr_is_hard_resettable(u32 board_id)
600 {
601 int i;
602
603 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
604 if (unresettable_controller[i] == board_id)
605 return 0;
606 return 1;
607 }
608
609 static int ctlr_is_soft_resettable(u32 board_id)
610 {
611 int i;
612
613 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
614 if (soft_unresettable_controller[i] == board_id)
615 return 0;
616 return 1;
617 }
618
619 static int ctlr_is_resettable(u32 board_id)
620 {
621 return ctlr_is_hard_resettable(board_id) ||
622 ctlr_is_soft_resettable(board_id);
623 }
624
625 static ssize_t host_show_resettable(struct device *dev,
626 struct device_attribute *attr,
627 char *buf)
628 {
629 struct ctlr_info *h = to_hba(dev);
630
631 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
632 }
633 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
634
635 static ssize_t host_store_rescan(struct device *dev,
636 struct device_attribute *attr,
637 const char *buf, size_t count)
638 {
639 struct ctlr_info *h = to_hba(dev);
640
641 add_to_scan_list(h);
642 wake_up_process(cciss_scan_thread);
643 wait_for_completion_interruptible(&h->scan_wait);
644
645 return count;
646 }
647 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
648
649 static ssize_t host_show_transport_mode(struct device *dev,
650 struct device_attribute *attr,
651 char *buf)
652 {
653 struct ctlr_info *h = to_hba(dev);
654
655 return snprintf(buf, 20, "%s\n",
656 h->transMethod & CFGTBL_Trans_Performant ?
657 "performant" : "simple");
658 }
659 static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
660
661 static ssize_t dev_show_unique_id(struct device *dev,
662 struct device_attribute *attr,
663 char *buf)
664 {
665 drive_info_struct *drv = to_drv(dev);
666 struct ctlr_info *h = to_hba(drv->dev.parent);
667 __u8 sn[16];
668 unsigned long flags;
669 int ret = 0;
670
671 spin_lock_irqsave(&h->lock, flags);
672 if (h->busy_configuring)
673 ret = -EBUSY;
674 else
675 memcpy(sn, drv->serial_no, sizeof(sn));
676 spin_unlock_irqrestore(&h->lock, flags);
677
678 if (ret)
679 return ret;
680 else
681 return snprintf(buf, 16 * 2 + 2,
682 "%02X%02X%02X%02X%02X%02X%02X%02X"
683 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
684 sn[0], sn[1], sn[2], sn[3],
685 sn[4], sn[5], sn[6], sn[7],
686 sn[8], sn[9], sn[10], sn[11],
687 sn[12], sn[13], sn[14], sn[15]);
688 }
689 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
690
691 static ssize_t dev_show_vendor(struct device *dev,
692 struct device_attribute *attr,
693 char *buf)
694 {
695 drive_info_struct *drv = to_drv(dev);
696 struct ctlr_info *h = to_hba(drv->dev.parent);
697 char vendor[VENDOR_LEN + 1];
698 unsigned long flags;
699 int ret = 0;
700
701 spin_lock_irqsave(&h->lock, flags);
702 if (h->busy_configuring)
703 ret = -EBUSY;
704 else
705 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
706 spin_unlock_irqrestore(&h->lock, flags);
707
708 if (ret)
709 return ret;
710 else
711 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
712 }
713 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
714
715 static ssize_t dev_show_model(struct device *dev,
716 struct device_attribute *attr,
717 char *buf)
718 {
719 drive_info_struct *drv = to_drv(dev);
720 struct ctlr_info *h = to_hba(drv->dev.parent);
721 char model[MODEL_LEN + 1];
722 unsigned long flags;
723 int ret = 0;
724
725 spin_lock_irqsave(&h->lock, flags);
726 if (h->busy_configuring)
727 ret = -EBUSY;
728 else
729 memcpy(model, drv->model, MODEL_LEN + 1);
730 spin_unlock_irqrestore(&h->lock, flags);
731
732 if (ret)
733 return ret;
734 else
735 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
736 }
737 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
738
739 static ssize_t dev_show_rev(struct device *dev,
740 struct device_attribute *attr,
741 char *buf)
742 {
743 drive_info_struct *drv = to_drv(dev);
744 struct ctlr_info *h = to_hba(drv->dev.parent);
745 char rev[REV_LEN + 1];
746 unsigned long flags;
747 int ret = 0;
748
749 spin_lock_irqsave(&h->lock, flags);
750 if (h->busy_configuring)
751 ret = -EBUSY;
752 else
753 memcpy(rev, drv->rev, REV_LEN + 1);
754 spin_unlock_irqrestore(&h->lock, flags);
755
756 if (ret)
757 return ret;
758 else
759 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
760 }
761 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
762
763 static ssize_t cciss_show_lunid(struct device *dev,
764 struct device_attribute *attr, char *buf)
765 {
766 drive_info_struct *drv = to_drv(dev);
767 struct ctlr_info *h = to_hba(drv->dev.parent);
768 unsigned long flags;
769 unsigned char lunid[8];
770
771 spin_lock_irqsave(&h->lock, flags);
772 if (h->busy_configuring) {
773 spin_unlock_irqrestore(&h->lock, flags);
774 return -EBUSY;
775 }
776 if (!drv->heads) {
777 spin_unlock_irqrestore(&h->lock, flags);
778 return -ENOTTY;
779 }
780 memcpy(lunid, drv->LunID, sizeof(lunid));
781 spin_unlock_irqrestore(&h->lock, flags);
782 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
783 lunid[0], lunid[1], lunid[2], lunid[3],
784 lunid[4], lunid[5], lunid[6], lunid[7]);
785 }
786 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
787
788 static ssize_t cciss_show_raid_level(struct device *dev,
789 struct device_attribute *attr, char *buf)
790 {
791 drive_info_struct *drv = to_drv(dev);
792 struct ctlr_info *h = to_hba(drv->dev.parent);
793 int raid;
794 unsigned long flags;
795
796 spin_lock_irqsave(&h->lock, flags);
797 if (h->busy_configuring) {
798 spin_unlock_irqrestore(&h->lock, flags);
799 return -EBUSY;
800 }
801 raid = drv->raid_level;
802 spin_unlock_irqrestore(&h->lock, flags);
803 if (raid < 0 || raid > RAID_UNKNOWN)
804 raid = RAID_UNKNOWN;
805
806 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
807 raid_label[raid]);
808 }
809 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
810
811 static ssize_t cciss_show_usage_count(struct device *dev,
812 struct device_attribute *attr, char *buf)
813 {
814 drive_info_struct *drv = to_drv(dev);
815 struct ctlr_info *h = to_hba(drv->dev.parent);
816 unsigned long flags;
817 int count;
818
819 spin_lock_irqsave(&h->lock, flags);
820 if (h->busy_configuring) {
821 spin_unlock_irqrestore(&h->lock, flags);
822 return -EBUSY;
823 }
824 count = drv->usage_count;
825 spin_unlock_irqrestore(&h->lock, flags);
826 return snprintf(buf, 20, "%d\n", count);
827 }
828 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
829
830 static struct attribute *cciss_host_attrs[] = {
831 &dev_attr_rescan.attr,
832 &dev_attr_resettable.attr,
833 &dev_attr_transport_mode.attr,
834 NULL
835 };
836
837 static struct attribute_group cciss_host_attr_group = {
838 .attrs = cciss_host_attrs,
839 };
840
841 static const struct attribute_group *cciss_host_attr_groups[] = {
842 &cciss_host_attr_group,
843 NULL
844 };
845
846 static struct device_type cciss_host_type = {
847 .name = "cciss_host",
848 .groups = cciss_host_attr_groups,
849 .release = cciss_hba_release,
850 };
851
852 static struct attribute *cciss_dev_attrs[] = {
853 &dev_attr_unique_id.attr,
854 &dev_attr_model.attr,
855 &dev_attr_vendor.attr,
856 &dev_attr_rev.attr,
857 &dev_attr_lunid.attr,
858 &dev_attr_raid_level.attr,
859 &dev_attr_usage_count.attr,
860 NULL
861 };
862
863 static struct attribute_group cciss_dev_attr_group = {
864 .attrs = cciss_dev_attrs,
865 };
866
867 static const struct attribute_group *cciss_dev_attr_groups[] = {
868 &cciss_dev_attr_group,
869 NULL
870 };
871
872 static struct device_type cciss_dev_type = {
873 .name = "cciss_device",
874 .groups = cciss_dev_attr_groups,
875 .release = cciss_device_release,
876 };
877
878 static struct bus_type cciss_bus_type = {
879 .name = "cciss",
880 };
881
882 /*
883 * cciss_hba_release is called when the reference count
884 * of h->dev goes to zero.
885 */
886 static void cciss_hba_release(struct device *dev)
887 {
888 /*
889 * nothing to do, but need this to avoid a warning
890 * about not having a release handler from lib/kref.c.
891 */
892 }
893
894 /*
895 * Initialize sysfs entry for each controller. This sets up and registers
896 * the 'cciss#' directory for each individual controller under
897 * /sys/bus/pci/devices/<dev>/.
898 */
899 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
900 {
901 device_initialize(&h->dev);
902 h->dev.type = &cciss_host_type;
903 h->dev.bus = &cciss_bus_type;
904 dev_set_name(&h->dev, "%s", h->devname);
905 h->dev.parent = &h->pdev->dev;
906
907 return device_add(&h->dev);
908 }
909
910 /*
911 * Remove sysfs entries for an hba.
912 */
913 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
914 {
915 device_del(&h->dev);
916 put_device(&h->dev); /* final put. */
917 }
918
919 /* cciss_device_release is called when the reference count
920 * of h->drv[x]dev goes to zero.
921 */
922 static void cciss_device_release(struct device *dev)
923 {
924 drive_info_struct *drv = to_drv(dev);
925 kfree(drv);
926 }
927
928 /*
929 * Initialize sysfs for each logical drive. This sets up and registers
930 * the 'c#d#' directory for each individual logical drive under
931 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
932 * /sys/block/cciss!c#d# to this entry.
933 */
934 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
935 int drv_index)
936 {
937 struct device *dev;
938
939 if (h->drv[drv_index]->device_initialized)
940 return 0;
941
942 dev = &h->drv[drv_index]->dev;
943 device_initialize(dev);
944 dev->type = &cciss_dev_type;
945 dev->bus = &cciss_bus_type;
946 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
947 dev->parent = &h->dev;
948 h->drv[drv_index]->device_initialized = 1;
949 return device_add(dev);
950 }
951
952 /*
953 * Remove sysfs entries for a logical drive.
954 */
955 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
956 int ctlr_exiting)
957 {
958 struct device *dev = &h->drv[drv_index]->dev;
959
960 /* special case for c*d0, we only destroy it on controller exit */
961 if (drv_index == 0 && !ctlr_exiting)
962 return;
963
964 device_del(dev);
965 put_device(dev); /* the "final" put. */
966 h->drv[drv_index] = NULL;
967 }
968
969 /*
970 * For operations that cannot sleep, a command block is allocated at init,
971 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
972 * which ones are free or in use.
973 */
974 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
975 {
976 CommandList_struct *c;
977 int i;
978 u64bit temp64;
979 dma_addr_t cmd_dma_handle, err_dma_handle;
980
981 do {
982 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
983 if (i == h->nr_cmds)
984 return NULL;
985 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
986 c = h->cmd_pool + i;
987 memset(c, 0, sizeof(CommandList_struct));
988 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
989 c->err_info = h->errinfo_pool + i;
990 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
991 err_dma_handle = h->errinfo_pool_dhandle
992 + i * sizeof(ErrorInfo_struct);
993 h->nr_allocs++;
994
995 c->cmdindex = i;
996
997 INIT_LIST_HEAD(&c->list);
998 c->busaddr = (__u32) cmd_dma_handle;
999 temp64.val = (__u64) err_dma_handle;
1000 c->ErrDesc.Addr.lower = temp64.val32.lower;
1001 c->ErrDesc.Addr.upper = temp64.val32.upper;
1002 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1003
1004 c->ctlr = h->ctlr;
1005 return c;
1006 }
1007
1008 /* allocate a command using pci_alloc_consistent, used for ioctls,
1009 * etc., not for the main i/o path.
1010 */
1011 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1012 {
1013 CommandList_struct *c;
1014 u64bit temp64;
1015 dma_addr_t cmd_dma_handle, err_dma_handle;
1016
1017 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1018 sizeof(CommandList_struct), &cmd_dma_handle);
1019 if (c == NULL)
1020 return NULL;
1021 memset(c, 0, sizeof(CommandList_struct));
1022
1023 c->cmdindex = -1;
1024
1025 c->err_info = (ErrorInfo_struct *)
1026 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1027 &err_dma_handle);
1028
1029 if (c->err_info == NULL) {
1030 pci_free_consistent(h->pdev,
1031 sizeof(CommandList_struct), c, cmd_dma_handle);
1032 return NULL;
1033 }
1034 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1035
1036 INIT_LIST_HEAD(&c->list);
1037 c->busaddr = (__u32) cmd_dma_handle;
1038 temp64.val = (__u64) err_dma_handle;
1039 c->ErrDesc.Addr.lower = temp64.val32.lower;
1040 c->ErrDesc.Addr.upper = temp64.val32.upper;
1041 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1042
1043 c->ctlr = h->ctlr;
1044 return c;
1045 }
1046
1047 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1048 {
1049 int i;
1050
1051 i = c - h->cmd_pool;
1052 clear_bit(i, h->cmd_pool_bits);
1053 h->nr_frees++;
1054 }
1055
1056 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1057 {
1058 u64bit temp64;
1059
1060 temp64.val32.lower = c->ErrDesc.Addr.lower;
1061 temp64.val32.upper = c->ErrDesc.Addr.upper;
1062 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1063 c->err_info, (dma_addr_t) temp64.val);
1064 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1065 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1066 }
1067
1068 static inline ctlr_info_t *get_host(struct gendisk *disk)
1069 {
1070 return disk->queue->queuedata;
1071 }
1072
1073 static inline drive_info_struct *get_drv(struct gendisk *disk)
1074 {
1075 return disk->private_data;
1076 }
1077
1078 /*
1079 * Open. Make sure the device is really there.
1080 */
1081 static int cciss_open(struct block_device *bdev, fmode_t mode)
1082 {
1083 ctlr_info_t *h = get_host(bdev->bd_disk);
1084 drive_info_struct *drv = get_drv(bdev->bd_disk);
1085
1086 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1087 if (drv->busy_configuring)
1088 return -EBUSY;
1089 /*
1090 * Root is allowed to open raw volume zero even if it's not configured
1091 * so array config can still work. Root is also allowed to open any
1092 * volume that has a LUN ID, so it can issue IOCTL to reread the
1093 * disk information. I don't think I really like this
1094 * but I'm already using way to many device nodes to claim another one
1095 * for "raw controller".
1096 */
1097 if (drv->heads == 0) {
1098 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1099 /* if not node 0 make sure it is a partition = 0 */
1100 if (MINOR(bdev->bd_dev) & 0x0f) {
1101 return -ENXIO;
1102 /* if it is, make sure we have a LUN ID */
1103 } else if (memcmp(drv->LunID, CTLR_LUNID,
1104 sizeof(drv->LunID))) {
1105 return -ENXIO;
1106 }
1107 }
1108 if (!capable(CAP_SYS_ADMIN))
1109 return -EPERM;
1110 }
1111 drv->usage_count++;
1112 h->usage_count++;
1113 return 0;
1114 }
1115
1116 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1117 {
1118 int ret;
1119
1120 mutex_lock(&cciss_mutex);
1121 ret = cciss_open(bdev, mode);
1122 mutex_unlock(&cciss_mutex);
1123
1124 return ret;
1125 }
1126
1127 /*
1128 * Close. Sync first.
1129 */
1130 static void cciss_release(struct gendisk *disk, fmode_t mode)
1131 {
1132 ctlr_info_t *h;
1133 drive_info_struct *drv;
1134
1135 mutex_lock(&cciss_mutex);
1136 h = get_host(disk);
1137 drv = get_drv(disk);
1138 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1139 drv->usage_count--;
1140 h->usage_count--;
1141 mutex_unlock(&cciss_mutex);
1142 }
1143
1144 #ifdef CONFIG_COMPAT
1145
1146 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1147 unsigned cmd, unsigned long arg);
1148 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1149 unsigned cmd, unsigned long arg);
1150
1151 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1152 unsigned cmd, unsigned long arg)
1153 {
1154 switch (cmd) {
1155 case CCISS_GETPCIINFO:
1156 case CCISS_GETINTINFO:
1157 case CCISS_SETINTINFO:
1158 case CCISS_GETNODENAME:
1159 case CCISS_SETNODENAME:
1160 case CCISS_GETHEARTBEAT:
1161 case CCISS_GETBUSTYPES:
1162 case CCISS_GETFIRMVER:
1163 case CCISS_GETDRIVVER:
1164 case CCISS_REVALIDVOLS:
1165 case CCISS_DEREGDISK:
1166 case CCISS_REGNEWDISK:
1167 case CCISS_REGNEWD:
1168 case CCISS_RESCANDISK:
1169 case CCISS_GETLUNINFO:
1170 return cciss_ioctl(bdev, mode, cmd, arg);
1171
1172 case CCISS_PASSTHRU32:
1173 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1174 case CCISS_BIG_PASSTHRU32:
1175 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1176
1177 default:
1178 return -ENOIOCTLCMD;
1179 }
1180 }
1181
1182 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1183 unsigned cmd, unsigned long arg)
1184 {
1185 IOCTL32_Command_struct __user *arg32 =
1186 (IOCTL32_Command_struct __user *) arg;
1187 IOCTL_Command_struct arg64;
1188 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1189 int err;
1190 u32 cp;
1191
1192 err = 0;
1193 err |=
1194 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1195 sizeof(arg64.LUN_info));
1196 err |=
1197 copy_from_user(&arg64.Request, &arg32->Request,
1198 sizeof(arg64.Request));
1199 err |=
1200 copy_from_user(&arg64.error_info, &arg32->error_info,
1201 sizeof(arg64.error_info));
1202 err |= get_user(arg64.buf_size, &arg32->buf_size);
1203 err |= get_user(cp, &arg32->buf);
1204 arg64.buf = compat_ptr(cp);
1205 err |= copy_to_user(p, &arg64, sizeof(arg64));
1206
1207 if (err)
1208 return -EFAULT;
1209
1210 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1211 if (err)
1212 return err;
1213 err |=
1214 copy_in_user(&arg32->error_info, &p->error_info,
1215 sizeof(arg32->error_info));
1216 if (err)
1217 return -EFAULT;
1218 return err;
1219 }
1220
1221 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1222 unsigned cmd, unsigned long arg)
1223 {
1224 BIG_IOCTL32_Command_struct __user *arg32 =
1225 (BIG_IOCTL32_Command_struct __user *) arg;
1226 BIG_IOCTL_Command_struct arg64;
1227 BIG_IOCTL_Command_struct __user *p =
1228 compat_alloc_user_space(sizeof(arg64));
1229 int err;
1230 u32 cp;
1231
1232 memset(&arg64, 0, sizeof(arg64));
1233 err = 0;
1234 err |=
1235 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1236 sizeof(arg64.LUN_info));
1237 err |=
1238 copy_from_user(&arg64.Request, &arg32->Request,
1239 sizeof(arg64.Request));
1240 err |=
1241 copy_from_user(&arg64.error_info, &arg32->error_info,
1242 sizeof(arg64.error_info));
1243 err |= get_user(arg64.buf_size, &arg32->buf_size);
1244 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1245 err |= get_user(cp, &arg32->buf);
1246 arg64.buf = compat_ptr(cp);
1247 err |= copy_to_user(p, &arg64, sizeof(arg64));
1248
1249 if (err)
1250 return -EFAULT;
1251
1252 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1253 if (err)
1254 return err;
1255 err |=
1256 copy_in_user(&arg32->error_info, &p->error_info,
1257 sizeof(arg32->error_info));
1258 if (err)
1259 return -EFAULT;
1260 return err;
1261 }
1262 #endif
1263
1264 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1265 {
1266 drive_info_struct *drv = get_drv(bdev->bd_disk);
1267
1268 if (!drv->cylinders)
1269 return -ENXIO;
1270
1271 geo->heads = drv->heads;
1272 geo->sectors = drv->sectors;
1273 geo->cylinders = drv->cylinders;
1274 return 0;
1275 }
1276
1277 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1278 {
1279 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1280 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1281 (void)check_for_unit_attention(h, c);
1282 }
1283
1284 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1285 {
1286 cciss_pci_info_struct pciinfo;
1287
1288 if (!argp)
1289 return -EINVAL;
1290 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1291 pciinfo.bus = h->pdev->bus->number;
1292 pciinfo.dev_fn = h->pdev->devfn;
1293 pciinfo.board_id = h->board_id;
1294 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1295 return -EFAULT;
1296 return 0;
1297 }
1298
1299 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1300 {
1301 cciss_coalint_struct intinfo;
1302 unsigned long flags;
1303
1304 if (!argp)
1305 return -EINVAL;
1306 spin_lock_irqsave(&h->lock, flags);
1307 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1308 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1309 spin_unlock_irqrestore(&h->lock, flags);
1310 if (copy_to_user
1311 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1312 return -EFAULT;
1313 return 0;
1314 }
1315
1316 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1317 {
1318 cciss_coalint_struct intinfo;
1319 unsigned long flags;
1320 int i;
1321
1322 if (!argp)
1323 return -EINVAL;
1324 if (!capable(CAP_SYS_ADMIN))
1325 return -EPERM;
1326 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1327 return -EFAULT;
1328 if ((intinfo.delay == 0) && (intinfo.count == 0))
1329 return -EINVAL;
1330 spin_lock_irqsave(&h->lock, flags);
1331 /* Update the field, and then ring the doorbell */
1332 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1333 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1334 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1335
1336 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1337 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1338 break;
1339 udelay(1000); /* delay and try again */
1340 }
1341 spin_unlock_irqrestore(&h->lock, flags);
1342 if (i >= MAX_IOCTL_CONFIG_WAIT)
1343 return -EAGAIN;
1344 return 0;
1345 }
1346
1347 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1348 {
1349 NodeName_type NodeName;
1350 unsigned long flags;
1351 int i;
1352
1353 if (!argp)
1354 return -EINVAL;
1355 spin_lock_irqsave(&h->lock, flags);
1356 for (i = 0; i < 16; i++)
1357 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1358 spin_unlock_irqrestore(&h->lock, flags);
1359 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1360 return -EFAULT;
1361 return 0;
1362 }
1363
1364 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1365 {
1366 NodeName_type NodeName;
1367 unsigned long flags;
1368 int i;
1369
1370 if (!argp)
1371 return -EINVAL;
1372 if (!capable(CAP_SYS_ADMIN))
1373 return -EPERM;
1374 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1375 return -EFAULT;
1376 spin_lock_irqsave(&h->lock, flags);
1377 /* Update the field, and then ring the doorbell */
1378 for (i = 0; i < 16; i++)
1379 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1380 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1381 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1382 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1383 break;
1384 udelay(1000); /* delay and try again */
1385 }
1386 spin_unlock_irqrestore(&h->lock, flags);
1387 if (i >= MAX_IOCTL_CONFIG_WAIT)
1388 return -EAGAIN;
1389 return 0;
1390 }
1391
1392 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1393 {
1394 Heartbeat_type heartbeat;
1395 unsigned long flags;
1396
1397 if (!argp)
1398 return -EINVAL;
1399 spin_lock_irqsave(&h->lock, flags);
1400 heartbeat = readl(&h->cfgtable->HeartBeat);
1401 spin_unlock_irqrestore(&h->lock, flags);
1402 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1403 return -EFAULT;
1404 return 0;
1405 }
1406
1407 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1408 {
1409 BusTypes_type BusTypes;
1410 unsigned long flags;
1411
1412 if (!argp)
1413 return -EINVAL;
1414 spin_lock_irqsave(&h->lock, flags);
1415 BusTypes = readl(&h->cfgtable->BusTypes);
1416 spin_unlock_irqrestore(&h->lock, flags);
1417 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1418 return -EFAULT;
1419 return 0;
1420 }
1421
1422 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1423 {
1424 FirmwareVer_type firmware;
1425
1426 if (!argp)
1427 return -EINVAL;
1428 memcpy(firmware, h->firm_ver, 4);
1429
1430 if (copy_to_user
1431 (argp, firmware, sizeof(FirmwareVer_type)))
1432 return -EFAULT;
1433 return 0;
1434 }
1435
1436 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1437 {
1438 DriverVer_type DriverVer = DRIVER_VERSION;
1439
1440 if (!argp)
1441 return -EINVAL;
1442 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1443 return -EFAULT;
1444 return 0;
1445 }
1446
1447 static int cciss_getluninfo(ctlr_info_t *h,
1448 struct gendisk *disk, void __user *argp)
1449 {
1450 LogvolInfo_struct luninfo;
1451 drive_info_struct *drv = get_drv(disk);
1452
1453 if (!argp)
1454 return -EINVAL;
1455 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1456 luninfo.num_opens = drv->usage_count;
1457 luninfo.num_parts = 0;
1458 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1459 return -EFAULT;
1460 return 0;
1461 }
1462
1463 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1464 {
1465 IOCTL_Command_struct iocommand;
1466 CommandList_struct *c;
1467 char *buff = NULL;
1468 u64bit temp64;
1469 DECLARE_COMPLETION_ONSTACK(wait);
1470
1471 if (!argp)
1472 return -EINVAL;
1473
1474 if (!capable(CAP_SYS_RAWIO))
1475 return -EPERM;
1476
1477 if (copy_from_user
1478 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1479 return -EFAULT;
1480 if ((iocommand.buf_size < 1) &&
1481 (iocommand.Request.Type.Direction != XFER_NONE)) {
1482 return -EINVAL;
1483 }
1484 if (iocommand.buf_size > 0) {
1485 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1486 if (buff == NULL)
1487 return -EFAULT;
1488 }
1489 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1490 /* Copy the data into the buffer we created */
1491 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1492 kfree(buff);
1493 return -EFAULT;
1494 }
1495 } else {
1496 memset(buff, 0, iocommand.buf_size);
1497 }
1498 c = cmd_special_alloc(h);
1499 if (!c) {
1500 kfree(buff);
1501 return -ENOMEM;
1502 }
1503 /* Fill in the command type */
1504 c->cmd_type = CMD_IOCTL_PEND;
1505 /* Fill in Command Header */
1506 c->Header.ReplyQueue = 0; /* unused in simple mode */
1507 if (iocommand.buf_size > 0) { /* buffer to fill */
1508 c->Header.SGList = 1;
1509 c->Header.SGTotal = 1;
1510 } else { /* no buffers to fill */
1511 c->Header.SGList = 0;
1512 c->Header.SGTotal = 0;
1513 }
1514 c->Header.LUN = iocommand.LUN_info;
1515 /* use the kernel address the cmd block for tag */
1516 c->Header.Tag.lower = c->busaddr;
1517
1518 /* Fill in Request block */
1519 c->Request = iocommand.Request;
1520
1521 /* Fill in the scatter gather information */
1522 if (iocommand.buf_size > 0) {
1523 temp64.val = pci_map_single(h->pdev, buff,
1524 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1525 c->SG[0].Addr.lower = temp64.val32.lower;
1526 c->SG[0].Addr.upper = temp64.val32.upper;
1527 c->SG[0].Len = iocommand.buf_size;
1528 c->SG[0].Ext = 0; /* we are not chaining */
1529 }
1530 c->waiting = &wait;
1531
1532 enqueue_cmd_and_start_io(h, c);
1533 wait_for_completion(&wait);
1534
1535 /* unlock the buffers from DMA */
1536 temp64.val32.lower = c->SG[0].Addr.lower;
1537 temp64.val32.upper = c->SG[0].Addr.upper;
1538 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1539 PCI_DMA_BIDIRECTIONAL);
1540 check_ioctl_unit_attention(h, c);
1541
1542 /* Copy the error information out */
1543 iocommand.error_info = *(c->err_info);
1544 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1545 kfree(buff);
1546 cmd_special_free(h, c);
1547 return -EFAULT;
1548 }
1549
1550 if (iocommand.Request.Type.Direction == XFER_READ) {
1551 /* Copy the data out of the buffer we created */
1552 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1553 kfree(buff);
1554 cmd_special_free(h, c);
1555 return -EFAULT;
1556 }
1557 }
1558 kfree(buff);
1559 cmd_special_free(h, c);
1560 return 0;
1561 }
1562
1563 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1564 {
1565 BIG_IOCTL_Command_struct *ioc;
1566 CommandList_struct *c;
1567 unsigned char **buff = NULL;
1568 int *buff_size = NULL;
1569 u64bit temp64;
1570 BYTE sg_used = 0;
1571 int status = 0;
1572 int i;
1573 DECLARE_COMPLETION_ONSTACK(wait);
1574 __u32 left;
1575 __u32 sz;
1576 BYTE __user *data_ptr;
1577
1578 if (!argp)
1579 return -EINVAL;
1580 if (!capable(CAP_SYS_RAWIO))
1581 return -EPERM;
1582 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1583 if (!ioc) {
1584 status = -ENOMEM;
1585 goto cleanup1;
1586 }
1587 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1588 status = -EFAULT;
1589 goto cleanup1;
1590 }
1591 if ((ioc->buf_size < 1) &&
1592 (ioc->Request.Type.Direction != XFER_NONE)) {
1593 status = -EINVAL;
1594 goto cleanup1;
1595 }
1596 /* Check kmalloc limits using all SGs */
1597 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1598 status = -EINVAL;
1599 goto cleanup1;
1600 }
1601 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1602 status = -EINVAL;
1603 goto cleanup1;
1604 }
1605 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1606 if (!buff) {
1607 status = -ENOMEM;
1608 goto cleanup1;
1609 }
1610 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1611 if (!buff_size) {
1612 status = -ENOMEM;
1613 goto cleanup1;
1614 }
1615 left = ioc->buf_size;
1616 data_ptr = ioc->buf;
1617 while (left) {
1618 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1619 buff_size[sg_used] = sz;
1620 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1621 if (buff[sg_used] == NULL) {
1622 status = -ENOMEM;
1623 goto cleanup1;
1624 }
1625 if (ioc->Request.Type.Direction == XFER_WRITE) {
1626 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1627 status = -EFAULT;
1628 goto cleanup1;
1629 }
1630 } else {
1631 memset(buff[sg_used], 0, sz);
1632 }
1633 left -= sz;
1634 data_ptr += sz;
1635 sg_used++;
1636 }
1637 c = cmd_special_alloc(h);
1638 if (!c) {
1639 status = -ENOMEM;
1640 goto cleanup1;
1641 }
1642 c->cmd_type = CMD_IOCTL_PEND;
1643 c->Header.ReplyQueue = 0;
1644 c->Header.SGList = sg_used;
1645 c->Header.SGTotal = sg_used;
1646 c->Header.LUN = ioc->LUN_info;
1647 c->Header.Tag.lower = c->busaddr;
1648
1649 c->Request = ioc->Request;
1650 for (i = 0; i < sg_used; i++) {
1651 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1652 PCI_DMA_BIDIRECTIONAL);
1653 c->SG[i].Addr.lower = temp64.val32.lower;
1654 c->SG[i].Addr.upper = temp64.val32.upper;
1655 c->SG[i].Len = buff_size[i];
1656 c->SG[i].Ext = 0; /* we are not chaining */
1657 }
1658 c->waiting = &wait;
1659 enqueue_cmd_and_start_io(h, c);
1660 wait_for_completion(&wait);
1661 /* unlock the buffers from DMA */
1662 for (i = 0; i < sg_used; i++) {
1663 temp64.val32.lower = c->SG[i].Addr.lower;
1664 temp64.val32.upper = c->SG[i].Addr.upper;
1665 pci_unmap_single(h->pdev,
1666 (dma_addr_t) temp64.val, buff_size[i],
1667 PCI_DMA_BIDIRECTIONAL);
1668 }
1669 check_ioctl_unit_attention(h, c);
1670 /* Copy the error information out */
1671 ioc->error_info = *(c->err_info);
1672 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1673 cmd_special_free(h, c);
1674 status = -EFAULT;
1675 goto cleanup1;
1676 }
1677 if (ioc->Request.Type.Direction == XFER_READ) {
1678 /* Copy the data out of the buffer we created */
1679 BYTE __user *ptr = ioc->buf;
1680 for (i = 0; i < sg_used; i++) {
1681 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1682 cmd_special_free(h, c);
1683 status = -EFAULT;
1684 goto cleanup1;
1685 }
1686 ptr += buff_size[i];
1687 }
1688 }
1689 cmd_special_free(h, c);
1690 status = 0;
1691 cleanup1:
1692 if (buff) {
1693 for (i = 0; i < sg_used; i++)
1694 kfree(buff[i]);
1695 kfree(buff);
1696 }
1697 kfree(buff_size);
1698 kfree(ioc);
1699 return status;
1700 }
1701
1702 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1703 unsigned int cmd, unsigned long arg)
1704 {
1705 struct gendisk *disk = bdev->bd_disk;
1706 ctlr_info_t *h = get_host(disk);
1707 void __user *argp = (void __user *)arg;
1708
1709 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1710 cmd, arg);
1711 switch (cmd) {
1712 case CCISS_GETPCIINFO:
1713 return cciss_getpciinfo(h, argp);
1714 case CCISS_GETINTINFO:
1715 return cciss_getintinfo(h, argp);
1716 case CCISS_SETINTINFO:
1717 return cciss_setintinfo(h, argp);
1718 case CCISS_GETNODENAME:
1719 return cciss_getnodename(h, argp);
1720 case CCISS_SETNODENAME:
1721 return cciss_setnodename(h, argp);
1722 case CCISS_GETHEARTBEAT:
1723 return cciss_getheartbeat(h, argp);
1724 case CCISS_GETBUSTYPES:
1725 return cciss_getbustypes(h, argp);
1726 case CCISS_GETFIRMVER:
1727 return cciss_getfirmver(h, argp);
1728 case CCISS_GETDRIVVER:
1729 return cciss_getdrivver(h, argp);
1730 case CCISS_DEREGDISK:
1731 case CCISS_REGNEWD:
1732 case CCISS_REVALIDVOLS:
1733 return rebuild_lun_table(h, 0, 1);
1734 case CCISS_GETLUNINFO:
1735 return cciss_getluninfo(h, disk, argp);
1736 case CCISS_PASSTHRU:
1737 return cciss_passthru(h, argp);
1738 case CCISS_BIG_PASSTHRU:
1739 return cciss_bigpassthru(h, argp);
1740
1741 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1742 /* very meaningful for cciss. SG_IO is the main one people want. */
1743
1744 case SG_GET_VERSION_NUM:
1745 case SG_SET_TIMEOUT:
1746 case SG_GET_TIMEOUT:
1747 case SG_GET_RESERVED_SIZE:
1748 case SG_SET_RESERVED_SIZE:
1749 case SG_EMULATED_HOST:
1750 case SG_IO:
1751 case SCSI_IOCTL_SEND_COMMAND:
1752 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1753
1754 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1755 /* they aren't a good fit for cciss, as CD-ROMs are */
1756 /* not supported, and we don't have any bus/target/lun */
1757 /* which we present to the kernel. */
1758
1759 case CDROM_SEND_PACKET:
1760 case CDROMCLOSETRAY:
1761 case CDROMEJECT:
1762 case SCSI_IOCTL_GET_IDLUN:
1763 case SCSI_IOCTL_GET_BUS_NUMBER:
1764 default:
1765 return -ENOTTY;
1766 }
1767 }
1768
1769 static void cciss_check_queues(ctlr_info_t *h)
1770 {
1771 int start_queue = h->next_to_run;
1772 int i;
1773
1774 /* check to see if we have maxed out the number of commands that can
1775 * be placed on the queue. If so then exit. We do this check here
1776 * in case the interrupt we serviced was from an ioctl and did not
1777 * free any new commands.
1778 */
1779 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1780 return;
1781
1782 /* We have room on the queue for more commands. Now we need to queue
1783 * them up. We will also keep track of the next queue to run so
1784 * that every queue gets a chance to be started first.
1785 */
1786 for (i = 0; i < h->highest_lun + 1; i++) {
1787 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1788 /* make sure the disk has been added and the drive is real
1789 * because this can be called from the middle of init_one.
1790 */
1791 if (!h->drv[curr_queue])
1792 continue;
1793 if (!(h->drv[curr_queue]->queue) ||
1794 !(h->drv[curr_queue]->heads))
1795 continue;
1796 blk_start_queue(h->gendisk[curr_queue]->queue);
1797
1798 /* check to see if we have maxed out the number of commands
1799 * that can be placed on the queue.
1800 */
1801 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1802 if (curr_queue == start_queue) {
1803 h->next_to_run =
1804 (start_queue + 1) % (h->highest_lun + 1);
1805 break;
1806 } else {
1807 h->next_to_run = curr_queue;
1808 break;
1809 }
1810 }
1811 }
1812 }
1813
1814 static void cciss_softirq_done(struct request *rq)
1815 {
1816 CommandList_struct *c = rq->completion_data;
1817 ctlr_info_t *h = hba[c->ctlr];
1818 SGDescriptor_struct *curr_sg = c->SG;
1819 u64bit temp64;
1820 unsigned long flags;
1821 int i, ddir;
1822 int sg_index = 0;
1823
1824 if (c->Request.Type.Direction == XFER_READ)
1825 ddir = PCI_DMA_FROMDEVICE;
1826 else
1827 ddir = PCI_DMA_TODEVICE;
1828
1829 /* command did not need to be retried */
1830 /* unmap the DMA mapping for all the scatter gather elements */
1831 for (i = 0; i < c->Header.SGList; i++) {
1832 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1833 cciss_unmap_sg_chain_block(h, c);
1834 /* Point to the next block */
1835 curr_sg = h->cmd_sg_list[c->cmdindex];
1836 sg_index = 0;
1837 }
1838 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1839 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1840 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1841 ddir);
1842 ++sg_index;
1843 }
1844
1845 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1846
1847 /* set the residual count for pc requests */
1848 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1849 rq->resid_len = c->err_info->ResidualCnt;
1850
1851 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1852
1853 spin_lock_irqsave(&h->lock, flags);
1854 cmd_free(h, c);
1855 cciss_check_queues(h);
1856 spin_unlock_irqrestore(&h->lock, flags);
1857 }
1858
1859 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1860 unsigned char scsi3addr[], uint32_t log_unit)
1861 {
1862 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1863 sizeof(h->drv[log_unit]->LunID));
1864 }
1865
1866 /* This function gets the SCSI vendor, model, and revision of a logical drive
1867 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1868 * they cannot be read.
1869 */
1870 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1871 char *vendor, char *model, char *rev)
1872 {
1873 int rc;
1874 InquiryData_struct *inq_buf;
1875 unsigned char scsi3addr[8];
1876
1877 *vendor = '\0';
1878 *model = '\0';
1879 *rev = '\0';
1880
1881 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1882 if (!inq_buf)
1883 return;
1884
1885 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1886 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1887 scsi3addr, TYPE_CMD);
1888 if (rc == IO_OK) {
1889 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1890 vendor[VENDOR_LEN] = '\0';
1891 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1892 model[MODEL_LEN] = '\0';
1893 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1894 rev[REV_LEN] = '\0';
1895 }
1896
1897 kfree(inq_buf);
1898 return;
1899 }
1900
1901 /* This function gets the serial number of a logical drive via
1902 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1903 * number cannot be had, for whatever reason, 16 bytes of 0xff
1904 * are returned instead.
1905 */
1906 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1907 unsigned char *serial_no, int buflen)
1908 {
1909 #define PAGE_83_INQ_BYTES 64
1910 int rc;
1911 unsigned char *buf;
1912 unsigned char scsi3addr[8];
1913
1914 if (buflen > 16)
1915 buflen = 16;
1916 memset(serial_no, 0xff, buflen);
1917 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1918 if (!buf)
1919 return;
1920 memset(serial_no, 0, buflen);
1921 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1922 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1923 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1924 if (rc == IO_OK)
1925 memcpy(serial_no, &buf[8], buflen);
1926 kfree(buf);
1927 return;
1928 }
1929
1930 /*
1931 * cciss_add_disk sets up the block device queue for a logical drive
1932 */
1933 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1934 int drv_index)
1935 {
1936 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1937 if (!disk->queue)
1938 goto init_queue_failure;
1939 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1940 disk->major = h->major;
1941 disk->first_minor = drv_index << NWD_SHIFT;
1942 disk->fops = &cciss_fops;
1943 if (cciss_create_ld_sysfs_entry(h, drv_index))
1944 goto cleanup_queue;
1945 disk->private_data = h->drv[drv_index];
1946 disk->driverfs_dev = &h->drv[drv_index]->dev;
1947
1948 /* Set up queue information */
1949 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1950
1951 /* This is a hardware imposed limit. */
1952 blk_queue_max_segments(disk->queue, h->maxsgentries);
1953
1954 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1955
1956 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1957
1958 disk->queue->queuedata = h;
1959
1960 blk_queue_logical_block_size(disk->queue,
1961 h->drv[drv_index]->block_size);
1962
1963 /* Make sure all queue data is written out before */
1964 /* setting h->drv[drv_index]->queue, as setting this */
1965 /* allows the interrupt handler to start the queue */
1966 wmb();
1967 h->drv[drv_index]->queue = disk->queue;
1968 add_disk(disk);
1969 return 0;
1970
1971 cleanup_queue:
1972 blk_cleanup_queue(disk->queue);
1973 disk->queue = NULL;
1974 init_queue_failure:
1975 return -1;
1976 }
1977
1978 /* This function will check the usage_count of the drive to be updated/added.
1979 * If the usage_count is zero and it is a heretofore unknown drive, or,
1980 * the drive's capacity, geometry, or serial number has changed,
1981 * then the drive information will be updated and the disk will be
1982 * re-registered with the kernel. If these conditions don't hold,
1983 * then it will be left alone for the next reboot. The exception to this
1984 * is disk 0 which will always be left registered with the kernel since it
1985 * is also the controller node. Any changes to disk 0 will show up on
1986 * the next reboot.
1987 */
1988 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1989 int first_time, int via_ioctl)
1990 {
1991 struct gendisk *disk;
1992 InquiryData_struct *inq_buff = NULL;
1993 unsigned int block_size;
1994 sector_t total_size;
1995 unsigned long flags = 0;
1996 int ret = 0;
1997 drive_info_struct *drvinfo;
1998
1999 /* Get information about the disk and modify the driver structure */
2000 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2001 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
2002 if (inq_buff == NULL || drvinfo == NULL)
2003 goto mem_msg;
2004
2005 /* testing to see if 16-byte CDBs are already being used */
2006 if (h->cciss_read == CCISS_READ_16) {
2007 cciss_read_capacity_16(h, drv_index,
2008 &total_size, &block_size);
2009
2010 } else {
2011 cciss_read_capacity(h, drv_index, &total_size, &block_size);
2012 /* if read_capacity returns all F's this volume is >2TB */
2013 /* in size so we switch to 16-byte CDB's for all */
2014 /* read/write ops */
2015 if (total_size == 0xFFFFFFFFULL) {
2016 cciss_read_capacity_16(h, drv_index,
2017 &total_size, &block_size);
2018 h->cciss_read = CCISS_READ_16;
2019 h->cciss_write = CCISS_WRITE_16;
2020 } else {
2021 h->cciss_read = CCISS_READ_10;
2022 h->cciss_write = CCISS_WRITE_10;
2023 }
2024 }
2025
2026 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2027 inq_buff, drvinfo);
2028 drvinfo->block_size = block_size;
2029 drvinfo->nr_blocks = total_size + 1;
2030
2031 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2032 drvinfo->model, drvinfo->rev);
2033 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2034 sizeof(drvinfo->serial_no));
2035 /* Save the lunid in case we deregister the disk, below. */
2036 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2037 sizeof(drvinfo->LunID));
2038
2039 /* Is it the same disk we already know, and nothing's changed? */
2040 if (h->drv[drv_index]->raid_level != -1 &&
2041 ((memcmp(drvinfo->serial_no,
2042 h->drv[drv_index]->serial_no, 16) == 0) &&
2043 drvinfo->block_size == h->drv[drv_index]->block_size &&
2044 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2045 drvinfo->heads == h->drv[drv_index]->heads &&
2046 drvinfo->sectors == h->drv[drv_index]->sectors &&
2047 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2048 /* The disk is unchanged, nothing to update */
2049 goto freeret;
2050
2051 /* If we get here it's not the same disk, or something's changed,
2052 * so we need to * deregister it, and re-register it, if it's not
2053 * in use.
2054 * If the disk already exists then deregister it before proceeding
2055 * (unless it's the first disk (for the controller node).
2056 */
2057 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2058 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2059 spin_lock_irqsave(&h->lock, flags);
2060 h->drv[drv_index]->busy_configuring = 1;
2061 spin_unlock_irqrestore(&h->lock, flags);
2062
2063 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2064 * which keeps the interrupt handler from starting
2065 * the queue.
2066 */
2067 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2068 }
2069
2070 /* If the disk is in use return */
2071 if (ret)
2072 goto freeret;
2073
2074 /* Save the new information from cciss_geometry_inquiry
2075 * and serial number inquiry. If the disk was deregistered
2076 * above, then h->drv[drv_index] will be NULL.
2077 */
2078 if (h->drv[drv_index] == NULL) {
2079 drvinfo->device_initialized = 0;
2080 h->drv[drv_index] = drvinfo;
2081 drvinfo = NULL; /* so it won't be freed below. */
2082 } else {
2083 /* special case for cxd0 */
2084 h->drv[drv_index]->block_size = drvinfo->block_size;
2085 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2086 h->drv[drv_index]->heads = drvinfo->heads;
2087 h->drv[drv_index]->sectors = drvinfo->sectors;
2088 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2089 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2090 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2091 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2092 VENDOR_LEN + 1);
2093 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2094 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2095 }
2096
2097 ++h->num_luns;
2098 disk = h->gendisk[drv_index];
2099 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2100
2101 /* If it's not disk 0 (drv_index != 0)
2102 * or if it was disk 0, but there was previously
2103 * no actual corresponding configured logical drive
2104 * (raid_leve == -1) then we want to update the
2105 * logical drive's information.
2106 */
2107 if (drv_index || first_time) {
2108 if (cciss_add_disk(h, disk, drv_index) != 0) {
2109 cciss_free_gendisk(h, drv_index);
2110 cciss_free_drive_info(h, drv_index);
2111 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2112 drv_index);
2113 --h->num_luns;
2114 }
2115 }
2116
2117 freeret:
2118 kfree(inq_buff);
2119 kfree(drvinfo);
2120 return;
2121 mem_msg:
2122 dev_err(&h->pdev->dev, "out of memory\n");
2123 goto freeret;
2124 }
2125
2126 /* This function will find the first index of the controllers drive array
2127 * that has a null drv pointer and allocate the drive info struct and
2128 * will return that index This is where new drives will be added.
2129 * If the index to be returned is greater than the highest_lun index for
2130 * the controller then highest_lun is set * to this new index.
2131 * If there are no available indexes or if tha allocation fails, then -1
2132 * is returned. * "controller_node" is used to know if this is a real
2133 * logical drive, or just the controller node, which determines if this
2134 * counts towards highest_lun.
2135 */
2136 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2137 {
2138 int i;
2139 drive_info_struct *drv;
2140
2141 /* Search for an empty slot for our drive info */
2142 for (i = 0; i < CISS_MAX_LUN; i++) {
2143
2144 /* if not cxd0 case, and it's occupied, skip it. */
2145 if (h->drv[i] && i != 0)
2146 continue;
2147 /*
2148 * If it's cxd0 case, and drv is alloc'ed already, and a
2149 * disk is configured there, skip it.
2150 */
2151 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2152 continue;
2153
2154 /*
2155 * We've found an empty slot. Update highest_lun
2156 * provided this isn't just the fake cxd0 controller node.
2157 */
2158 if (i > h->highest_lun && !controller_node)
2159 h->highest_lun = i;
2160
2161 /* If adding a real disk at cxd0, and it's already alloc'ed */
2162 if (i == 0 && h->drv[i] != NULL)
2163 return i;
2164
2165 /*
2166 * Found an empty slot, not already alloc'ed. Allocate it.
2167 * Mark it with raid_level == -1, so we know it's new later on.
2168 */
2169 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2170 if (!drv)
2171 return -1;
2172 drv->raid_level = -1; /* so we know it's new */
2173 h->drv[i] = drv;
2174 return i;
2175 }
2176 return -1;
2177 }
2178
2179 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2180 {
2181 kfree(h->drv[drv_index]);
2182 h->drv[drv_index] = NULL;
2183 }
2184
2185 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2186 {
2187 put_disk(h->gendisk[drv_index]);
2188 h->gendisk[drv_index] = NULL;
2189 }
2190
2191 /* cciss_add_gendisk finds a free hba[]->drv structure
2192 * and allocates a gendisk if needed, and sets the lunid
2193 * in the drvinfo structure. It returns the index into
2194 * the ->drv[] array, or -1 if none are free.
2195 * is_controller_node indicates whether highest_lun should
2196 * count this disk, or if it's only being added to provide
2197 * a means to talk to the controller in case no logical
2198 * drives have yet been configured.
2199 */
2200 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2201 int controller_node)
2202 {
2203 int drv_index;
2204
2205 drv_index = cciss_alloc_drive_info(h, controller_node);
2206 if (drv_index == -1)
2207 return -1;
2208
2209 /*Check if the gendisk needs to be allocated */
2210 if (!h->gendisk[drv_index]) {
2211 h->gendisk[drv_index] =
2212 alloc_disk(1 << NWD_SHIFT);
2213 if (!h->gendisk[drv_index]) {
2214 dev_err(&h->pdev->dev,
2215 "could not allocate a new disk %d\n",
2216 drv_index);
2217 goto err_free_drive_info;
2218 }
2219 }
2220 memcpy(h->drv[drv_index]->LunID, lunid,
2221 sizeof(h->drv[drv_index]->LunID));
2222 if (cciss_create_ld_sysfs_entry(h, drv_index))
2223 goto err_free_disk;
2224 /* Don't need to mark this busy because nobody */
2225 /* else knows about this disk yet to contend */
2226 /* for access to it. */
2227 h->drv[drv_index]->busy_configuring = 0;
2228 wmb();
2229 return drv_index;
2230
2231 err_free_disk:
2232 cciss_free_gendisk(h, drv_index);
2233 err_free_drive_info:
2234 cciss_free_drive_info(h, drv_index);
2235 return -1;
2236 }
2237
2238 /* This is for the special case of a controller which
2239 * has no logical drives. In this case, we still need
2240 * to register a disk so the controller can be accessed
2241 * by the Array Config Utility.
2242 */
2243 static void cciss_add_controller_node(ctlr_info_t *h)
2244 {
2245 struct gendisk *disk;
2246 int drv_index;
2247
2248 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2249 return;
2250
2251 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2252 if (drv_index == -1)
2253 goto error;
2254 h->drv[drv_index]->block_size = 512;
2255 h->drv[drv_index]->nr_blocks = 0;
2256 h->drv[drv_index]->heads = 0;
2257 h->drv[drv_index]->sectors = 0;
2258 h->drv[drv_index]->cylinders = 0;
2259 h->drv[drv_index]->raid_level = -1;
2260 memset(h->drv[drv_index]->serial_no, 0, 16);
2261 disk = h->gendisk[drv_index];
2262 if (cciss_add_disk(h, disk, drv_index) == 0)
2263 return;
2264 cciss_free_gendisk(h, drv_index);
2265 cciss_free_drive_info(h, drv_index);
2266 error:
2267 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2268 return;
2269 }
2270
2271 /* This function will add and remove logical drives from the Logical
2272 * drive array of the controller and maintain persistency of ordering
2273 * so that mount points are preserved until the next reboot. This allows
2274 * for the removal of logical drives in the middle of the drive array
2275 * without a re-ordering of those drives.
2276 * INPUT
2277 * h = The controller to perform the operations on
2278 */
2279 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2280 int via_ioctl)
2281 {
2282 int num_luns;
2283 ReportLunData_struct *ld_buff = NULL;
2284 int return_code;
2285 int listlength = 0;
2286 int i;
2287 int drv_found;
2288 int drv_index = 0;
2289 unsigned char lunid[8] = CTLR_LUNID;
2290 unsigned long flags;
2291
2292 if (!capable(CAP_SYS_RAWIO))
2293 return -EPERM;
2294
2295 /* Set busy_configuring flag for this operation */
2296 spin_lock_irqsave(&h->lock, flags);
2297 if (h->busy_configuring) {
2298 spin_unlock_irqrestore(&h->lock, flags);
2299 return -EBUSY;
2300 }
2301 h->busy_configuring = 1;
2302 spin_unlock_irqrestore(&h->lock, flags);
2303
2304 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2305 if (ld_buff == NULL)
2306 goto mem_msg;
2307
2308 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2309 sizeof(ReportLunData_struct),
2310 0, CTLR_LUNID, TYPE_CMD);
2311
2312 if (return_code == IO_OK)
2313 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2314 else { /* reading number of logical volumes failed */
2315 dev_warn(&h->pdev->dev,
2316 "report logical volume command failed\n");
2317 listlength = 0;
2318 goto freeret;
2319 }
2320
2321 num_luns = listlength / 8; /* 8 bytes per entry */
2322 if (num_luns > CISS_MAX_LUN) {
2323 num_luns = CISS_MAX_LUN;
2324 dev_warn(&h->pdev->dev, "more luns configured"
2325 " on controller than can be handled by"
2326 " this driver.\n");
2327 }
2328
2329 if (num_luns == 0)
2330 cciss_add_controller_node(h);
2331
2332 /* Compare controller drive array to driver's drive array
2333 * to see if any drives are missing on the controller due
2334 * to action of Array Config Utility (user deletes drive)
2335 * and deregister logical drives which have disappeared.
2336 */
2337 for (i = 0; i <= h->highest_lun; i++) {
2338 int j;
2339 drv_found = 0;
2340
2341 /* skip holes in the array from already deleted drives */
2342 if (h->drv[i] == NULL)
2343 continue;
2344
2345 for (j = 0; j < num_luns; j++) {
2346 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2347 if (memcmp(h->drv[i]->LunID, lunid,
2348 sizeof(lunid)) == 0) {
2349 drv_found = 1;
2350 break;
2351 }
2352 }
2353 if (!drv_found) {
2354 /* Deregister it from the OS, it's gone. */
2355 spin_lock_irqsave(&h->lock, flags);
2356 h->drv[i]->busy_configuring = 1;
2357 spin_unlock_irqrestore(&h->lock, flags);
2358 return_code = deregister_disk(h, i, 1, via_ioctl);
2359 if (h->drv[i] != NULL)
2360 h->drv[i]->busy_configuring = 0;
2361 }
2362 }
2363
2364 /* Compare controller drive array to driver's drive array.
2365 * Check for updates in the drive information and any new drives
2366 * on the controller due to ACU adding logical drives, or changing
2367 * a logical drive's size, etc. Reregister any new/changed drives
2368 */
2369 for (i = 0; i < num_luns; i++) {
2370 int j;
2371
2372 drv_found = 0;
2373
2374 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2375 /* Find if the LUN is already in the drive array
2376 * of the driver. If so then update its info
2377 * if not in use. If it does not exist then find
2378 * the first free index and add it.
2379 */
2380 for (j = 0; j <= h->highest_lun; j++) {
2381 if (h->drv[j] != NULL &&
2382 memcmp(h->drv[j]->LunID, lunid,
2383 sizeof(h->drv[j]->LunID)) == 0) {
2384 drv_index = j;
2385 drv_found = 1;
2386 break;
2387 }
2388 }
2389
2390 /* check if the drive was found already in the array */
2391 if (!drv_found) {
2392 drv_index = cciss_add_gendisk(h, lunid, 0);
2393 if (drv_index == -1)
2394 goto freeret;
2395 }
2396 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2397 } /* end for */
2398
2399 freeret:
2400 kfree(ld_buff);
2401 h->busy_configuring = 0;
2402 /* We return -1 here to tell the ACU that we have registered/updated
2403 * all of the drives that we can and to keep it from calling us
2404 * additional times.
2405 */
2406 return -1;
2407 mem_msg:
2408 dev_err(&h->pdev->dev, "out of memory\n");
2409 h->busy_configuring = 0;
2410 goto freeret;
2411 }
2412
2413 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2414 {
2415 /* zero out the disk size info */
2416 drive_info->nr_blocks = 0;
2417 drive_info->block_size = 0;
2418 drive_info->heads = 0;
2419 drive_info->sectors = 0;
2420 drive_info->cylinders = 0;
2421 drive_info->raid_level = -1;
2422 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2423 memset(drive_info->model, 0, sizeof(drive_info->model));
2424 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2425 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2426 /*
2427 * don't clear the LUNID though, we need to remember which
2428 * one this one is.
2429 */
2430 }
2431
2432 /* This function will deregister the disk and it's queue from the
2433 * kernel. It must be called with the controller lock held and the
2434 * drv structures busy_configuring flag set. It's parameters are:
2435 *
2436 * disk = This is the disk to be deregistered
2437 * drv = This is the drive_info_struct associated with the disk to be
2438 * deregistered. It contains information about the disk used
2439 * by the driver.
2440 * clear_all = This flag determines whether or not the disk information
2441 * is going to be completely cleared out and the highest_lun
2442 * reset. Sometimes we want to clear out information about
2443 * the disk in preparation for re-adding it. In this case
2444 * the highest_lun should be left unchanged and the LunID
2445 * should not be cleared.
2446 * via_ioctl
2447 * This indicates whether we've reached this path via ioctl.
2448 * This affects the maximum usage count allowed for c0d0 to be messed with.
2449 * If this path is reached via ioctl(), then the max_usage_count will
2450 * be 1, as the process calling ioctl() has got to have the device open.
2451 * If we get here via sysfs, then the max usage count will be zero.
2452 */
2453 static int deregister_disk(ctlr_info_t *h, int drv_index,
2454 int clear_all, int via_ioctl)
2455 {
2456 int i;
2457 struct gendisk *disk;
2458 drive_info_struct *drv;
2459 int recalculate_highest_lun;
2460
2461 if (!capable(CAP_SYS_RAWIO))
2462 return -EPERM;
2463
2464 drv = h->drv[drv_index];
2465 disk = h->gendisk[drv_index];
2466
2467 /* make sure logical volume is NOT is use */
2468 if (clear_all || (h->gendisk[0] == disk)) {
2469 if (drv->usage_count > via_ioctl)
2470 return -EBUSY;
2471 } else if (drv->usage_count > 0)
2472 return -EBUSY;
2473
2474 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2475
2476 /* invalidate the devices and deregister the disk. If it is disk
2477 * zero do not deregister it but just zero out it's values. This
2478 * allows us to delete disk zero but keep the controller registered.
2479 */
2480 if (h->gendisk[0] != disk) {
2481 struct request_queue *q = disk->queue;
2482 if (disk->flags & GENHD_FL_UP) {
2483 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2484 del_gendisk(disk);
2485 }
2486 if (q)
2487 blk_cleanup_queue(q);
2488 /* If clear_all is set then we are deleting the logical
2489 * drive, not just refreshing its info. For drives
2490 * other than disk 0 we will call put_disk. We do not
2491 * do this for disk 0 as we need it to be able to
2492 * configure the controller.
2493 */
2494 if (clear_all){
2495 /* This isn't pretty, but we need to find the
2496 * disk in our array and NULL our the pointer.
2497 * This is so that we will call alloc_disk if
2498 * this index is used again later.
2499 */
2500 for (i=0; i < CISS_MAX_LUN; i++){
2501 if (h->gendisk[i] == disk) {
2502 h->gendisk[i] = NULL;
2503 break;
2504 }
2505 }
2506 put_disk(disk);
2507 }
2508 } else {
2509 set_capacity(disk, 0);
2510 cciss_clear_drive_info(drv);
2511 }
2512
2513 --h->num_luns;
2514
2515 /* if it was the last disk, find the new hightest lun */
2516 if (clear_all && recalculate_highest_lun) {
2517 int newhighest = -1;
2518 for (i = 0; i <= h->highest_lun; i++) {
2519 /* if the disk has size > 0, it is available */
2520 if (h->drv[i] && h->drv[i]->heads)
2521 newhighest = i;
2522 }
2523 h->highest_lun = newhighest;
2524 }
2525 return 0;
2526 }
2527
2528 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2529 size_t size, __u8 page_code, unsigned char *scsi3addr,
2530 int cmd_type)
2531 {
2532 u64bit buff_dma_handle;
2533 int status = IO_OK;
2534
2535 c->cmd_type = CMD_IOCTL_PEND;
2536 c->Header.ReplyQueue = 0;
2537 if (buff != NULL) {
2538 c->Header.SGList = 1;
2539 c->Header.SGTotal = 1;
2540 } else {
2541 c->Header.SGList = 0;
2542 c->Header.SGTotal = 0;
2543 }
2544 c->Header.Tag.lower = c->busaddr;
2545 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2546
2547 c->Request.Type.Type = cmd_type;
2548 if (cmd_type == TYPE_CMD) {
2549 switch (cmd) {
2550 case CISS_INQUIRY:
2551 /* are we trying to read a vital product page */
2552 if (page_code != 0) {
2553 c->Request.CDB[1] = 0x01;
2554 c->Request.CDB[2] = page_code;
2555 }
2556 c->Request.CDBLen = 6;
2557 c->Request.Type.Attribute = ATTR_SIMPLE;
2558 c->Request.Type.Direction = XFER_READ;
2559 c->Request.Timeout = 0;
2560 c->Request.CDB[0] = CISS_INQUIRY;
2561 c->Request.CDB[4] = size & 0xFF;
2562 break;
2563 case CISS_REPORT_LOG:
2564 case CISS_REPORT_PHYS:
2565 /* Talking to controller so It's a physical command
2566 mode = 00 target = 0. Nothing to write.
2567 */
2568 c->Request.CDBLen = 12;
2569 c->Request.Type.Attribute = ATTR_SIMPLE;
2570 c->Request.Type.Direction = XFER_READ;
2571 c->Request.Timeout = 0;
2572 c->Request.CDB[0] = cmd;
2573 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2574 c->Request.CDB[7] = (size >> 16) & 0xFF;
2575 c->Request.CDB[8] = (size >> 8) & 0xFF;
2576 c->Request.CDB[9] = size & 0xFF;
2577 break;
2578
2579 case CCISS_READ_CAPACITY:
2580 c->Request.CDBLen = 10;
2581 c->Request.Type.Attribute = ATTR_SIMPLE;
2582 c->Request.Type.Direction = XFER_READ;
2583 c->Request.Timeout = 0;
2584 c->Request.CDB[0] = cmd;
2585 break;
2586 case CCISS_READ_CAPACITY_16:
2587 c->Request.CDBLen = 16;
2588 c->Request.Type.Attribute = ATTR_SIMPLE;
2589 c->Request.Type.Direction = XFER_READ;
2590 c->Request.Timeout = 0;
2591 c->Request.CDB[0] = cmd;
2592 c->Request.CDB[1] = 0x10;
2593 c->Request.CDB[10] = (size >> 24) & 0xFF;
2594 c->Request.CDB[11] = (size >> 16) & 0xFF;
2595 c->Request.CDB[12] = (size >> 8) & 0xFF;
2596 c->Request.CDB[13] = size & 0xFF;
2597 c->Request.Timeout = 0;
2598 c->Request.CDB[0] = cmd;
2599 break;
2600 case CCISS_CACHE_FLUSH:
2601 c->Request.CDBLen = 12;
2602 c->Request.Type.Attribute = ATTR_SIMPLE;
2603 c->Request.Type.Direction = XFER_WRITE;
2604 c->Request.Timeout = 0;
2605 c->Request.CDB[0] = BMIC_WRITE;
2606 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2607 c->Request.CDB[7] = (size >> 8) & 0xFF;
2608 c->Request.CDB[8] = size & 0xFF;
2609 break;
2610 case TEST_UNIT_READY:
2611 c->Request.CDBLen = 6;
2612 c->Request.Type.Attribute = ATTR_SIMPLE;
2613 c->Request.Type.Direction = XFER_NONE;
2614 c->Request.Timeout = 0;
2615 break;
2616 default:
2617 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2618 return IO_ERROR;
2619 }
2620 } else if (cmd_type == TYPE_MSG) {
2621 switch (cmd) {
2622 case CCISS_ABORT_MSG:
2623 c->Request.CDBLen = 12;
2624 c->Request.Type.Attribute = ATTR_SIMPLE;
2625 c->Request.Type.Direction = XFER_WRITE;
2626 c->Request.Timeout = 0;
2627 c->Request.CDB[0] = cmd; /* abort */
2628 c->Request.CDB[1] = 0; /* abort a command */
2629 /* buff contains the tag of the command to abort */
2630 memcpy(&c->Request.CDB[4], buff, 8);
2631 break;
2632 case CCISS_RESET_MSG:
2633 c->Request.CDBLen = 16;
2634 c->Request.Type.Attribute = ATTR_SIMPLE;
2635 c->Request.Type.Direction = XFER_NONE;
2636 c->Request.Timeout = 0;
2637 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2638 c->Request.CDB[0] = cmd; /* reset */
2639 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2640 break;
2641 case CCISS_NOOP_MSG:
2642 c->Request.CDBLen = 1;
2643 c->Request.Type.Attribute = ATTR_SIMPLE;
2644 c->Request.Type.Direction = XFER_WRITE;
2645 c->Request.Timeout = 0;
2646 c->Request.CDB[0] = cmd;
2647 break;
2648 default:
2649 dev_warn(&h->pdev->dev,
2650 "unknown message type %d\n", cmd);
2651 return IO_ERROR;
2652 }
2653 } else {
2654 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2655 return IO_ERROR;
2656 }
2657 /* Fill in the scatter gather information */
2658 if (size > 0) {
2659 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2660 buff, size,
2661 PCI_DMA_BIDIRECTIONAL);
2662 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2663 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2664 c->SG[0].Len = size;
2665 c->SG[0].Ext = 0; /* we are not chaining */
2666 }
2667 return status;
2668 }
2669
2670 static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2671 u8 reset_type)
2672 {
2673 CommandList_struct *c;
2674 int return_status;
2675
2676 c = cmd_alloc(h);
2677 if (!c)
2678 return -ENOMEM;
2679 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2680 CTLR_LUNID, TYPE_MSG);
2681 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2682 if (return_status != IO_OK) {
2683 cmd_special_free(h, c);
2684 return return_status;
2685 }
2686 c->waiting = NULL;
2687 enqueue_cmd_and_start_io(h, c);
2688 /* Don't wait for completion, the reset won't complete. Don't free
2689 * the command either. This is the last command we will send before
2690 * re-initializing everything, so it doesn't matter and won't leak.
2691 */
2692 return 0;
2693 }
2694
2695 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2696 {
2697 switch (c->err_info->ScsiStatus) {
2698 case SAM_STAT_GOOD:
2699 return IO_OK;
2700 case SAM_STAT_CHECK_CONDITION:
2701 switch (0xf & c->err_info->SenseInfo[2]) {
2702 case 0: return IO_OK; /* no sense */
2703 case 1: return IO_OK; /* recovered error */
2704 default:
2705 if (check_for_unit_attention(h, c))
2706 return IO_NEEDS_RETRY;
2707 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2708 "check condition, sense key = 0x%02x\n",
2709 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2710 }
2711 break;
2712 default:
2713 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2714 "scsi status = 0x%02x\n",
2715 c->Request.CDB[0], c->err_info->ScsiStatus);
2716 break;
2717 }
2718 return IO_ERROR;
2719 }
2720
2721 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2722 {
2723 int return_status = IO_OK;
2724
2725 if (c->err_info->CommandStatus == CMD_SUCCESS)
2726 return IO_OK;
2727
2728 switch (c->err_info->CommandStatus) {
2729 case CMD_TARGET_STATUS:
2730 return_status = check_target_status(h, c);
2731 break;
2732 case CMD_DATA_UNDERRUN:
2733 case CMD_DATA_OVERRUN:
2734 /* expected for inquiry and report lun commands */
2735 break;
2736 case CMD_INVALID:
2737 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2738 "reported invalid\n", c->Request.CDB[0]);
2739 return_status = IO_ERROR;
2740 break;
2741 case CMD_PROTOCOL_ERR:
2742 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2743 "protocol error\n", c->Request.CDB[0]);
2744 return_status = IO_ERROR;
2745 break;
2746 case CMD_HARDWARE_ERR:
2747 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2748 " hardware error\n", c->Request.CDB[0]);
2749 return_status = IO_ERROR;
2750 break;
2751 case CMD_CONNECTION_LOST:
2752 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2753 "connection lost\n", c->Request.CDB[0]);
2754 return_status = IO_ERROR;
2755 break;
2756 case CMD_ABORTED:
2757 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2758 "aborted\n", c->Request.CDB[0]);
2759 return_status = IO_ERROR;
2760 break;
2761 case CMD_ABORT_FAILED:
2762 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2763 "abort failed\n", c->Request.CDB[0]);
2764 return_status = IO_ERROR;
2765 break;
2766 case CMD_UNSOLICITED_ABORT:
2767 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2768 c->Request.CDB[0]);
2769 return_status = IO_NEEDS_RETRY;
2770 break;
2771 case CMD_UNABORTABLE:
2772 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2773 return_status = IO_ERROR;
2774 break;
2775 default:
2776 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2777 "unknown status %x\n", c->Request.CDB[0],
2778 c->err_info->CommandStatus);
2779 return_status = IO_ERROR;
2780 }
2781 return return_status;
2782 }
2783
2784 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2785 int attempt_retry)
2786 {
2787 DECLARE_COMPLETION_ONSTACK(wait);
2788 u64bit buff_dma_handle;
2789 int return_status = IO_OK;
2790
2791 resend_cmd2:
2792 c->waiting = &wait;
2793 enqueue_cmd_and_start_io(h, c);
2794
2795 wait_for_completion(&wait);
2796
2797 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2798 goto command_done;
2799
2800 return_status = process_sendcmd_error(h, c);
2801
2802 if (return_status == IO_NEEDS_RETRY &&
2803 c->retry_count < MAX_CMD_RETRIES) {
2804 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2805 c->Request.CDB[0]);
2806 c->retry_count++;
2807 /* erase the old error information */
2808 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2809 return_status = IO_OK;
2810 INIT_COMPLETION(wait);
2811 goto resend_cmd2;
2812 }
2813
2814 command_done:
2815 /* unlock the buffers from DMA */
2816 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2817 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2818 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2819 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2820 return return_status;
2821 }
2822
2823 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2824 __u8 page_code, unsigned char scsi3addr[],
2825 int cmd_type)
2826 {
2827 CommandList_struct *c;
2828 int return_status;
2829
2830 c = cmd_special_alloc(h);
2831 if (!c)
2832 return -ENOMEM;
2833 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2834 scsi3addr, cmd_type);
2835 if (return_status == IO_OK)
2836 return_status = sendcmd_withirq_core(h, c, 1);
2837
2838 cmd_special_free(h, c);
2839 return return_status;
2840 }
2841
2842 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2843 sector_t total_size,
2844 unsigned int block_size,
2845 InquiryData_struct *inq_buff,
2846 drive_info_struct *drv)
2847 {
2848 int return_code;
2849 unsigned long t;
2850 unsigned char scsi3addr[8];
2851
2852 memset(inq_buff, 0, sizeof(InquiryData_struct));
2853 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2854 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2855 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2856 if (return_code == IO_OK) {
2857 if (inq_buff->data_byte[8] == 0xFF) {
2858 dev_warn(&h->pdev->dev,
2859 "reading geometry failed, volume "
2860 "does not support reading geometry\n");
2861 drv->heads = 255;
2862 drv->sectors = 32; /* Sectors per track */
2863 drv->cylinders = total_size + 1;
2864 drv->raid_level = RAID_UNKNOWN;
2865 } else {
2866 drv->heads = inq_buff->data_byte[6];
2867 drv->sectors = inq_buff->data_byte[7];
2868 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2869 drv->cylinders += inq_buff->data_byte[5];
2870 drv->raid_level = inq_buff->data_byte[8];
2871 }
2872 drv->block_size = block_size;
2873 drv->nr_blocks = total_size + 1;
2874 t = drv->heads * drv->sectors;
2875 if (t > 1) {
2876 sector_t real_size = total_size + 1;
2877 unsigned long rem = sector_div(real_size, t);
2878 if (rem)
2879 real_size++;
2880 drv->cylinders = real_size;
2881 }
2882 } else { /* Get geometry failed */
2883 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2884 }
2885 }
2886
2887 static void
2888 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2889 unsigned int *block_size)
2890 {
2891 ReadCapdata_struct *buf;
2892 int return_code;
2893 unsigned char scsi3addr[8];
2894
2895 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2896 if (!buf) {
2897 dev_warn(&h->pdev->dev, "out of memory\n");
2898 return;
2899 }
2900
2901 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2902 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2903 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2904 if (return_code == IO_OK) {
2905 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2906 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2907 } else { /* read capacity command failed */
2908 dev_warn(&h->pdev->dev, "read capacity failed\n");
2909 *total_size = 0;
2910 *block_size = BLOCK_SIZE;
2911 }
2912 kfree(buf);
2913 }
2914
2915 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2916 sector_t *total_size, unsigned int *block_size)
2917 {
2918 ReadCapdata_struct_16 *buf;
2919 int return_code;
2920 unsigned char scsi3addr[8];
2921
2922 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2923 if (!buf) {
2924 dev_warn(&h->pdev->dev, "out of memory\n");
2925 return;
2926 }
2927
2928 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2929 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2930 buf, sizeof(ReadCapdata_struct_16),
2931 0, scsi3addr, TYPE_CMD);
2932 if (return_code == IO_OK) {
2933 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2934 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2935 } else { /* read capacity command failed */
2936 dev_warn(&h->pdev->dev, "read capacity failed\n");
2937 *total_size = 0;
2938 *block_size = BLOCK_SIZE;
2939 }
2940 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2941 (unsigned long long)*total_size+1, *block_size);
2942 kfree(buf);
2943 }
2944
2945 static int cciss_revalidate(struct gendisk *disk)
2946 {
2947 ctlr_info_t *h = get_host(disk);
2948 drive_info_struct *drv = get_drv(disk);
2949 int logvol;
2950 int FOUND = 0;
2951 unsigned int block_size;
2952 sector_t total_size;
2953 InquiryData_struct *inq_buff = NULL;
2954
2955 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2956 if (!h->drv[logvol])
2957 continue;
2958 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2959 sizeof(drv->LunID)) == 0) {
2960 FOUND = 1;
2961 break;
2962 }
2963 }
2964
2965 if (!FOUND)
2966 return 1;
2967
2968 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2969 if (inq_buff == NULL) {
2970 dev_warn(&h->pdev->dev, "out of memory\n");
2971 return 1;
2972 }
2973 if (h->cciss_read == CCISS_READ_10) {
2974 cciss_read_capacity(h, logvol,
2975 &total_size, &block_size);
2976 } else {
2977 cciss_read_capacity_16(h, logvol,
2978 &total_size, &block_size);
2979 }
2980 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2981 inq_buff, drv);
2982
2983 blk_queue_logical_block_size(drv->queue, drv->block_size);
2984 set_capacity(disk, drv->nr_blocks);
2985
2986 kfree(inq_buff);
2987 return 0;
2988 }
2989
2990 /*
2991 * Map (physical) PCI mem into (virtual) kernel space
2992 */
2993 static void __iomem *remap_pci_mem(ulong base, ulong size)
2994 {
2995 ulong page_base = ((ulong) base) & PAGE_MASK;
2996 ulong page_offs = ((ulong) base) - page_base;
2997 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2998
2999 return page_remapped ? (page_remapped + page_offs) : NULL;
3000 }
3001
3002 /*
3003 * Takes jobs of the Q and sends them to the hardware, then puts it on
3004 * the Q to wait for completion.
3005 */
3006 static void start_io(ctlr_info_t *h)
3007 {
3008 CommandList_struct *c;
3009
3010 while (!list_empty(&h->reqQ)) {
3011 c = list_entry(h->reqQ.next, CommandList_struct, list);
3012 /* can't do anything if fifo is full */
3013 if ((h->access.fifo_full(h))) {
3014 dev_warn(&h->pdev->dev, "fifo full\n");
3015 break;
3016 }
3017
3018 /* Get the first entry from the Request Q */
3019 removeQ(c);
3020 h->Qdepth--;
3021
3022 /* Tell the controller execute command */
3023 h->access.submit_command(h, c);
3024
3025 /* Put job onto the completed Q */
3026 addQ(&h->cmpQ, c);
3027 }
3028 }
3029
3030 /* Assumes that h->lock is held. */
3031 /* Zeros out the error record and then resends the command back */
3032 /* to the controller */
3033 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3034 {
3035 /* erase the old error information */
3036 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3037
3038 /* add it to software queue and then send it to the controller */
3039 addQ(&h->reqQ, c);
3040 h->Qdepth++;
3041 if (h->Qdepth > h->maxQsinceinit)
3042 h->maxQsinceinit = h->Qdepth;
3043
3044 start_io(h);
3045 }
3046
3047 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3048 unsigned int msg_byte, unsigned int host_byte,
3049 unsigned int driver_byte)
3050 {
3051 /* inverse of macros in scsi.h */
3052 return (scsi_status_byte & 0xff) |
3053 ((msg_byte & 0xff) << 8) |
3054 ((host_byte & 0xff) << 16) |
3055 ((driver_byte & 0xff) << 24);
3056 }
3057
3058 static inline int evaluate_target_status(ctlr_info_t *h,
3059 CommandList_struct *cmd, int *retry_cmd)
3060 {
3061 unsigned char sense_key;
3062 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3063 int error_value;
3064
3065 *retry_cmd = 0;
3066 /* If we get in here, it means we got "target status", that is, scsi status */
3067 status_byte = cmd->err_info->ScsiStatus;
3068 driver_byte = DRIVER_OK;
3069 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3070
3071 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3072 host_byte = DID_PASSTHROUGH;
3073 else
3074 host_byte = DID_OK;
3075
3076 error_value = make_status_bytes(status_byte, msg_byte,
3077 host_byte, driver_byte);
3078
3079 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3080 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3081 dev_warn(&h->pdev->dev, "cmd %p "
3082 "has SCSI Status 0x%x\n",
3083 cmd, cmd->err_info->ScsiStatus);
3084 return error_value;
3085 }
3086
3087 /* check the sense key */
3088 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3089 /* no status or recovered error */
3090 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3091 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3092 error_value = 0;
3093
3094 if (check_for_unit_attention(h, cmd)) {
3095 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3096 return 0;
3097 }
3098
3099 /* Not SG_IO or similar? */
3100 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3101 if (error_value != 0)
3102 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3103 " sense key = 0x%x\n", cmd, sense_key);
3104 return error_value;
3105 }
3106
3107 /* SG_IO or similar, copy sense data back */
3108 if (cmd->rq->sense) {
3109 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3110 cmd->rq->sense_len = cmd->err_info->SenseLen;
3111 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3112 cmd->rq->sense_len);
3113 } else
3114 cmd->rq->sense_len = 0;
3115
3116 return error_value;
3117 }
3118
3119 /* checks the status of the job and calls complete buffers to mark all
3120 * buffers for the completed job. Note that this function does not need
3121 * to hold the hba/queue lock.
3122 */
3123 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3124 int timeout)
3125 {
3126 int retry_cmd = 0;
3127 struct request *rq = cmd->rq;
3128
3129 rq->errors = 0;
3130
3131 if (timeout)
3132 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3133
3134 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3135 goto after_error_processing;
3136
3137 switch (cmd->err_info->CommandStatus) {
3138 case CMD_TARGET_STATUS:
3139 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3140 break;
3141 case CMD_DATA_UNDERRUN:
3142 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3143 dev_warn(&h->pdev->dev, "cmd %p has"
3144 " completed with data underrun "
3145 "reported\n", cmd);
3146 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3147 }
3148 break;
3149 case CMD_DATA_OVERRUN:
3150 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3151 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3152 " completed with data overrun "
3153 "reported\n", cmd);
3154 break;
3155 case CMD_INVALID:
3156 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3157 "reported invalid\n", cmd);
3158 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3159 cmd->err_info->CommandStatus, DRIVER_OK,
3160 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3161 DID_PASSTHROUGH : DID_ERROR);
3162 break;
3163 case CMD_PROTOCOL_ERR:
3164 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3165 "protocol error\n", cmd);
3166 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3167 cmd->err_info->CommandStatus, DRIVER_OK,
3168 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3169 DID_PASSTHROUGH : DID_ERROR);
3170 break;
3171 case CMD_HARDWARE_ERR:
3172 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3173 " hardware error\n", cmd);
3174 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3175 cmd->err_info->CommandStatus, DRIVER_OK,
3176 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3177 DID_PASSTHROUGH : DID_ERROR);
3178 break;
3179 case CMD_CONNECTION_LOST:
3180 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3181 "connection lost\n", cmd);
3182 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3183 cmd->err_info->CommandStatus, DRIVER_OK,
3184 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3185 DID_PASSTHROUGH : DID_ERROR);
3186 break;
3187 case CMD_ABORTED:
3188 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3189 "aborted\n", cmd);
3190 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3191 cmd->err_info->CommandStatus, DRIVER_OK,
3192 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3193 DID_PASSTHROUGH : DID_ABORT);
3194 break;
3195 case CMD_ABORT_FAILED:
3196 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3197 "abort failed\n", cmd);
3198 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3199 cmd->err_info->CommandStatus, DRIVER_OK,
3200 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3201 DID_PASSTHROUGH : DID_ERROR);
3202 break;
3203 case CMD_UNSOLICITED_ABORT:
3204 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3205 "abort %p\n", h->ctlr, cmd);
3206 if (cmd->retry_count < MAX_CMD_RETRIES) {
3207 retry_cmd = 1;
3208 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3209 cmd->retry_count++;
3210 } else
3211 dev_warn(&h->pdev->dev,
3212 "%p retried too many times\n", cmd);
3213 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3214 cmd->err_info->CommandStatus, DRIVER_OK,
3215 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3216 DID_PASSTHROUGH : DID_ABORT);
3217 break;
3218 case CMD_TIMEOUT:
3219 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3220 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3221 cmd->err_info->CommandStatus, DRIVER_OK,
3222 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3223 DID_PASSTHROUGH : DID_ERROR);
3224 break;
3225 case CMD_UNABORTABLE:
3226 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3227 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3228 cmd->err_info->CommandStatus, DRIVER_OK,
3229 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3230 DID_PASSTHROUGH : DID_ERROR);
3231 break;
3232 default:
3233 dev_warn(&h->pdev->dev, "cmd %p returned "
3234 "unknown status %x\n", cmd,
3235 cmd->err_info->CommandStatus);
3236 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3237 cmd->err_info->CommandStatus, DRIVER_OK,
3238 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3239 DID_PASSTHROUGH : DID_ERROR);
3240 }
3241
3242 after_error_processing:
3243
3244 /* We need to return this command */
3245 if (retry_cmd) {
3246 resend_cciss_cmd(h, cmd);
3247 return;
3248 }
3249 cmd->rq->completion_data = cmd;
3250 blk_complete_request(cmd->rq);
3251 }
3252
3253 static inline u32 cciss_tag_contains_index(u32 tag)
3254 {
3255 #define DIRECT_LOOKUP_BIT 0x10
3256 return tag & DIRECT_LOOKUP_BIT;
3257 }
3258
3259 static inline u32 cciss_tag_to_index(u32 tag)
3260 {
3261 #define DIRECT_LOOKUP_SHIFT 5
3262 return tag >> DIRECT_LOOKUP_SHIFT;
3263 }
3264
3265 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3266 {
3267 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3268 #define CCISS_SIMPLE_ERROR_BITS 0x03
3269 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3270 return tag & ~CCISS_PERF_ERROR_BITS;
3271 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3272 }
3273
3274 static inline void cciss_mark_tag_indexed(u32 *tag)
3275 {
3276 *tag |= DIRECT_LOOKUP_BIT;
3277 }
3278
3279 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3280 {
3281 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3282 }
3283
3284 /*
3285 * Get a request and submit it to the controller.
3286 */
3287 static void do_cciss_request(struct request_queue *q)
3288 {
3289 ctlr_info_t *h = q->queuedata;
3290 CommandList_struct *c;
3291 sector_t start_blk;
3292 int seg;
3293 struct request *creq;
3294 u64bit temp64;
3295 struct scatterlist *tmp_sg;
3296 SGDescriptor_struct *curr_sg;
3297 drive_info_struct *drv;
3298 int i, dir;
3299 int sg_index = 0;
3300 int chained = 0;
3301
3302 queue:
3303 creq = blk_peek_request(q);
3304 if (!creq)
3305 goto startio;
3306
3307 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3308
3309 c = cmd_alloc(h);
3310 if (!c)
3311 goto full;
3312
3313 blk_start_request(creq);
3314
3315 tmp_sg = h->scatter_list[c->cmdindex];
3316 spin_unlock_irq(q->queue_lock);
3317
3318 c->cmd_type = CMD_RWREQ;
3319 c->rq = creq;
3320
3321 /* fill in the request */
3322 drv = creq->rq_disk->private_data;
3323 c->Header.ReplyQueue = 0; /* unused in simple mode */
3324 /* got command from pool, so use the command block index instead */
3325 /* for direct lookups. */
3326 /* The first 2 bits are reserved for controller error reporting. */
3327 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3328 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3329 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3330 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3331 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3332 c->Request.Type.Attribute = ATTR_SIMPLE;
3333 c->Request.Type.Direction =
3334 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3335 c->Request.Timeout = 0; /* Don't time out */
3336 c->Request.CDB[0] =
3337 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3338 start_blk = blk_rq_pos(creq);
3339 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3340 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3341 sg_init_table(tmp_sg, h->maxsgentries);
3342 seg = blk_rq_map_sg(q, creq, tmp_sg);
3343
3344 /* get the DMA records for the setup */
3345 if (c->Request.Type.Direction == XFER_READ)
3346 dir = PCI_DMA_FROMDEVICE;
3347 else
3348 dir = PCI_DMA_TODEVICE;
3349
3350 curr_sg = c->SG;
3351 sg_index = 0;
3352 chained = 0;
3353
3354 for (i = 0; i < seg; i++) {
3355 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3356 !chained && ((seg - i) > 1)) {
3357 /* Point to next chain block. */
3358 curr_sg = h->cmd_sg_list[c->cmdindex];
3359 sg_index = 0;
3360 chained = 1;
3361 }
3362 curr_sg[sg_index].Len = tmp_sg[i].length;
3363 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3364 tmp_sg[i].offset,
3365 tmp_sg[i].length, dir);
3366 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3367 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3368 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3369 ++sg_index;
3370 }
3371 if (chained)
3372 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3373 (seg - (h->max_cmd_sgentries - 1)) *
3374 sizeof(SGDescriptor_struct));
3375
3376 /* track how many SG entries we are using */
3377 if (seg > h->maxSG)
3378 h->maxSG = seg;
3379
3380 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3381 "chained[%d]\n",
3382 blk_rq_sectors(creq), seg, chained);
3383
3384 c->Header.SGTotal = seg + chained;
3385 if (seg <= h->max_cmd_sgentries)
3386 c->Header.SGList = c->Header.SGTotal;
3387 else
3388 c->Header.SGList = h->max_cmd_sgentries;
3389 set_performant_mode(h, c);
3390
3391 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3392 if(h->cciss_read == CCISS_READ_10) {
3393 c->Request.CDB[1] = 0;
3394 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3395 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3396 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3397 c->Request.CDB[5] = start_blk & 0xff;
3398 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3399 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3400 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3401 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3402 } else {
3403 u32 upper32 = upper_32_bits(start_blk);
3404
3405 c->Request.CDBLen = 16;
3406 c->Request.CDB[1]= 0;
3407 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3408 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3409 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3410 c->Request.CDB[5]= upper32 & 0xff;
3411 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3412 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3413 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3414 c->Request.CDB[9]= start_blk & 0xff;
3415 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3416 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3417 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3418 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3419 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3420 }
3421 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3422 c->Request.CDBLen = creq->cmd_len;
3423 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3424 } else {
3425 dev_warn(&h->pdev->dev, "bad request type %d\n",
3426 creq->cmd_type);
3427 BUG();
3428 }
3429
3430 spin_lock_irq(q->queue_lock);
3431
3432 addQ(&h->reqQ, c);
3433 h->Qdepth++;
3434 if (h->Qdepth > h->maxQsinceinit)
3435 h->maxQsinceinit = h->Qdepth;
3436
3437 goto queue;
3438 full:
3439 blk_stop_queue(q);
3440 startio:
3441 /* We will already have the driver lock here so not need
3442 * to lock it.
3443 */
3444 start_io(h);
3445 }
3446
3447 static inline unsigned long get_next_completion(ctlr_info_t *h)
3448 {
3449 return h->access.command_completed(h);
3450 }
3451
3452 static inline int interrupt_pending(ctlr_info_t *h)
3453 {
3454 return h->access.intr_pending(h);
3455 }
3456
3457 static inline long interrupt_not_for_us(ctlr_info_t *h)
3458 {
3459 return ((h->access.intr_pending(h) == 0) ||
3460 (h->interrupts_enabled == 0));
3461 }
3462
3463 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3464 u32 raw_tag)
3465 {
3466 if (unlikely(tag_index >= h->nr_cmds)) {
3467 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3468 return 1;
3469 }
3470 return 0;
3471 }
3472
3473 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3474 u32 raw_tag)
3475 {
3476 removeQ(c);
3477 if (likely(c->cmd_type == CMD_RWREQ))
3478 complete_command(h, c, 0);
3479 else if (c->cmd_type == CMD_IOCTL_PEND)
3480 complete(c->waiting);
3481 #ifdef CONFIG_CISS_SCSI_TAPE
3482 else if (c->cmd_type == CMD_SCSI)
3483 complete_scsi_command(c, 0, raw_tag);
3484 #endif
3485 }
3486
3487 static inline u32 next_command(ctlr_info_t *h)
3488 {
3489 u32 a;
3490
3491 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3492 return h->access.command_completed(h);
3493
3494 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3495 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3496 (h->reply_pool_head)++;
3497 h->commands_outstanding--;
3498 } else {
3499 a = FIFO_EMPTY;
3500 }
3501 /* Check for wraparound */
3502 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3503 h->reply_pool_head = h->reply_pool;
3504 h->reply_pool_wraparound ^= 1;
3505 }
3506 return a;
3507 }
3508
3509 /* process completion of an indexed ("direct lookup") command */
3510 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3511 {
3512 u32 tag_index;
3513 CommandList_struct *c;
3514
3515 tag_index = cciss_tag_to_index(raw_tag);
3516 if (bad_tag(h, tag_index, raw_tag))
3517 return next_command(h);
3518 c = h->cmd_pool + tag_index;
3519 finish_cmd(h, c, raw_tag);
3520 return next_command(h);
3521 }
3522
3523 /* process completion of a non-indexed command */
3524 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3525 {
3526 CommandList_struct *c = NULL;
3527 __u32 busaddr_masked, tag_masked;
3528
3529 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3530 list_for_each_entry(c, &h->cmpQ, list) {
3531 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3532 if (busaddr_masked == tag_masked) {
3533 finish_cmd(h, c, raw_tag);
3534 return next_command(h);
3535 }
3536 }
3537 bad_tag(h, h->nr_cmds + 1, raw_tag);
3538 return next_command(h);
3539 }
3540
3541 /* Some controllers, like p400, will give us one interrupt
3542 * after a soft reset, even if we turned interrupts off.
3543 * Only need to check for this in the cciss_xxx_discard_completions
3544 * functions.
3545 */
3546 static int ignore_bogus_interrupt(ctlr_info_t *h)
3547 {
3548 if (likely(!reset_devices))
3549 return 0;
3550
3551 if (likely(h->interrupts_enabled))
3552 return 0;
3553
3554 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3555 "(known firmware bug.) Ignoring.\n");
3556
3557 return 1;
3558 }
3559
3560 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3561 {
3562 ctlr_info_t *h = dev_id;
3563 unsigned long flags;
3564 u32 raw_tag;
3565
3566 if (ignore_bogus_interrupt(h))
3567 return IRQ_NONE;
3568
3569 if (interrupt_not_for_us(h))
3570 return IRQ_NONE;
3571 spin_lock_irqsave(&h->lock, flags);
3572 while (interrupt_pending(h)) {
3573 raw_tag = get_next_completion(h);
3574 while (raw_tag != FIFO_EMPTY)
3575 raw_tag = next_command(h);
3576 }
3577 spin_unlock_irqrestore(&h->lock, flags);
3578 return IRQ_HANDLED;
3579 }
3580
3581 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3582 {
3583 ctlr_info_t *h = dev_id;
3584 unsigned long flags;
3585 u32 raw_tag;
3586
3587 if (ignore_bogus_interrupt(h))
3588 return IRQ_NONE;
3589
3590 spin_lock_irqsave(&h->lock, flags);
3591 raw_tag = get_next_completion(h);
3592 while (raw_tag != FIFO_EMPTY)
3593 raw_tag = next_command(h);
3594 spin_unlock_irqrestore(&h->lock, flags);
3595 return IRQ_HANDLED;
3596 }
3597
3598 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3599 {
3600 ctlr_info_t *h = dev_id;
3601 unsigned long flags;
3602 u32 raw_tag;
3603
3604 if (interrupt_not_for_us(h))
3605 return IRQ_NONE;
3606 spin_lock_irqsave(&h->lock, flags);
3607 while (interrupt_pending(h)) {
3608 raw_tag = get_next_completion(h);
3609 while (raw_tag != FIFO_EMPTY) {
3610 if (cciss_tag_contains_index(raw_tag))
3611 raw_tag = process_indexed_cmd(h, raw_tag);
3612 else
3613 raw_tag = process_nonindexed_cmd(h, raw_tag);
3614 }
3615 }
3616 spin_unlock_irqrestore(&h->lock, flags);
3617 return IRQ_HANDLED;
3618 }
3619
3620 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3621 * check the interrupt pending register because it is not set.
3622 */
3623 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3624 {
3625 ctlr_info_t *h = dev_id;
3626 unsigned long flags;
3627 u32 raw_tag;
3628
3629 spin_lock_irqsave(&h->lock, flags);
3630 raw_tag = get_next_completion(h);
3631 while (raw_tag != FIFO_EMPTY) {
3632 if (cciss_tag_contains_index(raw_tag))
3633 raw_tag = process_indexed_cmd(h, raw_tag);
3634 else
3635 raw_tag = process_nonindexed_cmd(h, raw_tag);
3636 }
3637 spin_unlock_irqrestore(&h->lock, flags);
3638 return IRQ_HANDLED;
3639 }
3640
3641 /**
3642 * add_to_scan_list() - add controller to rescan queue
3643 * @h: Pointer to the controller.
3644 *
3645 * Adds the controller to the rescan queue if not already on the queue.
3646 *
3647 * returns 1 if added to the queue, 0 if skipped (could be on the
3648 * queue already, or the controller could be initializing or shutting
3649 * down).
3650 **/
3651 static int add_to_scan_list(struct ctlr_info *h)
3652 {
3653 struct ctlr_info *test_h;
3654 int found = 0;
3655 int ret = 0;
3656
3657 if (h->busy_initializing)
3658 return 0;
3659
3660 if (!mutex_trylock(&h->busy_shutting_down))
3661 return 0;
3662
3663 mutex_lock(&scan_mutex);
3664 list_for_each_entry(test_h, &scan_q, scan_list) {
3665 if (test_h == h) {
3666 found = 1;
3667 break;
3668 }
3669 }
3670 if (!found && !h->busy_scanning) {
3671 INIT_COMPLETION(h->scan_wait);
3672 list_add_tail(&h->scan_list, &scan_q);
3673 ret = 1;
3674 }
3675 mutex_unlock(&scan_mutex);
3676 mutex_unlock(&h->busy_shutting_down);
3677
3678 return ret;
3679 }
3680
3681 /**
3682 * remove_from_scan_list() - remove controller from rescan queue
3683 * @h: Pointer to the controller.
3684 *
3685 * Removes the controller from the rescan queue if present. Blocks if
3686 * the controller is currently conducting a rescan. The controller
3687 * can be in one of three states:
3688 * 1. Doesn't need a scan
3689 * 2. On the scan list, but not scanning yet (we remove it)
3690 * 3. Busy scanning (and not on the list). In this case we want to wait for
3691 * the scan to complete to make sure the scanning thread for this
3692 * controller is completely idle.
3693 **/
3694 static void remove_from_scan_list(struct ctlr_info *h)
3695 {
3696 struct ctlr_info *test_h, *tmp_h;
3697
3698 mutex_lock(&scan_mutex);
3699 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3700 if (test_h == h) { /* state 2. */
3701 list_del(&h->scan_list);
3702 complete_all(&h->scan_wait);
3703 mutex_unlock(&scan_mutex);
3704 return;
3705 }
3706 }
3707 if (h->busy_scanning) { /* state 3. */
3708 mutex_unlock(&scan_mutex);
3709 wait_for_completion(&h->scan_wait);
3710 } else { /* state 1, nothing to do. */
3711 mutex_unlock(&scan_mutex);
3712 }
3713 }
3714
3715 /**
3716 * scan_thread() - kernel thread used to rescan controllers
3717 * @data: Ignored.
3718 *
3719 * A kernel thread used scan for drive topology changes on
3720 * controllers. The thread processes only one controller at a time
3721 * using a queue. Controllers are added to the queue using
3722 * add_to_scan_list() and removed from the queue either after done
3723 * processing or using remove_from_scan_list().
3724 *
3725 * returns 0.
3726 **/
3727 static int scan_thread(void *data)
3728 {
3729 struct ctlr_info *h;
3730
3731 while (1) {
3732 set_current_state(TASK_INTERRUPTIBLE);
3733 schedule();
3734 if (kthread_should_stop())
3735 break;
3736
3737 while (1) {
3738 mutex_lock(&scan_mutex);
3739 if (list_empty(&scan_q)) {
3740 mutex_unlock(&scan_mutex);
3741 break;
3742 }
3743
3744 h = list_entry(scan_q.next,
3745 struct ctlr_info,
3746 scan_list);
3747 list_del(&h->scan_list);
3748 h->busy_scanning = 1;
3749 mutex_unlock(&scan_mutex);
3750
3751 rebuild_lun_table(h, 0, 0);
3752 complete_all(&h->scan_wait);
3753 mutex_lock(&scan_mutex);
3754 h->busy_scanning = 0;
3755 mutex_unlock(&scan_mutex);
3756 }
3757 }
3758
3759 return 0;
3760 }
3761
3762 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3763 {
3764 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3765 return 0;
3766
3767 switch (c->err_info->SenseInfo[12]) {
3768 case STATE_CHANGED:
3769 dev_warn(&h->pdev->dev, "a state change "
3770 "detected, command retried\n");
3771 return 1;
3772 break;
3773 case LUN_FAILED:
3774 dev_warn(&h->pdev->dev, "LUN failure "
3775 "detected, action required\n");
3776 return 1;
3777 break;
3778 case REPORT_LUNS_CHANGED:
3779 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3780 /*
3781 * Here, we could call add_to_scan_list and wake up the scan thread,
3782 * except that it's quite likely that we will get more than one
3783 * REPORT_LUNS_CHANGED condition in quick succession, which means
3784 * that those which occur after the first one will likely happen
3785 * *during* the scan_thread's rescan. And the rescan code is not
3786 * robust enough to restart in the middle, undoing what it has already
3787 * done, and it's not clear that it's even possible to do this, since
3788 * part of what it does is notify the block layer, which starts
3789 * doing it's own i/o to read partition tables and so on, and the
3790 * driver doesn't have visibility to know what might need undoing.
3791 * In any event, if possible, it is horribly complicated to get right
3792 * so we just don't do it for now.
3793 *
3794 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3795 */
3796 return 1;
3797 break;
3798 case POWER_OR_RESET:
3799 dev_warn(&h->pdev->dev,
3800 "a power on or device reset detected\n");
3801 return 1;
3802 break;
3803 case UNIT_ATTENTION_CLEARED:
3804 dev_warn(&h->pdev->dev,
3805 "unit attention cleared by another initiator\n");
3806 return 1;
3807 break;
3808 default:
3809 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3810 return 1;
3811 }
3812 }
3813
3814 /*
3815 * We cannot read the structure directly, for portability we must use
3816 * the io functions.
3817 * This is for debug only.
3818 */
3819 static void print_cfg_table(ctlr_info_t *h)
3820 {
3821 int i;
3822 char temp_name[17];
3823 CfgTable_struct *tb = h->cfgtable;
3824
3825 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3826 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3827 for (i = 0; i < 4; i++)
3828 temp_name[i] = readb(&(tb->Signature[i]));
3829 temp_name[4] = '\0';
3830 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3831 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3832 readl(&(tb->SpecValence)));
3833 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3834 readl(&(tb->TransportSupport)));
3835 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3836 readl(&(tb->TransportActive)));
3837 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3838 readl(&(tb->HostWrite.TransportRequest)));
3839 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3840 readl(&(tb->HostWrite.CoalIntDelay)));
3841 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3842 readl(&(tb->HostWrite.CoalIntCount)));
3843 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3844 readl(&(tb->CmdsOutMax)));
3845 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3846 readl(&(tb->BusTypes)));
3847 for (i = 0; i < 16; i++)
3848 temp_name[i] = readb(&(tb->ServerName[i]));
3849 temp_name[16] = '\0';
3850 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3851 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3852 readl(&(tb->HeartBeat)));
3853 }
3854
3855 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3856 {
3857 int i, offset, mem_type, bar_type;
3858 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3859 return 0;
3860 offset = 0;
3861 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3862 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3863 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3864 offset += 4;
3865 else {
3866 mem_type = pci_resource_flags(pdev, i) &
3867 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3868 switch (mem_type) {
3869 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3870 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3871 offset += 4; /* 32 bit */
3872 break;
3873 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3874 offset += 8;
3875 break;
3876 default: /* reserved in PCI 2.2 */
3877 dev_warn(&pdev->dev,
3878 "Base address is invalid\n");
3879 return -1;
3880 break;
3881 }
3882 }
3883 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3884 return i + 1;
3885 }
3886 return -1;
3887 }
3888
3889 /* Fill in bucket_map[], given nsgs (the max number of
3890 * scatter gather elements supported) and bucket[],
3891 * which is an array of 8 integers. The bucket[] array
3892 * contains 8 different DMA transfer sizes (in 16
3893 * byte increments) which the controller uses to fetch
3894 * commands. This function fills in bucket_map[], which
3895 * maps a given number of scatter gather elements to one of
3896 * the 8 DMA transfer sizes. The point of it is to allow the
3897 * controller to only do as much DMA as needed to fetch the
3898 * command, with the DMA transfer size encoded in the lower
3899 * bits of the command address.
3900 */
3901 static void calc_bucket_map(int bucket[], int num_buckets,
3902 int nsgs, int *bucket_map)
3903 {
3904 int i, j, b, size;
3905
3906 /* even a command with 0 SGs requires 4 blocks */
3907 #define MINIMUM_TRANSFER_BLOCKS 4
3908 #define NUM_BUCKETS 8
3909 /* Note, bucket_map must have nsgs+1 entries. */
3910 for (i = 0; i <= nsgs; i++) {
3911 /* Compute size of a command with i SG entries */
3912 size = i + MINIMUM_TRANSFER_BLOCKS;
3913 b = num_buckets; /* Assume the biggest bucket */
3914 /* Find the bucket that is just big enough */
3915 for (j = 0; j < 8; j++) {
3916 if (bucket[j] >= size) {
3917 b = j;
3918 break;
3919 }
3920 }
3921 /* for a command with i SG entries, use bucket b. */
3922 bucket_map[i] = b;
3923 }
3924 }
3925
3926 static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3927 {
3928 int i;
3929
3930 /* under certain very rare conditions, this can take awhile.
3931 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3932 * as we enter this code.) */
3933 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3934 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3935 break;
3936 usleep_range(10000, 20000);
3937 }
3938 }
3939
3940 static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
3941 {
3942 /* This is a bit complicated. There are 8 registers on
3943 * the controller which we write to to tell it 8 different
3944 * sizes of commands which there may be. It's a way of
3945 * reducing the DMA done to fetch each command. Encoded into
3946 * each command's tag are 3 bits which communicate to the controller
3947 * which of the eight sizes that command fits within. The size of
3948 * each command depends on how many scatter gather entries there are.
3949 * Each SG entry requires 16 bytes. The eight registers are programmed
3950 * with the number of 16-byte blocks a command of that size requires.
3951 * The smallest command possible requires 5 such 16 byte blocks.
3952 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3953 * blocks. Note, this only extends to the SG entries contained
3954 * within the command block, and does not extend to chained blocks
3955 * of SG elements. bft[] contains the eight values we write to
3956 * the registers. They are not evenly distributed, but have more
3957 * sizes for small commands, and fewer sizes for larger commands.
3958 */
3959 __u32 trans_offset;
3960 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3961 /*
3962 * 5 = 1 s/g entry or 4k
3963 * 6 = 2 s/g entry or 8k
3964 * 8 = 4 s/g entry or 16k
3965 * 10 = 6 s/g entry or 24k
3966 */
3967 unsigned long register_value;
3968 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3969
3970 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3971
3972 /* Controller spec: zero out this buffer. */
3973 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3974 h->reply_pool_head = h->reply_pool;
3975
3976 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3977 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3978 h->blockFetchTable);
3979 writel(bft[0], &h->transtable->BlockFetch0);
3980 writel(bft[1], &h->transtable->BlockFetch1);
3981 writel(bft[2], &h->transtable->BlockFetch2);
3982 writel(bft[3], &h->transtable->BlockFetch3);
3983 writel(bft[4], &h->transtable->BlockFetch4);
3984 writel(bft[5], &h->transtable->BlockFetch5);
3985 writel(bft[6], &h->transtable->BlockFetch6);
3986 writel(bft[7], &h->transtable->BlockFetch7);
3987
3988 /* size of controller ring buffer */
3989 writel(h->max_commands, &h->transtable->RepQSize);
3990 writel(1, &h->transtable->RepQCount);
3991 writel(0, &h->transtable->RepQCtrAddrLow32);
3992 writel(0, &h->transtable->RepQCtrAddrHigh32);
3993 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3994 writel(0, &h->transtable->RepQAddr0High32);
3995 writel(CFGTBL_Trans_Performant | use_short_tags,
3996 &(h->cfgtable->HostWrite.TransportRequest));
3997
3998 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3999 cciss_wait_for_mode_change_ack(h);
4000 register_value = readl(&(h->cfgtable->TransportActive));
4001 if (!(register_value & CFGTBL_Trans_Performant))
4002 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
4003 " performant mode\n");
4004 }
4005
4006 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4007 {
4008 __u32 trans_support;
4009
4010 if (cciss_simple_mode)
4011 return;
4012
4013 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4014 /* Attempt to put controller into performant mode if supported */
4015 /* Does board support performant mode? */
4016 trans_support = readl(&(h->cfgtable->TransportSupport));
4017 if (!(trans_support & PERFORMANT_MODE))
4018 return;
4019
4020 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4021 /* Performant mode demands commands on a 32 byte boundary
4022 * pci_alloc_consistent aligns on page boundarys already.
4023 * Just need to check if divisible by 32
4024 */
4025 if ((sizeof(CommandList_struct) % 32) != 0) {
4026 dev_warn(&h->pdev->dev, "%s %d %s\n",
4027 "cciss info: command size[",
4028 (int)sizeof(CommandList_struct),
4029 "] not divisible by 32, no performant mode..\n");
4030 return;
4031 }
4032
4033 /* Performant mode ring buffer and supporting data structures */
4034 h->reply_pool = (__u64 *)pci_alloc_consistent(
4035 h->pdev, h->max_commands * sizeof(__u64),
4036 &(h->reply_pool_dhandle));
4037
4038 /* Need a block fetch table for performant mode */
4039 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4040 sizeof(__u32)), GFP_KERNEL);
4041
4042 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4043 goto clean_up;
4044
4045 cciss_enter_performant_mode(h,
4046 trans_support & CFGTBL_Trans_use_short_tags);
4047
4048 /* Change the access methods to the performant access methods */
4049 h->access = SA5_performant_access;
4050 h->transMethod = CFGTBL_Trans_Performant;
4051
4052 return;
4053 clean_up:
4054 kfree(h->blockFetchTable);
4055 if (h->reply_pool)
4056 pci_free_consistent(h->pdev,
4057 h->max_commands * sizeof(__u64),
4058 h->reply_pool,
4059 h->reply_pool_dhandle);
4060 return;
4061
4062 } /* cciss_put_controller_into_performant_mode */
4063
4064 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4065 * controllers that are capable. If not, we use IO-APIC mode.
4066 */
4067
4068 static void cciss_interrupt_mode(ctlr_info_t *h)
4069 {
4070 #ifdef CONFIG_PCI_MSI
4071 int err;
4072 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4073 {0, 2}, {0, 3}
4074 };
4075
4076 /* Some boards advertise MSI but don't really support it */
4077 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4078 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4079 goto default_int_mode;
4080
4081 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4082 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
4083 if (!err) {
4084 h->intr[0] = cciss_msix_entries[0].vector;
4085 h->intr[1] = cciss_msix_entries[1].vector;
4086 h->intr[2] = cciss_msix_entries[2].vector;
4087 h->intr[3] = cciss_msix_entries[3].vector;
4088 h->msix_vector = 1;
4089 return;
4090 }
4091 if (err > 0) {
4092 dev_warn(&h->pdev->dev,
4093 "only %d MSI-X vectors available\n", err);
4094 goto default_int_mode;
4095 } else {
4096 dev_warn(&h->pdev->dev,
4097 "MSI-X init failed %d\n", err);
4098 goto default_int_mode;
4099 }
4100 }
4101 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4102 if (!pci_enable_msi(h->pdev))
4103 h->msi_vector = 1;
4104 else
4105 dev_warn(&h->pdev->dev, "MSI init failed\n");
4106 }
4107 default_int_mode:
4108 #endif /* CONFIG_PCI_MSI */
4109 /* if we get here we're going to use the default interrupt mode */
4110 h->intr[h->intr_mode] = h->pdev->irq;
4111 return;
4112 }
4113
4114 static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4115 {
4116 int i;
4117 u32 subsystem_vendor_id, subsystem_device_id;
4118
4119 subsystem_vendor_id = pdev->subsystem_vendor;
4120 subsystem_device_id = pdev->subsystem_device;
4121 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4122 subsystem_vendor_id;
4123
4124 for (i = 0; i < ARRAY_SIZE(products); i++) {
4125 /* Stand aside for hpsa driver on request */
4126 if (cciss_allow_hpsa)
4127 return -ENODEV;
4128 if (*board_id == products[i].board_id)
4129 return i;
4130 }
4131 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4132 *board_id);
4133 return -ENODEV;
4134 }
4135
4136 static inline bool cciss_board_disabled(ctlr_info_t *h)
4137 {
4138 u16 command;
4139
4140 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4141 return ((command & PCI_COMMAND_MEMORY) == 0);
4142 }
4143
4144 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4145 unsigned long *memory_bar)
4146 {
4147 int i;
4148
4149 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4150 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4151 /* addressing mode bits already removed */
4152 *memory_bar = pci_resource_start(pdev, i);
4153 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4154 *memory_bar);
4155 return 0;
4156 }
4157 dev_warn(&pdev->dev, "no memory BAR found\n");
4158 return -ENODEV;
4159 }
4160
4161 static int cciss_wait_for_board_state(struct pci_dev *pdev,
4162 void __iomem *vaddr, int wait_for_ready)
4163 #define BOARD_READY 1
4164 #define BOARD_NOT_READY 0
4165 {
4166 int i, iterations;
4167 u32 scratchpad;
4168
4169 if (wait_for_ready)
4170 iterations = CCISS_BOARD_READY_ITERATIONS;
4171 else
4172 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4173
4174 for (i = 0; i < iterations; i++) {
4175 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4176 if (wait_for_ready) {
4177 if (scratchpad == CCISS_FIRMWARE_READY)
4178 return 0;
4179 } else {
4180 if (scratchpad != CCISS_FIRMWARE_READY)
4181 return 0;
4182 }
4183 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4184 }
4185 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4186 return -ENODEV;
4187 }
4188
4189 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4190 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4191 u64 *cfg_offset)
4192 {
4193 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4194 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4195 *cfg_base_addr &= (u32) 0x0000ffff;
4196 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4197 if (*cfg_base_addr_index == -1) {
4198 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4199 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4200 return -ENODEV;
4201 }
4202 return 0;
4203 }
4204
4205 static int cciss_find_cfgtables(ctlr_info_t *h)
4206 {
4207 u64 cfg_offset;
4208 u32 cfg_base_addr;
4209 u64 cfg_base_addr_index;
4210 u32 trans_offset;
4211 int rc;
4212
4213 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4214 &cfg_base_addr_index, &cfg_offset);
4215 if (rc)
4216 return rc;
4217 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4218 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4219 if (!h->cfgtable)
4220 return -ENOMEM;
4221 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4222 if (rc)
4223 return rc;
4224 /* Find performant mode table. */
4225 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4226 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4227 cfg_base_addr_index)+cfg_offset+trans_offset,
4228 sizeof(*h->transtable));
4229 if (!h->transtable)
4230 return -ENOMEM;
4231 return 0;
4232 }
4233
4234 static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4235 {
4236 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4237
4238 /* Limit commands in memory limited kdump scenario. */
4239 if (reset_devices && h->max_commands > 32)
4240 h->max_commands = 32;
4241
4242 if (h->max_commands < 16) {
4243 dev_warn(&h->pdev->dev, "Controller reports "
4244 "max supported commands of %d, an obvious lie. "
4245 "Using 16. Ensure that firmware is up to date.\n",
4246 h->max_commands);
4247 h->max_commands = 16;
4248 }
4249 }
4250
4251 /* Interrogate the hardware for some limits:
4252 * max commands, max SG elements without chaining, and with chaining,
4253 * SG chain block size, etc.
4254 */
4255 static void cciss_find_board_params(ctlr_info_t *h)
4256 {
4257 cciss_get_max_perf_mode_cmds(h);
4258 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4259 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4260 /*
4261 * Limit in-command s/g elements to 32 save dma'able memory.
4262 * Howvever spec says if 0, use 31
4263 */
4264 h->max_cmd_sgentries = 31;
4265 if (h->maxsgentries > 512) {
4266 h->max_cmd_sgentries = 32;
4267 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4268 h->maxsgentries--; /* save one for chain pointer */
4269 } else {
4270 h->maxsgentries = 31; /* default to traditional values */
4271 h->chainsize = 0;
4272 }
4273 }
4274
4275 static inline bool CISS_signature_present(ctlr_info_t *h)
4276 {
4277 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4278 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4279 return false;
4280 }
4281 return true;
4282 }
4283
4284 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4285 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4286 {
4287 #ifdef CONFIG_X86
4288 u32 prefetch;
4289
4290 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4291 prefetch |= 0x100;
4292 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4293 #endif
4294 }
4295
4296 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4297 * in a prefetch beyond physical memory.
4298 */
4299 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4300 {
4301 u32 dma_prefetch;
4302 __u32 dma_refetch;
4303
4304 if (h->board_id != 0x3225103C)
4305 return;
4306 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4307 dma_prefetch |= 0x8000;
4308 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4309 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4310 dma_refetch |= 0x1;
4311 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4312 }
4313
4314 static int cciss_pci_init(ctlr_info_t *h)
4315 {
4316 int prod_index, err;
4317
4318 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4319 if (prod_index < 0)
4320 return -ENODEV;
4321 h->product_name = products[prod_index].product_name;
4322 h->access = *(products[prod_index].access);
4323
4324 if (cciss_board_disabled(h)) {
4325 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4326 return -ENODEV;
4327 }
4328
4329 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4330 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4331
4332 err = pci_enable_device(h->pdev);
4333 if (err) {
4334 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4335 return err;
4336 }
4337
4338 err = pci_request_regions(h->pdev, "cciss");
4339 if (err) {
4340 dev_warn(&h->pdev->dev,
4341 "Cannot obtain PCI resources, aborting\n");
4342 return err;
4343 }
4344
4345 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4346 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4347
4348 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4349 * else we use the IO-APIC interrupt assigned to us by system ROM.
4350 */
4351 cciss_interrupt_mode(h);
4352 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4353 if (err)
4354 goto err_out_free_res;
4355 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4356 if (!h->vaddr) {
4357 err = -ENOMEM;
4358 goto err_out_free_res;
4359 }
4360 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4361 if (err)
4362 goto err_out_free_res;
4363 err = cciss_find_cfgtables(h);
4364 if (err)
4365 goto err_out_free_res;
4366 print_cfg_table(h);
4367 cciss_find_board_params(h);
4368
4369 if (!CISS_signature_present(h)) {
4370 err = -ENODEV;
4371 goto err_out_free_res;
4372 }
4373 cciss_enable_scsi_prefetch(h);
4374 cciss_p600_dma_prefetch_quirk(h);
4375 err = cciss_enter_simple_mode(h);
4376 if (err)
4377 goto err_out_free_res;
4378 cciss_put_controller_into_performant_mode(h);
4379 return 0;
4380
4381 err_out_free_res:
4382 /*
4383 * Deliberately omit pci_disable_device(): it does something nasty to
4384 * Smart Array controllers that pci_enable_device does not undo
4385 */
4386 if (h->transtable)
4387 iounmap(h->transtable);
4388 if (h->cfgtable)
4389 iounmap(h->cfgtable);
4390 if (h->vaddr)
4391 iounmap(h->vaddr);
4392 pci_release_regions(h->pdev);
4393 return err;
4394 }
4395
4396 /* Function to find the first free pointer into our hba[] array
4397 * Returns -1 if no free entries are left.
4398 */
4399 static int alloc_cciss_hba(struct pci_dev *pdev)
4400 {
4401 int i;
4402
4403 for (i = 0; i < MAX_CTLR; i++) {
4404 if (!hba[i]) {
4405 ctlr_info_t *h;
4406
4407 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4408 if (!h)
4409 goto Enomem;
4410 hba[i] = h;
4411 return i;
4412 }
4413 }
4414 dev_warn(&pdev->dev, "This driver supports a maximum"
4415 " of %d controllers.\n", MAX_CTLR);
4416 return -1;
4417 Enomem:
4418 dev_warn(&pdev->dev, "out of memory.\n");
4419 return -1;
4420 }
4421
4422 static void free_hba(ctlr_info_t *h)
4423 {
4424 int i;
4425
4426 hba[h->ctlr] = NULL;
4427 for (i = 0; i < h->highest_lun + 1; i++)
4428 if (h->gendisk[i] != NULL)
4429 put_disk(h->gendisk[i]);
4430 kfree(h);
4431 }
4432
4433 /* Send a message CDB to the firmware. */
4434 static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4435 unsigned char type)
4436 {
4437 typedef struct {
4438 CommandListHeader_struct CommandHeader;
4439 RequestBlock_struct Request;
4440 ErrDescriptor_struct ErrorDescriptor;
4441 } Command;
4442 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4443 Command *cmd;
4444 dma_addr_t paddr64;
4445 uint32_t paddr32, tag;
4446 void __iomem *vaddr;
4447 int i, err;
4448
4449 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4450 if (vaddr == NULL)
4451 return -ENOMEM;
4452
4453 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4454 CCISS commands, so they must be allocated from the lower 4GiB of
4455 memory. */
4456 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4457 if (err) {
4458 iounmap(vaddr);
4459 return -ENOMEM;
4460 }
4461
4462 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4463 if (cmd == NULL) {
4464 iounmap(vaddr);
4465 return -ENOMEM;
4466 }
4467
4468 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4469 although there's no guarantee, we assume that the address is at
4470 least 4-byte aligned (most likely, it's page-aligned). */
4471 paddr32 = paddr64;
4472
4473 cmd->CommandHeader.ReplyQueue = 0;
4474 cmd->CommandHeader.SGList = 0;
4475 cmd->CommandHeader.SGTotal = 0;
4476 cmd->CommandHeader.Tag.lower = paddr32;
4477 cmd->CommandHeader.Tag.upper = 0;
4478 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4479
4480 cmd->Request.CDBLen = 16;
4481 cmd->Request.Type.Type = TYPE_MSG;
4482 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4483 cmd->Request.Type.Direction = XFER_NONE;
4484 cmd->Request.Timeout = 0; /* Don't time out */
4485 cmd->Request.CDB[0] = opcode;
4486 cmd->Request.CDB[1] = type;
4487 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4488
4489 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4490 cmd->ErrorDescriptor.Addr.upper = 0;
4491 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4492
4493 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4494
4495 for (i = 0; i < 10; i++) {
4496 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4497 if ((tag & ~3) == paddr32)
4498 break;
4499 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4500 }
4501
4502 iounmap(vaddr);
4503
4504 /* we leak the DMA buffer here ... no choice since the controller could
4505 still complete the command. */
4506 if (i == 10) {
4507 dev_err(&pdev->dev,
4508 "controller message %02x:%02x timed out\n",
4509 opcode, type);
4510 return -ETIMEDOUT;
4511 }
4512
4513 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4514
4515 if (tag & 2) {
4516 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4517 opcode, type);
4518 return -EIO;
4519 }
4520
4521 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4522 opcode, type);
4523 return 0;
4524 }
4525
4526 #define cciss_noop(p) cciss_message(p, 3, 0)
4527
4528 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4529 void * __iomem vaddr, u32 use_doorbell)
4530 {
4531 u16 pmcsr;
4532 int pos;
4533
4534 if (use_doorbell) {
4535 /* For everything after the P600, the PCI power state method
4536 * of resetting the controller doesn't work, so we have this
4537 * other way using the doorbell register.
4538 */
4539 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4540 writel(use_doorbell, vaddr + SA5_DOORBELL);
4541 } else { /* Try to do it the PCI power state way */
4542
4543 /* Quoting from the Open CISS Specification: "The Power
4544 * Management Control/Status Register (CSR) controls the power
4545 * state of the device. The normal operating state is D0,
4546 * CSR=00h. The software off state is D3, CSR=03h. To reset
4547 * the controller, place the interface device in D3 then to D0,
4548 * this causes a secondary PCI reset which will reset the
4549 * controller." */
4550
4551 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4552 if (pos == 0) {
4553 dev_err(&pdev->dev,
4554 "cciss_controller_hard_reset: "
4555 "PCI PM not supported\n");
4556 return -ENODEV;
4557 }
4558 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4559 /* enter the D3hot power management state */
4560 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4561 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4562 pmcsr |= PCI_D3hot;
4563 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4564
4565 msleep(500);
4566
4567 /* enter the D0 power management state */
4568 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4569 pmcsr |= PCI_D0;
4570 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4571
4572 /*
4573 * The P600 requires a small delay when changing states.
4574 * Otherwise we may think the board did not reset and we bail.
4575 * This for kdump only and is particular to the P600.
4576 */
4577 msleep(500);
4578 }
4579 return 0;
4580 }
4581
4582 static void init_driver_version(char *driver_version, int len)
4583 {
4584 memset(driver_version, 0, len);
4585 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4586 }
4587
4588 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
4589 {
4590 char *driver_version;
4591 int i, size = sizeof(cfgtable->driver_version);
4592
4593 driver_version = kmalloc(size, GFP_KERNEL);
4594 if (!driver_version)
4595 return -ENOMEM;
4596
4597 init_driver_version(driver_version, size);
4598 for (i = 0; i < size; i++)
4599 writeb(driver_version[i], &cfgtable->driver_version[i]);
4600 kfree(driver_version);
4601 return 0;
4602 }
4603
4604 static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4605 unsigned char *driver_ver)
4606 {
4607 int i;
4608
4609 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4610 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4611 }
4612
4613 static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
4614 {
4615
4616 char *driver_ver, *old_driver_ver;
4617 int rc, size = sizeof(cfgtable->driver_version);
4618
4619 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4620 if (!old_driver_ver)
4621 return -ENOMEM;
4622 driver_ver = old_driver_ver + size;
4623
4624 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4625 * should have been changed, otherwise we know the reset failed.
4626 */
4627 init_driver_version(old_driver_ver, size);
4628 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4629 rc = !memcmp(driver_ver, old_driver_ver, size);
4630 kfree(old_driver_ver);
4631 return rc;
4632 }
4633
4634 /* This does a hard reset of the controller using PCI power management
4635 * states or using the doorbell register. */
4636 static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4637 {
4638 u64 cfg_offset;
4639 u32 cfg_base_addr;
4640 u64 cfg_base_addr_index;
4641 void __iomem *vaddr;
4642 unsigned long paddr;
4643 u32 misc_fw_support;
4644 int rc;
4645 CfgTable_struct __iomem *cfgtable;
4646 u32 use_doorbell;
4647 u32 board_id;
4648 u16 command_register;
4649
4650 /* For controllers as old a the p600, this is very nearly
4651 * the same thing as
4652 *
4653 * pci_save_state(pci_dev);
4654 * pci_set_power_state(pci_dev, PCI_D3hot);
4655 * pci_set_power_state(pci_dev, PCI_D0);
4656 * pci_restore_state(pci_dev);
4657 *
4658 * For controllers newer than the P600, the pci power state
4659 * method of resetting doesn't work so we have another way
4660 * using the doorbell register.
4661 */
4662
4663 /* Exclude 640x boards. These are two pci devices in one slot
4664 * which share a battery backed cache module. One controls the
4665 * cache, the other accesses the cache through the one that controls
4666 * it. If we reset the one controlling the cache, the other will
4667 * likely not be happy. Just forbid resetting this conjoined mess.
4668 */
4669 cciss_lookup_board_id(pdev, &board_id);
4670 if (!ctlr_is_resettable(board_id)) {
4671 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4672 "due to shared cache module.");
4673 return -ENODEV;
4674 }
4675
4676 /* if controller is soft- but not hard resettable... */
4677 if (!ctlr_is_hard_resettable(board_id))
4678 return -ENOTSUPP; /* try soft reset later. */
4679
4680 /* Save the PCI command register */
4681 pci_read_config_word(pdev, 4, &command_register);
4682 /* Turn the board off. This is so that later pci_restore_state()
4683 * won't turn the board on before the rest of config space is ready.
4684 */
4685 pci_disable_device(pdev);
4686 pci_save_state(pdev);
4687
4688 /* find the first memory BAR, so we can find the cfg table */
4689 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4690 if (rc)
4691 return rc;
4692 vaddr = remap_pci_mem(paddr, 0x250);
4693 if (!vaddr)
4694 return -ENOMEM;
4695
4696 /* find cfgtable in order to check if reset via doorbell is supported */
4697 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4698 &cfg_base_addr_index, &cfg_offset);
4699 if (rc)
4700 goto unmap_vaddr;
4701 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4702 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4703 if (!cfgtable) {
4704 rc = -ENOMEM;
4705 goto unmap_vaddr;
4706 }
4707 rc = write_driver_ver_to_cfgtable(cfgtable);
4708 if (rc)
4709 goto unmap_vaddr;
4710
4711 /* If reset via doorbell register is supported, use that.
4712 * There are two such methods. Favor the newest method.
4713 */
4714 misc_fw_support = readl(&cfgtable->misc_fw_support);
4715 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4716 if (use_doorbell) {
4717 use_doorbell = DOORBELL_CTLR_RESET2;
4718 } else {
4719 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4720 if (use_doorbell) {
4721 dev_warn(&pdev->dev, "Controller claims that "
4722 "'Bit 2 doorbell reset' is "
4723 "supported, but not 'bit 5 doorbell reset'. "
4724 "Firmware update is recommended.\n");
4725 rc = -ENOTSUPP; /* use the soft reset */
4726 goto unmap_cfgtable;
4727 }
4728 }
4729
4730 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4731 if (rc)
4732 goto unmap_cfgtable;
4733 pci_restore_state(pdev);
4734 rc = pci_enable_device(pdev);
4735 if (rc) {
4736 dev_warn(&pdev->dev, "failed to enable device.\n");
4737 goto unmap_cfgtable;
4738 }
4739 pci_write_config_word(pdev, 4, command_register);
4740
4741 /* Some devices (notably the HP Smart Array 5i Controller)
4742 need a little pause here */
4743 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4744
4745 /* Wait for board to become not ready, then ready. */
4746 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4747 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4748 if (rc) {
4749 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4750 " Will try soft reset.\n");
4751 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4752 goto unmap_cfgtable;
4753 }
4754 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4755 if (rc) {
4756 dev_warn(&pdev->dev,
4757 "failed waiting for board to become ready "
4758 "after hard reset\n");
4759 goto unmap_cfgtable;
4760 }
4761
4762 rc = controller_reset_failed(vaddr);
4763 if (rc < 0)
4764 goto unmap_cfgtable;
4765 if (rc) {
4766 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4767 "controller. Will try soft reset.\n");
4768 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4769 } else {
4770 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4771 }
4772
4773 unmap_cfgtable:
4774 iounmap(cfgtable);
4775
4776 unmap_vaddr:
4777 iounmap(vaddr);
4778 return rc;
4779 }
4780
4781 static int cciss_init_reset_devices(struct pci_dev *pdev)
4782 {
4783 int rc, i;
4784
4785 if (!reset_devices)
4786 return 0;
4787
4788 /* Reset the controller with a PCI power-cycle or via doorbell */
4789 rc = cciss_kdump_hard_reset_controller(pdev);
4790
4791 /* -ENOTSUPP here means we cannot reset the controller
4792 * but it's already (and still) up and running in
4793 * "performant mode". Or, it might be 640x, which can't reset
4794 * due to concerns about shared bbwc between 6402/6404 pair.
4795 */
4796 if (rc == -ENOTSUPP)
4797 return rc; /* just try to do the kdump anyhow. */
4798 if (rc)
4799 return -ENODEV;
4800
4801 /* Now try to get the controller to respond to a no-op */
4802 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4803 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4804 if (cciss_noop(pdev) == 0)
4805 break;
4806 else
4807 dev_warn(&pdev->dev, "no-op failed%s\n",
4808 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4809 "; re-trying" : ""));
4810 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4811 }
4812 return 0;
4813 }
4814
4815 static int cciss_allocate_cmd_pool(ctlr_info_t *h)
4816 {
4817 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4818 sizeof(unsigned long), GFP_KERNEL);
4819 h->cmd_pool = pci_alloc_consistent(h->pdev,
4820 h->nr_cmds * sizeof(CommandList_struct),
4821 &(h->cmd_pool_dhandle));
4822 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4823 h->nr_cmds * sizeof(ErrorInfo_struct),
4824 &(h->errinfo_pool_dhandle));
4825 if ((h->cmd_pool_bits == NULL)
4826 || (h->cmd_pool == NULL)
4827 || (h->errinfo_pool == NULL)) {
4828 dev_err(&h->pdev->dev, "out of memory");
4829 return -ENOMEM;
4830 }
4831 return 0;
4832 }
4833
4834 static int cciss_allocate_scatterlists(ctlr_info_t *h)
4835 {
4836 int i;
4837
4838 /* zero it, so that on free we need not know how many were alloc'ed */
4839 h->scatter_list = kzalloc(h->max_commands *
4840 sizeof(struct scatterlist *), GFP_KERNEL);
4841 if (!h->scatter_list)
4842 return -ENOMEM;
4843
4844 for (i = 0; i < h->nr_cmds; i++) {
4845 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4846 h->maxsgentries, GFP_KERNEL);
4847 if (h->scatter_list[i] == NULL) {
4848 dev_err(&h->pdev->dev, "could not allocate "
4849 "s/g lists\n");
4850 return -ENOMEM;
4851 }
4852 }
4853 return 0;
4854 }
4855
4856 static void cciss_free_scatterlists(ctlr_info_t *h)
4857 {
4858 int i;
4859
4860 if (h->scatter_list) {
4861 for (i = 0; i < h->nr_cmds; i++)
4862 kfree(h->scatter_list[i]);
4863 kfree(h->scatter_list);
4864 }
4865 }
4866
4867 static void cciss_free_cmd_pool(ctlr_info_t *h)
4868 {
4869 kfree(h->cmd_pool_bits);
4870 if (h->cmd_pool)
4871 pci_free_consistent(h->pdev,
4872 h->nr_cmds * sizeof(CommandList_struct),
4873 h->cmd_pool, h->cmd_pool_dhandle);
4874 if (h->errinfo_pool)
4875 pci_free_consistent(h->pdev,
4876 h->nr_cmds * sizeof(ErrorInfo_struct),
4877 h->errinfo_pool, h->errinfo_pool_dhandle);
4878 }
4879
4880 static int cciss_request_irq(ctlr_info_t *h,
4881 irqreturn_t (*msixhandler)(int, void *),
4882 irqreturn_t (*intxhandler)(int, void *))
4883 {
4884 if (h->msix_vector || h->msi_vector) {
4885 if (!request_irq(h->intr[h->intr_mode], msixhandler,
4886 0, h->devname, h))
4887 return 0;
4888 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4889 " for %s\n", h->intr[h->intr_mode],
4890 h->devname);
4891 return -1;
4892 }
4893
4894 if (!request_irq(h->intr[h->intr_mode], intxhandler,
4895 IRQF_SHARED, h->devname, h))
4896 return 0;
4897 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4898 h->intr[h->intr_mode], h->devname);
4899 return -1;
4900 }
4901
4902 static int cciss_kdump_soft_reset(ctlr_info_t *h)
4903 {
4904 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4905 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4906 return -EIO;
4907 }
4908
4909 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4910 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4911 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4912 return -1;
4913 }
4914
4915 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4916 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4917 dev_warn(&h->pdev->dev, "Board failed to become ready "
4918 "after soft reset.\n");
4919 return -1;
4920 }
4921
4922 return 0;
4923 }
4924
4925 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4926 {
4927 int ctlr = h->ctlr;
4928
4929 free_irq(h->intr[h->intr_mode], h);
4930 #ifdef CONFIG_PCI_MSI
4931 if (h->msix_vector)
4932 pci_disable_msix(h->pdev);
4933 else if (h->msi_vector)
4934 pci_disable_msi(h->pdev);
4935 #endif /* CONFIG_PCI_MSI */
4936 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4937 cciss_free_scatterlists(h);
4938 cciss_free_cmd_pool(h);
4939 kfree(h->blockFetchTable);
4940 if (h->reply_pool)
4941 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4942 h->reply_pool, h->reply_pool_dhandle);
4943 if (h->transtable)
4944 iounmap(h->transtable);
4945 if (h->cfgtable)
4946 iounmap(h->cfgtable);
4947 if (h->vaddr)
4948 iounmap(h->vaddr);
4949 unregister_blkdev(h->major, h->devname);
4950 cciss_destroy_hba_sysfs_entry(h);
4951 pci_release_regions(h->pdev);
4952 kfree(h);
4953 hba[ctlr] = NULL;
4954 }
4955
4956 /*
4957 * This is it. Find all the controllers and register them. I really hate
4958 * stealing all these major device numbers.
4959 * returns the number of block devices registered.
4960 */
4961 static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4962 {
4963 int i;
4964 int j = 0;
4965 int rc;
4966 int try_soft_reset = 0;
4967 int dac, return_code;
4968 InquiryData_struct *inq_buff;
4969 ctlr_info_t *h;
4970 unsigned long flags;
4971
4972 /*
4973 * By default the cciss driver is used for all older HP Smart Array
4974 * controllers. There are module paramaters that allow a user to
4975 * override this behavior and instead use the hpsa SCSI driver. If
4976 * this is the case cciss may be loaded first from the kdump initrd
4977 * image and cause a kernel panic. So if reset_devices is true and
4978 * cciss_allow_hpsa is set just bail.
4979 */
4980 if ((reset_devices) && (cciss_allow_hpsa == 1))
4981 return -ENODEV;
4982 rc = cciss_init_reset_devices(pdev);
4983 if (rc) {
4984 if (rc != -ENOTSUPP)
4985 return rc;
4986 /* If the reset fails in a particular way (it has no way to do
4987 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4988 * a soft reset once we get the controller configured up to the
4989 * point that it can accept a command.
4990 */
4991 try_soft_reset = 1;
4992 rc = 0;
4993 }
4994
4995 reinit_after_soft_reset:
4996
4997 i = alloc_cciss_hba(pdev);
4998 if (i < 0)
4999 return -1;
5000
5001 h = hba[i];
5002 h->pdev = pdev;
5003 h->busy_initializing = 1;
5004 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
5005 INIT_LIST_HEAD(&h->cmpQ);
5006 INIT_LIST_HEAD(&h->reqQ);
5007 mutex_init(&h->busy_shutting_down);
5008
5009 if (cciss_pci_init(h) != 0)
5010 goto clean_no_release_regions;
5011
5012 sprintf(h->devname, "cciss%d", i);
5013 h->ctlr = i;
5014
5015 if (cciss_tape_cmds < 2)
5016 cciss_tape_cmds = 2;
5017 if (cciss_tape_cmds > 16)
5018 cciss_tape_cmds = 16;
5019
5020 init_completion(&h->scan_wait);
5021
5022 if (cciss_create_hba_sysfs_entry(h))
5023 goto clean0;
5024
5025 /* configure PCI DMA stuff */
5026 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5027 dac = 1;
5028 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5029 dac = 0;
5030 else {
5031 dev_err(&h->pdev->dev, "no suitable DMA available\n");
5032 goto clean1;
5033 }
5034
5035 /*
5036 * register with the major number, or get a dynamic major number
5037 * by passing 0 as argument. This is done for greater than
5038 * 8 controller support.
5039 */
5040 if (i < MAX_CTLR_ORIG)
5041 h->major = COMPAQ_CISS_MAJOR + i;
5042 rc = register_blkdev(h->major, h->devname);
5043 if (rc == -EBUSY || rc == -EINVAL) {
5044 dev_err(&h->pdev->dev,
5045 "Unable to get major number %d for %s "
5046 "on hba %d\n", h->major, h->devname, i);
5047 goto clean1;
5048 } else {
5049 if (i >= MAX_CTLR_ORIG)
5050 h->major = rc;
5051 }
5052
5053 /* make sure the board interrupts are off */
5054 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5055 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5056 if (rc)
5057 goto clean2;
5058
5059 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5060 h->devname, pdev->device, pci_name(pdev),
5061 h->intr[h->intr_mode], dac ? "" : " not");
5062
5063 if (cciss_allocate_cmd_pool(h))
5064 goto clean4;
5065
5066 if (cciss_allocate_scatterlists(h))
5067 goto clean4;
5068
5069 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5070 h->chainsize, h->nr_cmds);
5071 if (!h->cmd_sg_list && h->chainsize > 0)
5072 goto clean4;
5073
5074 spin_lock_init(&h->lock);
5075
5076 /* Initialize the pdev driver private data.
5077 have it point to h. */
5078 pci_set_drvdata(pdev, h);
5079 /* command and error info recs zeroed out before
5080 they are used */
5081 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5082
5083 h->num_luns = 0;
5084 h->highest_lun = -1;
5085 for (j = 0; j < CISS_MAX_LUN; j++) {
5086 h->drv[j] = NULL;
5087 h->gendisk[j] = NULL;
5088 }
5089
5090 /* At this point, the controller is ready to take commands.
5091 * Now, if reset_devices and the hard reset didn't work, try
5092 * the soft reset and see if that works.
5093 */
5094 if (try_soft_reset) {
5095
5096 /* This is kind of gross. We may or may not get a completion
5097 * from the soft reset command, and if we do, then the value
5098 * from the fifo may or may not be valid. So, we wait 10 secs
5099 * after the reset throwing away any completions we get during
5100 * that time. Unregister the interrupt handler and register
5101 * fake ones to scoop up any residual completions.
5102 */
5103 spin_lock_irqsave(&h->lock, flags);
5104 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5105 spin_unlock_irqrestore(&h->lock, flags);
5106 free_irq(h->intr[h->intr_mode], h);
5107 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5108 cciss_intx_discard_completions);
5109 if (rc) {
5110 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5111 "soft reset.\n");
5112 goto clean4;
5113 }
5114
5115 rc = cciss_kdump_soft_reset(h);
5116 if (rc) {
5117 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5118 goto clean4;
5119 }
5120
5121 dev_info(&h->pdev->dev, "Board READY.\n");
5122 dev_info(&h->pdev->dev,
5123 "Waiting for stale completions to drain.\n");
5124 h->access.set_intr_mask(h, CCISS_INTR_ON);
5125 msleep(10000);
5126 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5127
5128 rc = controller_reset_failed(h->cfgtable);
5129 if (rc)
5130 dev_info(&h->pdev->dev,
5131 "Soft reset appears to have failed.\n");
5132
5133 /* since the controller's reset, we have to go back and re-init
5134 * everything. Easiest to just forget what we've done and do it
5135 * all over again.
5136 */
5137 cciss_undo_allocations_after_kdump_soft_reset(h);
5138 try_soft_reset = 0;
5139 if (rc)
5140 /* don't go to clean4, we already unallocated */
5141 return -ENODEV;
5142
5143 goto reinit_after_soft_reset;
5144 }
5145
5146 cciss_scsi_setup(h);
5147
5148 /* Turn the interrupts on so we can service requests */
5149 h->access.set_intr_mask(h, CCISS_INTR_ON);
5150
5151 /* Get the firmware version */
5152 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5153 if (inq_buff == NULL) {
5154 dev_err(&h->pdev->dev, "out of memory\n");
5155 goto clean4;
5156 }
5157
5158 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5159 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5160 if (return_code == IO_OK) {
5161 h->firm_ver[0] = inq_buff->data_byte[32];
5162 h->firm_ver[1] = inq_buff->data_byte[33];
5163 h->firm_ver[2] = inq_buff->data_byte[34];
5164 h->firm_ver[3] = inq_buff->data_byte[35];
5165 } else { /* send command failed */
5166 dev_warn(&h->pdev->dev, "unable to determine firmware"
5167 " version of controller\n");
5168 }
5169 kfree(inq_buff);
5170
5171 cciss_procinit(h);
5172
5173 h->cciss_max_sectors = 8192;
5174
5175 rebuild_lun_table(h, 1, 0);
5176 cciss_engage_scsi(h);
5177 h->busy_initializing = 0;
5178 return 1;
5179
5180 clean4:
5181 cciss_free_cmd_pool(h);
5182 cciss_free_scatterlists(h);
5183 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5184 free_irq(h->intr[h->intr_mode], h);
5185 clean2:
5186 unregister_blkdev(h->major, h->devname);
5187 clean1:
5188 cciss_destroy_hba_sysfs_entry(h);
5189 clean0:
5190 pci_release_regions(pdev);
5191 clean_no_release_regions:
5192 h->busy_initializing = 0;
5193
5194 /*
5195 * Deliberately omit pci_disable_device(): it does something nasty to
5196 * Smart Array controllers that pci_enable_device does not undo
5197 */
5198 pci_set_drvdata(pdev, NULL);
5199 free_hba(h);
5200 return -1;
5201 }
5202
5203 static void cciss_shutdown(struct pci_dev *pdev)
5204 {
5205 ctlr_info_t *h;
5206 char *flush_buf;
5207 int return_code;
5208
5209 h = pci_get_drvdata(pdev);
5210 flush_buf = kzalloc(4, GFP_KERNEL);
5211 if (!flush_buf) {
5212 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5213 return;
5214 }
5215 /* write all data in the battery backed cache to disk */
5216 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5217 4, 0, CTLR_LUNID, TYPE_CMD);
5218 kfree(flush_buf);
5219 if (return_code != IO_OK)
5220 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5221 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5222 free_irq(h->intr[h->intr_mode], h);
5223 }
5224
5225 static int cciss_enter_simple_mode(struct ctlr_info *h)
5226 {
5227 u32 trans_support;
5228
5229 trans_support = readl(&(h->cfgtable->TransportSupport));
5230 if (!(trans_support & SIMPLE_MODE))
5231 return -ENOTSUPP;
5232
5233 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5234 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5235 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5236 cciss_wait_for_mode_change_ack(h);
5237 print_cfg_table(h);
5238 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5239 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5240 return -ENODEV;
5241 }
5242 h->transMethod = CFGTBL_Trans_Simple;
5243 return 0;
5244 }
5245
5246
5247 static void cciss_remove_one(struct pci_dev *pdev)
5248 {
5249 ctlr_info_t *h;
5250 int i, j;
5251
5252 if (pci_get_drvdata(pdev) == NULL) {
5253 dev_err(&pdev->dev, "Unable to remove device\n");
5254 return;
5255 }
5256
5257 h = pci_get_drvdata(pdev);
5258 i = h->ctlr;
5259 if (hba[i] == NULL) {
5260 dev_err(&pdev->dev, "device appears to already be removed\n");
5261 return;
5262 }
5263
5264 mutex_lock(&h->busy_shutting_down);
5265
5266 remove_from_scan_list(h);
5267 remove_proc_entry(h->devname, proc_cciss);
5268 unregister_blkdev(h->major, h->devname);
5269
5270 /* remove it from the disk list */
5271 for (j = 0; j < CISS_MAX_LUN; j++) {
5272 struct gendisk *disk = h->gendisk[j];
5273 if (disk) {
5274 struct request_queue *q = disk->queue;
5275
5276 if (disk->flags & GENHD_FL_UP) {
5277 cciss_destroy_ld_sysfs_entry(h, j, 1);
5278 del_gendisk(disk);
5279 }
5280 if (q)
5281 blk_cleanup_queue(q);
5282 }
5283 }
5284
5285 #ifdef CONFIG_CISS_SCSI_TAPE
5286 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
5287 #endif
5288
5289 cciss_shutdown(pdev);
5290
5291 #ifdef CONFIG_PCI_MSI
5292 if (h->msix_vector)
5293 pci_disable_msix(h->pdev);
5294 else if (h->msi_vector)
5295 pci_disable_msi(h->pdev);
5296 #endif /* CONFIG_PCI_MSI */
5297
5298 iounmap(h->transtable);
5299 iounmap(h->cfgtable);
5300 iounmap(h->vaddr);
5301
5302 cciss_free_cmd_pool(h);
5303 /* Free up sg elements */
5304 for (j = 0; j < h->nr_cmds; j++)
5305 kfree(h->scatter_list[j]);
5306 kfree(h->scatter_list);
5307 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5308 kfree(h->blockFetchTable);
5309 if (h->reply_pool)
5310 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5311 h->reply_pool, h->reply_pool_dhandle);
5312 /*
5313 * Deliberately omit pci_disable_device(): it does something nasty to
5314 * Smart Array controllers that pci_enable_device does not undo
5315 */
5316 pci_release_regions(pdev);
5317 pci_set_drvdata(pdev, NULL);
5318 cciss_destroy_hba_sysfs_entry(h);
5319 mutex_unlock(&h->busy_shutting_down);
5320 free_hba(h);
5321 }
5322
5323 static struct pci_driver cciss_pci_driver = {
5324 .name = "cciss",
5325 .probe = cciss_init_one,
5326 .remove = cciss_remove_one,
5327 .id_table = cciss_pci_device_id, /* id_table */
5328 .shutdown = cciss_shutdown,
5329 };
5330
5331 /*
5332 * This is it. Register the PCI driver information for the cards we control
5333 * the OS will call our registered routines when it finds one of our cards.
5334 */
5335 static int __init cciss_init(void)
5336 {
5337 int err;
5338
5339 /*
5340 * The hardware requires that commands are aligned on a 64-bit
5341 * boundary. Given that we use pci_alloc_consistent() to allocate an
5342 * array of them, the size must be a multiple of 8 bytes.
5343 */
5344 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5345 printk(KERN_INFO DRIVER_NAME "\n");
5346
5347 err = bus_register(&cciss_bus_type);
5348 if (err)
5349 return err;
5350
5351 /* Start the scan thread */
5352 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5353 if (IS_ERR(cciss_scan_thread)) {
5354 err = PTR_ERR(cciss_scan_thread);
5355 goto err_bus_unregister;
5356 }
5357
5358 /* Register for our PCI devices */
5359 err = pci_register_driver(&cciss_pci_driver);
5360 if (err)
5361 goto err_thread_stop;
5362
5363 return err;
5364
5365 err_thread_stop:
5366 kthread_stop(cciss_scan_thread);
5367 err_bus_unregister:
5368 bus_unregister(&cciss_bus_type);
5369
5370 return err;
5371 }
5372
5373 static void __exit cciss_cleanup(void)
5374 {
5375 int i;
5376
5377 pci_unregister_driver(&cciss_pci_driver);
5378 /* double check that all controller entrys have been removed */
5379 for (i = 0; i < MAX_CTLR; i++) {
5380 if (hba[i] != NULL) {
5381 dev_warn(&hba[i]->pdev->dev,
5382 "had to remove controller\n");
5383 cciss_remove_one(hba[i]->pdev);
5384 }
5385 }
5386 kthread_stop(cciss_scan_thread);
5387 if (proc_cciss)
5388 remove_proc_entry("driver/cciss", NULL);
5389 bus_unregister(&cciss_bus_type);
5390 }
5391
5392 module_init(cciss_init);
5393 module_exit(cciss_cleanup);
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