1 /******************************************************************************
3 * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 ****************************************************************************/
29 #include <linux/module.h>
44 /* macro to shorten lines */
46 #define LINK_Q ui_link_quality
47 #define RX_EVM rx_evm_percentage
48 #define RX_SIGQ rx_mimo_signalquality
51 void rtl92c_read_chip_version(struct ieee80211_hw
*hw
)
53 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
54 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
55 struct rtl_hal
*rtlhal
= rtl_hal(rtlpriv
);
56 enum version_8192c chip_version
= VERSION_UNKNOWN
;
59 value32
= rtl_read_dword(rtlpriv
, REG_SYS_CFG
);
60 if (value32
& TRP_VAUX_EN
) {
61 chip_version
= (value32
& TYPE_ID
) ? VERSION_TEST_CHIP_92C
:
62 VERSION_TEST_CHIP_88C
;
64 /* Normal mass production chip. */
65 chip_version
= NORMAL_CHIP
;
66 chip_version
|= ((value32
& TYPE_ID
) ? CHIP_92C
: 0);
67 chip_version
|= ((value32
& VENDOR_ID
) ? CHIP_VENDOR_UMC
: 0);
68 /* RTL8723 with BT function. */
69 chip_version
|= ((value32
& BT_FUNC
) ? CHIP_8723
: 0);
70 if (IS_VENDOR_UMC(chip_version
))
71 chip_version
|= ((value32
& CHIP_VER_RTL_MASK
) ?
72 CHIP_VENDOR_UMC_B_CUT
: 0);
73 if (IS_92C_SERIAL(chip_version
)) {
74 value32
= rtl_read_dword(rtlpriv
, REG_HPON_FSM
);
75 chip_version
|= ((CHIP_BONDING_IDENTIFIER(value32
) ==
76 CHIP_BONDING_92C_1T2R
) ? CHIP_92C_1T2R
: 0);
77 } else if (IS_8723_SERIES(chip_version
)) {
78 value32
= rtl_read_dword(rtlpriv
, REG_GPIO_OUTSTS
);
79 chip_version
|= ((value32
& RF_RL_ID
) ?
80 CHIP_8723_DRV_REV
: 0);
83 rtlhal
->version
= (enum version_8192c
)chip_version
;
84 switch (rtlhal
->version
) {
85 case VERSION_NORMAL_TSMC_CHIP_92C_1T2R
:
86 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
87 ("Chip Version ID: VERSION_B_CHIP_92C.\n"));
89 case VERSION_NORMAL_TSMC_CHIP_92C
:
90 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
91 ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"));
93 case VERSION_NORMAL_TSMC_CHIP_88C
:
94 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
95 ("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"));
97 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT
:
98 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
99 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_i"
100 "92C_1T2R_A_CUT.\n"));
102 case VERSION_NORMAL_UMC_CHIP_92C_A_CUT
:
103 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
104 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP_"
107 case VERSION_NORMAL_UMC_CHIP_88C_A_CUT
:
108 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
109 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
112 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT
:
113 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
114 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
115 "_92C_1T2R_B_CUT.\n"));
117 case VERSION_NORMAL_UMC_CHIP_92C_B_CUT
:
118 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
119 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
122 case VERSION_NORMAL_UMC_CHIP_88C_B_CUT
:
123 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
124 ("Chip Version ID: VERSION_NORMAL_UMC_CHIP"
127 case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT
:
128 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
129 ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
130 "_8723_1T1R_A_CUT.\n"));
132 case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT
:
133 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
134 ("Chip Version ID: VERSION_NORMA_UMC_CHIP"
135 "_8723_1T1R_B_CUT.\n"));
137 case VERSION_TEST_CHIP_92C
:
138 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
139 ("Chip Version ID: VERSION_TEST_CHIP_92C.\n"));
141 case VERSION_TEST_CHIP_88C
:
142 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
143 ("Chip Version ID: VERSION_TEST_CHIP_88C.\n"));
146 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_TRACE
,
147 ("Chip Version ID: ???????????????.\n"));
150 if (IS_92C_SERIAL(rtlhal
->version
))
152 (IS_92C_1T2R(rtlhal
->version
)) ? RF_1T2R
: RF_2T2R
;
154 rtlphy
->rf_type
= RF_1T1R
;
155 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
,
156 ("Chip RF Type: %s\n", (rtlphy
->rf_type
== RF_2T2R
) ?
157 "RF_2T2R" : "RF_1T1R"));
158 if (get_rf_type(rtlphy
) == RF_1T1R
)
159 rtlpriv
->dm
.rfpath_rxenable
[0] = true;
161 rtlpriv
->dm
.rfpath_rxenable
[0] =
162 rtlpriv
->dm
.rfpath_rxenable
[1] = true;
163 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_LOUD
, ("VersionID = 0x%4x\n",
168 * writeLLT - LLT table write access
170 * @address: LLT logical address.
171 * @data: LLT data content
173 * Realtek hardware access function.
176 bool rtl92c_llt_write(struct ieee80211_hw
*hw
, u32 address
, u32 data
)
178 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
181 u32 value
= _LLT_INIT_ADDR(address
) |
182 _LLT_INIT_DATA(data
) | _LLT_OP(_LLT_WRITE_ACCESS
);
184 rtl_write_dword(rtlpriv
, REG_LLT_INIT
, value
);
186 value
= rtl_read_dword(rtlpriv
, REG_LLT_INIT
);
187 if (_LLT_NO_ACTIVE
== _LLT_OP_VALUE(value
))
189 if (count
> POLLING_LLT_THRESHOLD
) {
190 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
191 ("Failed to polling write LLT done at"
192 " address %d! _LLT_OP_VALUE(%x)\n",
193 address
, _LLT_OP_VALUE(value
)));
201 * rtl92c_init_LLT_table - Init LLT table
205 * Realtek hardware access function.
208 bool rtl92c_init_llt_table(struct ieee80211_hw
*hw
, u32 boundary
)
213 for (i
= 0; i
< (boundary
- 1); i
++) {
214 rst
= rtl92c_llt_write(hw
, i
, i
+ 1);
216 printk(KERN_ERR
"===> %s #1 fail\n", __func__
);
221 rst
= rtl92c_llt_write(hw
, (boundary
- 1), 0xFF);
223 printk(KERN_ERR
"===> %s #2 fail\n", __func__
);
226 /* Make the other pages as ring buffer
227 * This ring buffer is used as beacon buffer if we config this MAC
228 * as two MAC transfer.
229 * Otherwise used as local loopback buffer.
231 for (i
= boundary
; i
< LLT_LAST_ENTRY_OF_TX_PKT_BUFFER
; i
++) {
232 rst
= rtl92c_llt_write(hw
, i
, (i
+ 1));
234 printk(KERN_ERR
"===> %s #3 fail\n", __func__
);
238 /* Let last entry point to the start entry of ring buffer */
239 rst
= rtl92c_llt_write(hw
, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER
, boundary
);
241 printk(KERN_ERR
"===> %s #4 fail\n", __func__
);
246 void rtl92c_set_key(struct ieee80211_hw
*hw
, u32 key_index
,
247 u8
*p_macaddr
, bool is_group
, u8 enc_algo
,
248 bool is_wepkey
, bool clear_all
)
250 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
251 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
252 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
253 u8
*macaddr
= p_macaddr
;
255 bool is_pairwise
= false;
256 static u8 cam_const_addr
[4][6] = {
257 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
258 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
259 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
260 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
262 static u8 cam_const_broad
[] = {
263 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
271 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_DMESG
, ("clear_all\n"));
272 for (idx
= 0; idx
< clear_number
; idx
++) {
273 rtl_cam_mark_invalid(hw
, cam_offset
+ idx
);
274 rtl_cam_empty_entry(hw
, cam_offset
+ idx
);
276 memset(rtlpriv
->sec
.key_buf
[idx
], 0,
278 rtlpriv
->sec
.key_len
[idx
] = 0;
283 case WEP40_ENCRYPTION
:
284 enc_algo
= CAM_WEP40
;
286 case WEP104_ENCRYPTION
:
287 enc_algo
= CAM_WEP104
;
289 case TKIP_ENCRYPTION
:
292 case AESCCMP_ENCRYPTION
:
296 RT_TRACE(rtlpriv
, COMP_ERR
, DBG_EMERG
,
297 ("iillegal switch case\n"));
301 if (is_wepkey
|| rtlpriv
->sec
.use_defaultkey
) {
302 macaddr
= cam_const_addr
[key_index
];
303 entry_id
= key_index
;
306 macaddr
= cam_const_broad
;
307 entry_id
= key_index
;
309 key_index
= PAIRWISE_KEYIDX
;
310 entry_id
= CAM_PAIRWISE_KEY_POSITION
;
314 if (rtlpriv
->sec
.key_len
[key_index
] == 0) {
315 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_DMESG
,
316 ("delete one entry\n"));
317 rtl_cam_delete_one_entry(hw
, p_macaddr
, entry_id
);
319 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_LOUD
,
320 ("The insert KEY length is %d\n",
321 rtlpriv
->sec
.key_len
[PAIRWISE_KEYIDX
]));
322 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_LOUD
,
323 ("The insert KEY is %x %x\n",
324 rtlpriv
->sec
.key_buf
[0][0],
325 rtlpriv
->sec
.key_buf
[0][1]));
326 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_DMESG
,
327 ("add one entry\n"));
329 RT_PRINT_DATA(rtlpriv
, COMP_SEC
, DBG_LOUD
,
330 "Pairwiase Key content :",
331 rtlpriv
->sec
.pairwise_key
,
333 key_len
[PAIRWISE_KEYIDX
]);
334 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_DMESG
,
335 ("set Pairwiase key\n"));
337 rtl_cam_add_one_entry(hw
, macaddr
, key_index
,
343 RT_TRACE(rtlpriv
, COMP_SEC
, DBG_DMESG
,
344 ("set group key\n"));
345 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
346 rtl_cam_add_one_entry(hw
,
349 CAM_PAIRWISE_KEY_POSITION
,
355 rtl_cam_add_one_entry(hw
, macaddr
, key_index
,
358 rtlpriv
->sec
.key_buf
[entry_id
]);
364 u32
rtl92c_get_txdma_status(struct ieee80211_hw
*hw
)
366 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
368 return rtl_read_dword(rtlpriv
, REG_TXDMA_STATUS
);
371 void rtl92c_enable_interrupt(struct ieee80211_hw
*hw
)
373 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
374 struct rtl_hal
*rtlhal
= rtl_hal(rtl_priv(hw
));
375 struct rtl_pci
*rtlpci
= rtl_pcidev(rtl_pcipriv(hw
));
376 struct rtl_usb
*rtlusb
= rtl_usbdev(rtl_usbpriv(hw
));
378 if (IS_HARDWARE_TYPE_8192CE(rtlhal
)) {
379 rtl_write_dword(rtlpriv
, REG_HIMR
, rtlpci
->irq_mask
[0] &
381 rtl_write_dword(rtlpriv
, REG_HIMRE
, rtlpci
->irq_mask
[1] &
384 rtl_write_dword(rtlpriv
, REG_HIMR
, rtlusb
->irq_mask
[0] &
386 rtl_write_dword(rtlpriv
, REG_HIMRE
, rtlusb
->irq_mask
[1] &
391 void rtl92c_init_interrupt(struct ieee80211_hw
*hw
)
393 rtl92c_enable_interrupt(hw
);
396 void rtl92c_disable_interrupt(struct ieee80211_hw
*hw
)
398 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
400 rtl_write_dword(rtlpriv
, REG_HIMR
, IMR8190_DISABLED
);
401 rtl_write_dword(rtlpriv
, REG_HIMRE
, IMR8190_DISABLED
);
404 void rtl92c_set_qos(struct ieee80211_hw
*hw
, int aci
)
406 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
407 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
410 rtl92c_dm_init_edca_turbo(hw
);
411 u4b_ac_param
= (u32
) mac
->ac
[aci
].aifs
;
413 ((u32
) le16_to_cpu(mac
->ac
[aci
].cw_min
) & 0xF) <<
414 AC_PARAM_ECW_MIN_OFFSET
;
416 ((u32
) le16_to_cpu(mac
->ac
[aci
].cw_max
) & 0xF) <<
417 AC_PARAM_ECW_MAX_OFFSET
;
418 u4b_ac_param
|= (u32
) le16_to_cpu(mac
->ac
[aci
].tx_op
) <<
419 AC_PARAM_TXOP_OFFSET
;
420 RT_TRACE(rtlpriv
, COMP_QOS
, DBG_LOUD
,
421 ("queue:%x, ac_param:%x\n", aci
, u4b_ac_param
));
424 rtl_write_dword(rtlpriv
, REG_EDCA_BK_PARAM
, u4b_ac_param
);
427 rtl_write_dword(rtlpriv
, REG_EDCA_BE_PARAM
, u4b_ac_param
);
430 rtl_write_dword(rtlpriv
, REG_EDCA_VI_PARAM
, u4b_ac_param
);
433 rtl_write_dword(rtlpriv
, REG_EDCA_VO_PARAM
, u4b_ac_param
);
436 RT_ASSERT(false, ("invalid aci: %d !\n", aci
));
441 /*-------------------------------------------------------------------------
443 *-------------------------------------------------------------------------*/
444 void rtl92c_set_mac_addr(struct ieee80211_hw
*hw
, const u8
*addr
)
447 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
449 for (i
= 0 ; i
< ETH_ALEN
; i
++)
450 rtl_write_byte(rtlpriv
, (REG_MACID
+ i
), *(addr
+i
));
452 RT_TRACE(rtlpriv
, COMP_CMD
, DBG_DMESG
, ("MAC Address: %02X-%02X-%02X-"
454 rtl_read_byte(rtlpriv
, REG_MACID
),
455 rtl_read_byte(rtlpriv
, REG_MACID
+1),
456 rtl_read_byte(rtlpriv
, REG_MACID
+2),
457 rtl_read_byte(rtlpriv
, REG_MACID
+3),
458 rtl_read_byte(rtlpriv
, REG_MACID
+4),
459 rtl_read_byte(rtlpriv
, REG_MACID
+5)));
462 void rtl92c_init_driver_info_size(struct ieee80211_hw
*hw
, u8 size
)
464 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
465 rtl_write_byte(rtlpriv
, REG_RX_DRVINFO_SZ
, size
);
468 int rtl92c_set_network_type(struct ieee80211_hw
*hw
, enum nl80211_iftype type
)
471 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
474 case NL80211_IFTYPE_UNSPECIFIED
:
476 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
477 ("Set Network type to NO LINK!\n"));
479 case NL80211_IFTYPE_ADHOC
:
480 value
= NT_LINK_AD_HOC
;
481 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
482 ("Set Network type to Ad Hoc!\n"));
484 case NL80211_IFTYPE_STATION
:
486 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
487 ("Set Network type to STA!\n"));
489 case NL80211_IFTYPE_AP
:
491 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
492 ("Set Network type to AP!\n"));
495 RT_TRACE(rtlpriv
, COMP_INIT
, DBG_DMESG
,
496 ("Network type %d not support!\n", type
));
499 rtl_write_byte(rtlpriv
, (REG_CR
+ 2), value
);
503 void rtl92c_init_network_type(struct ieee80211_hw
*hw
)
505 rtl92c_set_network_type(hw
, NL80211_IFTYPE_UNSPECIFIED
);
508 void rtl92c_init_adaptive_ctrl(struct ieee80211_hw
*hw
)
512 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
514 /* Response Rate Set */
515 value32
= rtl_read_dword(rtlpriv
, REG_RRSR
);
516 value32
&= ~RATE_BITMAP_ALL
;
517 value32
|= RATE_RRSR_CCK_ONLY_1M
;
518 rtl_write_dword(rtlpriv
, REG_RRSR
, value32
);
519 /* SIFS (used in NAV) */
520 value16
= _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
521 rtl_write_word(rtlpriv
, REG_SPEC_SIFS
, value16
);
523 value16
= _LRL(0x30) | _SRL(0x30);
524 rtl_write_dword(rtlpriv
, REG_RL
, value16
);
527 void rtl92c_init_rate_fallback(struct ieee80211_hw
*hw
)
529 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
531 /* Set Data Auto Rate Fallback Retry Count register. */
532 rtl_write_dword(rtlpriv
, REG_DARFRC
, 0x00000000);
533 rtl_write_dword(rtlpriv
, REG_DARFRC
+4, 0x10080404);
534 rtl_write_dword(rtlpriv
, REG_RARFRC
, 0x04030201);
535 rtl_write_dword(rtlpriv
, REG_RARFRC
+4, 0x08070605);
538 static void rtl92c_set_cck_sifs(struct ieee80211_hw
*hw
, u8 trx_sifs
,
541 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
543 rtl_write_byte(rtlpriv
, REG_SIFS_CCK
, trx_sifs
);
544 rtl_write_byte(rtlpriv
, (REG_SIFS_CCK
+ 1), ctx_sifs
);
547 static void rtl92c_set_ofdm_sifs(struct ieee80211_hw
*hw
, u8 trx_sifs
,
550 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
552 rtl_write_byte(rtlpriv
, REG_SIFS_OFDM
, trx_sifs
);
553 rtl_write_byte(rtlpriv
, (REG_SIFS_OFDM
+ 1), ctx_sifs
);
556 void rtl92c_init_edca_param(struct ieee80211_hw
*hw
,
557 u16 queue
, u16 txop
, u8 cw_min
, u8 cw_max
, u8 aifs
)
559 /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
560 * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
563 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
566 value
|= ((u32
)cw_min
& 0xF) << 8;
567 value
|= ((u32
)cw_max
& 0xF) << 12;
568 value
|= (u32
)txop
<< 16;
569 /* 92C hardware register sequence is the same as queue number. */
570 rtl_write_dword(rtlpriv
, (REG_EDCA_VO_PARAM
+ (queue
* 4)), value
);
573 void rtl92c_init_edca(struct ieee80211_hw
*hw
)
576 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
578 /* disable EDCCA count down, to reduce collison and retry */
579 value16
= rtl_read_word(rtlpriv
, REG_RD_CTRL
);
580 value16
|= DIS_EDCA_CNT_DWN
;
581 rtl_write_word(rtlpriv
, REG_RD_CTRL
, value16
);
582 /* Update SIFS timing. ??????????
583 * pHalData->SifsTime = 0x0e0e0a0a; */
584 rtl92c_set_cck_sifs(hw
, 0xa, 0xa);
585 rtl92c_set_ofdm_sifs(hw
, 0xe, 0xe);
586 /* Set CCK/OFDM SIFS to be 10us. */
587 rtl_write_word(rtlpriv
, REG_SIFS_CCK
, 0x0a0a);
588 rtl_write_word(rtlpriv
, REG_SIFS_OFDM
, 0x1010);
589 rtl_write_word(rtlpriv
, REG_PROT_MODE_CTRL
, 0x0204);
590 rtl_write_dword(rtlpriv
, REG_BAR_MODE_CTRL
, 0x014004);
592 rtl_write_dword(rtlpriv
, REG_EDCA_BE_PARAM
, 0x005EA42B);
593 rtl_write_dword(rtlpriv
, REG_EDCA_BK_PARAM
, 0x0000A44F);
594 rtl_write_dword(rtlpriv
, REG_EDCA_VI_PARAM
, 0x005EA324);
595 rtl_write_dword(rtlpriv
, REG_EDCA_VO_PARAM
, 0x002FA226);
597 rtl_write_byte(rtlpriv
, REG_PIFS
, 0x1C);
598 /* AGGR BREAK TIME Register */
599 rtl_write_byte(rtlpriv
, REG_AGGR_BREAK_TIME
, 0x16);
600 rtl_write_word(rtlpriv
, REG_NAV_PROT_LEN
, 0x0040);
601 rtl_write_byte(rtlpriv
, REG_BCNDMATIM
, 0x02);
602 rtl_write_byte(rtlpriv
, REG_ATIMWND
, 0x02);
605 void rtl92c_init_ampdu_aggregation(struct ieee80211_hw
*hw
)
607 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
609 rtl_write_dword(rtlpriv
, REG_AGGLEN_LMT
, 0x99997631);
610 rtl_write_byte(rtlpriv
, REG_AGGR_BREAK_TIME
, 0x16);
611 /* init AMPDU aggregation number, tuning for Tx's TP, */
612 rtl_write_word(rtlpriv
, 0x4CA, 0x0708);
615 void rtl92c_init_beacon_max_error(struct ieee80211_hw
*hw
, bool infra_mode
)
617 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
619 rtl_write_byte(rtlpriv
, REG_BCN_MAX_ERR
, 0xFF);
622 void rtl92c_init_rdg_setting(struct ieee80211_hw
*hw
)
624 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
626 rtl_write_byte(rtlpriv
, REG_RD_CTRL
, 0xFF);
627 rtl_write_word(rtlpriv
, REG_RD_NAV_NXT
, 0x200);
628 rtl_write_byte(rtlpriv
, REG_RD_RESP_PKT_TH
, 0x05);
631 void rtl92c_init_retry_function(struct ieee80211_hw
*hw
)
634 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
636 value8
= rtl_read_byte(rtlpriv
, REG_FWHW_TXQ_CTRL
);
637 value8
|= EN_AMPDU_RTY_NEW
;
638 rtl_write_byte(rtlpriv
, REG_FWHW_TXQ_CTRL
, value8
);
639 /* Set ACK timeout */
640 rtl_write_byte(rtlpriv
, REG_ACKTO
, 0x40);
643 void rtl92c_init_beacon_parameters(struct ieee80211_hw
*hw
,
644 enum version_8192c version
)
646 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
647 struct rtl_hal
*rtlhal
= rtl_hal(rtlpriv
);
649 rtl_write_word(rtlpriv
, REG_TBTT_PROHIBIT
, 0x6404);/* ms */
650 rtl_write_byte(rtlpriv
, REG_DRVERLYINT
, DRIVER_EARLY_INT_TIME
);/*ms*/
651 rtl_write_byte(rtlpriv
, REG_BCNDMATIM
, BCN_DMA_ATIME_INT_TIME
);
652 if (IS_NORMAL_CHIP(rtlhal
->version
))
653 rtl_write_word(rtlpriv
, REG_BCNTCFG
, 0x660F);
655 rtl_write_word(rtlpriv
, REG_BCNTCFG
, 0x66FF);
658 void rtl92c_disable_fast_edca(struct ieee80211_hw
*hw
)
660 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
662 rtl_write_word(rtlpriv
, REG_FAST_EDCA_CTRL
, 0);
665 void rtl92c_set_min_space(struct ieee80211_hw
*hw
, bool is2T
)
667 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
668 u8 value
= is2T
? MAX_MSS_DENSITY_2T
: MAX_MSS_DENSITY_1T
;
670 rtl_write_byte(rtlpriv
, REG_AMPDU_MIN_SPACE
, value
);
673 u16
rtl92c_get_mgt_filter(struct ieee80211_hw
*hw
)
675 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
677 return rtl_read_word(rtlpriv
, REG_RXFLTMAP0
);
680 void rtl92c_set_mgt_filter(struct ieee80211_hw
*hw
, u16 filter
)
682 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
684 rtl_write_word(rtlpriv
, REG_RXFLTMAP0
, filter
);
687 u16
rtl92c_get_ctrl_filter(struct ieee80211_hw
*hw
)
689 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
691 return rtl_read_word(rtlpriv
, REG_RXFLTMAP1
);
694 void rtl92c_set_ctrl_filter(struct ieee80211_hw
*hw
, u16 filter
)
696 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
698 rtl_write_word(rtlpriv
, REG_RXFLTMAP1
, filter
);
701 u16
rtl92c_get_data_filter(struct ieee80211_hw
*hw
)
703 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
705 return rtl_read_word(rtlpriv
, REG_RXFLTMAP2
);
708 void rtl92c_set_data_filter(struct ieee80211_hw
*hw
, u16 filter
)
710 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
712 rtl_write_word(rtlpriv
, REG_RXFLTMAP2
, filter
);
714 /*==============================================================*/
716 static u8
_rtl92c_query_rxpwrpercentage(char antpower
)
718 if ((antpower
<= -100) || (antpower
>= 20))
720 else if (antpower
>= 0)
723 return 100 + antpower
;
726 static u8
_rtl92c_evm_db_to_percentage(char value
)
735 ret_val
= 0 - ret_val
;
742 static long _rtl92c_translate_todbm(struct ieee80211_hw
*hw
,
743 u8 signal_strength_index
)
747 signal_power
= (long)((signal_strength_index
+ 1) >> 1);
752 static long _rtl92c_signal_scale_mapping(struct ieee80211_hw
*hw
,
757 if (currsig
>= 61 && currsig
<= 100)
758 retsig
= 90 + ((currsig
- 60) / 4);
759 else if (currsig
>= 41 && currsig
<= 60)
760 retsig
= 78 + ((currsig
- 40) / 2);
761 else if (currsig
>= 31 && currsig
<= 40)
762 retsig
= 66 + (currsig
- 30);
763 else if (currsig
>= 21 && currsig
<= 30)
764 retsig
= 54 + (currsig
- 20);
765 else if (currsig
>= 5 && currsig
<= 20)
766 retsig
= 42 + (((currsig
- 5) * 2) / 3);
767 else if (currsig
== 4)
769 else if (currsig
== 3)
771 else if (currsig
== 2)
773 else if (currsig
== 1)
780 static void _rtl92c_query_rxphystatus(struct ieee80211_hw
*hw
,
781 struct rtl_stats
*pstats
,
782 struct rx_desc_92c
*pdesc
,
783 struct rx_fwinfo_92c
*p_drvinfo
,
784 bool packet_match_bssid
,
788 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
789 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
790 struct phy_sts_cck_8192s_t
*cck_buf
;
791 s8 rx_pwr_all
= 0, rx_pwr
[4];
792 u8 rf_rx_num
= 0, evm
, pwdb_all
;
793 u8 i
, max_spatial_stream
;
794 u32 rssi
, total_rssi
= 0;
795 bool in_powersavemode
= false;
798 is_cck_rate
= RX_HAL_IS_CCK_RATE(pdesc
);
799 pstats
->packet_matchbssid
= packet_match_bssid
;
800 pstats
->packet_toself
= packet_toself
;
801 pstats
->is_cck
= is_cck_rate
;
802 pstats
->packet_beacon
= packet_beacon
;
803 pstats
->is_cck
= is_cck_rate
;
804 pstats
->RX_SIGQ
[0] = -1;
805 pstats
->RX_SIGQ
[1] = -1;
807 u8 report
, cck_highpwr
;
808 cck_buf
= (struct phy_sts_cck_8192s_t
*)p_drvinfo
;
809 if (!in_powersavemode
)
810 cck_highpwr
= rtlphy
->cck_high_power
;
814 u8 cck_agc_rpt
= cck_buf
->cck_agc_rpt
;
815 report
= cck_buf
->cck_agc_rpt
& 0xc0;
816 report
= report
>> 6;
819 rx_pwr_all
= -46 - (cck_agc_rpt
& 0x3e);
822 rx_pwr_all
= -26 - (cck_agc_rpt
& 0x3e);
825 rx_pwr_all
= -12 - (cck_agc_rpt
& 0x3e);
828 rx_pwr_all
= 16 - (cck_agc_rpt
& 0x3e);
832 u8 cck_agc_rpt
= cck_buf
->cck_agc_rpt
;
833 report
= p_drvinfo
->cfosho
[0] & 0x60;
834 report
= report
>> 5;
837 rx_pwr_all
= -46 - ((cck_agc_rpt
& 0x1f) << 1);
840 rx_pwr_all
= -26 - ((cck_agc_rpt
& 0x1f) << 1);
843 rx_pwr_all
= -12 - ((cck_agc_rpt
& 0x1f) << 1);
846 rx_pwr_all
= 16 - ((cck_agc_rpt
& 0x1f) << 1);
850 pwdb_all
= _rtl92c_query_rxpwrpercentage(rx_pwr_all
);
851 pstats
->rx_pwdb_all
= pwdb_all
;
852 pstats
->recvsignalpower
= rx_pwr_all
;
853 if (packet_match_bssid
) {
855 if (pstats
->rx_pwdb_all
> 40)
858 sq
= cck_buf
->sq_rpt
;
864 sq
= ((64 - sq
) * 100) / 44;
866 pstats
->signalquality
= sq
;
867 pstats
->RX_SIGQ
[0] = sq
;
868 pstats
->RX_SIGQ
[1] = -1;
871 rtlpriv
->dm
.rfpath_rxenable
[0] =
872 rtlpriv
->dm
.rfpath_rxenable
[1] = true;
873 for (i
= RF90_PATH_A
; i
< RF90_PATH_MAX
; i
++) {
874 if (rtlpriv
->dm
.rfpath_rxenable
[i
])
877 ((p_drvinfo
->gain_trsw
[i
] & 0x3f) * 2) - 110;
878 rssi
= _rtl92c_query_rxpwrpercentage(rx_pwr
[i
]);
880 rtlpriv
->stats
.rx_snr_db
[i
] =
881 (long)(p_drvinfo
->rxsnr
[i
] / 2);
883 if (packet_match_bssid
)
884 pstats
->rx_mimo_signalstrength
[i
] = (u8
) rssi
;
886 rx_pwr_all
= ((p_drvinfo
->pwdb_all
>> 1) & 0x7f) - 110;
887 pwdb_all
= _rtl92c_query_rxpwrpercentage(rx_pwr_all
);
888 pstats
->rx_pwdb_all
= pwdb_all
;
889 pstats
->rxpower
= rx_pwr_all
;
890 pstats
->recvsignalpower
= rx_pwr_all
;
891 if (GET_RX_DESC_RX_MCS(pdesc
) &&
892 GET_RX_DESC_RX_MCS(pdesc
) >= DESC92C_RATEMCS8
&&
893 GET_RX_DESC_RX_MCS(pdesc
) <= DESC92C_RATEMCS15
)
894 max_spatial_stream
= 2;
896 max_spatial_stream
= 1;
897 for (i
= 0; i
< max_spatial_stream
; i
++) {
898 evm
= _rtl92c_evm_db_to_percentage(p_drvinfo
->rxevm
[i
]);
899 if (packet_match_bssid
) {
901 pstats
->signalquality
=
909 pstats
->signalstrength
=
910 (u8
) (_rtl92c_signal_scale_mapping(hw
, pwdb_all
));
911 else if (rf_rx_num
!= 0)
912 pstats
->signalstrength
=
913 (u8
) (_rtl92c_signal_scale_mapping
914 (hw
, total_rssi
/= rf_rx_num
));
917 static void _rtl92c_process_ui_rssi(struct ieee80211_hw
*hw
,
918 struct rtl_stats
*pstats
)
920 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
921 struct rtl_phy
*rtlphy
= &(rtlpriv
->phy
);
923 u32 last_rssi
, tmpval
;
925 if (pstats
->packet_toself
|| pstats
->packet_beacon
) {
926 rtlpriv
->stats
.rssi_calculate_cnt
++;
927 if (rtlpriv
->stats
.ui_rssi
.total_num
++ >=
928 PHY_RSSI_SLID_WIN_MAX
) {
929 rtlpriv
->stats
.ui_rssi
.total_num
=
930 PHY_RSSI_SLID_WIN_MAX
;
932 rtlpriv
->stats
.ui_rssi
.elements
[rtlpriv
->
933 stats
.ui_rssi
.index
];
934 rtlpriv
->stats
.ui_rssi
.total_val
-= last_rssi
;
936 rtlpriv
->stats
.ui_rssi
.total_val
+= pstats
->signalstrength
;
937 rtlpriv
->stats
.ui_rssi
.elements
[rtlpriv
->stats
.ui_rssi
.
938 index
++] = pstats
->signalstrength
;
939 if (rtlpriv
->stats
.ui_rssi
.index
>= PHY_RSSI_SLID_WIN_MAX
)
940 rtlpriv
->stats
.ui_rssi
.index
= 0;
941 tmpval
= rtlpriv
->stats
.ui_rssi
.total_val
/
942 rtlpriv
->stats
.ui_rssi
.total_num
;
943 rtlpriv
->stats
.signal_strength
=
944 _rtl92c_translate_todbm(hw
, (u8
) tmpval
);
945 pstats
->rssi
= rtlpriv
->stats
.signal_strength
;
947 if (!pstats
->is_cck
&& pstats
->packet_toself
) {
948 for (rfpath
= RF90_PATH_A
; rfpath
< rtlphy
->num_total_rfpath
;
950 if (!rtl8192_phy_check_is_legal_rfpath(hw
, rfpath
))
952 if (rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] == 0) {
953 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] =
954 pstats
->rx_mimo_signalstrength
[rfpath
];
956 if (pstats
->rx_mimo_signalstrength
[rfpath
] >
957 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
]) {
958 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] =
960 rx_rssi_percentage
[rfpath
] *
961 (RX_SMOOTH_FACTOR
- 1)) +
962 (pstats
->rx_mimo_signalstrength
[rfpath
])) /
965 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] =
966 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] +
969 rtlpriv
->stats
.rx_rssi_percentage
[rfpath
] =
971 rx_rssi_percentage
[rfpath
] *
972 (RX_SMOOTH_FACTOR
- 1)) +
973 (pstats
->rx_mimo_signalstrength
[rfpath
])) /
980 static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw
*hw
,
981 struct rtl_stats
*pstats
)
983 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
986 if (rtlpriv
->stats
.recv_signal_power
== 0)
987 rtlpriv
->stats
.recv_signal_power
= pstats
->recvsignalpower
;
988 if (pstats
->recvsignalpower
> rtlpriv
->stats
.recv_signal_power
)
990 else if (pstats
->recvsignalpower
< rtlpriv
->stats
.recv_signal_power
)
992 rtlpriv
->stats
.recv_signal_power
=
993 (rtlpriv
->stats
.recv_signal_power
* 5 +
994 pstats
->recvsignalpower
+ weighting
) / 6;
997 static void _rtl92c_process_pwdb(struct ieee80211_hw
*hw
,
998 struct rtl_stats
*pstats
)
1000 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1001 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1002 long undecorated_smoothed_pwdb
= 0;
1004 if (mac
->opmode
== NL80211_IFTYPE_ADHOC
) {
1007 undecorated_smoothed_pwdb
=
1008 rtlpriv
->dm
.undecorated_smoothed_pwdb
;
1010 if (pstats
->packet_toself
|| pstats
->packet_beacon
) {
1011 if (undecorated_smoothed_pwdb
< 0)
1012 undecorated_smoothed_pwdb
= pstats
->rx_pwdb_all
;
1013 if (pstats
->rx_pwdb_all
> (u32
) undecorated_smoothed_pwdb
) {
1014 undecorated_smoothed_pwdb
=
1015 (((undecorated_smoothed_pwdb
) *
1016 (RX_SMOOTH_FACTOR
- 1)) +
1017 (pstats
->rx_pwdb_all
)) / (RX_SMOOTH_FACTOR
);
1018 undecorated_smoothed_pwdb
= undecorated_smoothed_pwdb
1021 undecorated_smoothed_pwdb
=
1022 (((undecorated_smoothed_pwdb
) *
1023 (RX_SMOOTH_FACTOR
- 1)) +
1024 (pstats
->rx_pwdb_all
)) / (RX_SMOOTH_FACTOR
);
1026 rtlpriv
->dm
.undecorated_smoothed_pwdb
=
1027 undecorated_smoothed_pwdb
;
1028 _rtl92c_update_rxsignalstatistics(hw
, pstats
);
1032 static void _rtl92c_process_LINK_Q(struct ieee80211_hw
*hw
,
1033 struct rtl_stats
*pstats
)
1035 struct rtl_priv
*rtlpriv
= rtl_priv(hw
);
1036 u32 last_evm
= 0, n_stream
, tmpval
;
1038 if (pstats
->signalquality
!= 0) {
1039 if (pstats
->packet_toself
|| pstats
->packet_beacon
) {
1040 if (rtlpriv
->stats
.LINK_Q
.total_num
++ >=
1041 PHY_LINKQUALITY_SLID_WIN_MAX
) {
1042 rtlpriv
->stats
.LINK_Q
.total_num
=
1043 PHY_LINKQUALITY_SLID_WIN_MAX
;
1045 rtlpriv
->stats
.LINK_Q
.elements
1046 [rtlpriv
->stats
.LINK_Q
.index
];
1047 rtlpriv
->stats
.LINK_Q
.total_val
-=
1050 rtlpriv
->stats
.LINK_Q
.total_val
+=
1051 pstats
->signalquality
;
1052 rtlpriv
->stats
.LINK_Q
.elements
1053 [rtlpriv
->stats
.LINK_Q
.index
++] =
1054 pstats
->signalquality
;
1055 if (rtlpriv
->stats
.LINK_Q
.index
>=
1056 PHY_LINKQUALITY_SLID_WIN_MAX
)
1057 rtlpriv
->stats
.LINK_Q
.index
= 0;
1058 tmpval
= rtlpriv
->stats
.LINK_Q
.total_val
/
1059 rtlpriv
->stats
.LINK_Q
.total_num
;
1060 rtlpriv
->stats
.signal_quality
= tmpval
;
1061 rtlpriv
->stats
.last_sigstrength_inpercent
= tmpval
;
1062 for (n_stream
= 0; n_stream
< 2;
1064 if (pstats
->RX_SIGQ
[n_stream
] != -1) {
1065 if (!rtlpriv
->stats
.RX_EVM
[n_stream
]) {
1066 rtlpriv
->stats
.RX_EVM
[n_stream
]
1067 = pstats
->RX_SIGQ
[n_stream
];
1069 rtlpriv
->stats
.RX_EVM
[n_stream
] =
1070 ((rtlpriv
->stats
.RX_EVM
1072 (RX_SMOOTH_FACTOR
- 1)) +
1084 static void _rtl92c_process_phyinfo(struct ieee80211_hw
*hw
,
1086 struct rtl_stats
*pcurrent_stats
)
1088 if (!pcurrent_stats
->packet_matchbssid
&&
1089 !pcurrent_stats
->packet_beacon
)
1091 _rtl92c_process_ui_rssi(hw
, pcurrent_stats
);
1092 _rtl92c_process_pwdb(hw
, pcurrent_stats
);
1093 _rtl92c_process_LINK_Q(hw
, pcurrent_stats
);
1096 void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw
*hw
,
1097 struct sk_buff
*skb
,
1098 struct rtl_stats
*pstats
,
1099 struct rx_desc_92c
*pdesc
,
1100 struct rx_fwinfo_92c
*p_drvinfo
)
1102 struct rtl_mac
*mac
= rtl_mac(rtl_priv(hw
));
1103 struct rtl_efuse
*rtlefuse
= rtl_efuse(rtl_priv(hw
));
1104 struct ieee80211_hdr
*hdr
;
1109 bool packet_matchbssid
, packet_toself
, packet_beacon
;
1111 tmp_buf
= skb
->data
+ pstats
->rx_drvinfo_size
+ pstats
->rx_bufshift
;
1112 hdr
= (struct ieee80211_hdr
*)tmp_buf
;
1113 fc
= hdr
->frame_control
;
1114 cpu_fc
= le16_to_cpu(fc
);
1115 type
= WLAN_FC_GET_TYPE(fc
);
1116 praddr
= hdr
->addr1
;
1118 ((IEEE80211_FTYPE_CTL
!= type
) &&
1119 (!compare_ether_addr(mac
->bssid
,
1120 (cpu_fc
& IEEE80211_FCTL_TODS
) ?
1121 hdr
->addr1
: (cpu_fc
& IEEE80211_FCTL_FROMDS
) ?
1122 hdr
->addr2
: hdr
->addr3
)) &&
1123 (!pstats
->hwerror
) && (!pstats
->crc
) && (!pstats
->icv
));
1125 packet_toself
= packet_matchbssid
&&
1126 (!compare_ether_addr(praddr
, rtlefuse
->dev_addr
));
1127 if (ieee80211_is_beacon(fc
))
1128 packet_beacon
= true;
1129 _rtl92c_query_rxphystatus(hw
, pstats
, pdesc
, p_drvinfo
,
1130 packet_matchbssid
, packet_toself
,
1132 _rtl92c_process_phyinfo(hw
, tmp_buf
, pstats
);