x86, cpu: Call verify_cpu during 32bit CPU startup
[linux-2.6.git] / arch / arm / mach-mx3 / mx31lilly-db.c
blob827fd3c802012d7135fbca269456dbf12968d5d1
1 /*
2 * LILLY-1131 development board support
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
6 * based on code for other MX31 boards,
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/init.h>
26 #include <linux/gpio.h>
27 #include <linux/platform_device.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
33 #include <mach/hardware.h>
34 #include <mach/common.h>
35 #include <mach/iomux-mx3.h>
36 #include <mach/board-mx31lilly.h>
37 #include <mach/mmc.h>
38 #include <mach/mx3fb.h>
39 #include <mach/ipu.h>
41 #include "devices-imx31.h"
42 #include "devices.h"
45 * This file contains board-specific initialization routines for the
46 * LILLY-1131 development board. If you design an own baseboard for the
47 * module, use this file as base for support code.
50 static unsigned int lilly_db_board_pins[] __initdata = {
51 MX31_PIN_CTS1__CTS1,
52 MX31_PIN_RTS1__RTS1,
53 MX31_PIN_TXD1__TXD1,
54 MX31_PIN_RXD1__RXD1,
55 MX31_PIN_CTS2__CTS2,
56 MX31_PIN_RTS2__RTS2,
57 MX31_PIN_TXD2__TXD2,
58 MX31_PIN_RXD2__RXD2,
59 MX31_PIN_CSPI3_MOSI__RXD3,
60 MX31_PIN_CSPI3_MISO__TXD3,
61 MX31_PIN_CSPI3_SCLK__RTS3,
62 MX31_PIN_CSPI3_SPI_RDY__CTS3,
63 MX31_PIN_SD1_DATA3__SD1_DATA3,
64 MX31_PIN_SD1_DATA2__SD1_DATA2,
65 MX31_PIN_SD1_DATA1__SD1_DATA1,
66 MX31_PIN_SD1_DATA0__SD1_DATA0,
67 MX31_PIN_SD1_CLK__SD1_CLK,
68 MX31_PIN_SD1_CMD__SD1_CMD,
69 MX31_PIN_LD0__LD0,
70 MX31_PIN_LD1__LD1,
71 MX31_PIN_LD2__LD2,
72 MX31_PIN_LD3__LD3,
73 MX31_PIN_LD4__LD4,
74 MX31_PIN_LD5__LD5,
75 MX31_PIN_LD6__LD6,
76 MX31_PIN_LD7__LD7,
77 MX31_PIN_LD8__LD8,
78 MX31_PIN_LD9__LD9,
79 MX31_PIN_LD10__LD10,
80 MX31_PIN_LD11__LD11,
81 MX31_PIN_LD12__LD12,
82 MX31_PIN_LD13__LD13,
83 MX31_PIN_LD14__LD14,
84 MX31_PIN_LD15__LD15,
85 MX31_PIN_LD16__LD16,
86 MX31_PIN_LD17__LD17,
87 MX31_PIN_VSYNC3__VSYNC3,
88 MX31_PIN_HSYNC__HSYNC,
89 MX31_PIN_FPSHIFT__FPSHIFT,
90 MX31_PIN_DRDY0__DRDY0,
91 MX31_PIN_CONTRAST__CONTRAST,
94 /* UART */
95 static const struct imxuart_platform_data uart_pdata __initconst = {
96 .flags = IMXUART_HAVE_RTSCTS,
99 /* MMC support */
101 static int mxc_mmc1_get_ro(struct device *dev)
103 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
106 static int gpio_det, gpio_wp;
108 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
109 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
111 static int mxc_mmc1_init(struct device *dev,
112 irq_handler_t detect_irq, void *data)
114 int ret;
116 gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
117 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
119 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
120 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
121 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
122 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
123 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
124 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
126 ret = gpio_request(gpio_det, "MMC detect");
127 if (ret)
128 return ret;
130 ret = gpio_request(gpio_wp, "MMC w/p");
131 if (ret)
132 goto exit_free_det;
134 gpio_direction_input(gpio_det);
135 gpio_direction_input(gpio_wp);
137 ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), detect_irq,
138 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
139 "MMC detect", data);
140 if (ret)
141 goto exit_free_wp;
143 return 0;
145 exit_free_wp:
146 gpio_free(gpio_wp);
148 exit_free_det:
149 gpio_free(gpio_det);
151 return ret;
154 static void mxc_mmc1_exit(struct device *dev, void *data)
156 gpio_free(gpio_det);
157 gpio_free(gpio_wp);
158 free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO1_1), data);
161 static struct imxmmc_platform_data mmc_pdata = {
162 .get_ro = mxc_mmc1_get_ro,
163 .init = mxc_mmc1_init,
164 .exit = mxc_mmc1_exit,
167 /* Framebuffer support */
168 static struct ipu_platform_data ipu_data __initdata = {
169 .irq_base = MXC_IPU_IRQ_START,
172 static const struct fb_videomode fb_modedb = {
173 /* 640x480 TFT panel (IPS-056T) */
174 .name = "CRT-VGA",
175 .refresh = 64,
176 .xres = 640,
177 .yres = 480,
178 .pixclock = 30000,
179 .left_margin = 200,
180 .right_margin = 2,
181 .upper_margin = 2,
182 .lower_margin = 2,
183 .hsync_len = 3,
184 .vsync_len = 1,
185 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
186 .vmode = FB_VMODE_NONINTERLACED,
187 .flag = 0,
190 static struct mx3fb_platform_data fb_pdata __initdata = {
191 .dma_dev = &mx3_ipu.dev,
192 .name = "CRT-VGA",
193 .mode = &fb_modedb,
194 .num_modes = 1,
197 #define LCD_VCC_EN_GPIO (7)
199 static void __init mx31lilly_init_fb(void)
201 if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
202 printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
203 return;
206 mxc_register_device(&mx3_ipu, &ipu_data);
207 mxc_register_device(&mx3_fb, &fb_pdata);
208 gpio_direction_output(LCD_VCC_EN_GPIO, 1);
211 void __init mx31lilly_db_init(void)
213 mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
214 ARRAY_SIZE(lilly_db_board_pins),
215 "development board pins");
216 imx31_add_imx_uart0(&uart_pdata);
217 imx31_add_imx_uart1(&uart_pdata);
218 imx31_add_imx_uart2(&uart_pdata);
219 mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
220 mx31lilly_init_fb();