2 * arch/arch/mach-ixp4xx/vulcan-pci.c
4 * Vulcan board-level PCI initialization
6 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
8 * based on ixdp425-pci.c:
9 * Copyright (C) 2002 Intel Corporation.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
18 #include <linux/pci.h>
19 #include <linux/init.h>
20 #include <linux/irq.h>
21 #include <asm/mach/pci.h>
22 #include <asm/mach-types.h>
24 /* PCI controller GPIO to IRQ pin mappings */
28 void __init
vulcan_pci_preinit(void)
30 #ifndef CONFIG_IXP4XX_INDIRECT_PCI
32 * Cardbus bridge wants way more than the SoC can actually offer,
33 * and leaves the whole PCI bus in a mess. Artificially limit it
34 * to 8MB per region. Of course indirect mode doesn't have this
37 pci_cardbus_mem_size
= SZ_8M
;
38 pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
39 (int)(pci_cardbus_mem_size
>> 20));
41 set_irq_type(IXP4XX_GPIO_IRQ(INTA
), IRQ_TYPE_LEVEL_LOW
);
42 set_irq_type(IXP4XX_GPIO_IRQ(INTB
), IRQ_TYPE_LEVEL_LOW
);
46 static int __init
vulcan_map_irq(struct pci_dev
*dev
, u8 slot
, u8 pin
)
49 return IXP4XX_GPIO_IRQ(INTA
);
52 return IXP4XX_GPIO_IRQ(INTB
);
57 struct hw_pci vulcan_pci __initdata
= {
59 .preinit
= vulcan_pci_preinit
,
60 .swizzle
= pci_std_swizzle
,
61 .setup
= ixp4xx_setup
,
62 .scan
= ixp4xx_scan_bus
,
63 .map_irq
= vulcan_map_irq
,
66 int __init
vulcan_pci_init(void)
68 if (machine_is_arcom_vulcan())
69 pci_common_init(&vulcan_pci
);
73 subsys_initcall(vulcan_pci_init
);