arch/arm/mach-omap2/board-flash.c

   1 /*
   2  * board-sdp-flash.c
   3  * Modified from mach-omap2/board-3430sdp-flash.c
   4  *
   5  * Copyright (C) 2009 Nokia Corporation
   6  * Copyright (C) 2009 Texas Instruments
   7  *
   8  * Vimal Singh <vimalsingh@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/io.h>
  19
  20 #include <plat/gpmc.h>
  21 #include <plat/nand.h>
  22 #include <plat/onenand.h>
  23 #include <plat/tc.h>
  24
  25 #include "board-flash.h"
  26
  27 #define REG_FPGA_REV                    0x10
  28 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
  29 #define MAX_SUPPORTED_GPMC_CONFIG       3
  30
  31 #define DEBUG_BASE              0x08000000 /* debug board */
  32
  33 /* various memory sizes */
  34 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
  35 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
  36
  37 static struct physmap_flash_data board_nor_data = {
  38         .width          = 2,
  39 };
  40
  41 static struct resource board_nor_resource = {
  42         .flags          = IORESOURCE_MEM,
  43 };
  44
  45 static struct platform_device board_nor_device = {
  46         .name           = "physmap-flash",
  47         .id             = 0,
  48         .dev            = {
  49                         .platform_data = &board_nor_data,
  50         },
  51         .num_resources  = 1,
  52         .resource       = &board_nor_resource,
  53 };
  54
  55 static void
  56 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  57 {
  58         int err;
  59
  60         board_nor_data.parts    = nor_parts;
  61         board_nor_data.nr_parts = nr_parts;
  62
  63         /* Configure start address and size of NOR device */
  64         if (omap_rev() >= OMAP3430_REV_ES1_0) {
  65                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  66                                 (unsigned long *)&board_nor_resource.start);
  67                 board_nor_resource.end = board_nor_resource.start
  68                                         + FLASH_SIZE_SDPV2 - 1;
  69         } else {
  70                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  71                                 (unsigned long *)&board_nor_resource.start);
  72                 board_nor_resource.end = board_nor_resource.start
  73                                         + FLASH_SIZE_SDPV1 - 1;
  74         }
  75         if (err < 0) {
  76                 printk(KERN_ERR "NOR: Can't request GPMC CS\n");
  77                 return;
  78         }
  79         if (platform_device_register(&board_nor_device) < 0)
  80                 printk(KERN_ERR "Unable to register NOR device\n");
  81 }
  82
  83 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  84                 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  85 static struct omap_onenand_platform_data board_onenand_data = {
  86         .dma_channel    = -1,   /* disable DMA in OMAP OneNAND driver */
  87 };
  88
  89 static void
  90 __init board_onenand_init(struct mtd_partition *onenand_parts,
  91                                 u8 nr_parts, u8 cs)
  92 {
  93         board_onenand_data.cs           = cs;
  94         board_onenand_data.parts        = onenand_parts;
  95         board_onenand_data.nr_parts     = nr_parts;
  96
  97         gpmc_onenand_init(&board_onenand_data);
  98 }
  99 #else
 100 static void
 101 __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
 102 {
 103 }
 104 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 105
 106 #if defined(CONFIG_MTD_NAND_OMAP2) || \
 107                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 108
 109 /* Note that all values in this struct are in nanoseconds */
 110 static struct gpmc_timings nand_timings = {
 111
 112         .sync_clk = 0,
 113
 114         .cs_on = 0,
 115         .cs_rd_off = 36,
 116         .cs_wr_off = 36,
 117
 118         .adv_on = 6,
 119         .adv_rd_off = 24,
 120         .adv_wr_off = 36,
 121
 122         .we_off = 30,
 123         .oe_off = 48,
 124
 125         .access = 54,
 126         .rd_cycle = 72,
 127         .wr_cycle = 72,
 128
 129         .wr_access = 30,
 130         .wr_data_mux_bus = 0,
 131 };
 132
 133 static struct omap_nand_platform_data board_nand_data = {
 134         .nand_setup     = NULL,
 135         .gpmc_t         = &nand_timings,
 136         .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
 137         .dev_ready      = NULL,
 138         .devsize        = 0,    /* '0' for 8-bit, '1' for 16-bit device */
 139 };
 140
 141 void
 142 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 143 {
 144         board_nand_data.cs              = cs;
 145         board_nand_data.parts           = nand_parts;
 146         board_nand_data.nr_parts                = nr_parts;
 147
 148         gpmc_nand_init(&board_nand_data);
 149 }
 150 #else
 151 void
 152 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs)
 153 {
 154 }
 155 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 156
 157 /**
 158  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
 159  * the various cs values.
 160  */
 161 static u8 get_gpmc0_type(void)
 162 {
 163         u8 cs = 0;
 164         void __iomem *fpga_map_addr;
 165
 166         fpga_map_addr = ioremap(DEBUG_BASE, 4096);
 167         if (!fpga_map_addr)
 168                 return -ENOMEM;
 169
 170         if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
 171                 /* we dont have an DEBUG FPGA??? */
 172                 /* Depend on #defines!! default to strata boot return param */
 173                 goto unmap;
 174
 175         /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
 176         cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
 177
 178         /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
 179         if (omap_rev() >= OMAP3430_REV_ES1_0)
 180                 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
 181                 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
 182                         ((cs & 2) << 1) | ((cs & 1) << 3);
 183         else
 184                 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
 185                 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
 186 unmap:
 187         iounmap(fpga_map_addr);
 188         return cs;
 189 }
 190
 191 /**
 192  * sdp3430_flash_init - Identify devices connected to GPMC and register.
 193  *
 194  * @return - void.
 195  */
 196 void board_flash_init(struct flash_partitions partition_info[],
 197                                         char chip_sel_board[][GPMC_CS_NUM])
 198 {
 199         u8              cs = 0;
 200         u8              norcs = GPMC_CS_NUM + 1;
 201         u8              nandcs = GPMC_CS_NUM + 1;
 202         u8              onenandcs = GPMC_CS_NUM + 1;
 203         u8              idx;
 204         unsigned char   *config_sel = NULL;
 205
 206         /* REVISIT: Is this return correct idx for 2430 SDP?
 207          * for which cs configuration matches for 2430 SDP?
 208          */
 209         idx = get_gpmc0_type();
 210         if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
 211                 printk(KERN_ERR "%s: Invalid chip select: %d\n", __func__, cs);
 212                 return;
 213         }
 214         config_sel = (unsigned char *)(chip_sel_board[idx]);
 215
 216         while (cs < GPMC_CS_NUM) {
 217                 switch (config_sel[cs]) {
 218                 case PDC_NOR:
 219                         if (norcs > GPMC_CS_NUM)
 220                                 norcs = cs;
 221                         break;
 222                 case PDC_NAND:
 223                         if (nandcs > GPMC_CS_NUM)
 224                                 nandcs = cs;
 225                         break;
 226                 case PDC_ONENAND:
 227                         if (onenandcs > GPMC_CS_NUM)
 228                                 onenandcs = cs;
 229                         break;
 230                 };
 231                 cs++;
 232         }
 233
 234         if (norcs > GPMC_CS_NUM)
 235                 printk(KERN_INFO "NOR: Unable to find configuration "
 236                                 "in GPMC\n");
 237         else
 238                 board_nor_init(partition_info[0].parts,
 239                                 partition_info[0].nr_parts, norcs);
 240
 241         if (onenandcs > GPMC_CS_NUM)
 242                 printk(KERN_INFO "OneNAND: Unable to find configuration "
 243                                 "in GPMC\n");
 244         else
 245                 board_onenand_init(partition_info[1].parts,
 246                                         partition_info[1].nr_parts, onenandcs);
 247
 248         if (nandcs > GPMC_CS_NUM)
 249                 printk(KERN_INFO "NAND: Unable to find configuration "
 250                                 "in GPMC\n");
 251         else
 252                 board_nand_init(partition_info[2].parts,
 253                                 partition_info[2].nr_parts, nandcs);
 254 }