m68knommu: simplify the ColdFire 528x GPIO struct setup
[linux-2.6.git] / arch / m68k / platform / 528x / config.c
blob7ed1276b29dc48aa675f46ccd0aef22958dd0b55
1 /***************************************************************************/
3 /*
4 * linux/arch/m68knommu/platform/528x/config.c
6 * Sub-architcture dependent initialization code for the Freescale
7 * 5280, 5281 and 5282 CPUs.
9 * Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
13 /***************************************************************************/
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/io.h>
20 #include <asm/machdep.h>
21 #include <asm/coldfire.h>
22 #include <asm/mcfsim.h>
23 #include <asm/mcfuart.h>
24 #include <asm/mcfgpio.h>
26 /***************************************************************************/
28 struct mcf_gpio_chip mcf_gpio_chips[] = {
29 MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
30 MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
31 MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
32 MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
33 MCFGPS(QB, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
34 MCFGPF(A, 40, 8),
35 MCFGPF(B, 48, 8),
36 MCFGPF(C, 56, 8),
37 MCFGPF(D, 64, 8),
38 MCFGPF(E, 72, 8),
39 MCFGPF(F, 80, 8),
40 MCFGPF(G, 88, 8),
41 MCFGPF(H, 96, 8),
42 MCFGPF(J, 104, 8),
43 MCFGPF(DD, 112, 8),
44 MCFGPF(EH, 120, 8),
45 MCFGPF(EL, 128, 8),
46 MCFGPF(AS, 136, 6),
47 MCFGPF(QS, 144, 7),
48 MCFGPF(SD, 152, 6),
49 MCFGPF(TC, 160, 4),
50 MCFGPF(TD, 168, 4),
51 MCFGPF(UA, 176, 4),
54 unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
56 /***************************************************************************/
58 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
60 static void __init m528x_qspi_init(void)
62 /* setup Port QS for QSPI with gpio CS control */
63 __raw_writeb(0x07, MCFGPIO_PQSPAR);
66 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
68 /***************************************************************************/
70 static void __init m528x_uarts_init(void)
72 u8 port;
74 /* make sure PUAPAR is set for UART0 and UART1 */
75 port = readb(MCF5282_GPIO_PUAPAR);
76 port |= 0x03 | (0x03 << 2);
77 writeb(port, MCF5282_GPIO_PUAPAR);
80 /***************************************************************************/
82 static void __init m528x_fec_init(void)
84 u16 v16;
86 /* Set multi-function pins to ethernet mode for fec0 */
87 v16 = readw(MCF_IPSBAR + 0x100056);
88 writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
89 writeb(0xc0, MCF_IPSBAR + 0x100058);
92 /***************************************************************************/
94 #ifdef CONFIG_WILDFIRE
95 void wildfire_halt(void)
97 writeb(0, 0x30000007);
98 writeb(0x2, 0x30000007);
100 #endif
102 #ifdef CONFIG_WILDFIREMOD
103 void wildfiremod_halt(void)
105 printk(KERN_INFO "WildFireMod hibernating...\n");
107 /* Set portE.5 to Digital IO */
108 MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
110 /* Make portE.5 an output */
111 MCF5282_GPIO_DDRE |= (1 << 5);
113 /* Now toggle portE.5 from low to high */
114 MCF5282_GPIO_PORTE &= ~(1 << 5);
115 MCF5282_GPIO_PORTE |= (1 << 5);
117 printk(KERN_EMERG "Failed to hibernate. Halting!\n");
119 #endif
121 void __init config_BSP(char *commandp, int size)
123 #ifdef CONFIG_WILDFIRE
124 mach_halt = wildfire_halt;
125 #endif
126 #ifdef CONFIG_WILDFIREMOD
127 mach_halt = wildfiremod_halt;
128 #endif
129 mach_sched_init = hw_timer_init;
130 m528x_uarts_init();
131 m528x_fec_init();
132 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
133 m528x_qspi_init();
134 #endif
137 /***************************************************************************/