[POWERPC] Rename get_property to of_get_property: arch/powerpc
[linux-2.6.git] / arch / powerpc / platforms / pseries / eeh.c
blob48fbd442e9dfbef36bcd26fcaac748fc42b0eb05
1 /*
2 * eeh.c
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
29 #include <asm/eeh.h>
30 #include <asm/eeh_event.h>
31 #include <asm/io.h>
32 #include <asm/machdep.h>
33 #include <asm/ppc-pci.h>
34 #include <asm/rtas.h>
36 #undef DEBUG
38 /** Overview:
39 * EEH, or "Extended Error Handling" is a PCI bridge technology for
40 * dealing with PCI bus errors that can't be dealt with within the
41 * usual PCI framework, except by check-stopping the CPU. Systems
42 * that are designed for high-availability/reliability cannot afford
43 * to crash due to a "mere" PCI error, thus the need for EEH.
44 * An EEH-capable bridge operates by converting a detected error
45 * into a "slot freeze", taking the PCI adapter off-line, making
46 * the slot behave, from the OS'es point of view, as if the slot
47 * were "empty": all reads return 0xff's and all writes are silently
48 * ignored. EEH slot isolation events can be triggered by parity
49 * errors on the address or data busses (e.g. during posted writes),
50 * which in turn might be caused by low voltage on the bus, dust,
51 * vibration, humidity, radioactivity or plain-old failed hardware.
53 * Note, however, that one of the leading causes of EEH slot
54 * freeze events are buggy device drivers, buggy device microcode,
55 * or buggy device hardware. This is because any attempt by the
56 * device to bus-master data to a memory address that is not
57 * assigned to the device will trigger a slot freeze. (The idea
58 * is to prevent devices-gone-wild from corrupting system memory).
59 * Buggy hardware/drivers will have a miserable time co-existing
60 * with EEH.
62 * Ideally, a PCI device driver, when suspecting that an isolation
63 * event has occured (e.g. by reading 0xff's), will then ask EEH
64 * whether this is the case, and then take appropriate steps to
65 * reset the PCI slot, the PCI device, and then resume operations.
66 * However, until that day, the checking is done here, with the
67 * eeh_check_failure() routine embedded in the MMIO macros. If
68 * the slot is found to be isolated, an "EEH Event" is synthesized
69 * and sent out for processing.
72 /* If a device driver keeps reading an MMIO register in an interrupt
73 * handler after a slot isolation event has occurred, we assume it
74 * is broken and panic. This sets the threshold for how many read
75 * attempts we allow before panicking.
77 #define EEH_MAX_FAILS 2100000
79 /* Time to wait for a PCI slot to retport status, in milliseconds */
80 #define PCI_BUS_RESET_WAIT_MSEC (60*1000)
82 /* RTAS tokens */
83 static int ibm_set_eeh_option;
84 static int ibm_set_slot_reset;
85 static int ibm_read_slot_reset_state;
86 static int ibm_read_slot_reset_state2;
87 static int ibm_slot_error_detail;
88 static int ibm_get_config_addr_info;
89 static int ibm_get_config_addr_info2;
90 static int ibm_configure_bridge;
92 int eeh_subsystem_enabled;
93 EXPORT_SYMBOL(eeh_subsystem_enabled);
95 /* Lock to avoid races due to multiple reports of an error */
96 static DEFINE_SPINLOCK(confirm_error_lock);
98 /* Buffer for reporting slot-error-detail rtas calls */
99 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
100 static DEFINE_SPINLOCK(slot_errbuf_lock);
101 static int eeh_error_buf_size;
103 /* System monitoring statistics */
104 static unsigned long no_device;
105 static unsigned long no_dn;
106 static unsigned long no_cfg_addr;
107 static unsigned long ignored_check;
108 static unsigned long total_mmio_ffs;
109 static unsigned long false_positives;
110 static unsigned long ignored_failures;
111 static unsigned long slot_resets;
113 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
115 /* --------------------------------------------------------------- */
116 /* Below lies the EEH event infrastructure */
118 void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
120 int config_addr;
121 unsigned long flags;
122 int rc;
124 /* Log the error with the rtas logger */
125 spin_lock_irqsave(&slot_errbuf_lock, flags);
126 memset(slot_errbuf, 0, eeh_error_buf_size);
128 /* Use PE configuration address, if present */
129 config_addr = pdn->eeh_config_addr;
130 if (pdn->eeh_pe_config_addr)
131 config_addr = pdn->eeh_pe_config_addr;
133 rc = rtas_call(ibm_slot_error_detail,
134 8, 1, NULL, config_addr,
135 BUID_HI(pdn->phb->buid),
136 BUID_LO(pdn->phb->buid), NULL, 0,
137 virt_to_phys(slot_errbuf),
138 eeh_error_buf_size,
139 severity);
141 if (rc == 0)
142 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
143 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
147 * read_slot_reset_state - Read the reset state of a device node's slot
148 * @dn: device node to read
149 * @rets: array to return results in
151 static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
153 int token, outputs;
154 int config_addr;
156 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
157 token = ibm_read_slot_reset_state2;
158 outputs = 4;
159 } else {
160 token = ibm_read_slot_reset_state;
161 rets[2] = 0; /* fake PE Unavailable info */
162 outputs = 3;
165 /* Use PE configuration address, if present */
166 config_addr = pdn->eeh_config_addr;
167 if (pdn->eeh_pe_config_addr)
168 config_addr = pdn->eeh_pe_config_addr;
170 return rtas_call(token, 3, outputs, rets, config_addr,
171 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
175 * eeh_wait_for_slot_status - returns error status of slot
176 * @pdn pci device node
177 * @max_wait_msecs maximum number to millisecs to wait
179 * Return negative value if a permanent error, else return
180 * Partition Endpoint (PE) status value.
182 * If @max_wait_msecs is positive, then this routine will
183 * sleep until a valid status can be obtained, or until
184 * the max allowed wait time is exceeded, in which case
185 * a -2 is returned.
188 eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs)
190 int rc;
191 int rets[3];
192 int mwait;
194 while (1) {
195 rc = read_slot_reset_state(pdn, rets);
196 if (rc) return rc;
197 if (rets[1] == 0) return -1; /* EEH is not supported */
199 if (rets[0] != 5) return rets[0]; /* return actual status */
201 if (rets[2] == 0) return -1; /* permanently unavailable */
203 if (max_wait_msecs <= 0) return -1;
205 mwait = rets[2];
206 if (mwait <= 0) {
207 printk (KERN_WARNING
208 "EEH: Firmware returned bad wait value=%d\n", mwait);
209 mwait = 1000;
210 } else if (mwait > 300*1000) {
211 printk (KERN_WARNING
212 "EEH: Firmware is taking too long, time=%d\n", mwait);
213 mwait = 300*1000;
215 max_wait_msecs -= mwait;
216 msleep (mwait);
219 printk(KERN_WARNING "EEH: Timed out waiting for slot status\n");
220 return -2;
224 * eeh_token_to_phys - convert EEH address token to phys address
225 * @token i/o token, should be address in the form 0xA....
227 static inline unsigned long eeh_token_to_phys(unsigned long token)
229 pte_t *ptep;
230 unsigned long pa;
232 ptep = find_linux_pte(init_mm.pgd, token);
233 if (!ptep)
234 return token;
235 pa = pte_pfn(*ptep) << PAGE_SHIFT;
237 return pa | (token & (PAGE_SIZE-1));
240 /**
241 * Return the "partitionable endpoint" (pe) under which this device lies
243 struct device_node * find_device_pe(struct device_node *dn)
245 while ((dn->parent) && PCI_DN(dn->parent) &&
246 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
247 dn = dn->parent;
249 return dn;
252 /** Mark all devices that are peers of this device as failed.
253 * Mark the device driver too, so that it can see the failure
254 * immediately; this is critical, since some drivers poll
255 * status registers in interrupts ... If a driver is polling,
256 * and the slot is frozen, then the driver can deadlock in
257 * an interrupt context, which is bad.
260 static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
262 while (dn) {
263 if (PCI_DN(dn)) {
264 /* Mark the pci device driver too */
265 struct pci_dev *dev = PCI_DN(dn)->pcidev;
267 PCI_DN(dn)->eeh_mode |= mode_flag;
269 if (dev && dev->driver)
270 dev->error_state = pci_channel_io_frozen;
272 if (dn->child)
273 __eeh_mark_slot (dn->child, mode_flag);
275 dn = dn->sibling;
279 void eeh_mark_slot (struct device_node *dn, int mode_flag)
281 struct pci_dev *dev;
282 dn = find_device_pe (dn);
284 /* Back up one, since config addrs might be shared */
285 if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
286 dn = dn->parent;
288 PCI_DN(dn)->eeh_mode |= mode_flag;
290 /* Mark the pci device too */
291 dev = PCI_DN(dn)->pcidev;
292 if (dev)
293 dev->error_state = pci_channel_io_frozen;
295 __eeh_mark_slot (dn->child, mode_flag);
298 static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
300 while (dn) {
301 if (PCI_DN(dn)) {
302 PCI_DN(dn)->eeh_mode &= ~mode_flag;
303 PCI_DN(dn)->eeh_check_count = 0;
304 if (dn->child)
305 __eeh_clear_slot (dn->child, mode_flag);
307 dn = dn->sibling;
311 void eeh_clear_slot (struct device_node *dn, int mode_flag)
313 unsigned long flags;
314 spin_lock_irqsave(&confirm_error_lock, flags);
316 dn = find_device_pe (dn);
318 /* Back up one, since config addrs might be shared */
319 if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
320 dn = dn->parent;
322 PCI_DN(dn)->eeh_mode &= ~mode_flag;
323 PCI_DN(dn)->eeh_check_count = 0;
324 __eeh_clear_slot (dn->child, mode_flag);
325 spin_unlock_irqrestore(&confirm_error_lock, flags);
329 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
330 * @dn device node
331 * @dev pci device, if known
333 * Check for an EEH failure for the given device node. Call this
334 * routine if the result of a read was all 0xff's and you want to
335 * find out if this is due to an EEH slot freeze. This routine
336 * will query firmware for the EEH status.
338 * Returns 0 if there has not been an EEH error; otherwise returns
339 * a non-zero value and queues up a slot isolation event notification.
341 * It is safe to call this routine in an interrupt context.
343 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
345 int ret;
346 int rets[3];
347 unsigned long flags;
348 struct pci_dn *pdn;
349 int rc = 0;
351 total_mmio_ffs++;
353 if (!eeh_subsystem_enabled)
354 return 0;
356 if (!dn) {
357 no_dn++;
358 return 0;
360 pdn = PCI_DN(dn);
362 /* Access to IO BARs might get this far and still not want checking. */
363 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
364 pdn->eeh_mode & EEH_MODE_NOCHECK) {
365 ignored_check++;
366 #ifdef DEBUG
367 printk ("EEH:ignored check (%x) for %s %s\n",
368 pdn->eeh_mode, pci_name (dev), dn->full_name);
369 #endif
370 return 0;
373 if (!pdn->eeh_config_addr && !pdn->eeh_pe_config_addr) {
374 no_cfg_addr++;
375 return 0;
378 /* If we already have a pending isolation event for this
379 * slot, we know it's bad already, we don't need to check.
380 * Do this checking under a lock; as multiple PCI devices
381 * in one slot might report errors simultaneously, and we
382 * only want one error recovery routine running.
384 spin_lock_irqsave(&confirm_error_lock, flags);
385 rc = 1;
386 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
387 pdn->eeh_check_count ++;
388 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
389 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
390 pdn->eeh_check_count);
391 dump_stack();
392 msleep(5000);
394 /* re-read the slot reset state */
395 if (read_slot_reset_state(pdn, rets) != 0)
396 rets[0] = -1; /* reset state unknown */
398 /* If we are here, then we hit an infinite loop. Stop. */
399 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
401 goto dn_unlock;
405 * Now test for an EEH failure. This is VERY expensive.
406 * Note that the eeh_config_addr may be a parent device
407 * in the case of a device behind a bridge, or it may be
408 * function zero of a multi-function device.
409 * In any case they must share a common PHB.
411 ret = read_slot_reset_state(pdn, rets);
413 /* If the call to firmware failed, punt */
414 if (ret != 0) {
415 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
416 ret, dn->full_name);
417 false_positives++;
418 rc = 0;
419 goto dn_unlock;
422 /* Note that config-io to empty slots may fail;
423 * they are empty when they don't have children. */
424 if ((rets[0] == 5) && (dn->child == NULL)) {
425 false_positives++;
426 rc = 0;
427 goto dn_unlock;
430 /* If EEH is not supported on this device, punt. */
431 if (rets[1] != 1) {
432 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
433 ret, dn->full_name);
434 false_positives++;
435 rc = 0;
436 goto dn_unlock;
439 /* If not the kind of error we know about, punt. */
440 if (rets[0] != 1 && rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
441 false_positives++;
442 rc = 0;
443 goto dn_unlock;
446 slot_resets++;
448 /* Avoid repeated reports of this failure, including problems
449 * with other functions on this device, and functions under
450 * bridges. */
451 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
452 spin_unlock_irqrestore(&confirm_error_lock, flags);
454 eeh_send_failure_event (dn, dev);
456 /* Most EEH events are due to device driver bugs. Having
457 * a stack trace will help the device-driver authors figure
458 * out what happened. So print that out. */
459 dump_stack();
460 return 1;
462 dn_unlock:
463 spin_unlock_irqrestore(&confirm_error_lock, flags);
464 return rc;
467 EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
470 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
471 * @token i/o token, should be address in the form 0xA....
472 * @val value, should be all 1's (XXX why do we need this arg??)
474 * Check for an EEH failure at the given token address. Call this
475 * routine if the result of a read was all 0xff's and you want to
476 * find out if this is due to an EEH slot freeze event. This routine
477 * will query firmware for the EEH status.
479 * Note this routine is safe to call in an interrupt context.
481 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
483 unsigned long addr;
484 struct pci_dev *dev;
485 struct device_node *dn;
487 /* Finding the phys addr + pci device; this is pretty quick. */
488 addr = eeh_token_to_phys((unsigned long __force) token);
489 dev = pci_get_device_by_addr(addr);
490 if (!dev) {
491 no_device++;
492 return val;
495 dn = pci_device_to_OF_node(dev);
496 eeh_dn_check_failure (dn, dev);
498 pci_dev_put(dev);
499 return val;
502 EXPORT_SYMBOL(eeh_check_failure);
504 /* ------------------------------------------------------------- */
505 /* The code below deals with error recovery */
508 * rtas_pci_enable - enable MMIO or DMA transfers for this slot
509 * @pdn pci device node
513 rtas_pci_enable(struct pci_dn *pdn, int function)
515 int config_addr;
516 int rc;
518 /* Use PE configuration address, if present */
519 config_addr = pdn->eeh_config_addr;
520 if (pdn->eeh_pe_config_addr)
521 config_addr = pdn->eeh_pe_config_addr;
523 rc = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
524 config_addr,
525 BUID_HI(pdn->phb->buid),
526 BUID_LO(pdn->phb->buid),
527 function);
529 if (rc)
530 printk(KERN_WARNING "EEH: Unexpected state change %d, err=%d dn=%s\n",
531 function, rc, pdn->node->full_name);
533 rc = eeh_wait_for_slot_status (pdn, PCI_BUS_RESET_WAIT_MSEC);
534 if ((rc == 4) && (function == EEH_THAW_MMIO))
535 return 0;
537 return rc;
541 * rtas_pci_slot_reset - raises/lowers the pci #RST line
542 * @pdn pci device node
543 * @state: 1/0 to raise/lower the #RST
545 * Clear the EEH-frozen condition on a slot. This routine
546 * asserts the PCI #RST line if the 'state' argument is '1',
547 * and drops the #RST line if 'state is '0'. This routine is
548 * safe to call in an interrupt context.
552 static void
553 rtas_pci_slot_reset(struct pci_dn *pdn, int state)
555 int config_addr;
556 int rc;
558 BUG_ON (pdn==NULL);
560 if (!pdn->phb) {
561 printk (KERN_WARNING "EEH: in slot reset, device node %s has no phb\n",
562 pdn->node->full_name);
563 return;
566 /* Use PE configuration address, if present */
567 config_addr = pdn->eeh_config_addr;
568 if (pdn->eeh_pe_config_addr)
569 config_addr = pdn->eeh_pe_config_addr;
571 rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
572 config_addr,
573 BUID_HI(pdn->phb->buid),
574 BUID_LO(pdn->phb->buid),
575 state);
576 if (rc)
577 printk (KERN_WARNING "EEH: Unable to reset the failed slot,"
578 " (%d) #RST=%d dn=%s\n",
579 rc, state, pdn->node->full_name);
583 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
584 * @pdn: pci device node to be reset.
586 * Return 0 if success, else a non-zero value.
589 static void __rtas_set_slot_reset(struct pci_dn *pdn)
591 rtas_pci_slot_reset (pdn, 1);
593 /* The PCI bus requires that the reset be held high for at least
594 * a 100 milliseconds. We wait a bit longer 'just in case'. */
596 #define PCI_BUS_RST_HOLD_TIME_MSEC 250
597 msleep (PCI_BUS_RST_HOLD_TIME_MSEC);
599 /* We might get hit with another EEH freeze as soon as the
600 * pci slot reset line is dropped. Make sure we don't miss
601 * these, and clear the flag now. */
602 eeh_clear_slot (pdn->node, EEH_MODE_ISOLATED);
604 rtas_pci_slot_reset (pdn, 0);
606 /* After a PCI slot has been reset, the PCI Express spec requires
607 * a 1.5 second idle time for the bus to stabilize, before starting
608 * up traffic. */
609 #define PCI_BUS_SETTLE_TIME_MSEC 1800
610 msleep (PCI_BUS_SETTLE_TIME_MSEC);
613 int rtas_set_slot_reset(struct pci_dn *pdn)
615 int i, rc;
617 /* Take three shots at resetting the bus */
618 for (i=0; i<3; i++) {
619 __rtas_set_slot_reset(pdn);
621 rc = eeh_wait_for_slot_status(pdn, PCI_BUS_RESET_WAIT_MSEC);
622 if (rc == 0)
623 return 0;
625 if (rc < 0) {
626 printk (KERN_ERR "EEH: unrecoverable slot failure %s\n",
627 pdn->node->full_name);
628 return -1;
630 printk (KERN_ERR "EEH: bus reset %d failed on slot %s\n",
631 i+1, pdn->node->full_name);
634 return -1;
637 /* ------------------------------------------------------- */
638 /** Save and restore of PCI BARs
640 * Although firmware will set up BARs during boot, it doesn't
641 * set up device BAR's after a device reset, although it will,
642 * if requested, set up bridge configuration. Thus, we need to
643 * configure the PCI devices ourselves.
647 * __restore_bars - Restore the Base Address Registers
648 * @pdn: pci device node
650 * Loads the PCI configuration space base address registers,
651 * the expansion ROM base address, the latency timer, and etc.
652 * from the saved values in the device node.
654 static inline void __restore_bars (struct pci_dn *pdn)
656 int i;
658 if (NULL==pdn->phb) return;
659 for (i=4; i<10; i++) {
660 rtas_write_config(pdn, i*4, 4, pdn->config_space[i]);
663 /* 12 == Expansion ROM Address */
664 rtas_write_config(pdn, 12*4, 4, pdn->config_space[12]);
666 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
667 #define SAVED_BYTE(OFF) (((u8 *)(pdn->config_space))[BYTE_SWAP(OFF)])
669 rtas_write_config (pdn, PCI_CACHE_LINE_SIZE, 1,
670 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
672 rtas_write_config (pdn, PCI_LATENCY_TIMER, 1,
673 SAVED_BYTE(PCI_LATENCY_TIMER));
675 /* max latency, min grant, interrupt pin and line */
676 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
680 * eeh_restore_bars - restore the PCI config space info
682 * This routine performs a recursive walk to the children
683 * of this device as well.
685 void eeh_restore_bars(struct pci_dn *pdn)
687 struct device_node *dn;
688 if (!pdn)
689 return;
691 if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
692 __restore_bars (pdn);
694 dn = pdn->node->child;
695 while (dn) {
696 eeh_restore_bars (PCI_DN(dn));
697 dn = dn->sibling;
702 * eeh_save_bars - save device bars
704 * Save the values of the device bars. Unlike the restore
705 * routine, this routine is *not* recursive. This is because
706 * PCI devices are added individuallly; but, for the restore,
707 * an entire slot is reset at a time.
709 static void eeh_save_bars(struct pci_dn *pdn)
711 int i;
713 if (!pdn )
714 return;
716 for (i = 0; i < 16; i++)
717 rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
720 void
721 rtas_configure_bridge(struct pci_dn *pdn)
723 int config_addr;
724 int rc;
726 /* Use PE configuration address, if present */
727 config_addr = pdn->eeh_config_addr;
728 if (pdn->eeh_pe_config_addr)
729 config_addr = pdn->eeh_pe_config_addr;
731 rc = rtas_call(ibm_configure_bridge,3,1, NULL,
732 config_addr,
733 BUID_HI(pdn->phb->buid),
734 BUID_LO(pdn->phb->buid));
735 if (rc) {
736 printk (KERN_WARNING "EEH: Unable to configure device bridge (%d) for %s\n",
737 rc, pdn->node->full_name);
741 /* ------------------------------------------------------------- */
742 /* The code below deals with enabling EEH for devices during the
743 * early boot sequence. EEH must be enabled before any PCI probing
744 * can be done.
747 #define EEH_ENABLE 1
749 struct eeh_early_enable_info {
750 unsigned int buid_hi;
751 unsigned int buid_lo;
754 static int get_pe_addr (int config_addr,
755 struct eeh_early_enable_info *info)
757 unsigned int rets[3];
758 int ret;
760 /* Use latest config-addr token on power6 */
761 if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
762 /* Make sure we have a PE in hand */
763 ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets,
764 config_addr, info->buid_hi, info->buid_lo, 1);
765 if (ret || (rets[0]==0))
766 return 0;
768 ret = rtas_call (ibm_get_config_addr_info2, 4, 2, rets,
769 config_addr, info->buid_hi, info->buid_lo, 0);
770 if (ret)
771 return 0;
772 return rets[0];
775 /* Use older config-addr token on power5 */
776 if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
777 ret = rtas_call (ibm_get_config_addr_info, 4, 2, rets,
778 config_addr, info->buid_hi, info->buid_lo, 0);
779 if (ret)
780 return 0;
781 return rets[0];
783 return 0;
786 /* Enable eeh for the given device node. */
787 static void *early_enable_eeh(struct device_node *dn, void *data)
789 unsigned int rets[3];
790 struct eeh_early_enable_info *info = data;
791 int ret;
792 const char *status = of_get_property(dn, "status", NULL);
793 const u32 *class_code = of_get_property(dn, "class-code", NULL);
794 const u32 *vendor_id = of_get_property(dn, "vendor-id", NULL);
795 const u32 *device_id = of_get_property(dn, "device-id", NULL);
796 const u32 *regs;
797 int enable;
798 struct pci_dn *pdn = PCI_DN(dn);
800 pdn->class_code = 0;
801 pdn->eeh_mode = 0;
802 pdn->eeh_check_count = 0;
803 pdn->eeh_freeze_count = 0;
805 if (status && strcmp(status, "ok") != 0)
806 return NULL; /* ignore devices with bad status */
808 /* Ignore bad nodes. */
809 if (!class_code || !vendor_id || !device_id)
810 return NULL;
812 /* There is nothing to check on PCI to ISA bridges */
813 if (dn->type && !strcmp(dn->type, "isa")) {
814 pdn->eeh_mode |= EEH_MODE_NOCHECK;
815 return NULL;
817 pdn->class_code = *class_code;
820 * Now decide if we are going to "Disable" EEH checking
821 * for this device. We still run with the EEH hardware active,
822 * but we won't be checking for ff's. This means a driver
823 * could return bad data (very bad!), an interrupt handler could
824 * hang waiting on status bits that won't change, etc.
825 * But there are a few cases like display devices that make sense.
827 enable = 1; /* i.e. we will do checking */
828 #if 0
829 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
830 enable = 0;
831 #endif
833 if (!enable)
834 pdn->eeh_mode |= EEH_MODE_NOCHECK;
836 /* Ok... see if this device supports EEH. Some do, some don't,
837 * and the only way to find out is to check each and every one. */
838 regs = of_get_property(dn, "reg", NULL);
839 if (regs) {
840 /* First register entry is addr (00BBSS00) */
841 /* Try to enable eeh */
842 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
843 regs[0], info->buid_hi, info->buid_lo,
844 EEH_ENABLE);
846 enable = 0;
847 if (ret == 0) {
848 pdn->eeh_config_addr = regs[0];
850 /* If the newer, better, ibm,get-config-addr-info is supported,
851 * then use that instead. */
852 pdn->eeh_pe_config_addr = get_pe_addr(pdn->eeh_config_addr, info);
854 /* Some older systems (Power4) allow the
855 * ibm,set-eeh-option call to succeed even on nodes
856 * where EEH is not supported. Verify support
857 * explicitly. */
858 ret = read_slot_reset_state(pdn, rets);
859 if ((ret == 0) && (rets[1] == 1))
860 enable = 1;
863 if (enable) {
864 eeh_subsystem_enabled = 1;
865 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
867 #ifdef DEBUG
868 printk(KERN_DEBUG "EEH: %s: eeh enabled, config=%x pe_config=%x\n",
869 dn->full_name, pdn->eeh_config_addr, pdn->eeh_pe_config_addr);
870 #endif
871 } else {
873 /* This device doesn't support EEH, but it may have an
874 * EEH parent, in which case we mark it as supported. */
875 if (dn->parent && PCI_DN(dn->parent)
876 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
877 /* Parent supports EEH. */
878 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
879 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
880 return NULL;
883 } else {
884 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
885 dn->full_name);
888 eeh_save_bars(pdn);
889 return NULL;
893 * Initialize EEH by trying to enable it for all of the adapters in the system.
894 * As a side effect we can determine here if eeh is supported at all.
895 * Note that we leave EEH on so failed config cycles won't cause a machine
896 * check. If a user turns off EEH for a particular adapter they are really
897 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
898 * grant access to a slot if EEH isn't enabled, and so we always enable
899 * EEH for all slots/all devices.
901 * The eeh-force-off option disables EEH checking globally, for all slots.
902 * Even if force-off is set, the EEH hardware is still enabled, so that
903 * newer systems can boot.
905 void __init eeh_init(void)
907 struct device_node *phb, *np;
908 struct eeh_early_enable_info info;
910 spin_lock_init(&confirm_error_lock);
911 spin_lock_init(&slot_errbuf_lock);
913 np = of_find_node_by_path("/rtas");
914 if (np == NULL)
915 return;
917 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
918 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
919 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
920 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
921 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
922 ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
923 ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
924 ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
926 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
927 return;
929 eeh_error_buf_size = rtas_token("rtas-error-log-max");
930 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
931 eeh_error_buf_size = 1024;
933 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
934 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
935 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
936 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
939 /* Enable EEH for all adapters. Note that eeh requires buid's */
940 for (phb = of_find_node_by_name(NULL, "pci"); phb;
941 phb = of_find_node_by_name(phb, "pci")) {
942 unsigned long buid;
944 buid = get_phb_buid(phb);
945 if (buid == 0 || PCI_DN(phb) == NULL)
946 continue;
948 info.buid_lo = BUID_LO(buid);
949 info.buid_hi = BUID_HI(buid);
950 traverse_pci_devices(phb, early_enable_eeh, &info);
953 if (eeh_subsystem_enabled)
954 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
955 else
956 printk(KERN_WARNING "EEH: No capable adapters found\n");
960 * eeh_add_device_early - enable EEH for the indicated device_node
961 * @dn: device node for which to set up EEH
963 * This routine must be used to perform EEH initialization for PCI
964 * devices that were added after system boot (e.g. hotplug, dlpar).
965 * This routine must be called before any i/o is performed to the
966 * adapter (inluding any config-space i/o).
967 * Whether this actually enables EEH or not for this device depends
968 * on the CEC architecture, type of the device, on earlier boot
969 * command-line arguments & etc.
971 static void eeh_add_device_early(struct device_node *dn)
973 struct pci_controller *phb;
974 struct eeh_early_enable_info info;
976 if (!dn || !PCI_DN(dn))
977 return;
978 phb = PCI_DN(dn)->phb;
980 /* USB Bus children of PCI devices will not have BUID's */
981 if (NULL == phb || 0 == phb->buid)
982 return;
984 info.buid_hi = BUID_HI(phb->buid);
985 info.buid_lo = BUID_LO(phb->buid);
986 early_enable_eeh(dn, &info);
989 void eeh_add_device_tree_early(struct device_node *dn)
991 struct device_node *sib;
992 for (sib = dn->child; sib; sib = sib->sibling)
993 eeh_add_device_tree_early(sib);
994 eeh_add_device_early(dn);
996 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
999 * eeh_add_device_late - perform EEH initialization for the indicated pci device
1000 * @dev: pci device for which to set up EEH
1002 * This routine must be used to complete EEH initialization for PCI
1003 * devices that were added after system boot (e.g. hotplug, dlpar).
1005 static void eeh_add_device_late(struct pci_dev *dev)
1007 struct device_node *dn;
1008 struct pci_dn *pdn;
1010 if (!dev || !eeh_subsystem_enabled)
1011 return;
1013 #ifdef DEBUG
1014 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
1015 #endif
1017 pci_dev_get (dev);
1018 dn = pci_device_to_OF_node(dev);
1019 pdn = PCI_DN(dn);
1020 pdn->pcidev = dev;
1022 pci_addr_cache_insert_device (dev);
1025 void eeh_add_device_tree_late(struct pci_bus *bus)
1027 struct pci_dev *dev;
1029 list_for_each_entry(dev, &bus->devices, bus_list) {
1030 eeh_add_device_late(dev);
1031 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1032 struct pci_bus *subbus = dev->subordinate;
1033 if (subbus)
1034 eeh_add_device_tree_late(subbus);
1038 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1041 * eeh_remove_device - undo EEH setup for the indicated pci device
1042 * @dev: pci device to be removed
1044 * This routine should be called when a device is removed from
1045 * a running system (e.g. by hotplug or dlpar). It unregisters
1046 * the PCI device from the EEH subsystem. I/O errors affecting
1047 * this device will no longer be detected after this call; thus,
1048 * i/o errors affecting this slot may leave this device unusable.
1050 static void eeh_remove_device(struct pci_dev *dev)
1052 struct device_node *dn;
1053 if (!dev || !eeh_subsystem_enabled)
1054 return;
1056 /* Unregister the device with the EEH/PCI address search system */
1057 #ifdef DEBUG
1058 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
1059 #endif
1060 pci_addr_cache_remove_device(dev);
1062 dn = pci_device_to_OF_node(dev);
1063 if (PCI_DN(dn)->pcidev) {
1064 PCI_DN(dn)->pcidev = NULL;
1065 pci_dev_put (dev);
1069 void eeh_remove_bus_device(struct pci_dev *dev)
1071 struct pci_bus *bus = dev->subordinate;
1072 struct pci_dev *child, *tmp;
1074 eeh_remove_device(dev);
1076 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1077 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
1078 eeh_remove_bus_device(child);
1081 EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
1083 static int proc_eeh_show(struct seq_file *m, void *v)
1085 if (0 == eeh_subsystem_enabled) {
1086 seq_printf(m, "EEH Subsystem is globally disabled\n");
1087 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", total_mmio_ffs);
1088 } else {
1089 seq_printf(m, "EEH Subsystem is enabled\n");
1090 seq_printf(m,
1091 "no device=%ld\n"
1092 "no device node=%ld\n"
1093 "no config address=%ld\n"
1094 "check not wanted=%ld\n"
1095 "eeh_total_mmio_ffs=%ld\n"
1096 "eeh_false_positives=%ld\n"
1097 "eeh_ignored_failures=%ld\n"
1098 "eeh_slot_resets=%ld\n",
1099 no_device, no_dn, no_cfg_addr,
1100 ignored_check, total_mmio_ffs,
1101 false_positives, ignored_failures,
1102 slot_resets);
1105 return 0;
1108 static int proc_eeh_open(struct inode *inode, struct file *file)
1110 return single_open(file, proc_eeh_show, NULL);
1113 static const struct file_operations proc_eeh_operations = {
1114 .open = proc_eeh_open,
1115 .read = seq_read,
1116 .llseek = seq_lseek,
1117 .release = single_release,
1120 static int __init eeh_init_proc(void)
1122 struct proc_dir_entry *e;
1124 if (machine_is(pseries)) {
1125 e = create_proc_entry("ppc64/eeh", 0, NULL);
1126 if (e)
1127 e->proc_fops = &proc_eeh_operations;
1130 return 0;
1132 __initcall(eeh_init_proc);