?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
OMAP: voltage: move plat/voltage.h to mach-omap2/voltage.h
[linux-2.6.git] / arch / arm / mach-omap2 / voltage.c
blob3c9bcdce612b5f72f7a525284d952031428d9889
1 /*
2 * OMAP3/OMAP4 Voltage Management Routines
3 *
4 * Author: Thara Gopinath <thara@ti.com>
5 *
6 * Copyright (C) 2007 Texas Instruments, Inc.
7 * Rajendra Nayak <rnayak@ti.com>
8 * Lesly A M <x0080970@ti.com>
9 *
10 * Copyright (C) 2008 Nokia Corporation
11 * Kalle Jokiniemi
12 *
13 * Copyright (C) 2010 Texas Instruments, Inc.
14 * Thara Gopinath <thara@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21 #include <linux/delay.h>
22 #include <linux/io.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
25 #include <linux/debugfs.h>
26 #include <linux/slab.h>
27
28 #include <plat/common.h>
29
30 #include "prm-regbits-34xx.h"
31 #include "prm-regbits-44xx.h"
32 #include "prm44xx.h"
33 #include "prcm44xx.h"
34 #include "prminst44xx.h"
35 #include "control.h"
36
37 #include "voltage.h"
38
39 #define VP_IDLE_TIMEOUT 200
40 #define VP_TRANXDONE_TIMEOUT 300
41 #define VOLTAGE_DIR_SIZE 16
42
43 /* Voltage processor register offsets */
44 struct vp_reg_offs {
45 u8 vpconfig;
46 u8 vstepmin;
47 u8 vstepmax;
48 u8 vlimitto;
49 u8 vstatus;
50 u8 voltage;
51 };
52
53 /* Voltage Processor bit field values, shifts and masks */
54 struct vp_reg_val {
55 /* PRM module */
56 u16 prm_mod;
57 /* VPx_VPCONFIG */
58 u32 vpconfig_erroroffset;
59 u16 vpconfig_errorgain;
60 u32 vpconfig_errorgain_mask;
61 u8 vpconfig_errorgain_shift;
62 u32 vpconfig_initvoltage_mask;
63 u8 vpconfig_initvoltage_shift;
64 u32 vpconfig_timeouten;
65 u32 vpconfig_initvdd;
66 u32 vpconfig_forceupdate;
67 u32 vpconfig_vpenable;
68 /* VPx_VSTEPMIN */
69 u8 vstepmin_stepmin;
70 u16 vstepmin_smpswaittimemin;
71 u8 vstepmin_stepmin_shift;
72 u8 vstepmin_smpswaittimemin_shift;
73 /* VPx_VSTEPMAX */
74 u8 vstepmax_stepmax;
75 u16 vstepmax_smpswaittimemax;
76 u8 vstepmax_stepmax_shift;
77 u8 vstepmax_smpswaittimemax_shift;
78 /* VPx_VLIMITTO */
79 u8 vlimitto_vddmin;
80 u8 vlimitto_vddmax;
81 u16 vlimitto_timeout;
82 u8 vlimitto_vddmin_shift;
83 u8 vlimitto_vddmax_shift;
84 u8 vlimitto_timeout_shift;
85 /* PRM_IRQSTATUS*/
86 u32 tranxdone_status;
87 };
88
89 /* Voltage controller registers and offsets */
90 struct vc_reg_info {
91 /* PRM module */
92 u16 prm_mod;
93 /* VC register offsets */
94 u8 smps_sa_reg;
95 u8 smps_volra_reg;
96 u8 bypass_val_reg;
97 u8 cmdval_reg;
98 u8 voltsetup_reg;
99 /*VC_SMPS_SA*/
100 u8 smps_sa_shift;
101 u32 smps_sa_mask;
102 /* VC_SMPS_VOL_RA */
103 u8 smps_volra_shift;
104 u32 smps_volra_mask;
105 /* VC_BYPASS_VAL */
106 u8 data_shift;
107 u8 slaveaddr_shift;
108 u8 regaddr_shift;
109 u32 valid;
110 /* VC_CMD_VAL */
111 u8 cmd_on_shift;
112 u8 cmd_onlp_shift;
113 u8 cmd_ret_shift;
114 u8 cmd_off_shift;
115 u32 cmd_on_mask;
116 /* PRM_VOLTSETUP */
117 u8 voltsetup_shift;
118 u32 voltsetup_mask;
119 };
120
121 /**
122 * omap_vdd_info - Per Voltage Domain info
123 *
124 * @volt_data : voltage table having the distinct voltages supported
125 * by the domain and other associated per voltage data.
126 * @pmic_info : pmic specific parameters which should be populted by
127 * the pmic drivers.
128 * @vp_offs : structure containing the offsets for various
129 * vp registers
130 * @vp_reg : the register values, shifts, masks for various
131 * vp registers
132 * @vc_reg : structure containing various various vc registers,
133 * shifts, masks etc.
134 * @voltdm : pointer to the voltage domain structure
135 * @debug_dir : debug directory for this voltage domain.
136 * @curr_volt : current voltage for this vdd.
137 * @ocp_mod : The prm module for accessing the prm irqstatus reg.
138 * @prm_irqst_reg : prm irqstatus register.
139 * @vp_enabled : flag to keep track of whether vp is enabled or not
140 * @volt_scale : API to scale the voltage of the vdd.
141 */
142 struct omap_vdd_info {
143 struct omap_volt_data *volt_data;
144 struct omap_volt_pmic_info *pmic_info;
145 struct vp_reg_offs vp_offs;
146 struct vp_reg_val vp_reg;
147 struct vc_reg_info vc_reg;
148 struct voltagedomain voltdm;
149 struct dentry *debug_dir;
150 u32 curr_volt;
151 u16 ocp_mod;
152 u8 prm_irqst_reg;
153 bool vp_enabled;
154 u32 (*read_reg) (u16 mod, u8 offset);
155 void (*write_reg) (u32 val, u16 mod, u8 offset);
156 int (*volt_scale) (struct omap_vdd_info *vdd,
157 unsigned long target_volt);
158 };
159
160 static struct omap_vdd_info *vdd_info;
161 /*
162 * Number of scalable voltage domains.
163 */
164 static int nr_scalable_vdd;
165
166 /* OMAP3 VDD sturctures */
167 static struct omap_vdd_info omap3_vdd_info[] = {
168 {
169 .vp_offs = {
170 .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
171 .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
172 .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
173 .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
174 .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
175 .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
176 },
177 .voltdm = {
178 .name = "mpu",
179 },
180 },
181 {
182 .vp_offs = {
183 .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
184 .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
185 .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
186 .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
187 .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
188 .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
189 },
190 .voltdm = {
191 .name = "core",
192 },
193 },
194 };
195
196 #define OMAP3_NR_SCALABLE_VDD ARRAY_SIZE(omap3_vdd_info)
197
198 /* OMAP4 VDD sturctures */
199 static struct omap_vdd_info omap4_vdd_info[] = {
200 {
201 .vp_offs = {
202 .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
203 .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
204 .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET,
205 .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
206 .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
207 .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
208 },
209 .voltdm = {
210 .name = "mpu",
211 },
212 },
213 {
214 .vp_offs = {
215 .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
216 .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
217 .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET,
218 .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
219 .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
220 .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
221 },
222 .voltdm = {
223 .name = "iva",
224 },
225 },
226 {
227 .vp_offs = {
228 .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
229 .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
230 .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET,
231 .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
232 .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
233 .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
234 },
235 .voltdm = {
236 .name = "core",
237 },
238 },
239 };
240
241 #define OMAP4_NR_SCALABLE_VDD ARRAY_SIZE(omap4_vdd_info)
242
243 /*
244 * Structures containing OMAP3430/OMAP3630 voltage supported and various
245 * voltage dependent data for each VDD.
246 */
247 #define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \
248 { \
249 .volt_nominal = _v_nom, \
250 .sr_efuse_offs = _efuse_offs, \
251 .sr_errminlimit = _errminlimit, \
252 .vp_errgain = _errgain \
253 }
254
255 /* VDD1 */
256 static struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
257 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
258 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
259 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
260 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
261 VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
262 VOLT_DATA_DEFINE(0, 0, 0, 0),
263 };
264
265 static struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
266 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
267 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
268 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
269 VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
270 VOLT_DATA_DEFINE(0, 0, 0, 0),
271 };
272
273 /* VDD2 */
274 static struct omap_volt_data omap34xx_vddcore_volt_data[] = {
275 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
276 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
277 VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
278 VOLT_DATA_DEFINE(0, 0, 0, 0),
279 };
280
281 static struct omap_volt_data omap36xx_vddcore_volt_data[] = {
282 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
283 VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
284 VOLT_DATA_DEFINE(0, 0, 0, 0),
285 };
286
287 /*
288 * Structures containing OMAP4430 voltage supported and various
289 * voltage dependent data for each VDD.
290 */
291 static struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
292 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
293 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
294 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
295 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
296 VOLT_DATA_DEFINE(0, 0, 0, 0),
297 };
298
299 static struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
300 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
301 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
302 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
303 VOLT_DATA_DEFINE(0, 0, 0, 0),
304 };
305
306 static struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
307 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
308 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
309 VOLT_DATA_DEFINE(0, 0, 0, 0),
310 };
311
312 static struct dentry *voltage_dir;
313
314 /* Init function pointers */
315 static void (*vc_init) (struct omap_vdd_info *vdd);
316 static int (*vdd_data_configure) (struct omap_vdd_info *vdd);
317
318 static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
319 {
320 return omap2_prm_read_mod_reg(mod, offset);
321 }
322
323 static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset)
324 {
325 omap2_prm_write_mod_reg(val, mod, offset);
326 }
327
328 static u32 omap4_voltage_read_reg(u16 mod, u8 offset)
329 {
330 return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
331 mod, offset);
332 }
333
334 static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset)
335 {
336 omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset);
337 }
338
339 /* Voltage debugfs support */
340 static int vp_volt_debug_get(void *data, u64 *val)
341 {
342 struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
343 u8 vsel;
344
345 if (!vdd) {
346 pr_warning("Wrong paramater passed\n");
347 return -EINVAL;
348 }
349
350 vsel = vdd->read_reg(vdd->vp_reg.prm_mod, vdd->vp_offs.voltage);
351 pr_notice("curr_vsel = %x\n", vsel);
352
353 if (!vdd->pmic_info->vsel_to_uv) {
354 pr_warning("PMIC function to convert vsel to voltage"
355 "in uV not registerd\n");
356 return -EINVAL;
357 }
358
359 *val = vdd->pmic_info->vsel_to_uv(vsel);
360 return 0;
361 }
362
363 static int nom_volt_debug_get(void *data, u64 *val)
364 {
365 struct omap_vdd_info *vdd = (struct omap_vdd_info *) data;
366
367 if (!vdd) {
368 pr_warning("Wrong paramater passed\n");
369 return -EINVAL;
370 }
371
372 *val = omap_voltage_get_nom_volt(&vdd->voltdm);
373
374 return 0;
375 }
376
377 DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n");
378 DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL,
379 "%llu\n");
380 static void vp_latch_vsel(struct omap_vdd_info *vdd)
381 {
382 u32 vpconfig;
383 u16 mod;
384 unsigned long uvdc;
385 char vsel;
386
387 uvdc = omap_voltage_get_nom_volt(&vdd->voltdm);
388 if (!uvdc) {
389 pr_warning("%s: unable to find current voltage for vdd_%s\n",
390 __func__, vdd->voltdm.name);
391 return;
392 }
393
394 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
395 pr_warning("%s: PMIC function to convert voltage in uV to"
396 " vsel not registered\n", __func__);
397 return;
398 }
399
400 mod = vdd->vp_reg.prm_mod;
401
402 vsel = vdd->pmic_info->uv_to_vsel(uvdc);
403
404 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
405 vpconfig &= ~(vdd->vp_reg.vpconfig_initvoltage_mask |
406 vdd->vp_reg.vpconfig_initvdd);
407 vpconfig |= vsel << vdd->vp_reg.vpconfig_initvoltage_shift;
408
409 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
410
411 /* Trigger initVDD value copy to voltage processor */
412 vdd->write_reg((vpconfig | vdd->vp_reg.vpconfig_initvdd), mod,
413 vdd->vp_offs.vpconfig);
414
415 /* Clear initVDD copy trigger bit */
416 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
417 }
418
419 /* Generic voltage init functions */
420 static void __init vp_init(struct omap_vdd_info *vdd)
421 {
422 u32 vp_val;
423 u16 mod;
424
425 if (!vdd->read_reg || !vdd->write_reg) {
426 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
427 __func__, vdd->voltdm.name);
428 return;
429 }
430
431 mod = vdd->vp_reg.prm_mod;
432
433 vp_val = vdd->vp_reg.vpconfig_erroroffset |
434 (vdd->vp_reg.vpconfig_errorgain <<
435 vdd->vp_reg.vpconfig_errorgain_shift) |
436 vdd->vp_reg.vpconfig_timeouten;
437 vdd->write_reg(vp_val, mod, vdd->vp_offs.vpconfig);
438
439 vp_val = ((vdd->vp_reg.vstepmin_smpswaittimemin <<
440 vdd->vp_reg.vstepmin_smpswaittimemin_shift) |
441 (vdd->vp_reg.vstepmin_stepmin <<
442 vdd->vp_reg.vstepmin_stepmin_shift));
443 vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmin);
444
445 vp_val = ((vdd->vp_reg.vstepmax_smpswaittimemax <<
446 vdd->vp_reg.vstepmax_smpswaittimemax_shift) |
447 (vdd->vp_reg.vstepmax_stepmax <<
448 vdd->vp_reg.vstepmax_stepmax_shift));
449 vdd->write_reg(vp_val, mod, vdd->vp_offs.vstepmax);
450
451 vp_val = ((vdd->vp_reg.vlimitto_vddmax <<
452 vdd->vp_reg.vlimitto_vddmax_shift) |
453 (vdd->vp_reg.vlimitto_vddmin <<
454 vdd->vp_reg.vlimitto_vddmin_shift) |
455 (vdd->vp_reg.vlimitto_timeout <<
456 vdd->vp_reg.vlimitto_timeout_shift));
457 vdd->write_reg(vp_val, mod, vdd->vp_offs.vlimitto);
458 }
459
460 static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
461 {
462 char *name;
463
464 name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL);
465 if (!name) {
466 pr_warning("%s: Unable to allocate memory for debugfs"
467 " directory name for vdd_%s",
468 __func__, vdd->voltdm.name);
469 return;
470 }
471 strcpy(name, "vdd_");
472 strcat(name, vdd->voltdm.name);
473
474 vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
475 kfree(name);
476 if (IS_ERR(vdd->debug_dir)) {
477 pr_warning("%s: Unable to create debugfs directory for"
478 " vdd_%s\n", __func__, vdd->voltdm.name);
479 vdd->debug_dir = NULL;
480 return;
481 }
482
483 (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir,
484 &(vdd->vp_reg.vpconfig_errorgain));
485 (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO,
486 vdd->debug_dir,
487 &(vdd->vp_reg.vstepmin_smpswaittimemin));
488 (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir,
489 &(vdd->vp_reg.vstepmin_stepmin));
490 (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO,
491 vdd->debug_dir,
492 &(vdd->vp_reg.vstepmax_smpswaittimemax));
493 (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir,
494 &(vdd->vp_reg.vstepmax_stepmax));
495 (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir,
496 &(vdd->vp_reg.vlimitto_vddmax));
497 (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir,
498 &(vdd->vp_reg.vlimitto_vddmin));
499 (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir,
500 &(vdd->vp_reg.vlimitto_timeout));
501 (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir,
502 (void *) vdd, &vp_volt_debug_fops);
503 (void) debugfs_create_file("curr_nominal_volt", S_IRUGO,
504 vdd->debug_dir, (void *) vdd,
505 &nom_volt_debug_fops);
506 }
507
508 /* Voltage scale and accessory APIs */
509 static int _pre_volt_scale(struct omap_vdd_info *vdd,
510 unsigned long target_volt, u8 *target_vsel, u8 *current_vsel)
511 {
512 struct omap_volt_data *volt_data;
513 u32 vc_cmdval, vp_errgain_val;
514 u16 vp_mod, vc_mod;
515
516 /* Check if suffiecient pmic info is available for this vdd */
517 if (!vdd->pmic_info) {
518 pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
519 __func__, vdd->voltdm.name);
520 return -EINVAL;
521 }
522
523 if (!vdd->pmic_info->uv_to_vsel) {
524 pr_err("%s: PMIC function to convert voltage in uV to"
525 "vsel not registered. Hence unable to scale voltage"
526 "for vdd_%s\n", __func__, vdd->voltdm.name);
527 return -ENODATA;
528 }
529
530 if (!vdd->read_reg || !vdd->write_reg) {
531 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
532 __func__, vdd->voltdm.name);
533 return -EINVAL;
534 }
535
536 vp_mod = vdd->vp_reg.prm_mod;
537 vc_mod = vdd->vc_reg.prm_mod;
538
539 /* Get volt_data corresponding to target_volt */
540 volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt);
541 if (IS_ERR(volt_data))
542 volt_data = NULL;
543
544 *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
545 *current_vsel = vdd->read_reg(vp_mod, vdd->vp_offs.voltage);
546
547 /* Setting the ON voltage to the new target voltage */
548 vc_cmdval = vdd->read_reg(vc_mod, vdd->vc_reg.cmdval_reg);
549 vc_cmdval &= ~vdd->vc_reg.cmd_on_mask;
550 vc_cmdval |= (*target_vsel << vdd->vc_reg.cmd_on_shift);
551 vdd->write_reg(vc_cmdval, vc_mod, vdd->vc_reg.cmdval_reg);
552
553 /* Setting vp errorgain based on the voltage */
554 if (volt_data) {
555 vp_errgain_val = vdd->read_reg(vp_mod,
556 vdd->vp_offs.vpconfig);
557 vdd->vp_reg.vpconfig_errorgain = volt_data->vp_errgain;
558 vp_errgain_val &= ~vdd->vp_reg.vpconfig_errorgain_mask;
559 vp_errgain_val |= vdd->vp_reg.vpconfig_errorgain <<
560 vdd->vp_reg.vpconfig_errorgain_shift;
561 vdd->write_reg(vp_errgain_val, vp_mod,
562 vdd->vp_offs.vpconfig);
563 }
564
565 return 0;
566 }
567
568 static void _post_volt_scale(struct omap_vdd_info *vdd,
569 unsigned long target_volt, u8 target_vsel, u8 current_vsel)
570 {
571 u32 smps_steps = 0, smps_delay = 0;
572
573 smps_steps = abs(target_vsel - current_vsel);
574 /* SMPS slew rate / step size. 2us added as buffer. */
575 smps_delay = ((smps_steps * vdd->pmic_info->step_size) /
576 vdd->pmic_info->slew_rate) + 2;
577 udelay(smps_delay);
578
579 vdd->curr_volt = target_volt;
580 }
581
582 /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */
583 static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd,
584 unsigned long target_volt)
585 {
586 u32 loop_cnt = 0, retries_cnt = 0;
587 u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
588 u16 mod;
589 u8 target_vsel, current_vsel;
590 int ret;
591
592 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel);
593 if (ret)
594 return ret;
595
596 mod = vdd->vc_reg.prm_mod;
597
598 vc_valid = vdd->vc_reg.valid;
599 vc_bypass_val_reg = vdd->vc_reg.bypass_val_reg;
600 vc_bypass_value = (target_vsel << vdd->vc_reg.data_shift) |
601 (vdd->pmic_info->pmic_reg <<
602 vdd->vc_reg.regaddr_shift) |
603 (vdd->pmic_info->i2c_slave_addr <<
604 vdd->vc_reg.slaveaddr_shift);
605
606 vdd->write_reg(vc_bypass_value, mod, vc_bypass_val_reg);
607 vdd->write_reg(vc_bypass_value | vc_valid, mod, vc_bypass_val_reg);
608
609 vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
610 /*
611 * Loop till the bypass command is acknowledged from the SMPS.
612 * NOTE: This is legacy code. The loop count and retry count needs
613 * to be revisited.
614 */
615 while (!(vc_bypass_value & vc_valid)) {
616 loop_cnt++;
617
618 if (retries_cnt > 10) {
619 pr_warning("%s: Retry count exceeded\n", __func__);
620 return -ETIMEDOUT;
621 }
622
623 if (loop_cnt > 50) {
624 retries_cnt++;
625 loop_cnt = 0;
626 udelay(10);
627 }
628 vc_bypass_value = vdd->read_reg(mod, vc_bypass_val_reg);
629 }
630
631 _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
632 return 0;
633 }
634
635 /* VP force update method of voltage scaling */
636 static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd,
637 unsigned long target_volt)
638 {
639 u32 vpconfig;
640 u16 mod, ocp_mod;
641 u8 target_vsel, current_vsel, prm_irqst_reg;
642 int ret, timeout = 0;
643
644 ret = _pre_volt_scale(vdd, target_volt, &target_vsel, &current_vsel);
645 if (ret)
646 return ret;
647
648 mod = vdd->vp_reg.prm_mod;
649 ocp_mod = vdd->ocp_mod;
650 prm_irqst_reg = vdd->prm_irqst_reg;
651
652 /*
653 * Clear all pending TransactionDone interrupt/status. Typical latency
654 * is <3us
655 */
656 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
657 vdd->write_reg(vdd->vp_reg.tranxdone_status,
658 ocp_mod, prm_irqst_reg);
659 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
660 vdd->vp_reg.tranxdone_status))
661 break;
662 udelay(1);
663 }
664 if (timeout >= VP_TRANXDONE_TIMEOUT) {
665 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
666 "Voltage change aborted", __func__, vdd->voltdm.name);
667 return -ETIMEDOUT;
668 }
669
670 /* Configure for VP-Force Update */
671 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
672 vpconfig &= ~(vdd->vp_reg.vpconfig_initvdd |
673 vdd->vp_reg.vpconfig_forceupdate |
674 vdd->vp_reg.vpconfig_initvoltage_mask);
675 vpconfig |= ((target_vsel <<
676 vdd->vp_reg.vpconfig_initvoltage_shift));
677 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
678
679 /* Trigger initVDD value copy to voltage processor */
680 vpconfig |= vdd->vp_reg.vpconfig_initvdd;
681 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
682
683 /* Force update of voltage */
684 vpconfig |= vdd->vp_reg.vpconfig_forceupdate;
685 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
686
687 /*
688 * Wait for TransactionDone. Typical latency is <200us.
689 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
690 */
691 timeout = 0;
692 omap_test_timeout((vdd->read_reg(ocp_mod, prm_irqst_reg) &
693 vdd->vp_reg.tranxdone_status),
694 VP_TRANXDONE_TIMEOUT, timeout);
695 if (timeout >= VP_TRANXDONE_TIMEOUT)
696 pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
697 "TRANXDONE never got set after the voltage update\n",
698 __func__, vdd->voltdm.name);
699
700 _post_volt_scale(vdd, target_volt, target_vsel, current_vsel);
701
702 /*
703 * Disable TransactionDone interrupt , clear all status, clear
704 * control registers
705 */
706 timeout = 0;
707 while (timeout++ < VP_TRANXDONE_TIMEOUT) {
708 vdd->write_reg(vdd->vp_reg.tranxdone_status,
709 ocp_mod, prm_irqst_reg);
710 if (!(vdd->read_reg(ocp_mod, prm_irqst_reg) &
711 vdd->vp_reg.tranxdone_status))
712 break;
713 udelay(1);
714 }
715
716 if (timeout >= VP_TRANXDONE_TIMEOUT)
717 pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
718 "to clear the TRANXDONE status\n",
719 __func__, vdd->voltdm.name);
720
721 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
722 /* Clear initVDD copy trigger bit */
723 vpconfig &= ~vdd->vp_reg.vpconfig_initvdd;;
724 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
725 /* Clear force bit */
726 vpconfig &= ~vdd->vp_reg.vpconfig_forceupdate;
727 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
728
729 return 0;
730 }
731
732 /* OMAP3 specific voltage init functions */
733
734 /*
735 * Intializes the voltage controller registers with the PMIC and board
736 * specific parameters and voltage setup times for OMAP3.
737 */
738 static void __init omap3_vc_init(struct omap_vdd_info *vdd)
739 {
740 u32 vc_val;
741 u16 mod;
742 u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
743 static bool is_initialized;
744
745 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
746 pr_err("%s: PMIC info requried to configure vc for"
747 "vdd_%s not populated.Hence cannot initialize vc\n",
748 __func__, vdd->voltdm.name);
749 return;
750 }
751
752 if (!vdd->read_reg || !vdd->write_reg) {
753 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
754 __func__, vdd->voltdm.name);
755 return;
756 }
757
758 mod = vdd->vc_reg.prm_mod;
759
760 /* Set up the SMPS_SA(i2c slave address in VC */
761 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
762 vc_val &= ~vdd->vc_reg.smps_sa_mask;
763 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
764 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
765
766 /* Setup the VOLRA(pmic reg addr) in VC */
767 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
768 vc_val &= ~vdd->vc_reg.smps_volra_mask;
769 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
770 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
771
772 /*Configure the setup times */
773 vc_val = vdd->read_reg(mod, vdd->vc_reg.voltsetup_reg);
774 vc_val &= ~vdd->vc_reg.voltsetup_mask;
775 vc_val |= vdd->pmic_info->volt_setup_time <<
776 vdd->vc_reg.voltsetup_shift;
777 vdd->write_reg(vc_val, mod, vdd->vc_reg.voltsetup_reg);
778
779 /* Set up the on, inactive, retention and off voltage */
780 on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
781 onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
782 ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
783 off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
784 vc_val = ((on_vsel << vdd->vc_reg.cmd_on_shift) |
785 (onlp_vsel << vdd->vc_reg.cmd_onlp_shift) |
786 (ret_vsel << vdd->vc_reg.cmd_ret_shift) |
787 (off_vsel << vdd->vc_reg.cmd_off_shift));
788 vdd->write_reg(vc_val, mod, vdd->vc_reg.cmdval_reg);
789
790 if (is_initialized)
791 return;
792
793 /* Generic VC parameters init */
794 vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, mod,
795 OMAP3_PRM_VC_CH_CONF_OFFSET);
796 vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, mod,
797 OMAP3_PRM_VC_I2C_CFG_OFFSET);
798 vdd->write_reg(OMAP3_CLKSETUP, mod, OMAP3_PRM_CLKSETUP_OFFSET);
799 vdd->write_reg(OMAP3_VOLTOFFSET, mod, OMAP3_PRM_VOLTOFFSET_OFFSET);
800 vdd->write_reg(OMAP3_VOLTSETUP2, mod, OMAP3_PRM_VOLTSETUP2_OFFSET);
801 is_initialized = true;
802 }
803
804 /* Sets up all the VDD related info for OMAP3 */
805 static int __init omap3_vdd_data_configure(struct omap_vdd_info *vdd)
806 {
807 struct clk *sys_ck;
808 u32 sys_clk_speed, timeout_val, waittime;
809
810 if (!vdd->pmic_info) {
811 pr_err("%s: PMIC info requried to configure vdd_%s not"
812 "populated.Hence cannot initialize vdd_%s\n",
813 __func__, vdd->voltdm.name, vdd->voltdm.name);
814 return -EINVAL;
815 }
816
817 if (!strcmp(vdd->voltdm.name, "mpu")) {
818 if (cpu_is_omap3630())
819 vdd->volt_data = omap36xx_vddmpu_volt_data;
820 else
821 vdd->volt_data = omap34xx_vddmpu_volt_data;
822
823 vdd->vp_reg.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK;
824 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET;
825 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT;
826 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK;
827 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA0_SHIFT;
828 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA0_MASK;
829 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT;
830 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME1_MASK;
831 } else if (!strcmp(vdd->voltdm.name, "core")) {
832 if (cpu_is_omap3630())
833 vdd->volt_data = omap36xx_vddcore_volt_data;
834 else
835 vdd->volt_data = omap34xx_vddcore_volt_data;
836
837 vdd->vp_reg.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK;
838 vdd->vc_reg.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET;
839 vdd->vc_reg.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT;
840 vdd->vc_reg.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK;
841 vdd->vc_reg.smps_volra_shift = OMAP3430_VOLRA1_SHIFT;
842 vdd->vc_reg.smps_volra_mask = OMAP3430_VOLRA1_MASK;
843 vdd->vc_reg.voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT;
844 vdd->vc_reg.voltsetup_mask = OMAP3430_SETUP_TIME2_MASK;
845 } else {
846 pr_warning("%s: vdd_%s does not exisit in OMAP3\n",
847 __func__, vdd->voltdm.name);
848 return -EINVAL;
849 }
850
851 /*
852 * Sys clk rate is require to calculate vp timeout value and
853 * smpswaittimemin and smpswaittimemax.
854 */
855 sys_ck = clk_get(NULL, "sys_ck");
856 if (IS_ERR(sys_ck)) {
857 pr_warning("%s: Could not get the sys clk to calculate"
858 "various vdd_%s params\n", __func__, vdd->voltdm.name);
859 return -EINVAL;
860 }
861 sys_clk_speed = clk_get_rate(sys_ck);
862 clk_put(sys_ck);
863 /* Divide to avoid overflow */
864 sys_clk_speed /= 1000;
865
866 /* Generic voltage parameters */
867 vdd->curr_volt = 1200000;
868 vdd->ocp_mod = OCP_MOD;
869 vdd->prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET;
870 vdd->read_reg = omap3_voltage_read_reg;
871 vdd->write_reg = omap3_voltage_write_reg;
872 vdd->volt_scale = vp_forceupdate_scale_voltage;
873 vdd->vp_enabled = false;
874
875 /* VC parameters */
876 vdd->vc_reg.prm_mod = OMAP3430_GR_MOD;
877 vdd->vc_reg.smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET;
878 vdd->vc_reg.smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET;
879 vdd->vc_reg.bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET;
880 vdd->vc_reg.voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET;
881 vdd->vc_reg.data_shift = OMAP3430_DATA_SHIFT;
882 vdd->vc_reg.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT;
883 vdd->vc_reg.regaddr_shift = OMAP3430_REGADDR_SHIFT;
884 vdd->vc_reg.valid = OMAP3430_VALID_MASK;
885 vdd->vc_reg.cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT;
886 vdd->vc_reg.cmd_on_mask = OMAP3430_VC_CMD_ON_MASK;
887 vdd->vc_reg.cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT;
888 vdd->vc_reg.cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT;
889 vdd->vc_reg.cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT;
890
891 vdd->vp_reg.prm_mod = OMAP3430_GR_MOD;
892
893 /* VPCONFIG bit fields */
894 vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
895 OMAP3430_ERROROFFSET_SHIFT);
896 vdd->vp_reg.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK;
897 vdd->vp_reg.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT;
898 vdd->vp_reg.vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT;
899 vdd->vp_reg.vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK;
900 vdd->vp_reg.vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK;
901 vdd->vp_reg.vpconfig_initvdd = OMAP3430_INITVDD_MASK;
902 vdd->vp_reg.vpconfig_forceupdate = OMAP3430_FORCEUPDATE_MASK;
903 vdd->vp_reg.vpconfig_vpenable = OMAP3430_VPENABLE_MASK;
904
905 /* VSTEPMIN VSTEPMAX bit fields */
906 waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
907 sys_clk_speed) / 1000;
908 vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
909 vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
910 vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
911 vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
912 vdd->vp_reg.vstepmin_smpswaittimemin_shift =
913 OMAP3430_SMPSWAITTIMEMIN_SHIFT;
914 vdd->vp_reg.vstepmax_smpswaittimemax_shift =
915 OMAP3430_SMPSWAITTIMEMAX_SHIFT;
916 vdd->vp_reg.vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT;
917 vdd->vp_reg.vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT;
918
919 /* VLIMITTO bit fields */
920 timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
921 vdd->vp_reg.vlimitto_timeout = timeout_val;
922 vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
923 vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
924 vdd->vp_reg.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT;
925 vdd->vp_reg.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT;
926 vdd->vp_reg.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT;
927
928 return 0;
929 }
930
931 /* OMAP4 specific voltage init functions */
932 static void __init omap4_vc_init(struct omap_vdd_info *vdd)
933 {
934 u32 vc_val;
935 u16 mod;
936 static bool is_initialized;
937
938 if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
939 pr_err("%s: PMIC info requried to configure vc for"
940 "vdd_%s not populated.Hence cannot initialize vc\n",
941 __func__, vdd->voltdm.name);
942 return;
943 }
944
945 if (!vdd->read_reg || !vdd->write_reg) {
946 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
947 __func__, vdd->voltdm.name);
948 return;
949 }
950
951 mod = vdd->vc_reg.prm_mod;
952
953 /* Set up the SMPS_SA(i2c slave address in VC */
954 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_sa_reg);
955 vc_val &= ~vdd->vc_reg.smps_sa_mask;
956 vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_reg.smps_sa_shift;
957 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_sa_reg);
958
959 /* Setup the VOLRA(pmic reg addr) in VC */
960 vc_val = vdd->read_reg(mod, vdd->vc_reg.smps_volra_reg);
961 vc_val &= ~vdd->vc_reg.smps_volra_mask;
962 vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_reg.smps_volra_shift;
963 vdd->write_reg(vc_val, mod, vdd->vc_reg.smps_volra_reg);
964
965 /* TODO: Configure setup times and CMD_VAL values*/
966
967 if (is_initialized)
968 return;
969
970 /* Generic VC parameters init */
971 vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
972 OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
973 OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
974 vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
975
976 vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
977 vdd->write_reg(vc_val, mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
978
979 is_initialized = true;
980 }
981
982 /* Sets up all the VDD related info for OMAP4 */
983 static int __init omap4_vdd_data_configure(struct omap_vdd_info *vdd)
984 {
985 struct clk *sys_ck;
986 u32 sys_clk_speed, timeout_val, waittime;
987
988 if (!vdd->pmic_info) {
989 pr_err("%s: PMIC info requried to configure vdd_%s not"
990 "populated.Hence cannot initialize vdd_%s\n",
991 __func__, vdd->voltdm.name, vdd->voltdm.name);
992 return -EINVAL;
993 }
994
995 if (!strcmp(vdd->voltdm.name, "mpu")) {
996 vdd->volt_data = omap44xx_vdd_mpu_volt_data;
997 vdd->vp_reg.tranxdone_status =
998 OMAP4430_VP_MPU_TRANXDONE_ST_MASK;
999 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET;
1000 vdd->vc_reg.smps_sa_shift =
1001 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT;
1002 vdd->vc_reg.smps_sa_mask =
1003 OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK;
1004 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT;
1005 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK;
1006 vdd->vc_reg.voltsetup_reg =
1007 OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET;
1008 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET;
1009 } else if (!strcmp(vdd->voltdm.name, "core")) {
1010 vdd->volt_data = omap44xx_vdd_core_volt_data;
1011 vdd->vp_reg.tranxdone_status =
1012 OMAP4430_VP_CORE_TRANXDONE_ST_MASK;
1013 vdd->vc_reg.cmdval_reg =
1014 OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET;
1015 vdd->vc_reg.smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT;
1016 vdd->vc_reg.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK;
1017 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT;
1018 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK;
1019 vdd->vc_reg.voltsetup_reg =
1020 OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET;
1021 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1022 } else if (!strcmp(vdd->voltdm.name, "iva")) {
1023 vdd->volt_data = omap44xx_vdd_iva_volt_data;
1024 vdd->vp_reg.tranxdone_status =
1025 OMAP4430_VP_IVA_TRANXDONE_ST_MASK;
1026 vdd->vc_reg.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET;
1027 vdd->vc_reg.smps_sa_shift =
1028 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT;
1029 vdd->vc_reg.smps_sa_mask =
1030 OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK;
1031 vdd->vc_reg.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT;
1032 vdd->vc_reg.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK;
1033 vdd->vc_reg.voltsetup_reg =
1034 OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET;
1035 vdd->prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET;
1036 } else {
1037 pr_warning("%s: vdd_%s does not exisit in OMAP4\n",
1038 __func__, vdd->voltdm.name);
1039 return -EINVAL;
1040 }
1041
1042 /*
1043 * Sys clk rate is require to calculate vp timeout value and
1044 * smpswaittimemin and smpswaittimemax.
1045 */
1046 sys_ck = clk_get(NULL, "sys_clkin_ck");
1047 if (IS_ERR(sys_ck)) {
1048 pr_warning("%s: Could not get the sys clk to calculate"
1049 "various vdd_%s params\n", __func__, vdd->voltdm.name);
1050 return -EINVAL;
1051 }
1052 sys_clk_speed = clk_get_rate(sys_ck);
1053 clk_put(sys_ck);
1054 /* Divide to avoid overflow */
1055 sys_clk_speed /= 1000;
1056
1057 /* Generic voltage parameters */
1058 vdd->curr_volt = 1200000;
1059 vdd->ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST;
1060 vdd->read_reg = omap4_voltage_read_reg;
1061 vdd->write_reg = omap4_voltage_write_reg;
1062 vdd->volt_scale = vp_forceupdate_scale_voltage;
1063 vdd->vp_enabled = false;
1064
1065 /* VC parameters */
1066 vdd->vc_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1067 vdd->vc_reg.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET;
1068 vdd->vc_reg.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET;
1069 vdd->vc_reg.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET;
1070 vdd->vc_reg.data_shift = OMAP4430_DATA_SHIFT;
1071 vdd->vc_reg.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT;
1072 vdd->vc_reg.regaddr_shift = OMAP4430_REGADDR_SHIFT;
1073 vdd->vc_reg.valid = OMAP4430_VALID_MASK;
1074 vdd->vc_reg.cmd_on_shift = OMAP4430_ON_SHIFT;
1075 vdd->vc_reg.cmd_on_mask = OMAP4430_ON_MASK;
1076 vdd->vc_reg.cmd_onlp_shift = OMAP4430_ONLP_SHIFT;
1077 vdd->vc_reg.cmd_ret_shift = OMAP4430_RET_SHIFT;
1078 vdd->vc_reg.cmd_off_shift = OMAP4430_OFF_SHIFT;
1079
1080 vdd->vp_reg.prm_mod = OMAP4430_PRM_DEVICE_INST;
1081
1082 /* VPCONFIG bit fields */
1083 vdd->vp_reg.vpconfig_erroroffset = (vdd->pmic_info->vp_erroroffset <<
1084 OMAP4430_ERROROFFSET_SHIFT);
1085 vdd->vp_reg.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK;
1086 vdd->vp_reg.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT;
1087 vdd->vp_reg.vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT;
1088 vdd->vp_reg.vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK;
1089 vdd->vp_reg.vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK;
1090 vdd->vp_reg.vpconfig_initvdd = OMAP4430_INITVDD_MASK;
1091 vdd->vp_reg.vpconfig_forceupdate = OMAP4430_FORCEUPDATE_MASK;
1092 vdd->vp_reg.vpconfig_vpenable = OMAP4430_VPENABLE_MASK;
1093
1094 /* VSTEPMIN VSTEPMAX bit fields */
1095 waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
1096 sys_clk_speed) / 1000;
1097 vdd->vp_reg.vstepmin_smpswaittimemin = waittime;
1098 vdd->vp_reg.vstepmax_smpswaittimemax = waittime;
1099 vdd->vp_reg.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
1100 vdd->vp_reg.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
1101 vdd->vp_reg.vstepmin_smpswaittimemin_shift =
1102 OMAP4430_SMPSWAITTIMEMIN_SHIFT;
1103 vdd->vp_reg.vstepmax_smpswaittimemax_shift =
1104 OMAP4430_SMPSWAITTIMEMAX_SHIFT;
1105 vdd->vp_reg.vstepmin_stepmin_shift = OMAP4430_VSTEPMIN_SHIFT;
1106 vdd->vp_reg.vstepmax_stepmax_shift = OMAP4430_VSTEPMAX_SHIFT;
1107
1108 /* VLIMITTO bit fields */
1109 timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
1110 vdd->vp_reg.vlimitto_timeout = timeout_val;
1111 vdd->vp_reg.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
1112 vdd->vp_reg.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
1113 vdd->vp_reg.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT;
1114 vdd->vp_reg.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT;
1115 vdd->vp_reg.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT;
1116
1117 return 0;
1118 }
1119
1120 /* Public functions */
1121 /**
1122 * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage
1123 * @voltdm: pointer to the VDD for which current voltage info is needed
1124 *
1125 * API to get the current non-auto-compensated voltage for a VDD.
1126 * Returns 0 in case of error else returns the current voltage for the VDD.
1127 */
1128 unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm)
1129 {
1130 struct omap_vdd_info *vdd;
1131
1132 if (!voltdm || IS_ERR(voltdm)) {
1133 pr_warning("%s: VDD specified does not exist!\n", __func__);
1134 return 0;
1135 }
1136
1137 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1138
1139 return vdd->curr_volt;
1140 }
1141
1142 /**
1143 * omap_vp_get_curr_volt() - API to get the current vp voltage.
1144 * @voltdm: pointer to the VDD.
1145 *
1146 * This API returns the current voltage for the specified voltage processor
1147 */
1148 unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
1149 {
1150 struct omap_vdd_info *vdd;
1151 u8 curr_vsel;
1152
1153 if (!voltdm || IS_ERR(voltdm)) {
1154 pr_warning("%s: VDD specified does not exist!\n", __func__);
1155 return 0;
1156 }
1157
1158 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1159 if (!vdd->read_reg) {
1160 pr_err("%s: No read API for reading vdd_%s regs\n",
1161 __func__, voltdm->name);
1162 return 0;
1163 }
1164
1165 curr_vsel = vdd->read_reg(vdd->vp_reg.prm_mod,
1166 vdd->vp_offs.voltage);
1167
1168 if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
1169 pr_warning("%s: PMIC function to convert vsel to voltage"
1170 "in uV not registerd\n", __func__);
1171 return 0;
1172 }
1173
1174 return vdd->pmic_info->vsel_to_uv(curr_vsel);
1175 }
1176
1177 /**
1178 * omap_vp_enable() - API to enable a particular VP
1179 * @voltdm: pointer to the VDD whose VP is to be enabled.
1180 *
1181 * This API enables a particular voltage processor. Needed by the smartreflex
1182 * class drivers.
1183 */
1184 void omap_vp_enable(struct voltagedomain *voltdm)
1185 {
1186 struct omap_vdd_info *vdd;
1187 u32 vpconfig;
1188 u16 mod;
1189
1190 if (!voltdm || IS_ERR(voltdm)) {
1191 pr_warning("%s: VDD specified does not exist!\n", __func__);
1192 return;
1193 }
1194
1195 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1196 if (!vdd->read_reg || !vdd->write_reg) {
1197 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1198 __func__, voltdm->name);
1199 return;
1200 }
1201
1202 mod = vdd->vp_reg.prm_mod;
1203
1204 /* If VP is already enabled, do nothing. Return */
1205 if (vdd->vp_enabled)
1206 return;
1207
1208 vp_latch_vsel(vdd);
1209
1210 /* Enable VP */
1211 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1212 vpconfig |= vdd->vp_reg.vpconfig_vpenable;
1213 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1214 vdd->vp_enabled = true;
1215 }
1216
1217 /**
1218 * omap_vp_disable() - API to disable a particular VP
1219 * @voltdm: pointer to the VDD whose VP is to be disabled.
1220 *
1221 * This API disables a particular voltage processor. Needed by the smartreflex
1222 * class drivers.
1223 */
1224 void omap_vp_disable(struct voltagedomain *voltdm)
1225 {
1226 struct omap_vdd_info *vdd;
1227 u32 vpconfig;
1228 u16 mod;
1229 int timeout;
1230
1231 if (!voltdm || IS_ERR(voltdm)) {
1232 pr_warning("%s: VDD specified does not exist!\n", __func__);
1233 return;
1234 }
1235
1236 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1237 if (!vdd->read_reg || !vdd->write_reg) {
1238 pr_err("%s: No read/write API for accessing vdd_%s regs\n",
1239 __func__, voltdm->name);
1240 return;
1241 }
1242
1243 mod = vdd->vp_reg.prm_mod;
1244
1245 /* If VP is already disabled, do nothing. Return */
1246 if (!vdd->vp_enabled) {
1247 pr_warning("%s: Trying to disable VP for vdd_%s when"
1248 "it is already disabled\n", __func__, voltdm->name);
1249 return;
1250 }
1251
1252 /* Disable VP */
1253 vpconfig = vdd->read_reg(mod, vdd->vp_offs.vpconfig);
1254 vpconfig &= ~vdd->vp_reg.vpconfig_vpenable;
1255 vdd->write_reg(vpconfig, mod, vdd->vp_offs.vpconfig);
1256
1257 /*
1258 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
1259 */
1260 omap_test_timeout((vdd->read_reg(mod, vdd->vp_offs.vstatus)),
1261 VP_IDLE_TIMEOUT, timeout);
1262
1263 if (timeout >= VP_IDLE_TIMEOUT)
1264 pr_warning("%s: vdd_%s idle timedout\n",
1265 __func__, voltdm->name);
1266
1267 vdd->vp_enabled = false;
1268
1269 return;
1270 }
1271
1272 /**
1273 * omap_voltage_scale_vdd() - API to scale voltage of a particular
1274 * voltage domain.
1275 * @voltdm: pointer to the VDD which is to be scaled.
1276 * @target_volt: The target voltage of the voltage domain
1277 *
1278 * This API should be called by the kernel to do the voltage scaling
1279 * for a particular voltage domain during dvfs or any other situation.
1280 */
1281 int omap_voltage_scale_vdd(struct voltagedomain *voltdm,
1282 unsigned long target_volt)
1283 {
1284 struct omap_vdd_info *vdd;
1285
1286 if (!voltdm || IS_ERR(voltdm)) {
1287 pr_warning("%s: VDD specified does not exist!\n", __func__);
1288 return -EINVAL;
1289 }
1290
1291 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1292
1293 if (!vdd->volt_scale) {
1294 pr_err("%s: No voltage scale API registered for vdd_%s\n",
1295 __func__, voltdm->name);
1296 return -ENODATA;
1297 }
1298
1299 return vdd->volt_scale(vdd, target_volt);
1300 }
1301
1302 /**
1303 * omap_voltage_reset() - Resets the voltage of a particular voltage domain
1304 * to that of the current OPP.
1305 * @voltdm: pointer to the VDD whose voltage is to be reset.
1306 *
1307 * This API finds out the correct voltage the voltage domain is supposed
1308 * to be at and resets the voltage to that level. Should be used expecially
1309 * while disabling any voltage compensation modules.
1310 */
1311 void omap_voltage_reset(struct voltagedomain *voltdm)
1312 {
1313 unsigned long target_uvdc;
1314
1315 if (!voltdm || IS_ERR(voltdm)) {
1316 pr_warning("%s: VDD specified does not exist!\n", __func__);
1317 return;
1318 }
1319
1320 target_uvdc = omap_voltage_get_nom_volt(voltdm);
1321 if (!target_uvdc) {
1322 pr_err("%s: unable to find current voltage for vdd_%s\n",
1323 __func__, voltdm->name);
1324 return;
1325 }
1326
1327 omap_voltage_scale_vdd(voltdm, target_uvdc);
1328 }
1329
1330 /**
1331 * omap_voltage_get_volttable() - API to get the voltage table associated with a
1332 * particular voltage domain.
1333 * @voltdm: pointer to the VDD for which the voltage table is required
1334 * @volt_data: the voltage table for the particular vdd which is to be
1335 * populated by this API
1336 *
1337 * This API populates the voltage table associated with a VDD into the
1338 * passed parameter pointer. Returns the count of distinct voltages
1339 * supported by this vdd.
1340 *
1341 */
1342 void omap_voltage_get_volttable(struct voltagedomain *voltdm,
1343 struct omap_volt_data **volt_data)
1344 {
1345 struct omap_vdd_info *vdd;
1346
1347 if (!voltdm || IS_ERR(voltdm)) {
1348 pr_warning("%s: VDD specified does not exist!\n", __func__);
1349 return;
1350 }
1351
1352 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1353
1354 *volt_data = vdd->volt_data;
1355 }
1356
1357 /**
1358 * omap_voltage_get_voltdata() - API to get the voltage table entry for a
1359 * particular voltage
1360 * @voltdm: pointer to the VDD whose voltage table has to be searched
1361 * @volt: the voltage to be searched in the voltage table
1362 *
1363 * This API searches through the voltage table for the required voltage
1364 * domain and tries to find a matching entry for the passed voltage volt.
1365 * If a matching entry is found volt_data is populated with that entry.
1366 * This API searches only through the non-compensated voltages int the
1367 * voltage table.
1368 * Returns pointer to the voltage table entry corresponding to volt on
1369 * sucess. Returns -ENODATA if no voltage table exisits for the passed voltage
1370 * domain or if there is no matching entry.
1371 */
1372 struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
1373 unsigned long volt)
1374 {
1375 struct omap_vdd_info *vdd;
1376 int i;
1377
1378 if (!voltdm || IS_ERR(voltdm)) {
1379 pr_warning("%s: VDD specified does not exist!\n", __func__);
1380 return ERR_PTR(-EINVAL);
1381 }
1382
1383 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1384
1385 if (!vdd->volt_data) {
1386 pr_warning("%s: voltage table does not exist for vdd_%s\n",
1387 __func__, voltdm->name);
1388 return ERR_PTR(-ENODATA);
1389 }
1390
1391 for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) {
1392 if (vdd->volt_data[i].volt_nominal == volt)
1393 return &vdd->volt_data[i];
1394 }
1395
1396 pr_notice("%s: Unable to match the current voltage with the voltage"
1397 "table for vdd_%s\n", __func__, voltdm->name);
1398
1399 return ERR_PTR(-ENODATA);
1400 }
1401
1402 /**
1403 * omap_voltage_register_pmic() - API to register PMIC specific data
1404 * @voltdm: pointer to the VDD for which the PMIC specific data is
1405 * to be registered
1406 * @pmic_info: the structure containing pmic info
1407 *
1408 * This API is to be called by the SOC/PMIC file to specify the
1409 * pmic specific info as present in omap_volt_pmic_info structure.
1410 */
1411 int omap_voltage_register_pmic(struct voltagedomain *voltdm,
1412 struct omap_volt_pmic_info *pmic_info)
1413 {
1414 struct omap_vdd_info *vdd;
1415
1416 if (!voltdm || IS_ERR(voltdm)) {
1417 pr_warning("%s: VDD specified does not exist!\n", __func__);
1418 return -EINVAL;
1419 }
1420
1421 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1422
1423 vdd->pmic_info = pmic_info;
1424
1425 return 0;
1426 }
1427
1428 /**
1429 * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory
1430 * corresponding to a voltage domain.
1431 *
1432 * @voltdm: pointer to the VDD whose debug directory is required.
1433 *
1434 * This API returns pointer to the debugfs directory corresponding
1435 * to the voltage domain. Should be used by drivers requiring to
1436 * add any debug entry for a particular voltage domain. Returns NULL
1437 * in case of error.
1438 */
1439 struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm)
1440 {
1441 struct omap_vdd_info *vdd;
1442
1443 if (!voltdm || IS_ERR(voltdm)) {
1444 pr_warning("%s: VDD specified does not exist!\n", __func__);
1445 return NULL;
1446 }
1447
1448 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1449
1450 return vdd->debug_dir;
1451 }
1452
1453 /**
1454 * omap_change_voltscale_method() - API to change the voltage scaling method.
1455 * @voltdm: pointer to the VDD whose voltage scaling method
1456 * has to be changed.
1457 * @voltscale_method: the method to be used for voltage scaling.
1458 *
1459 * This API can be used by the board files to change the method of voltage
1460 * scaling between vpforceupdate and vcbypass. The parameter values are
1461 * defined in voltage.h
1462 */
1463 void omap_change_voltscale_method(struct voltagedomain *voltdm,
1464 int voltscale_method)
1465 {
1466 struct omap_vdd_info *vdd;
1467
1468 if (!voltdm || IS_ERR(voltdm)) {
1469 pr_warning("%s: VDD specified does not exist!\n", __func__);
1470 return;
1471 }
1472
1473 vdd = container_of(voltdm, struct omap_vdd_info, voltdm);
1474
1475 switch (voltscale_method) {
1476 case VOLTSCALE_VPFORCEUPDATE:
1477 vdd->volt_scale = vp_forceupdate_scale_voltage;
1478 return;
1479 case VOLTSCALE_VCBYPASS:
1480 vdd->volt_scale = vc_bypass_scale_voltage;
1481 return;
1482 default:
1483 pr_warning("%s: Trying to change the method of voltage scaling"
1484 "to an unsupported one!\n", __func__);
1485 }
1486 }
1487
1488 /**
1489 * omap_voltage_domain_lookup() - API to get the voltage domain pointer
1490 * @name: Name of the voltage domain
1491 *
1492 * This API looks up in the global vdd_info struct for the
1493 * existence of voltage domain <name>. If it exists, the API returns
1494 * a pointer to the voltage domain structure corresponding to the
1495 * VDD<name>. Else retuns error pointer.
1496 */
1497 struct voltagedomain *omap_voltage_domain_lookup(char *name)
1498 {
1499 int i;
1500
1501 if (!vdd_info) {
1502 pr_err("%s: Voltage driver init not yet happened.Faulting!\n",
1503 __func__);
1504 return ERR_PTR(-EINVAL);
1505 }
1506
1507 if (!name) {
1508 pr_err("%s: No name to get the votage domain!\n", __func__);
1509 return ERR_PTR(-EINVAL);
1510 }
1511
1512 for (i = 0; i < nr_scalable_vdd; i++) {
1513 if (!(strcmp(name, vdd_info[i].voltdm.name)))
1514 return &vdd_info[i].voltdm;
1515 }
1516
1517 return ERR_PTR(-EINVAL);
1518 }
1519
1520 /**
1521 * omap_voltage_late_init() - Init the various voltage parameters
1522 *
1523 * This API is to be called in the later stages of the
1524 * system boot to init the voltage controller and
1525 * voltage processors.
1526 */
1527 int __init omap_voltage_late_init(void)
1528 {
1529 int i;
1530
1531 if (!vdd_info) {
1532 pr_err("%s: Voltage driver support not added\n",
1533 __func__);
1534 return -EINVAL;
1535 }
1536
1537 voltage_dir = debugfs_create_dir("voltage", NULL);
1538 if (IS_ERR(voltage_dir))
1539 pr_err("%s: Unable to create voltage debugfs main dir\n",
1540 __func__);
1541 for (i = 0; i < nr_scalable_vdd; i++) {
1542 if (vdd_data_configure(&vdd_info[i]))
1543 continue;
1544 vc_init(&vdd_info[i]);
1545 vp_init(&vdd_info[i]);
1546 vdd_debugfs_init(&vdd_info[i]);
1547 }
1548
1549 return 0;
1550 }
1551
1552 /**
1553 * omap_voltage_early_init()- Volatage driver early init
1554 */
1555 static int __init omap_voltage_early_init(void)
1556 {
1557 if (cpu_is_omap34xx()) {
1558 vdd_info = omap3_vdd_info;
1559 nr_scalable_vdd = OMAP3_NR_SCALABLE_VDD;
1560 vc_init = omap3_vc_init;
1561 vdd_data_configure = omap3_vdd_data_configure;
1562 } else if (cpu_is_omap44xx()) {
1563 vdd_info = omap4_vdd_info;
1564 nr_scalable_vdd = OMAP4_NR_SCALABLE_VDD;
1565 vc_init = omap4_vc_init;
1566 vdd_data_configure = omap4_vdd_data_configure;
1567 } else {
1568 pr_warning("%s: voltage driver support not added\n", __func__);
1569 }
1570
1571 return 0;
1572 }
1573 core_initcall(omap_voltage_early_init);
Linus' kernel tree