1 /* sunzilog.c: Zilog serial driver for Sparc systems.
3 * Driver for Zilog serial chips found on Sun workstations and
4 * servers. This driver could actually be made more generic.
6 * This is based on the old drivers/sbus/char/zs.c code. A lot
7 * of code has been simply moved over directly from there but
8 * much has been rewritten. Credits therefore go out to Eddie
9 * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their
12 * Copyright (C) 2002, 2006, 2007 David S. Miller (davem@davemloft.net)
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/delay.h>
19 #include <linux/tty.h>
20 #include <linux/tty_flip.h>
21 #include <linux/major.h>
22 #include <linux/string.h>
23 #include <linux/ptrace.h>
24 #include <linux/ioport.h>
25 #include <linux/slab.h>
26 #include <linux/circ_buf.h>
27 #include <linux/serial.h>
28 #include <linux/sysrq.h>
29 #include <linux/console.h>
30 #include <linux/spinlock.h>
32 #include <linux/serio.h>
34 #include <linux/init.h>
35 #include <linux/of_device.h>
40 #include <asm/setup.h>
42 #if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
46 #include <linux/serial_core.h>
47 #include <linux/sunserialcore.h>
51 /* On 32-bit sparcs we need to delay after register accesses
52 * to accommodate sun4 systems, but we do not need to flush writes.
53 * On 64-bit sparc we only need to flush single writes to ensure
56 #ifndef CONFIG_SPARC64
57 #define ZSDELAY() udelay(5)
58 #define ZSDELAY_LONG() udelay(20)
59 #define ZS_WSYNC(channel) do { } while (0)
62 #define ZSDELAY_LONG()
63 #define ZS_WSYNC(__channel) \
64 readb(&((__channel)->control))
67 #define ZS_CLOCK 4915200 /* Zilog input clock rate. */
68 #define ZS_CLOCK_DIVISOR 16 /* Divisor this driver uses. */
71 * We wrap our port structure around the generic uart_port.
73 struct uart_sunzilog_port
{
74 struct uart_port port
;
76 /* IRQ servicing chain. */
77 struct uart_sunzilog_port
*next
;
79 /* Current values of Zilog write registers. */
80 unsigned char curregs
[NUM_ZSREGS
];
83 #define SUNZILOG_FLAG_CONS_KEYB 0x00000001
84 #define SUNZILOG_FLAG_CONS_MOUSE 0x00000002
85 #define SUNZILOG_FLAG_IS_CONS 0x00000004
86 #define SUNZILOG_FLAG_IS_KGDB 0x00000008
87 #define SUNZILOG_FLAG_MODEM_STATUS 0x00000010
88 #define SUNZILOG_FLAG_IS_CHANNEL_A 0x00000020
89 #define SUNZILOG_FLAG_REGS_HELD 0x00000040
90 #define SUNZILOG_FLAG_TX_STOPPED 0x00000080
91 #define SUNZILOG_FLAG_TX_ACTIVE 0x00000100
92 #define SUNZILOG_FLAG_ESCC 0x00000200
93 #define SUNZILOG_FLAG_ISR_HANDLER 0x00000400
97 unsigned char parity_mask
;
98 unsigned char prev_status
;
106 static void sunzilog_putchar(struct uart_port
*port
, int ch
);
108 #define ZILOG_CHANNEL_FROM_PORT(PORT) ((struct zilog_channel __iomem *)((PORT)->membase))
109 #define UART_ZILOG(PORT) ((struct uart_sunzilog_port *)(PORT))
111 #define ZS_IS_KEYB(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_KEYB)
112 #define ZS_IS_MOUSE(UP) ((UP)->flags & SUNZILOG_FLAG_CONS_MOUSE)
113 #define ZS_IS_CONS(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CONS)
114 #define ZS_IS_KGDB(UP) ((UP)->flags & SUNZILOG_FLAG_IS_KGDB)
115 #define ZS_WANTS_MODEM_STATUS(UP) ((UP)->flags & SUNZILOG_FLAG_MODEM_STATUS)
116 #define ZS_IS_CHANNEL_A(UP) ((UP)->flags & SUNZILOG_FLAG_IS_CHANNEL_A)
117 #define ZS_REGS_HELD(UP) ((UP)->flags & SUNZILOG_FLAG_REGS_HELD)
118 #define ZS_TX_STOPPED(UP) ((UP)->flags & SUNZILOG_FLAG_TX_STOPPED)
119 #define ZS_TX_ACTIVE(UP) ((UP)->flags & SUNZILOG_FLAG_TX_ACTIVE)
121 /* Reading and writing Zilog8530 registers. The delays are to make this
122 * driver work on the Sun4 which needs a settling delay after each chip
123 * register access, other machines handle this in hardware via auxiliary
124 * flip-flops which implement the settle time we do in software.
126 * The port lock must be held and local IRQs must be disabled
127 * when {read,write}_zsreg is invoked.
129 static unsigned char read_zsreg(struct zilog_channel __iomem
*channel
,
132 unsigned char retval
;
134 writeb(reg
, &channel
->control
);
136 retval
= readb(&channel
->control
);
142 static void write_zsreg(struct zilog_channel __iomem
*channel
,
143 unsigned char reg
, unsigned char value
)
145 writeb(reg
, &channel
->control
);
147 writeb(value
, &channel
->control
);
151 static void sunzilog_clear_fifo(struct zilog_channel __iomem
*channel
)
155 for (i
= 0; i
< 32; i
++) {
156 unsigned char regval
;
158 regval
= readb(&channel
->control
);
160 if (regval
& Rx_CH_AV
)
163 regval
= read_zsreg(channel
, R1
);
164 readb(&channel
->data
);
167 if (regval
& (PAR_ERR
| Rx_OVR
| CRC_ERR
)) {
168 writeb(ERR_RES
, &channel
->control
);
175 /* This function must only be called when the TX is not busy. The UART
176 * port lock must be held and local interrupts disabled.
178 static int __load_zsregs(struct zilog_channel __iomem
*channel
, unsigned char *regs
)
184 /* Let pending transmits finish. */
185 for (i
= 0; i
< 1000; i
++) {
186 unsigned char stat
= read_zsreg(channel
, R1
);
192 writeb(ERR_RES
, &channel
->control
);
196 sunzilog_clear_fifo(channel
);
198 /* Disable all interrupts. */
199 write_zsreg(channel
, R1
,
200 regs
[R1
] & ~(RxINT_MASK
| TxINT_ENAB
| EXT_INT_ENAB
));
202 /* Set parity, sync config, stop bits, and clock divisor. */
203 write_zsreg(channel
, R4
, regs
[R4
]);
205 /* Set misc. TX/RX control bits. */
206 write_zsreg(channel
, R10
, regs
[R10
]);
208 /* Set TX/RX controls sans the enable bits. */
209 write_zsreg(channel
, R3
, regs
[R3
] & ~RxENAB
);
210 write_zsreg(channel
, R5
, regs
[R5
] & ~TxENAB
);
212 /* Synchronous mode config. */
213 write_zsreg(channel
, R6
, regs
[R6
]);
214 write_zsreg(channel
, R7
, regs
[R7
]);
216 /* Don't mess with the interrupt vector (R2, unused by us) and
217 * master interrupt control (R9). We make sure this is setup
218 * properly at probe time then never touch it again.
221 /* Disable baud generator. */
222 write_zsreg(channel
, R14
, regs
[R14
] & ~BRENAB
);
224 /* Clock mode control. */
225 write_zsreg(channel
, R11
, regs
[R11
]);
227 /* Lower and upper byte of baud rate generator divisor. */
228 write_zsreg(channel
, R12
, regs
[R12
]);
229 write_zsreg(channel
, R13
, regs
[R13
]);
231 /* Now rewrite R14, with BRENAB (if set). */
232 write_zsreg(channel
, R14
, regs
[R14
]);
234 /* External status interrupt control. */
235 write_zsreg(channel
, R15
, (regs
[R15
] | WR7pEN
) & ~FIFOEN
);
237 /* ESCC Extension Register */
238 r15
= read_zsreg(channel
, R15
);
240 write_zsreg(channel
, R7
, regs
[R7p
]);
242 /* External status interrupt and FIFO control. */
243 write_zsreg(channel
, R15
, regs
[R15
] & ~WR7pEN
);
246 /* Clear FIFO bit case it is an issue */
247 regs
[R15
] &= ~FIFOEN
;
251 /* Reset external status interrupts. */
252 write_zsreg(channel
, R0
, RES_EXT_INT
); /* First Latch */
253 write_zsreg(channel
, R0
, RES_EXT_INT
); /* Second Latch */
255 /* Rewrite R3/R5, this time without enables masked. */
256 write_zsreg(channel
, R3
, regs
[R3
]);
257 write_zsreg(channel
, R5
, regs
[R5
]);
259 /* Rewrite R1, this time without IRQ enabled masked. */
260 write_zsreg(channel
, R1
, regs
[R1
]);
265 /* Reprogram the Zilog channel HW registers with the copies found in the
266 * software state struct. If the transmitter is busy, we defer this update
267 * until the next TX complete interrupt. Else, we do it right now.
269 * The UART port lock must be held and local interrupts disabled.
271 static void sunzilog_maybe_update_regs(struct uart_sunzilog_port
*up
,
272 struct zilog_channel __iomem
*channel
)
274 if (!ZS_REGS_HELD(up
)) {
275 if (ZS_TX_ACTIVE(up
)) {
276 up
->flags
|= SUNZILOG_FLAG_REGS_HELD
;
278 __load_zsregs(channel
, up
->curregs
);
283 static void sunzilog_change_mouse_baud(struct uart_sunzilog_port
*up
)
285 unsigned int cur_cflag
= up
->cflag
;
289 up
->cflag
|= suncore_mouse_baud_cflag_next(cur_cflag
, &new_baud
);
291 brg
= BPS_TO_BRG(new_baud
, ZS_CLOCK
/ ZS_CLOCK_DIVISOR
);
292 up
->curregs
[R12
] = (brg
& 0xff);
293 up
->curregs
[R13
] = (brg
>> 8) & 0xff;
294 sunzilog_maybe_update_regs(up
, ZILOG_CHANNEL_FROM_PORT(&up
->port
));
297 static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port
*up
,
298 unsigned char ch
, int is_break
)
300 if (ZS_IS_KEYB(up
)) {
301 /* Stop-A is handled by drivers/char/keyboard.c now. */
304 serio_interrupt(&up
->serio
, ch
, 0);
306 } else if (ZS_IS_MOUSE(up
)) {
307 int ret
= suncore_mouse_baud_detection(ch
, is_break
);
311 sunzilog_change_mouse_baud(up
);
319 serio_interrupt(&up
->serio
, ch
, 0);
326 static struct tty_struct
*
327 sunzilog_receive_chars(struct uart_sunzilog_port
*up
,
328 struct zilog_channel __iomem
*channel
)
330 struct tty_struct
*tty
;
331 unsigned char ch
, r1
, flag
;
334 if (up
->port
.state
!= NULL
&& /* Unopened serial console */
335 up
->port
.state
->port
.tty
!= NULL
) /* Keyboard || mouse */
336 tty
= up
->port
.state
->port
.tty
;
340 r1
= read_zsreg(channel
, R1
);
341 if (r1
& (PAR_ERR
| Rx_OVR
| CRC_ERR
)) {
342 writeb(ERR_RES
, &channel
->control
);
347 ch
= readb(&channel
->control
);
350 /* This funny hack depends upon BRK_ABRT not interfering
351 * with the other bits we care about in R1.
356 if (!(ch
& Rx_CH_AV
))
359 ch
= readb(&channel
->data
);
362 ch
&= up
->parity_mask
;
364 if (unlikely(ZS_IS_KEYB(up
)) || unlikely(ZS_IS_MOUSE(up
))) {
365 sunzilog_kbdms_receive_chars(up
, ch
, 0);
370 uart_handle_sysrq_char(&up
->port
, ch
);
374 /* A real serial line, record the character and status. */
376 up
->port
.icount
.rx
++;
377 if (r1
& (BRK_ABRT
| PAR_ERR
| Rx_OVR
| CRC_ERR
)) {
379 r1
&= ~(PAR_ERR
| CRC_ERR
);
380 up
->port
.icount
.brk
++;
381 if (uart_handle_break(&up
->port
))
384 else if (r1
& PAR_ERR
)
385 up
->port
.icount
.parity
++;
386 else if (r1
& CRC_ERR
)
387 up
->port
.icount
.frame
++;
389 up
->port
.icount
.overrun
++;
390 r1
&= up
->port
.read_status_mask
;
393 else if (r1
& PAR_ERR
)
395 else if (r1
& CRC_ERR
)
398 if (uart_handle_sysrq_char(&up
->port
, ch
))
401 if (up
->port
.ignore_status_mask
== 0xff ||
402 (r1
& up
->port
.ignore_status_mask
) == 0) {
403 tty_insert_flip_char(tty
, ch
, flag
);
406 tty_insert_flip_char(tty
, 0, TTY_OVERRUN
);
412 static void sunzilog_status_handle(struct uart_sunzilog_port
*up
,
413 struct zilog_channel __iomem
*channel
)
415 unsigned char status
;
417 status
= readb(&channel
->control
);
420 writeb(RES_EXT_INT
, &channel
->control
);
424 if (status
& BRK_ABRT
) {
426 sunzilog_kbdms_receive_chars(up
, 0, 1);
427 if (ZS_IS_CONS(up
)) {
428 /* Wait for BREAK to deassert to avoid potentially
429 * confusing the PROM.
432 status
= readb(&channel
->control
);
434 if (!(status
& BRK_ABRT
))
442 if (ZS_WANTS_MODEM_STATUS(up
)) {
444 up
->port
.icount
.dsr
++;
446 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
447 * But it does not tell us which bit has changed, we have to keep
448 * track of this ourselves.
450 if ((status
^ up
->prev_status
) ^ DCD
)
451 uart_handle_dcd_change(&up
->port
,
453 if ((status
^ up
->prev_status
) ^ CTS
)
454 uart_handle_cts_change(&up
->port
,
457 wake_up_interruptible(&up
->port
.state
->port
.delta_msr_wait
);
460 up
->prev_status
= status
;
463 static void sunzilog_transmit_chars(struct uart_sunzilog_port
*up
,
464 struct zilog_channel __iomem
*channel
)
466 struct circ_buf
*xmit
;
468 if (ZS_IS_CONS(up
)) {
469 unsigned char status
= readb(&channel
->control
);
472 /* TX still busy? Just wait for the next TX done interrupt.
474 * It can occur because of how we do serial console writes. It would
475 * be nice to transmit console writes just like we normally would for
476 * a TTY line. (ie. buffered and TX interrupt driven). That is not
477 * easy because console writes cannot sleep. One solution might be
478 * to poll on enough port->xmit space becoming free. -DaveM
480 if (!(status
& Tx_BUF_EMP
))
484 up
->flags
&= ~SUNZILOG_FLAG_TX_ACTIVE
;
486 if (ZS_REGS_HELD(up
)) {
487 __load_zsregs(channel
, up
->curregs
);
488 up
->flags
&= ~SUNZILOG_FLAG_REGS_HELD
;
491 if (ZS_TX_STOPPED(up
)) {
492 up
->flags
&= ~SUNZILOG_FLAG_TX_STOPPED
;
496 if (up
->port
.x_char
) {
497 up
->flags
|= SUNZILOG_FLAG_TX_ACTIVE
;
498 writeb(up
->port
.x_char
, &channel
->data
);
502 up
->port
.icount
.tx
++;
507 if (up
->port
.state
== NULL
)
509 xmit
= &up
->port
.state
->xmit
;
510 if (uart_circ_empty(xmit
))
513 if (uart_tx_stopped(&up
->port
))
516 up
->flags
|= SUNZILOG_FLAG_TX_ACTIVE
;
517 writeb(xmit
->buf
[xmit
->tail
], &channel
->data
);
521 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
522 up
->port
.icount
.tx
++;
524 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
525 uart_write_wakeup(&up
->port
);
530 writeb(RES_Tx_P
, &channel
->control
);
535 static irqreturn_t
sunzilog_interrupt(int irq
, void *dev_id
)
537 struct uart_sunzilog_port
*up
= dev_id
;
540 struct zilog_channel __iomem
*channel
541 = ZILOG_CHANNEL_FROM_PORT(&up
->port
);
542 struct tty_struct
*tty
;
545 spin_lock(&up
->port
.lock
);
546 r3
= read_zsreg(channel
, R3
);
550 if (r3
& (CHAEXT
| CHATxIP
| CHARxIP
)) {
551 writeb(RES_H_IUS
, &channel
->control
);
556 tty
= sunzilog_receive_chars(up
, channel
);
558 sunzilog_status_handle(up
, channel
);
560 sunzilog_transmit_chars(up
, channel
);
562 spin_unlock(&up
->port
.lock
);
565 tty_flip_buffer_push(tty
);
569 channel
= ZILOG_CHANNEL_FROM_PORT(&up
->port
);
571 spin_lock(&up
->port
.lock
);
573 if (r3
& (CHBEXT
| CHBTxIP
| CHBRxIP
)) {
574 writeb(RES_H_IUS
, &channel
->control
);
579 tty
= sunzilog_receive_chars(up
, channel
);
581 sunzilog_status_handle(up
, channel
);
583 sunzilog_transmit_chars(up
, channel
);
585 spin_unlock(&up
->port
.lock
);
588 tty_flip_buffer_push(tty
);
596 /* A convenient way to quickly get R0 status. The caller must _not_ hold the
597 * port lock, it is acquired here.
599 static __inline__
unsigned char sunzilog_read_channel_status(struct uart_port
*port
)
601 struct zilog_channel __iomem
*channel
;
602 unsigned char status
;
604 channel
= ZILOG_CHANNEL_FROM_PORT(port
);
605 status
= readb(&channel
->control
);
611 /* The port lock is not held. */
612 static unsigned int sunzilog_tx_empty(struct uart_port
*port
)
615 unsigned char status
;
618 spin_lock_irqsave(&port
->lock
, flags
);
620 status
= sunzilog_read_channel_status(port
);
622 spin_unlock_irqrestore(&port
->lock
, flags
);
624 if (status
& Tx_BUF_EMP
)
632 /* The port lock is held and interrupts are disabled. */
633 static unsigned int sunzilog_get_mctrl(struct uart_port
*port
)
635 unsigned char status
;
638 status
= sunzilog_read_channel_status(port
);
651 /* The port lock is held and interrupts are disabled. */
652 static void sunzilog_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
654 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
655 struct zilog_channel __iomem
*channel
= ZILOG_CHANNEL_FROM_PORT(port
);
656 unsigned char set_bits
, clear_bits
;
658 set_bits
= clear_bits
= 0;
660 if (mctrl
& TIOCM_RTS
)
664 if (mctrl
& TIOCM_DTR
)
669 /* NOTE: Not subject to 'transmitter active' rule. */
670 up
->curregs
[R5
] |= set_bits
;
671 up
->curregs
[R5
] &= ~clear_bits
;
672 write_zsreg(channel
, R5
, up
->curregs
[R5
]);
675 /* The port lock is held and interrupts are disabled. */
676 static void sunzilog_stop_tx(struct uart_port
*port
)
678 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
680 up
->flags
|= SUNZILOG_FLAG_TX_STOPPED
;
683 /* The port lock is held and interrupts are disabled. */
684 static void sunzilog_start_tx(struct uart_port
*port
)
686 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
687 struct zilog_channel __iomem
*channel
= ZILOG_CHANNEL_FROM_PORT(port
);
688 unsigned char status
;
690 up
->flags
|= SUNZILOG_FLAG_TX_ACTIVE
;
691 up
->flags
&= ~SUNZILOG_FLAG_TX_STOPPED
;
693 status
= readb(&channel
->control
);
696 /* TX busy? Just wait for the TX done interrupt. */
697 if (!(status
& Tx_BUF_EMP
))
700 /* Send the first character to jump-start the TX done
701 * IRQ sending engine.
704 writeb(port
->x_char
, &channel
->data
);
711 struct circ_buf
*xmit
= &port
->state
->xmit
;
713 writeb(xmit
->buf
[xmit
->tail
], &channel
->data
);
717 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
720 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
721 uart_write_wakeup(&up
->port
);
725 /* The port lock is held. */
726 static void sunzilog_stop_rx(struct uart_port
*port
)
728 struct uart_sunzilog_port
*up
= UART_ZILOG(port
);
729 struct zilog_channel __iomem
*channel
;
734 channel
= ZILOG_CHANNEL_FROM_PORT(port
);
736 /* Disable all RX interrupts. */
737 up
->curregs
[R1
] &= ~RxINT_MASK
;
738 sunzilog_maybe_update_regs(up
, channel
);
741 /* The port lock is held. */
742 static void sunzilog_enable_ms(struct uart_port
*port
)
744 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
745 struct zilog_channel __iomem
*channel
= ZILOG_CHANNEL_FROM_PORT(port
);
746 unsigned char new_reg
;
748 new_reg
= up
->curregs
[R15
] | (DCDIE
| SYNCIE
| CTSIE
);
749 if (new_reg
!= up
->curregs
[R15
]) {
750 up
->curregs
[R15
] = new_reg
;
752 /* NOTE: Not subject to 'transmitter active' rule. */
753 write_zsreg(channel
, R15
, up
->curregs
[R15
] & ~WR7pEN
);
757 /* The port lock is not held. */
758 static void sunzilog_break_ctl(struct uart_port
*port
, int break_state
)
760 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
761 struct zilog_channel __iomem
*channel
= ZILOG_CHANNEL_FROM_PORT(port
);
762 unsigned char set_bits
, clear_bits
, new_reg
;
765 set_bits
= clear_bits
= 0;
770 clear_bits
|= SND_BRK
;
772 spin_lock_irqsave(&port
->lock
, flags
);
774 new_reg
= (up
->curregs
[R5
] | set_bits
) & ~clear_bits
;
775 if (new_reg
!= up
->curregs
[R5
]) {
776 up
->curregs
[R5
] = new_reg
;
778 /* NOTE: Not subject to 'transmitter active' rule. */
779 write_zsreg(channel
, R5
, up
->curregs
[R5
]);
782 spin_unlock_irqrestore(&port
->lock
, flags
);
785 static void __sunzilog_startup(struct uart_sunzilog_port
*up
)
787 struct zilog_channel __iomem
*channel
;
789 channel
= ZILOG_CHANNEL_FROM_PORT(&up
->port
);
790 up
->prev_status
= readb(&channel
->control
);
792 /* Enable receiver and transmitter. */
793 up
->curregs
[R3
] |= RxENAB
;
794 up
->curregs
[R5
] |= TxENAB
;
796 up
->curregs
[R1
] |= EXT_INT_ENAB
| INT_ALL_Rx
| TxINT_ENAB
;
797 sunzilog_maybe_update_regs(up
, channel
);
800 static int sunzilog_startup(struct uart_port
*port
)
802 struct uart_sunzilog_port
*up
= UART_ZILOG(port
);
808 spin_lock_irqsave(&port
->lock
, flags
);
809 __sunzilog_startup(up
);
810 spin_unlock_irqrestore(&port
->lock
, flags
);
815 * The test for ZS_IS_CONS is explained by the following e-mail:
817 * From: Russell King <rmk@arm.linux.org.uk>
818 * Date: Sun, 8 Dec 2002 10:18:38 +0000
820 * On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote:
821 * > I boot my 2.5 boxes using "console=ttyS0,9600" argument,
822 * > and I noticed that something is not right with reference
823 * > counting in this case. It seems that when the console
824 * > is open by kernel initially, this is not accounted
825 * > as an open, and uart_startup is not called.
827 * That is correct. We are unable to call uart_startup when the serial
828 * console is initialised because it may need to allocate memory (as
829 * request_irq does) and the memory allocators may not have been
832 * 1. initialise the port into a state where it can send characters in the
833 * console write method.
835 * 2. don't do the actual hardware shutdown in your shutdown() method (but
836 * do the normal software shutdown - ie, free irqs etc)
839 static void sunzilog_shutdown(struct uart_port
*port
)
841 struct uart_sunzilog_port
*up
= UART_ZILOG(port
);
842 struct zilog_channel __iomem
*channel
;
848 spin_lock_irqsave(&port
->lock
, flags
);
850 channel
= ZILOG_CHANNEL_FROM_PORT(port
);
852 /* Disable receiver and transmitter. */
853 up
->curregs
[R3
] &= ~RxENAB
;
854 up
->curregs
[R5
] &= ~TxENAB
;
856 /* Disable all interrupts and BRK assertion. */
857 up
->curregs
[R1
] &= ~(EXT_INT_ENAB
| TxINT_ENAB
| RxINT_MASK
);
858 up
->curregs
[R5
] &= ~SND_BRK
;
859 sunzilog_maybe_update_regs(up
, channel
);
861 spin_unlock_irqrestore(&port
->lock
, flags
);
864 /* Shared by TTY driver and serial console setup. The port lock is held
865 * and local interrupts are disabled.
868 sunzilog_convert_to_zs(struct uart_sunzilog_port
*up
, unsigned int cflag
,
869 unsigned int iflag
, int brg
)
872 up
->curregs
[R10
] = NRZ
;
873 up
->curregs
[R11
] = TCBR
| RCBR
;
875 /* Program BAUD and clock source. */
876 up
->curregs
[R4
] &= ~XCLK_MASK
;
877 up
->curregs
[R4
] |= X16CLK
;
878 up
->curregs
[R12
] = brg
& 0xff;
879 up
->curregs
[R13
] = (brg
>> 8) & 0xff;
880 up
->curregs
[R14
] = BRSRC
| BRENAB
;
882 /* Character size, stop bits, and parity. */
883 up
->curregs
[R3
] &= ~RxN_MASK
;
884 up
->curregs
[R5
] &= ~TxN_MASK
;
885 switch (cflag
& CSIZE
) {
887 up
->curregs
[R3
] |= Rx5
;
888 up
->curregs
[R5
] |= Tx5
;
889 up
->parity_mask
= 0x1f;
892 up
->curregs
[R3
] |= Rx6
;
893 up
->curregs
[R5
] |= Tx6
;
894 up
->parity_mask
= 0x3f;
897 up
->curregs
[R3
] |= Rx7
;
898 up
->curregs
[R5
] |= Tx7
;
899 up
->parity_mask
= 0x7f;
903 up
->curregs
[R3
] |= Rx8
;
904 up
->curregs
[R5
] |= Tx8
;
905 up
->parity_mask
= 0xff;
908 up
->curregs
[R4
] &= ~0x0c;
910 up
->curregs
[R4
] |= SB2
;
912 up
->curregs
[R4
] |= SB1
;
914 up
->curregs
[R4
] |= PAR_ENAB
;
916 up
->curregs
[R4
] &= ~PAR_ENAB
;
917 if (!(cflag
& PARODD
))
918 up
->curregs
[R4
] |= PAR_EVEN
;
920 up
->curregs
[R4
] &= ~PAR_EVEN
;
922 up
->port
.read_status_mask
= Rx_OVR
;
924 up
->port
.read_status_mask
|= CRC_ERR
| PAR_ERR
;
925 if (iflag
& (BRKINT
| PARMRK
))
926 up
->port
.read_status_mask
|= BRK_ABRT
;
928 up
->port
.ignore_status_mask
= 0;
930 up
->port
.ignore_status_mask
|= CRC_ERR
| PAR_ERR
;
931 if (iflag
& IGNBRK
) {
932 up
->port
.ignore_status_mask
|= BRK_ABRT
;
934 up
->port
.ignore_status_mask
|= Rx_OVR
;
937 if ((cflag
& CREAD
) == 0)
938 up
->port
.ignore_status_mask
= 0xff;
941 /* The port lock is not held. */
943 sunzilog_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
944 struct ktermios
*old
)
946 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
950 baud
= uart_get_baud_rate(port
, termios
, old
, 1200, 76800);
952 spin_lock_irqsave(&up
->port
.lock
, flags
);
954 brg
= BPS_TO_BRG(baud
, ZS_CLOCK
/ ZS_CLOCK_DIVISOR
);
956 sunzilog_convert_to_zs(up
, termios
->c_cflag
, termios
->c_iflag
, brg
);
958 if (UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
959 up
->flags
|= SUNZILOG_FLAG_MODEM_STATUS
;
961 up
->flags
&= ~SUNZILOG_FLAG_MODEM_STATUS
;
963 up
->cflag
= termios
->c_cflag
;
965 sunzilog_maybe_update_regs(up
, ZILOG_CHANNEL_FROM_PORT(port
));
967 uart_update_timeout(port
, termios
->c_cflag
, baud
);
969 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
972 static const char *sunzilog_type(struct uart_port
*port
)
974 struct uart_sunzilog_port
*up
= UART_ZILOG(port
);
976 return (up
->flags
& SUNZILOG_FLAG_ESCC
) ? "zs (ESCC)" : "zs";
979 /* We do not request/release mappings of the registers here, this
980 * happens at early serial probe time.
982 static void sunzilog_release_port(struct uart_port
*port
)
986 static int sunzilog_request_port(struct uart_port
*port
)
991 /* These do not need to do anything interesting either. */
992 static void sunzilog_config_port(struct uart_port
*port
, int flags
)
996 /* We do not support letting the user mess with the divisor, IRQ, etc. */
997 static int sunzilog_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1002 #ifdef CONFIG_CONSOLE_POLL
1003 static int sunzilog_get_poll_char(struct uart_port
*port
)
1005 unsigned char ch
, r1
;
1006 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*) port
;
1007 struct zilog_channel __iomem
*channel
1008 = ZILOG_CHANNEL_FROM_PORT(&up
->port
);
1011 r1
= read_zsreg(channel
, R1
);
1012 if (r1
& (PAR_ERR
| Rx_OVR
| CRC_ERR
)) {
1013 writeb(ERR_RES
, &channel
->control
);
1018 ch
= readb(&channel
->control
);
1021 /* This funny hack depends upon BRK_ABRT not interfering
1022 * with the other bits we care about in R1.
1027 if (!(ch
& Rx_CH_AV
))
1028 return NO_POLL_CHAR
;
1030 ch
= readb(&channel
->data
);
1033 ch
&= up
->parity_mask
;
1037 static void sunzilog_put_poll_char(struct uart_port
*port
,
1040 struct uart_sunzilog_port
*up
= (struct uart_sunzilog_port
*)port
;
1042 sunzilog_putchar(&up
->port
, ch
);
1044 #endif /* CONFIG_CONSOLE_POLL */
1046 static struct uart_ops sunzilog_pops
= {
1047 .tx_empty
= sunzilog_tx_empty
,
1048 .set_mctrl
= sunzilog_set_mctrl
,
1049 .get_mctrl
= sunzilog_get_mctrl
,
1050 .stop_tx
= sunzilog_stop_tx
,
1051 .start_tx
= sunzilog_start_tx
,
1052 .stop_rx
= sunzilog_stop_rx
,
1053 .enable_ms
= sunzilog_enable_ms
,
1054 .break_ctl
= sunzilog_break_ctl
,
1055 .startup
= sunzilog_startup
,
1056 .shutdown
= sunzilog_shutdown
,
1057 .set_termios
= sunzilog_set_termios
,
1058 .type
= sunzilog_type
,
1059 .release_port
= sunzilog_release_port
,
1060 .request_port
= sunzilog_request_port
,
1061 .config_port
= sunzilog_config_port
,
1062 .verify_port
= sunzilog_verify_port
,
1063 #ifdef CONFIG_CONSOLE_POLL
1064 .poll_get_char
= sunzilog_get_poll_char
,
1065 .poll_put_char
= sunzilog_put_poll_char
,
1069 static int uart_chip_count
;
1070 static struct uart_sunzilog_port
*sunzilog_port_table
;
1071 static struct zilog_layout __iomem
**sunzilog_chip_regs
;
1073 static struct uart_sunzilog_port
*sunzilog_irq_chain
;
1075 static struct uart_driver sunzilog_reg
= {
1076 .owner
= THIS_MODULE
,
1077 .driver_name
= "sunzilog",
1082 static int __init
sunzilog_alloc_tables(int num_sunzilog
)
1084 struct uart_sunzilog_port
*up
;
1086 int num_channels
= num_sunzilog
* 2;
1089 size
= num_channels
* sizeof(struct uart_sunzilog_port
);
1090 sunzilog_port_table
= kzalloc(size
, GFP_KERNEL
);
1091 if (!sunzilog_port_table
)
1094 for (i
= 0; i
< num_channels
; i
++) {
1095 up
= &sunzilog_port_table
[i
];
1097 spin_lock_init(&up
->port
.lock
);
1100 sunzilog_irq_chain
= up
;
1102 if (i
< num_channels
- 1)
1108 size
= num_sunzilog
* sizeof(struct zilog_layout __iomem
*);
1109 sunzilog_chip_regs
= kzalloc(size
, GFP_KERNEL
);
1110 if (!sunzilog_chip_regs
) {
1111 kfree(sunzilog_port_table
);
1112 sunzilog_irq_chain
= NULL
;
1119 static void sunzilog_free_tables(void)
1121 kfree(sunzilog_port_table
);
1122 sunzilog_irq_chain
= NULL
;
1123 kfree(sunzilog_chip_regs
);
1126 #define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */
1128 static void sunzilog_putchar(struct uart_port
*port
, int ch
)
1130 struct zilog_channel __iomem
*channel
= ZILOG_CHANNEL_FROM_PORT(port
);
1131 int loops
= ZS_PUT_CHAR_MAX_DELAY
;
1133 /* This is a timed polling loop so do not switch the explicit
1134 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM
1137 unsigned char val
= readb(&channel
->control
);
1138 if (val
& Tx_BUF_EMP
) {
1145 writeb(ch
, &channel
->data
);
1152 static DEFINE_SPINLOCK(sunzilog_serio_lock
);
1154 static int sunzilog_serio_write(struct serio
*serio
, unsigned char ch
)
1156 struct uart_sunzilog_port
*up
= serio
->port_data
;
1157 unsigned long flags
;
1159 spin_lock_irqsave(&sunzilog_serio_lock
, flags
);
1161 sunzilog_putchar(&up
->port
, ch
);
1163 spin_unlock_irqrestore(&sunzilog_serio_lock
, flags
);
1168 static int sunzilog_serio_open(struct serio
*serio
)
1170 struct uart_sunzilog_port
*up
= serio
->port_data
;
1171 unsigned long flags
;
1174 spin_lock_irqsave(&sunzilog_serio_lock
, flags
);
1175 if (!up
->serio_open
) {
1180 spin_unlock_irqrestore(&sunzilog_serio_lock
, flags
);
1185 static void sunzilog_serio_close(struct serio
*serio
)
1187 struct uart_sunzilog_port
*up
= serio
->port_data
;
1188 unsigned long flags
;
1190 spin_lock_irqsave(&sunzilog_serio_lock
, flags
);
1192 spin_unlock_irqrestore(&sunzilog_serio_lock
, flags
);
1195 #endif /* CONFIG_SERIO */
1197 #ifdef CONFIG_SERIAL_SUNZILOG_CONSOLE
1199 sunzilog_console_write(struct console
*con
, const char *s
, unsigned int count
)
1201 struct uart_sunzilog_port
*up
= &sunzilog_port_table
[con
->index
];
1202 unsigned long flags
;
1205 local_irq_save(flags
);
1206 if (up
->port
.sysrq
) {
1208 } else if (oops_in_progress
) {
1209 locked
= spin_trylock(&up
->port
.lock
);
1211 spin_lock(&up
->port
.lock
);
1213 uart_console_write(&up
->port
, s
, count
, sunzilog_putchar
);
1217 spin_unlock(&up
->port
.lock
);
1218 local_irq_restore(flags
);
1221 static int __init
sunzilog_console_setup(struct console
*con
, char *options
)
1223 struct uart_sunzilog_port
*up
= &sunzilog_port_table
[con
->index
];
1224 unsigned long flags
;
1227 if (up
->port
.type
!= PORT_SUNZILOG
)
1230 printk(KERN_INFO
"Console: ttyS%d (SunZilog zs%d)\n",
1231 (sunzilog_reg
.minor
- 64) + con
->index
, con
->index
);
1233 /* Get firmware console settings. */
1234 sunserial_console_termios(con
, up
->port
.dev
->of_node
);
1236 /* Firmware console speed is limited to 150-->38400 baud so
1237 * this hackish cflag thing is OK.
1239 switch (con
->cflag
& CBAUD
) {
1240 case B150
: baud
= 150; break;
1241 case B300
: baud
= 300; break;
1242 case B600
: baud
= 600; break;
1243 case B1200
: baud
= 1200; break;
1244 case B2400
: baud
= 2400; break;
1245 case B4800
: baud
= 4800; break;
1246 default: case B9600
: baud
= 9600; break;
1247 case B19200
: baud
= 19200; break;
1248 case B38400
: baud
= 38400; break;
1251 brg
= BPS_TO_BRG(baud
, ZS_CLOCK
/ ZS_CLOCK_DIVISOR
);
1253 spin_lock_irqsave(&up
->port
.lock
, flags
);
1255 up
->curregs
[R15
] |= BRKIE
;
1256 sunzilog_convert_to_zs(up
, con
->cflag
, 0, brg
);
1258 sunzilog_set_mctrl(&up
->port
, TIOCM_DTR
| TIOCM_RTS
);
1259 __sunzilog_startup(up
);
1261 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1266 static struct console sunzilog_console_ops
= {
1268 .write
= sunzilog_console_write
,
1269 .device
= uart_console_device
,
1270 .setup
= sunzilog_console_setup
,
1271 .flags
= CON_PRINTBUFFER
,
1273 .data
= &sunzilog_reg
,
1276 static inline struct console
*SUNZILOG_CONSOLE(void)
1278 return &sunzilog_console_ops
;
1282 #define SUNZILOG_CONSOLE() (NULL)
1285 static void __devinit
sunzilog_init_kbdms(struct uart_sunzilog_port
*up
)
1289 if (up
->flags
& SUNZILOG_FLAG_CONS_KEYB
) {
1290 up
->cflag
= B1200
| CS8
| CLOCAL
| CREAD
;
1293 up
->cflag
= B4800
| CS8
| CLOCAL
| CREAD
;
1297 up
->curregs
[R15
] |= BRKIE
;
1298 brg
= BPS_TO_BRG(baud
, ZS_CLOCK
/ ZS_CLOCK_DIVISOR
);
1299 sunzilog_convert_to_zs(up
, up
->cflag
, 0, brg
);
1300 sunzilog_set_mctrl(&up
->port
, TIOCM_DTR
| TIOCM_RTS
);
1301 __sunzilog_startup(up
);
1305 static void __devinit
sunzilog_register_serio(struct uart_sunzilog_port
*up
)
1307 struct serio
*serio
= &up
->serio
;
1309 serio
->port_data
= up
;
1311 serio
->id
.type
= SERIO_RS232
;
1312 if (up
->flags
& SUNZILOG_FLAG_CONS_KEYB
) {
1313 serio
->id
.proto
= SERIO_SUNKBD
;
1314 strlcpy(serio
->name
, "zskbd", sizeof(serio
->name
));
1316 serio
->id
.proto
= SERIO_SUN
;
1317 serio
->id
.extra
= 1;
1318 strlcpy(serio
->name
, "zsms", sizeof(serio
->name
));
1320 strlcpy(serio
->phys
,
1321 ((up
->flags
& SUNZILOG_FLAG_CONS_KEYB
) ?
1322 "zs/serio0" : "zs/serio1"),
1323 sizeof(serio
->phys
));
1325 serio
->write
= sunzilog_serio_write
;
1326 serio
->open
= sunzilog_serio_open
;
1327 serio
->close
= sunzilog_serio_close
;
1328 serio
->dev
.parent
= up
->port
.dev
;
1330 serio_register_port(serio
);
1334 static void __devinit
sunzilog_init_hw(struct uart_sunzilog_port
*up
)
1336 struct zilog_channel __iomem
*channel
;
1337 unsigned long flags
;
1340 channel
= ZILOG_CHANNEL_FROM_PORT(&up
->port
);
1342 spin_lock_irqsave(&up
->port
.lock
, flags
);
1343 if (ZS_IS_CHANNEL_A(up
)) {
1344 write_zsreg(channel
, R9
, FHWRES
);
1346 (void) read_zsreg(channel
, R0
);
1349 if (up
->flags
& (SUNZILOG_FLAG_CONS_KEYB
|
1350 SUNZILOG_FLAG_CONS_MOUSE
)) {
1351 up
->curregs
[R1
] = EXT_INT_ENAB
| INT_ALL_Rx
| TxINT_ENAB
;
1352 up
->curregs
[R4
] = PAR_EVEN
| X16CLK
| SB1
;
1353 up
->curregs
[R3
] = RxENAB
| Rx8
;
1354 up
->curregs
[R5
] = TxENAB
| Tx8
;
1355 up
->curregs
[R6
] = 0x00; /* SDLC Address */
1356 up
->curregs
[R7
] = 0x7E; /* SDLC Flag */
1357 up
->curregs
[R9
] = NV
;
1358 up
->curregs
[R7p
] = 0x00;
1359 sunzilog_init_kbdms(up
);
1360 /* Only enable interrupts if an ISR handler available */
1361 if (up
->flags
& SUNZILOG_FLAG_ISR_HANDLER
)
1362 up
->curregs
[R9
] |= MIE
;
1363 write_zsreg(channel
, R9
, up
->curregs
[R9
]);
1365 /* Normal serial TTY. */
1366 up
->parity_mask
= 0xff;
1367 up
->curregs
[R1
] = EXT_INT_ENAB
| INT_ALL_Rx
| TxINT_ENAB
;
1368 up
->curregs
[R4
] = PAR_EVEN
| X16CLK
| SB1
;
1369 up
->curregs
[R3
] = RxENAB
| Rx8
;
1370 up
->curregs
[R5
] = TxENAB
| Tx8
;
1371 up
->curregs
[R6
] = 0x00; /* SDLC Address */
1372 up
->curregs
[R7
] = 0x7E; /* SDLC Flag */
1373 up
->curregs
[R9
] = NV
;
1374 up
->curregs
[R10
] = NRZ
;
1375 up
->curregs
[R11
] = TCBR
| RCBR
;
1377 brg
= BPS_TO_BRG(baud
, ZS_CLOCK
/ ZS_CLOCK_DIVISOR
);
1378 up
->curregs
[R12
] = (brg
& 0xff);
1379 up
->curregs
[R13
] = (brg
>> 8) & 0xff;
1380 up
->curregs
[R14
] = BRSRC
| BRENAB
;
1381 up
->curregs
[R15
] = FIFOEN
; /* Use FIFO if on ESCC */
1382 up
->curregs
[R7p
] = TxFIFO_LVL
| RxFIFO_LVL
;
1383 if (__load_zsregs(channel
, up
->curregs
)) {
1384 up
->flags
|= SUNZILOG_FLAG_ESCC
;
1386 /* Only enable interrupts if an ISR handler available */
1387 if (up
->flags
& SUNZILOG_FLAG_ISR_HANDLER
)
1388 up
->curregs
[R9
] |= MIE
;
1389 write_zsreg(channel
, R9
, up
->curregs
[R9
]);
1392 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1395 if (up
->flags
& (SUNZILOG_FLAG_CONS_KEYB
|
1396 SUNZILOG_FLAG_CONS_MOUSE
))
1397 sunzilog_register_serio(up
);
1401 static int zilog_irq
;
1403 static int __devinit
zs_probe(struct platform_device
*op
)
1405 static int kbm_inst
, uart_inst
;
1407 struct uart_sunzilog_port
*up
;
1408 struct zilog_layout __iomem
*rp
;
1409 int keyboard_mouse
= 0;
1412 if (of_find_property(op
->dev
.of_node
, "keyboard", NULL
))
1415 /* uarts must come before keyboards/mice */
1417 inst
= uart_chip_count
+ kbm_inst
;
1421 sunzilog_chip_regs
[inst
] = of_ioremap(&op
->resource
[0], 0,
1422 sizeof(struct zilog_layout
),
1424 if (!sunzilog_chip_regs
[inst
])
1427 rp
= sunzilog_chip_regs
[inst
];
1430 zilog_irq
= op
->archdata
.irqs
[0];
1432 up
= &sunzilog_port_table
[inst
* 2];
1435 up
[0].port
.mapbase
= op
->resource
[0].start
+ 0x00;
1436 up
[0].port
.membase
= (void __iomem
*) &rp
->channelA
;
1437 up
[0].port
.iotype
= UPIO_MEM
;
1438 up
[0].port
.irq
= op
->archdata
.irqs
[0];
1439 up
[0].port
.uartclk
= ZS_CLOCK
;
1440 up
[0].port
.fifosize
= 1;
1441 up
[0].port
.ops
= &sunzilog_pops
;
1442 up
[0].port
.type
= PORT_SUNZILOG
;
1443 up
[0].port
.flags
= 0;
1444 up
[0].port
.line
= (inst
* 2) + 0;
1445 up
[0].port
.dev
= &op
->dev
;
1446 up
[0].flags
|= SUNZILOG_FLAG_IS_CHANNEL_A
;
1448 up
[0].flags
|= SUNZILOG_FLAG_CONS_KEYB
;
1449 sunzilog_init_hw(&up
[0]);
1452 up
[1].port
.mapbase
= op
->resource
[0].start
+ 0x04;
1453 up
[1].port
.membase
= (void __iomem
*) &rp
->channelB
;
1454 up
[1].port
.iotype
= UPIO_MEM
;
1455 up
[1].port
.irq
= op
->archdata
.irqs
[0];
1456 up
[1].port
.uartclk
= ZS_CLOCK
;
1457 up
[1].port
.fifosize
= 1;
1458 up
[1].port
.ops
= &sunzilog_pops
;
1459 up
[1].port
.type
= PORT_SUNZILOG
;
1460 up
[1].port
.flags
= 0;
1461 up
[1].port
.line
= (inst
* 2) + 1;
1462 up
[1].port
.dev
= &op
->dev
;
1465 up
[1].flags
|= SUNZILOG_FLAG_CONS_MOUSE
;
1466 sunzilog_init_hw(&up
[1]);
1468 if (!keyboard_mouse
) {
1469 if (sunserial_console_match(SUNZILOG_CONSOLE(), op
->dev
.of_node
,
1470 &sunzilog_reg
, up
[0].port
.line
,
1472 up
->flags
|= SUNZILOG_FLAG_IS_CONS
;
1473 err
= uart_add_one_port(&sunzilog_reg
, &up
[0].port
);
1475 of_iounmap(&op
->resource
[0],
1476 rp
, sizeof(struct zilog_layout
));
1479 if (sunserial_console_match(SUNZILOG_CONSOLE(), op
->dev
.of_node
,
1480 &sunzilog_reg
, up
[1].port
.line
,
1482 up
->flags
|= SUNZILOG_FLAG_IS_CONS
;
1483 err
= uart_add_one_port(&sunzilog_reg
, &up
[1].port
);
1485 uart_remove_one_port(&sunzilog_reg
, &up
[0].port
);
1486 of_iounmap(&op
->resource
[0],
1487 rp
, sizeof(struct zilog_layout
));
1492 printk(KERN_INFO
"%s: Keyboard at MMIO 0x%llx (irq = %d) "
1495 (unsigned long long) up
[0].port
.mapbase
,
1496 op
->archdata
.irqs
[0], sunzilog_type(&up
[0].port
));
1497 printk(KERN_INFO
"%s: Mouse at MMIO 0x%llx (irq = %d) "
1500 (unsigned long long) up
[1].port
.mapbase
,
1501 op
->archdata
.irqs
[0], sunzilog_type(&up
[1].port
));
1505 dev_set_drvdata(&op
->dev
, &up
[0]);
1510 static void __devexit
zs_remove_one(struct uart_sunzilog_port
*up
)
1512 if (ZS_IS_KEYB(up
) || ZS_IS_MOUSE(up
)) {
1514 serio_unregister_port(&up
->serio
);
1517 uart_remove_one_port(&sunzilog_reg
, &up
->port
);
1520 static int __devexit
zs_remove(struct platform_device
*op
)
1522 struct uart_sunzilog_port
*up
= dev_get_drvdata(&op
->dev
);
1523 struct zilog_layout __iomem
*regs
;
1525 zs_remove_one(&up
[0]);
1526 zs_remove_one(&up
[1]);
1528 regs
= sunzilog_chip_regs
[up
[0].port
.line
/ 2];
1529 of_iounmap(&op
->resource
[0], regs
, sizeof(struct zilog_layout
));
1531 dev_set_drvdata(&op
->dev
, NULL
);
1536 static const struct of_device_id zs_match
[] = {
1542 MODULE_DEVICE_TABLE(of
, zs_match
);
1544 static struct platform_driver zs_driver
= {
1547 .owner
= THIS_MODULE
,
1548 .of_match_table
= zs_match
,
1551 .remove
= __devexit_p(zs_remove
),
1554 static int __init
sunzilog_init(void)
1556 struct device_node
*dp
;
1559 int num_sunzilog
= 0;
1561 for_each_node_by_name(dp
, "zs") {
1563 if (of_find_property(dp
, "keyboard", NULL
))
1568 err
= sunzilog_alloc_tables(num_sunzilog
);
1572 uart_chip_count
= num_sunzilog
- num_keybms
;
1574 err
= sunserial_register_minors(&sunzilog_reg
,
1575 uart_chip_count
* 2);
1577 goto out_free_tables
;
1580 err
= platform_driver_register(&zs_driver
);
1582 goto out_unregister_uart
;
1585 struct uart_sunzilog_port
*up
= sunzilog_irq_chain
;
1586 err
= request_irq(zilog_irq
, sunzilog_interrupt
, IRQF_SHARED
,
1587 "zs", sunzilog_irq_chain
);
1589 goto out_unregister_driver
;
1591 /* Enable Interrupts */
1593 struct zilog_channel __iomem
*channel
;
1595 /* printk (KERN_INFO "Enable IRQ for ZILOG Hardware %p\n", up); */
1596 channel
= ZILOG_CHANNEL_FROM_PORT(&up
->port
);
1597 up
->flags
|= SUNZILOG_FLAG_ISR_HANDLER
;
1598 up
->curregs
[R9
] |= MIE
;
1599 write_zsreg(channel
, R9
, up
->curregs
[R9
]);
1607 out_unregister_driver
:
1608 platform_driver_unregister(&zs_driver
);
1610 out_unregister_uart
:
1612 sunserial_unregister_minors(&sunzilog_reg
, num_sunzilog
);
1613 sunzilog_reg
.cons
= NULL
;
1617 sunzilog_free_tables();
1621 static void __exit
sunzilog_exit(void)
1623 platform_driver_unregister(&zs_driver
);
1626 struct uart_sunzilog_port
*up
= sunzilog_irq_chain
;
1628 /* Disable Interrupts */
1630 struct zilog_channel __iomem
*channel
;
1632 /* printk (KERN_INFO "Disable IRQ for ZILOG Hardware %p\n", up); */
1633 channel
= ZILOG_CHANNEL_FROM_PORT(&up
->port
);
1634 up
->flags
&= ~SUNZILOG_FLAG_ISR_HANDLER
;
1635 up
->curregs
[R9
] &= ~MIE
;
1636 write_zsreg(channel
, R9
, up
->curregs
[R9
]);
1640 free_irq(zilog_irq
, sunzilog_irq_chain
);
1644 if (sunzilog_reg
.nr
) {
1645 sunserial_unregister_minors(&sunzilog_reg
, sunzilog_reg
.nr
);
1646 sunzilog_free_tables();
1650 module_init(sunzilog_init
);
1651 module_exit(sunzilog_exit
);
1653 MODULE_AUTHOR("David S. Miller");
1654 MODULE_DESCRIPTION("Sun Zilog serial port driver");
1655 MODULE_VERSION("2.0");
1656 MODULE_LICENSE("GPL");