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iwl3945: use iwl_mod_params for 3945
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blobd057ab3022aa0806546907a3cc3b554c77287611
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/lib80211.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #define DRV_NAME "iwl3945"
50
51 #include "iwl-commands.h"
52 #include "iwl-3945.h"
53 #include "iwl-3945-fh.h"
54 #include "iwl-helpers.h"
55 #include "iwl-core.h"
56 #include "iwl-dev.h"
57
58 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
59 struct iwl3945_tx_queue *txq);
60
61 /*
62 * module name, copyright, version, etc.
63 */
64
65 #define DRV_DESCRIPTION \
66 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
67
68 #ifdef CONFIG_IWL3945_DEBUG
69 #define VD "d"
70 #else
71 #define VD
72 #endif
73
74 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
75 #define VS "s"
76 #else
77 #define VS
78 #endif
79
80 #define IWL39_VERSION "1.2.26k" VD VS
81 #define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
82 #define DRV_AUTHOR "<ilw@linux.intel.com>"
83 #define DRV_VERSION IWL39_VERSION
84
85
86 MODULE_DESCRIPTION(DRV_DESCRIPTION);
87 MODULE_VERSION(DRV_VERSION);
88 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
89 MODULE_LICENSE("GPL");
90
91 /* module parameters */
92 struct iwl_mod_params iwl3945_mod_params = {
93 .num_of_queues = IWL39_MAX_NUM_QUEUES,
94 /* the rest are 0 by default */
95 };
96
97 static const struct ieee80211_supported_band *iwl3945_get_band(
98 struct iwl_priv *priv, enum ieee80211_band band)
99 {
100 return priv->hw->wiphy->bands[band];
101 }
102
103 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
104 * DMA services
105 *
106 * Theory of operation
107 *
108 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
109 * of buffer descriptors, each of which points to one or more data buffers for
110 * the device to read from or fill. Driver and device exchange status of each
111 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
112 * entries in each circular buffer, to protect against confusing empty and full
113 * queue states.
114 *
115 * The device reads or writes the data in the queues via the device's several
116 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
117 *
118 * For Tx queue, there are low mark and high mark limits. If, after queuing
119 * the packet for Tx, free space become < low mark, Tx queue stopped. When
120 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
121 * Tx queue resumed.
122 *
123 * The 3945 operates with six queues: One receive queue, one transmit queue
124 * (#4) for sending commands to the device firmware, and four transmit queues
125 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
126 ***************************************************/
127
128 int iwl3945_x2_queue_used(const struct iwl_queue *q, int i)
129 {
130 return q->write_ptr > q->read_ptr ?
131 (i >= q->read_ptr && i < q->write_ptr) :
132 !(i < q->read_ptr && i >= q->write_ptr);
133 }
134
135 /**
136 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
137 */
138 static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
139 int count, int slots_num, u32 id)
140 {
141 q->n_bd = count;
142 q->n_window = slots_num;
143 q->id = id;
144
145 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
146 * and iwl_queue_dec_wrap are broken. */
147 BUG_ON(!is_power_of_2(count));
148
149 /* slots_num must be power-of-two size, otherwise
150 * get_cmd_index is broken. */
151 BUG_ON(!is_power_of_2(slots_num));
152
153 q->low_mark = q->n_window / 4;
154 if (q->low_mark < 4)
155 q->low_mark = 4;
156
157 q->high_mark = q->n_window / 8;
158 if (q->high_mark < 2)
159 q->high_mark = 2;
160
161 q->write_ptr = q->read_ptr = 0;
162
163 return 0;
164 }
165
166 /**
167 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
168 */
169 static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
170 struct iwl3945_tx_queue *txq, u32 id)
171 {
172 struct pci_dev *dev = priv->pci_dev;
173
174 /* Driver private data, only for Tx (not command) queues,
175 * not shared with device. */
176 if (id != IWL_CMD_QUEUE_NUM) {
177 txq->txb = kmalloc(sizeof(txq->txb[0]) *
178 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
179 if (!txq->txb) {
180 IWL_ERR(priv, "kmalloc for auxiliary BD "
181 "structures failed\n");
182 goto error;
183 }
184 } else
185 txq->txb = NULL;
186
187 /* Circular buffer of transmit frame descriptors (TFDs),
188 * shared with device */
189 txq->bd = pci_alloc_consistent(dev,
190 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
191 &txq->q.dma_addr);
192
193 if (!txq->bd) {
194 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
195 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
196 goto error;
197 }
198 txq->q.id = id;
199
200 return 0;
201
202 error:
203 kfree(txq->txb);
204 txq->txb = NULL;
205
206 return -ENOMEM;
207 }
208
209 /**
210 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
211 */
212 int iwl3945_tx_queue_init(struct iwl_priv *priv,
213 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
214 {
215 struct pci_dev *dev = priv->pci_dev;
216 int len;
217 int rc = 0;
218
219 /*
220 * Alloc buffer array for commands (Tx or other types of commands).
221 * For the command queue (#4), allocate command space + one big
222 * command for scan, since scan command is very huge; the system will
223 * not have two scans at the same time, so only one is needed.
224 * For data Tx queues (all other queues), no super-size command
225 * space is needed.
226 */
227 len = sizeof(struct iwl_cmd) * slots_num;
228 if (txq_id == IWL_CMD_QUEUE_NUM)
229 len += IWL_MAX_SCAN_SIZE;
230 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
231 if (!txq->cmd)
232 return -ENOMEM;
233
234 /* Alloc driver data array and TFD circular buffer */
235 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
236 if (rc) {
237 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
238
239 return -ENOMEM;
240 }
241 txq->need_update = 0;
242
243 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
244 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
245 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
246
247 /* Initialize queue high/low-water, head/tail indexes */
248 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
249
250 /* Tell device where to find queue, enable DMA channel. */
251 iwl3945_hw_tx_queue_init(priv, txq);
252
253 return 0;
254 }
255
256 /**
257 * iwl3945_tx_queue_free - Deallocate DMA queue.
258 * @txq: Transmit queue to deallocate.
259 *
260 * Empty queue by removing and destroying all BD's.
261 * Free all buffers.
262 * 0-fill, but do not free "txq" descriptor structure.
263 */
264 void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl3945_tx_queue *txq)
265 {
266 struct iwl_queue *q = &txq->q;
267 struct pci_dev *dev = priv->pci_dev;
268 int len;
269
270 if (q->n_bd == 0)
271 return;
272
273 /* first, empty all BD's */
274 for (; q->write_ptr != q->read_ptr;
275 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
276 iwl3945_hw_txq_free_tfd(priv, txq);
277
278 len = sizeof(struct iwl_cmd) * q->n_window;
279 if (q->id == IWL_CMD_QUEUE_NUM)
280 len += IWL_MAX_SCAN_SIZE;
281
282 /* De-alloc array of command/tx buffers */
283 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
284
285 /* De-alloc circular buffer of TFDs */
286 if (txq->q.n_bd)
287 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
288 txq->q.n_bd, txq->bd, txq->q.dma_addr);
289
290 /* De-alloc array of per-TFD driver data */
291 kfree(txq->txb);
292 txq->txb = NULL;
293
294 /* 0-fill queue descriptor structure */
295 memset(txq, 0, sizeof(*txq));
296 }
297
298 /*************** STATION TABLE MANAGEMENT ****
299 * mac80211 should be examined to determine if sta_info is duplicating
300 * the functionality provided here
301 */
302
303 /**************************************************************/
304 #if 0 /* temporary disable till we add real remove station */
305 /**
306 * iwl3945_remove_station - Remove driver's knowledge of station.
307 *
308 * NOTE: This does not remove station from device's station table.
309 */
310 static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
311 {
312 int index = IWL_INVALID_STATION;
313 int i;
314 unsigned long flags;
315
316 spin_lock_irqsave(&priv->sta_lock, flags);
317
318 if (is_ap)
319 index = IWL_AP_ID;
320 else if (is_broadcast_ether_addr(addr))
321 index = priv->hw_params.bcast_sta_id;
322 else
323 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
324 if (priv->stations_39[i].used &&
325 !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
326 addr)) {
327 index = i;
328 break;
329 }
330
331 if (unlikely(index == IWL_INVALID_STATION))
332 goto out;
333
334 if (priv->stations_39[index].used) {
335 priv->stations_39[index].used = 0;
336 priv->num_stations--;
337 }
338
339 BUG_ON(priv->num_stations < 0);
340
341 out:
342 spin_unlock_irqrestore(&priv->sta_lock, flags);
343 return 0;
344 }
345 #endif
346
347 /**
348 * iwl3945_clear_stations_table - Clear the driver's station table
349 *
350 * NOTE: This does not clear or otherwise alter the device's station table.
351 */
352 static void iwl3945_clear_stations_table(struct iwl_priv *priv)
353 {
354 unsigned long flags;
355
356 spin_lock_irqsave(&priv->sta_lock, flags);
357
358 priv->num_stations = 0;
359 memset(priv->stations_39, 0, sizeof(priv->stations_39));
360
361 spin_unlock_irqrestore(&priv->sta_lock, flags);
362 }
363
364 /**
365 * iwl3945_add_station - Add station to station tables in driver and device
366 */
367 u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
368 {
369 int i;
370 int index = IWL_INVALID_STATION;
371 struct iwl3945_station_entry *station;
372 unsigned long flags_spin;
373 u8 rate;
374
375 spin_lock_irqsave(&priv->sta_lock, flags_spin);
376 if (is_ap)
377 index = IWL_AP_ID;
378 else if (is_broadcast_ether_addr(addr))
379 index = priv->hw_params.bcast_sta_id;
380 else
381 for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
382 if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
383 addr)) {
384 index = i;
385 break;
386 }
387
388 if (!priv->stations_39[i].used &&
389 index == IWL_INVALID_STATION)
390 index = i;
391 }
392
393 /* These two conditions has the same outcome but keep them separate
394 since they have different meaning */
395 if (unlikely(index == IWL_INVALID_STATION)) {
396 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
397 return index;
398 }
399
400 if (priv->stations_39[index].used &&
401 !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
402 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
403 return index;
404 }
405
406 IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
407 station = &priv->stations_39[index];
408 station->used = 1;
409 priv->num_stations++;
410
411 /* Set up the REPLY_ADD_STA command to send to device */
412 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
413 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
414 station->sta.mode = 0;
415 station->sta.sta.sta_id = index;
416 station->sta.station_flags = 0;
417
418 if (priv->band == IEEE80211_BAND_5GHZ)
419 rate = IWL_RATE_6M_PLCP;
420 else
421 rate = IWL_RATE_1M_PLCP;
422
423 /* Turn on both antennas for the station... */
424 station->sta.rate_n_flags =
425 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
426
427 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
428
429 /* Add station to device's station table */
430 iwl3945_send_add_station(priv, &station->sta, flags);
431 return index;
432
433 }
434
435 /*************** DRIVER STATUS FUNCTIONS *****/
436
437 static inline int iwl3945_is_ready(struct iwl_priv *priv)
438 {
439 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
440 * set but EXIT_PENDING is not */
441 return test_bit(STATUS_READY, &priv->status) &&
442 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
443 !test_bit(STATUS_EXIT_PENDING, &priv->status);
444 }
445
446 static inline int iwl3945_is_alive(struct iwl_priv *priv)
447 {
448 return test_bit(STATUS_ALIVE, &priv->status);
449 }
450
451 static inline int iwl3945_is_init(struct iwl_priv *priv)
452 {
453 return test_bit(STATUS_INIT, &priv->status);
454 }
455
456 static inline int iwl3945_is_rfkill_sw(struct iwl_priv *priv)
457 {
458 return test_bit(STATUS_RF_KILL_SW, &priv->status);
459 }
460
461 static inline int iwl3945_is_rfkill_hw(struct iwl_priv *priv)
462 {
463 return test_bit(STATUS_RF_KILL_HW, &priv->status);
464 }
465
466 static inline int iwl3945_is_rfkill(struct iwl_priv *priv)
467 {
468 return iwl3945_is_rfkill_hw(priv) ||
469 iwl3945_is_rfkill_sw(priv);
470 }
471
472 static inline int iwl3945_is_ready_rf(struct iwl_priv *priv)
473 {
474
475 if (iwl3945_is_rfkill(priv))
476 return 0;
477
478 return iwl3945_is_ready(priv);
479 }
480
481 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
482
483 #define IWL_CMD(x) case x: return #x
484 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
485
486 /**
487 * iwl3945_enqueue_hcmd - enqueue a uCode command
488 * @priv: device private data point
489 * @cmd: a point to the ucode command structure
490 *
491 * The function returns < 0 values to indicate the operation is
492 * failed. On success, it turns the index (> 0) of command in the
493 * command queue.
494 */
495 static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
496 {
497 struct iwl3945_tx_queue *txq = &priv->txq39[IWL_CMD_QUEUE_NUM];
498 struct iwl_queue *q = &txq->q;
499 struct iwl3945_tfd_frame *tfd;
500 u32 *control_flags;
501 struct iwl_cmd *out_cmd;
502 u32 idx;
503 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
504 dma_addr_t phys_addr;
505 int pad;
506 u16 count;
507 int ret;
508 unsigned long flags;
509
510 /* If any of the command structures end up being larger than
511 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
512 * we will need to increase the size of the TFD entries */
513 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
514 !(cmd->meta.flags & CMD_SIZE_HUGE));
515
516
517 if (iwl3945_is_rfkill(priv)) {
518 IWL_DEBUG_INFO("Not sending command - RF KILL");
519 return -EIO;
520 }
521
522 if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
523 IWL_ERR(priv, "No space for Tx\n");
524 return -ENOSPC;
525 }
526
527 spin_lock_irqsave(&priv->hcmd_lock, flags);
528
529 tfd = &txq->bd[q->write_ptr];
530 memset(tfd, 0, sizeof(*tfd));
531
532 control_flags = (u32 *) tfd;
533
534 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
535 out_cmd = &txq->cmd[idx];
536
537 out_cmd->hdr.cmd = cmd->id;
538 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
539 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
540
541 /* At this point, the out_cmd now has all of the incoming cmd
542 * information */
543
544 out_cmd->hdr.flags = 0;
545 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
546 INDEX_TO_SEQ(q->write_ptr));
547 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
548 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
549
550 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
551 offsetof(struct iwl_cmd, hdr);
552 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
553
554 pad = U32_PAD(cmd->len);
555 count = TFD_CTL_COUNT_GET(*control_flags);
556 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
557
558 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
559 "%d bytes at %d[%d]:%d\n",
560 get_cmd_string(out_cmd->hdr.cmd),
561 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
562 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
563
564 txq->need_update = 1;
565
566 /* Increment and update queue's write index */
567 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
568 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
569
570 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
571 return ret ? ret : idx;
572 }
573
574 static int iwl3945_send_cmd_async(struct iwl_priv *priv,
575 struct iwl_host_cmd *cmd)
576 {
577 int ret;
578
579 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
580
581 /* An asynchronous command can not expect an SKB to be set. */
582 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
583
584 /* An asynchronous command MUST have a callback. */
585 BUG_ON(!cmd->meta.u.callback);
586
587 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
588 return -EBUSY;
589
590 ret = iwl3945_enqueue_hcmd(priv, cmd);
591 if (ret < 0) {
592 IWL_ERR(priv,
593 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
594 get_cmd_string(cmd->id), ret);
595 return ret;
596 }
597 return 0;
598 }
599
600 static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
601 struct iwl_host_cmd *cmd)
602 {
603 int cmd_idx;
604 int ret;
605
606 BUG_ON(cmd->meta.flags & CMD_ASYNC);
607
608 /* A synchronous command can not have a callback set. */
609 BUG_ON(cmd->meta.u.callback != NULL);
610
611 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
612 IWL_ERR(priv,
613 "Error sending %s: Already sending a host command\n",
614 get_cmd_string(cmd->id));
615 ret = -EBUSY;
616 goto out;
617 }
618
619 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
620
621 if (cmd->meta.flags & CMD_WANT_SKB)
622 cmd->meta.source = &cmd->meta;
623
624 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
625 if (cmd_idx < 0) {
626 ret = cmd_idx;
627 IWL_ERR(priv,
628 "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
629 get_cmd_string(cmd->id), ret);
630 goto out;
631 }
632
633 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
634 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
635 HOST_COMPLETE_TIMEOUT);
636 if (!ret) {
637 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
638 IWL_ERR(priv, "Error sending %s: time out after %dms\n",
639 get_cmd_string(cmd->id),
640 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
641
642 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
643 ret = -ETIMEDOUT;
644 goto cancel;
645 }
646 }
647
648 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
649 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
650 get_cmd_string(cmd->id));
651 ret = -ECANCELED;
652 goto fail;
653 }
654 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
655 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
656 get_cmd_string(cmd->id));
657 ret = -EIO;
658 goto fail;
659 }
660 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
661 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
662 get_cmd_string(cmd->id));
663 ret = -EIO;
664 goto cancel;
665 }
666
667 ret = 0;
668 goto out;
669
670 cancel:
671 if (cmd->meta.flags & CMD_WANT_SKB) {
672 struct iwl_cmd *qcmd;
673
674 /* Cancel the CMD_WANT_SKB flag for the cmd in the
675 * TX cmd queue. Otherwise in case the cmd comes
676 * in later, it will possibly set an invalid
677 * address (cmd->meta.source). */
678 qcmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
679 qcmd->meta.flags &= ~CMD_WANT_SKB;
680 }
681 fail:
682 if (cmd->meta.u.skb) {
683 dev_kfree_skb_any(cmd->meta.u.skb);
684 cmd->meta.u.skb = NULL;
685 }
686 out:
687 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
688 return ret;
689 }
690
691 int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
692 {
693 if (cmd->meta.flags & CMD_ASYNC)
694 return iwl3945_send_cmd_async(priv, cmd);
695
696 return iwl3945_send_cmd_sync(priv, cmd);
697 }
698
699 int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
700 {
701 struct iwl_host_cmd cmd = {
702 .id = id,
703 .len = len,
704 .data = data,
705 };
706
707 return iwl3945_send_cmd_sync(priv, &cmd);
708 }
709
710 static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
711 {
712 struct iwl_host_cmd cmd = {
713 .id = id,
714 .len = sizeof(val),
715 .data = &val,
716 };
717
718 return iwl3945_send_cmd_sync(priv, &cmd);
719 }
720
721 int iwl3945_send_statistics_request(struct iwl_priv *priv)
722 {
723 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
724 }
725
726 /**
727 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
728 * @band: 2.4 or 5 GHz band
729 * @channel: Any channel valid for the requested band
730
731 * In addition to setting the staging RXON, priv->band is also set.
732 *
733 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
734 * in the staging RXON flag structure based on the band
735 */
736 static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
737 enum ieee80211_band band,
738 u16 channel)
739 {
740 if (!iwl3945_get_channel_info(priv, band, channel)) {
741 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
742 channel, band);
743 return -EINVAL;
744 }
745
746 if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
747 (priv->band == band))
748 return 0;
749
750 priv->staging39_rxon.channel = cpu_to_le16(channel);
751 if (band == IEEE80211_BAND_5GHZ)
752 priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
753 else
754 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
755
756 priv->band = band;
757
758 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
759
760 return 0;
761 }
762
763 /**
764 * iwl3945_check_rxon_cmd - validate RXON structure is valid
765 *
766 * NOTE: This is really only useful during development and can eventually
767 * be #ifdef'd out once the driver is stable and folks aren't actively
768 * making changes
769 */
770 static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
771 {
772 int error = 0;
773 int counter = 1;
774 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
775
776 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
777 error |= le32_to_cpu(rxon->flags &
778 (RXON_FLG_TGJ_NARROW_BAND_MSK |
779 RXON_FLG_RADAR_DETECT_MSK));
780 if (error)
781 IWL_WARN(priv, "check 24G fields %d | %d\n",
782 counter++, error);
783 } else {
784 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
785 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
786 if (error)
787 IWL_WARN(priv, "check 52 fields %d | %d\n",
788 counter++, error);
789 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
790 if (error)
791 IWL_WARN(priv, "check 52 CCK %d | %d\n",
792 counter++, error);
793 }
794 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
795 if (error)
796 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
797
798 /* make sure basic rates 6Mbps and 1Mbps are supported */
799 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
800 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
801 if (error)
802 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
803
804 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
805 if (error)
806 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
807
808 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
809 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
810 if (error)
811 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
812 counter++, error);
813
814 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
815 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
816 if (error)
817 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
818 counter++, error);
819
820 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
821 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
822 if (error)
823 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
824 counter++, error);
825
826 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
827 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
828 RXON_FLG_ANT_A_MSK)) == 0);
829 if (error)
830 IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
831
832 if (error)
833 IWL_WARN(priv, "Tuning to channel %d\n",
834 le16_to_cpu(rxon->channel));
835
836 if (error) {
837 IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
838 return -1;
839 }
840 return 0;
841 }
842
843 /**
844 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
845 * @priv: staging_rxon is compared to active_rxon
846 *
847 * If the RXON structure is changing enough to require a new tune,
848 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
849 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
850 */
851 static int iwl3945_full_rxon_required(struct iwl_priv *priv)
852 {
853
854 /* These items are only settable from the full RXON command */
855 if (!(iwl3945_is_associated(priv)) ||
856 compare_ether_addr(priv->staging39_rxon.bssid_addr,
857 priv->active39_rxon.bssid_addr) ||
858 compare_ether_addr(priv->staging39_rxon.node_addr,
859 priv->active39_rxon.node_addr) ||
860 compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
861 priv->active39_rxon.wlap_bssid_addr) ||
862 (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
863 (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
864 (priv->staging39_rxon.air_propagation !=
865 priv->active39_rxon.air_propagation) ||
866 (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
867 return 1;
868
869 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
870 * be updated with the RXON_ASSOC command -- however only some
871 * flag transitions are allowed using RXON_ASSOC */
872
873 /* Check if we are not switching bands */
874 if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
875 (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
876 return 1;
877
878 /* Check if we are switching association toggle */
879 if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
880 (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
881 return 1;
882
883 return 0;
884 }
885
886 static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
887 {
888 int rc = 0;
889 struct iwl_rx_packet *res = NULL;
890 struct iwl3945_rxon_assoc_cmd rxon_assoc;
891 struct iwl_host_cmd cmd = {
892 .id = REPLY_RXON_ASSOC,
893 .len = sizeof(rxon_assoc),
894 .meta.flags = CMD_WANT_SKB,
895 .data = &rxon_assoc,
896 };
897 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
898 const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
899
900 if ((rxon1->flags == rxon2->flags) &&
901 (rxon1->filter_flags == rxon2->filter_flags) &&
902 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
903 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
904 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
905 return 0;
906 }
907
908 rxon_assoc.flags = priv->staging39_rxon.flags;
909 rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
910 rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
911 rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
912 rxon_assoc.reserved = 0;
913
914 rc = iwl3945_send_cmd_sync(priv, &cmd);
915 if (rc)
916 return rc;
917
918 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
919 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
920 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
921 rc = -EIO;
922 }
923
924 priv->alloc_rxb_skb--;
925 dev_kfree_skb_any(cmd.meta.u.skb);
926
927 return rc;
928 }
929
930 /**
931 * iwl3945_commit_rxon - commit staging_rxon to hardware
932 *
933 * The RXON command in staging_rxon is committed to the hardware and
934 * the active_rxon structure is updated with the new data. This
935 * function correctly transitions out of the RXON_ASSOC_MSK state if
936 * a HW tune is required based on the RXON structure changes.
937 */
938 static int iwl3945_commit_rxon(struct iwl_priv *priv)
939 {
940 /* cast away the const for active_rxon in this function */
941 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
942 int rc = 0;
943
944 if (!iwl3945_is_alive(priv))
945 return -1;
946
947 /* always get timestamp with Rx frame */
948 priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
949
950 /* select antenna */
951 priv->staging39_rxon.flags &=
952 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
953 priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
954
955 rc = iwl3945_check_rxon_cmd(priv);
956 if (rc) {
957 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
958 return -EINVAL;
959 }
960
961 /* If we don't need to send a full RXON, we can use
962 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
963 * and other flags for the current radio configuration. */
964 if (!iwl3945_full_rxon_required(priv)) {
965 rc = iwl3945_send_rxon_assoc(priv);
966 if (rc) {
967 IWL_ERR(priv, "Error setting RXON_ASSOC "
968 "configuration (%d).\n", rc);
969 return rc;
970 }
971
972 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
973
974 return 0;
975 }
976
977 /* If we are currently associated and the new config requires
978 * an RXON_ASSOC and the new config wants the associated mask enabled,
979 * we must clear the associated from the active configuration
980 * before we apply the new config */
981 if (iwl3945_is_associated(priv) &&
982 (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
983 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
984 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
985
986 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
987 sizeof(struct iwl3945_rxon_cmd),
988 &priv->active39_rxon);
989
990 /* If the mask clearing failed then we set
991 * active_rxon back to what it was previously */
992 if (rc) {
993 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
994 IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
995 "configuration (%d).\n", rc);
996 return rc;
997 }
998 }
999
1000 IWL_DEBUG_INFO("Sending RXON\n"
1001 "* with%s RXON_FILTER_ASSOC_MSK\n"
1002 "* channel = %d\n"
1003 "* bssid = %pM\n",
1004 ((priv->staging39_rxon.filter_flags &
1005 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1006 le16_to_cpu(priv->staging39_rxon.channel),
1007 priv->staging_rxon.bssid_addr);
1008
1009 /* Apply the new configuration */
1010 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1011 sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
1012 if (rc) {
1013 IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
1014 return rc;
1015 }
1016
1017 memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
1018
1019 iwl3945_clear_stations_table(priv);
1020
1021 /* If we issue a new RXON command which required a tune then we must
1022 * send a new TXPOWER command or we won't be able to Tx any frames */
1023 rc = iwl3945_hw_reg_send_txpower(priv);
1024 if (rc) {
1025 IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
1026 return rc;
1027 }
1028
1029 /* Add the broadcast address so we can send broadcast frames */
1030 if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
1031 IWL_INVALID_STATION) {
1032 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
1033 return -EIO;
1034 }
1035
1036 /* If we have set the ASSOC_MSK and we are in BSS mode then
1037 * add the IWL_AP_ID to the station rate table */
1038 if (iwl3945_is_associated(priv) &&
1039 (priv->iw_mode == NL80211_IFTYPE_STATION))
1040 if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
1041 == IWL_INVALID_STATION) {
1042 IWL_ERR(priv, "Error adding AP address for transmit\n");
1043 return -EIO;
1044 }
1045
1046 /* Init the hardware's rate fallback order based on the band */
1047 rc = iwl3945_init_hw_rate_table(priv);
1048 if (rc) {
1049 IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
1050 return -EIO;
1051 }
1052
1053 return 0;
1054 }
1055
1056 static int iwl3945_send_bt_config(struct iwl_priv *priv)
1057 {
1058 struct iwl_bt_cmd bt_cmd = {
1059 .flags = 3,
1060 .lead_time = 0xAA,
1061 .max_kill = 1,
1062 .kill_ack_mask = 0,
1063 .kill_cts_mask = 0,
1064 };
1065
1066 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1067 sizeof(bt_cmd), &bt_cmd);
1068 }
1069
1070 static int iwl3945_send_scan_abort(struct iwl_priv *priv)
1071 {
1072 int rc = 0;
1073 struct iwl_rx_packet *res;
1074 struct iwl_host_cmd cmd = {
1075 .id = REPLY_SCAN_ABORT_CMD,
1076 .meta.flags = CMD_WANT_SKB,
1077 };
1078
1079 /* If there isn't a scan actively going on in the hardware
1080 * then we are in between scan bands and not actually
1081 * actively scanning, so don't send the abort command */
1082 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1083 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1084 return 0;
1085 }
1086
1087 rc = iwl3945_send_cmd_sync(priv, &cmd);
1088 if (rc) {
1089 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1090 return rc;
1091 }
1092
1093 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1094 if (res->u.status != CAN_ABORT_STATUS) {
1095 /* The scan abort will return 1 for success or
1096 * 2 for "failure". A failure condition can be
1097 * due to simply not being in an active scan which
1098 * can occur if we send the scan abort before we
1099 * the microcode has notified us that a scan is
1100 * completed. */
1101 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1102 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1103 clear_bit(STATUS_SCAN_HW, &priv->status);
1104 }
1105
1106 dev_kfree_skb_any(cmd.meta.u.skb);
1107
1108 return rc;
1109 }
1110
1111 static int iwl3945_card_state_sync_callback(struct iwl_priv *priv,
1112 struct iwl_cmd *cmd,
1113 struct sk_buff *skb)
1114 {
1115 return 1;
1116 }
1117
1118 /*
1119 * CARD_STATE_CMD
1120 *
1121 * Use: Sets the device's internal card state to enable, disable, or halt
1122 *
1123 * When in the 'enable' state the card operates as normal.
1124 * When in the 'disable' state, the card enters into a low power mode.
1125 * When in the 'halt' state, the card is shut down and must be fully
1126 * restarted to come back on.
1127 */
1128 static int iwl3945_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1129 {
1130 struct iwl_host_cmd cmd = {
1131 .id = REPLY_CARD_STATE_CMD,
1132 .len = sizeof(u32),
1133 .data = &flags,
1134 .meta.flags = meta_flag,
1135 };
1136
1137 if (meta_flag & CMD_ASYNC)
1138 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1139
1140 return iwl3945_send_cmd(priv, &cmd);
1141 }
1142
1143 static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
1144 struct iwl_cmd *cmd, struct sk_buff *skb)
1145 {
1146 struct iwl_rx_packet *res = NULL;
1147
1148 if (!skb) {
1149 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
1150 return 1;
1151 }
1152
1153 res = (struct iwl_rx_packet *)skb->data;
1154 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1155 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1156 res->hdr.flags);
1157 return 1;
1158 }
1159
1160 switch (res->u.add_sta.status) {
1161 case ADD_STA_SUCCESS_MSK:
1162 break;
1163 default:
1164 break;
1165 }
1166
1167 /* We didn't cache the SKB; let the caller free it */
1168 return 1;
1169 }
1170
1171 int iwl3945_send_add_station(struct iwl_priv *priv,
1172 struct iwl3945_addsta_cmd *sta, u8 flags)
1173 {
1174 struct iwl_rx_packet *res = NULL;
1175 int rc = 0;
1176 struct iwl_host_cmd cmd = {
1177 .id = REPLY_ADD_STA,
1178 .len = sizeof(struct iwl3945_addsta_cmd),
1179 .meta.flags = flags,
1180 .data = sta,
1181 };
1182
1183 if (flags & CMD_ASYNC)
1184 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1185 else
1186 cmd.meta.flags |= CMD_WANT_SKB;
1187
1188 rc = iwl3945_send_cmd(priv, &cmd);
1189
1190 if (rc || (flags & CMD_ASYNC))
1191 return rc;
1192
1193 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
1194 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1195 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
1196 res->hdr.flags);
1197 rc = -EIO;
1198 }
1199
1200 if (rc == 0) {
1201 switch (res->u.add_sta.status) {
1202 case ADD_STA_SUCCESS_MSK:
1203 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1204 break;
1205 default:
1206 rc = -EIO;
1207 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
1208 break;
1209 }
1210 }
1211
1212 priv->alloc_rxb_skb--;
1213 dev_kfree_skb_any(cmd.meta.u.skb);
1214
1215 return rc;
1216 }
1217
1218 static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
1219 struct ieee80211_key_conf *keyconf,
1220 u8 sta_id)
1221 {
1222 unsigned long flags;
1223 __le16 key_flags = 0;
1224
1225 switch (keyconf->alg) {
1226 case ALG_CCMP:
1227 key_flags |= STA_KEY_FLG_CCMP;
1228 key_flags |= cpu_to_le16(
1229 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1230 key_flags &= ~STA_KEY_FLG_INVALID;
1231 break;
1232 case ALG_TKIP:
1233 case ALG_WEP:
1234 default:
1235 return -EINVAL;
1236 }
1237 spin_lock_irqsave(&priv->sta_lock, flags);
1238 priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
1239 priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
1240 memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
1241 keyconf->keylen);
1242
1243 memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
1244 keyconf->keylen);
1245 priv->stations_39[sta_id].sta.key.key_flags = key_flags;
1246 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1247 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1248
1249 spin_unlock_irqrestore(&priv->sta_lock, flags);
1250
1251 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1252 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1253 return 0;
1254 }
1255
1256 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
1257 {
1258 unsigned long flags;
1259
1260 spin_lock_irqsave(&priv->sta_lock, flags);
1261 memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1262 memset(&priv->stations_39[sta_id].sta.key, 0,
1263 sizeof(struct iwl4965_keyinfo));
1264 priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1265 priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1266 priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1267 spin_unlock_irqrestore(&priv->sta_lock, flags);
1268
1269 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1270 iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
1271 return 0;
1272 }
1273
1274 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
1275 {
1276 struct list_head *element;
1277
1278 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1279 priv->frames_count);
1280
1281 while (!list_empty(&priv->free_frames)) {
1282 element = priv->free_frames.next;
1283 list_del(element);
1284 kfree(list_entry(element, struct iwl3945_frame, list));
1285 priv->frames_count--;
1286 }
1287
1288 if (priv->frames_count) {
1289 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
1290 priv->frames_count);
1291 priv->frames_count = 0;
1292 }
1293 }
1294
1295 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
1296 {
1297 struct iwl3945_frame *frame;
1298 struct list_head *element;
1299 if (list_empty(&priv->free_frames)) {
1300 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1301 if (!frame) {
1302 IWL_ERR(priv, "Could not allocate frame!\n");
1303 return NULL;
1304 }
1305
1306 priv->frames_count++;
1307 return frame;
1308 }
1309
1310 element = priv->free_frames.next;
1311 list_del(element);
1312 return list_entry(element, struct iwl3945_frame, list);
1313 }
1314
1315 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
1316 {
1317 memset(frame, 0, sizeof(*frame));
1318 list_add(&frame->list, &priv->free_frames);
1319 }
1320
1321 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
1322 struct ieee80211_hdr *hdr,
1323 int left)
1324 {
1325
1326 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1327 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
1328 (priv->iw_mode != NL80211_IFTYPE_AP)))
1329 return 0;
1330
1331 if (priv->ibss_beacon->len > left)
1332 return 0;
1333
1334 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1335
1336 return priv->ibss_beacon->len;
1337 }
1338
1339 static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
1340 {
1341 u8 i;
1342 int rate_mask;
1343
1344 /* Set rate mask*/
1345 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1346 rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
1347 else
1348 rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
1349
1350 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1351 i = iwl3945_rates[i].next_ieee) {
1352 if (rate_mask & (1 << i))
1353 return iwl3945_rates[i].plcp;
1354 }
1355
1356 /* No valid rate was found. Assign the lowest one */
1357 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
1358 return IWL_RATE_1M_PLCP;
1359 else
1360 return IWL_RATE_6M_PLCP;
1361 }
1362
1363 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
1364 {
1365 struct iwl3945_frame *frame;
1366 unsigned int frame_size;
1367 int rc;
1368 u8 rate;
1369
1370 frame = iwl3945_get_free_frame(priv);
1371
1372 if (!frame) {
1373 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
1374 "command.\n");
1375 return -ENOMEM;
1376 }
1377
1378 rate = iwl3945_rate_get_lowest_plcp(priv);
1379
1380 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1381
1382 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1383 &frame->u.cmd[0]);
1384
1385 iwl3945_free_frame(priv, frame);
1386
1387 return rc;
1388 }
1389
1390 /******************************************************************************
1391 *
1392 * EEPROM related functions
1393 *
1394 ******************************************************************************/
1395
1396 static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
1397 {
1398 memcpy(mac, priv->eeprom39.mac_address, 6);
1399 }
1400
1401 /*
1402 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1403 * embedded controller) as EEPROM reader; each read is a series of pulses
1404 * to/from the EEPROM chip, not a single event, so even reads could conflict
1405 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1406 * simply claims ownership, which should be safe when this function is called
1407 * (i.e. before loading uCode!).
1408 */
1409 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
1410 {
1411 _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1412 return 0;
1413 }
1414
1415 /**
1416 * iwl3945_eeprom_init - read EEPROM contents
1417 *
1418 * Load the EEPROM contents from adapter into priv->eeprom39
1419 *
1420 * NOTE: This routine uses the non-debug IO access functions.
1421 */
1422 int iwl3945_eeprom_init(struct iwl_priv *priv)
1423 {
1424 u16 *e = (u16 *)&priv->eeprom39;
1425 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
1426 int sz = sizeof(priv->eeprom39);
1427 int ret;
1428 u16 addr;
1429
1430 /* The EEPROM structure has several padding buffers within it
1431 * and when adding new EEPROM maps is subject to programmer errors
1432 * which may be very difficult to identify without explicitly
1433 * checking the resulting size of the eeprom map. */
1434 BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
1435
1436 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1437 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
1438 return -ENOENT;
1439 }
1440
1441 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1442 ret = iwl3945_eeprom_acquire_semaphore(priv);
1443 if (ret < 0) {
1444 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
1445 return -ENOENT;
1446 }
1447
1448 /* eeprom is an array of 16bit values */
1449 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1450 u32 r;
1451
1452 _iwl_write32(priv, CSR_EEPROM_REG,
1453 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
1454 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1455 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
1456 CSR_EEPROM_REG_READ_VALID_MSK,
1457 IWL_EEPROM_ACCESS_TIMEOUT);
1458 if (ret < 0) {
1459 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
1460 return ret;
1461 }
1462
1463 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
1464 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1465 }
1466
1467 return 0;
1468 }
1469
1470 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
1471 {
1472 if (priv->shared_virt)
1473 pci_free_consistent(priv->pci_dev,
1474 sizeof(struct iwl3945_shared),
1475 priv->shared_virt,
1476 priv->shared_phys);
1477 }
1478
1479 /**
1480 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1481 *
1482 * return : set the bit for each supported rate insert in ie
1483 */
1484 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1485 u16 basic_rate, int *left)
1486 {
1487 u16 ret_rates = 0, bit;
1488 int i;
1489 u8 *cnt = ie;
1490 u8 *rates = ie + 1;
1491
1492 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1493 if (bit & supported_rate) {
1494 ret_rates |= bit;
1495 rates[*cnt] = iwl3945_rates[i].ieee |
1496 ((bit & basic_rate) ? 0x80 : 0x00);
1497 (*cnt)++;
1498 (*left)--;
1499 if ((*left <= 0) ||
1500 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1501 break;
1502 }
1503 }
1504
1505 return ret_rates;
1506 }
1507
1508 /**
1509 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1510 */
1511 static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
1512 struct ieee80211_mgmt *frame,
1513 int left)
1514 {
1515 int len = 0;
1516 u8 *pos = NULL;
1517 u16 active_rates, ret_rates, cck_rates;
1518
1519 /* Make sure there is enough space for the probe request,
1520 * two mandatory IEs and the data */
1521 left -= 24;
1522 if (left < 0)
1523 return 0;
1524 len += 24;
1525
1526 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1527 memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
1528 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1529 memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
1530 frame->seq_ctrl = 0;
1531
1532 /* fill in our indirect SSID IE */
1533 /* ...next IE... */
1534
1535 left -= 2;
1536 if (left < 0)
1537 return 0;
1538 len += 2;
1539 pos = &(frame->u.probe_req.variable[0]);
1540 *pos++ = WLAN_EID_SSID;
1541 *pos++ = 0;
1542
1543 /* fill in supported rate */
1544 /* ...next IE... */
1545 left -= 2;
1546 if (left < 0)
1547 return 0;
1548
1549 /* ... fill it in... */
1550 *pos++ = WLAN_EID_SUPP_RATES;
1551 *pos = 0;
1552
1553 priv->active_rate = priv->rates_mask;
1554 active_rates = priv->active_rate;
1555 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1556
1557 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1558 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1559 priv->active_rate_basic, &left);
1560 active_rates &= ~ret_rates;
1561
1562 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1563 priv->active_rate_basic, &left);
1564 active_rates &= ~ret_rates;
1565
1566 len += 2 + *pos;
1567 pos += (*pos) + 1;
1568 if (active_rates == 0)
1569 goto fill_end;
1570
1571 /* fill in supported extended rate */
1572 /* ...next IE... */
1573 left -= 2;
1574 if (left < 0)
1575 return 0;
1576 /* ... fill it in... */
1577 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1578 *pos = 0;
1579 iwl3945_supported_rate_to_ie(pos, active_rates,
1580 priv->active_rate_basic, &left);
1581 if (*pos > 0)
1582 len += 2 + *pos;
1583
1584 fill_end:
1585 return (u16)len;
1586 }
1587
1588 /*
1589 * QoS support
1590 */
1591 static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
1592 struct iwl_qosparam_cmd *qos)
1593 {
1594
1595 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1596 sizeof(struct iwl_qosparam_cmd), qos);
1597 }
1598
1599 static void iwl3945_reset_qos(struct iwl_priv *priv)
1600 {
1601 u16 cw_min = 15;
1602 u16 cw_max = 1023;
1603 u8 aifs = 2;
1604 u8 is_legacy = 0;
1605 unsigned long flags;
1606 int i;
1607
1608 spin_lock_irqsave(&priv->lock, flags);
1609 priv->qos_data.qos_active = 0;
1610
1611 /* QoS always active in AP and ADHOC mode
1612 * In STA mode wait for association
1613 */
1614 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1615 priv->iw_mode == NL80211_IFTYPE_AP)
1616 priv->qos_data.qos_active = 1;
1617 else
1618 priv->qos_data.qos_active = 0;
1619
1620
1621 /* check for legacy mode */
1622 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1623 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
1624 (priv->iw_mode == NL80211_IFTYPE_STATION &&
1625 (priv->staging39_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
1626 cw_min = 31;
1627 is_legacy = 1;
1628 }
1629
1630 if (priv->qos_data.qos_active)
1631 aifs = 3;
1632
1633 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1634 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1635 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1636 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1637 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1638
1639 if (priv->qos_data.qos_active) {
1640 i = 1;
1641 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1642 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1643 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1644 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1645 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1646
1647 i = 2;
1648 priv->qos_data.def_qos_parm.ac[i].cw_min =
1649 cpu_to_le16((cw_min + 1) / 2 - 1);
1650 priv->qos_data.def_qos_parm.ac[i].cw_max =
1651 cpu_to_le16(cw_max);
1652 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1653 if (is_legacy)
1654 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1655 cpu_to_le16(6016);
1656 else
1657 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1658 cpu_to_le16(3008);
1659 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1660
1661 i = 3;
1662 priv->qos_data.def_qos_parm.ac[i].cw_min =
1663 cpu_to_le16((cw_min + 1) / 4 - 1);
1664 priv->qos_data.def_qos_parm.ac[i].cw_max =
1665 cpu_to_le16((cw_max + 1) / 2 - 1);
1666 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1667 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1668 if (is_legacy)
1669 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1670 cpu_to_le16(3264);
1671 else
1672 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1673 cpu_to_le16(1504);
1674 } else {
1675 for (i = 1; i < 4; i++) {
1676 priv->qos_data.def_qos_parm.ac[i].cw_min =
1677 cpu_to_le16(cw_min);
1678 priv->qos_data.def_qos_parm.ac[i].cw_max =
1679 cpu_to_le16(cw_max);
1680 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1681 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1682 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1683 }
1684 }
1685 IWL_DEBUG_QOS("set QoS to default \n");
1686
1687 spin_unlock_irqrestore(&priv->lock, flags);
1688 }
1689
1690 static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
1691 {
1692 unsigned long flags;
1693
1694 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1695 return;
1696
1697 spin_lock_irqsave(&priv->lock, flags);
1698 priv->qos_data.def_qos_parm.qos_flags = 0;
1699
1700 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1701 !priv->qos_data.qos_cap.q_AP.txop_request)
1702 priv->qos_data.def_qos_parm.qos_flags |=
1703 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1704
1705 if (priv->qos_data.qos_active)
1706 priv->qos_data.def_qos_parm.qos_flags |=
1707 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1708
1709 spin_unlock_irqrestore(&priv->lock, flags);
1710
1711 if (force || iwl3945_is_associated(priv)) {
1712 IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
1713 priv->qos_data.qos_active);
1714
1715 iwl3945_send_qos_params_command(priv,
1716 &(priv->qos_data.def_qos_parm));
1717 }
1718 }
1719
1720 /*
1721 * Power management (not Tx power!) functions
1722 */
1723 #define MSEC_TO_USEC 1024
1724
1725
1726 #define NOSLP __constant_cpu_to_le16(0), 0, 0
1727 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1728 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1729 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1730 __constant_cpu_to_le32(X1), \
1731 __constant_cpu_to_le32(X2), \
1732 __constant_cpu_to_le32(X3), \
1733 __constant_cpu_to_le32(X4)}
1734
1735 /* default power management (not Tx power) table values */
1736 /* for TIM 0-10 */
1737 static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
1738 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1739 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1740 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1741 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1742 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1743 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1744 };
1745
1746 /* for TIM > 10 */
1747 static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
1748 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1749 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1750 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1751 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1752 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1753 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1754 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1755 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1756 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1757 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1758 };
1759
1760 int iwl3945_power_init_handle(struct iwl_priv *priv)
1761 {
1762 int rc = 0, i;
1763 struct iwl3945_power_mgr *pow_data;
1764 int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
1765 u16 pci_pm;
1766
1767 IWL_DEBUG_POWER("Initialize power \n");
1768
1769 pow_data = &(priv->power_data_39);
1770
1771 memset(pow_data, 0, sizeof(*pow_data));
1772
1773 pow_data->active_index = IWL_POWER_RANGE_0;
1774 pow_data->dtim_val = 0xffff;
1775
1776 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1777 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1778
1779 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1780 if (rc != 0)
1781 return 0;
1782 else {
1783 struct iwl_powertable_cmd *cmd;
1784
1785 IWL_DEBUG_POWER("adjust power command flags\n");
1786
1787 for (i = 0; i < IWL39_POWER_AC; i++) {
1788 cmd = &pow_data->pwr_range_0[i].cmd;
1789
1790 if (pci_pm & 0x1)
1791 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1792 else
1793 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1794 }
1795 }
1796 return rc;
1797 }
1798
1799 static int iwl3945_update_power_cmd(struct iwl_priv *priv,
1800 struct iwl_powertable_cmd *cmd, u32 mode)
1801 {
1802 int rc = 0, i;
1803 u8 skip;
1804 u32 max_sleep = 0;
1805 struct iwl_power_vec_entry *range;
1806 u8 period = 0;
1807 struct iwl3945_power_mgr *pow_data;
1808
1809 if (mode > IWL_POWER_INDEX_5) {
1810 IWL_DEBUG_POWER("Error invalid power mode \n");
1811 return -1;
1812 }
1813 pow_data = &(priv->power_data_39);
1814
1815 if (pow_data->active_index == IWL_POWER_RANGE_0)
1816 range = &pow_data->pwr_range_0[0];
1817 else
1818 range = &pow_data->pwr_range_1[1];
1819
1820 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
1821
1822 #ifdef IWL_MAC80211_DISABLE
1823 if (priv->assoc_network != NULL) {
1824 unsigned long flags;
1825
1826 period = priv->assoc_network->tim.tim_period;
1827 }
1828 #endif /*IWL_MAC80211_DISABLE */
1829 skip = range[mode].no_dtim;
1830
1831 if (period == 0) {
1832 period = 1;
1833 skip = 0;
1834 }
1835
1836 if (skip == 0) {
1837 max_sleep = period;
1838 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1839 } else {
1840 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1841 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1842 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1843 }
1844
1845 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1846 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1847 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1848 }
1849
1850 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1851 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1852 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1853 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1854 le32_to_cpu(cmd->sleep_interval[0]),
1855 le32_to_cpu(cmd->sleep_interval[1]),
1856 le32_to_cpu(cmd->sleep_interval[2]),
1857 le32_to_cpu(cmd->sleep_interval[3]),
1858 le32_to_cpu(cmd->sleep_interval[4]));
1859
1860 return rc;
1861 }
1862
1863 static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
1864 {
1865 u32 uninitialized_var(final_mode);
1866 int rc;
1867 struct iwl_powertable_cmd cmd;
1868
1869 /* If on battery, set to 3,
1870 * if plugged into AC power, set to CAM ("continuously aware mode"),
1871 * else user level */
1872 switch (mode) {
1873 case IWL39_POWER_BATTERY:
1874 final_mode = IWL_POWER_INDEX_3;
1875 break;
1876 case IWL39_POWER_AC:
1877 final_mode = IWL_POWER_MODE_CAM;
1878 break;
1879 default:
1880 final_mode = mode;
1881 break;
1882 }
1883
1884 iwl3945_update_power_cmd(priv, &cmd, final_mode);
1885
1886 /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
1887 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
1888 sizeof(struct iwl3945_powertable_cmd), &cmd);
1889
1890 if (final_mode == IWL_POWER_MODE_CAM)
1891 clear_bit(STATUS_POWER_PMI, &priv->status);
1892 else
1893 set_bit(STATUS_POWER_PMI, &priv->status);
1894
1895 return rc;
1896 }
1897
1898 /**
1899 * iwl3945_scan_cancel - Cancel any currently executing HW scan
1900 *
1901 * NOTE: priv->mutex is not required before calling this function
1902 */
1903 static int iwl3945_scan_cancel(struct iwl_priv *priv)
1904 {
1905 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1906 clear_bit(STATUS_SCANNING, &priv->status);
1907 return 0;
1908 }
1909
1910 if (test_bit(STATUS_SCANNING, &priv->status)) {
1911 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1912 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1913 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1914 queue_work(priv->workqueue, &priv->abort_scan);
1915
1916 } else
1917 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1918
1919 return test_bit(STATUS_SCANNING, &priv->status);
1920 }
1921
1922 return 0;
1923 }
1924
1925 /**
1926 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
1927 * @ms: amount of time to wait (in milliseconds) for scan to abort
1928 *
1929 * NOTE: priv->mutex must be held before calling this function
1930 */
1931 static int iwl3945_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
1932 {
1933 unsigned long now = jiffies;
1934 int ret;
1935
1936 ret = iwl3945_scan_cancel(priv);
1937 if (ret && ms) {
1938 mutex_unlock(&priv->mutex);
1939 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1940 test_bit(STATUS_SCANNING, &priv->status))
1941 msleep(1);
1942 mutex_lock(&priv->mutex);
1943
1944 return test_bit(STATUS_SCANNING, &priv->status);
1945 }
1946
1947 return ret;
1948 }
1949
1950 #define MAX_UCODE_BEACON_INTERVAL 1024
1951 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1952
1953 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
1954 {
1955 u16 new_val = 0;
1956 u16 beacon_factor = 0;
1957
1958 beacon_factor =
1959 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1960 / MAX_UCODE_BEACON_INTERVAL;
1961 new_val = beacon_val / beacon_factor;
1962
1963 return cpu_to_le16(new_val);
1964 }
1965
1966 static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
1967 {
1968 u64 interval_tm_unit;
1969 u64 tsf, result;
1970 unsigned long flags;
1971 struct ieee80211_conf *conf = NULL;
1972 u16 beacon_int = 0;
1973
1974 conf = ieee80211_get_hw_conf(priv->hw);
1975
1976 spin_lock_irqsave(&priv->lock, flags);
1977 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
1978 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1979
1980 tsf = priv->timestamp;
1981
1982 beacon_int = priv->beacon_int;
1983 spin_unlock_irqrestore(&priv->lock, flags);
1984
1985 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
1986 if (beacon_int == 0) {
1987 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1988 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1989 } else {
1990 priv->rxon_timing.beacon_interval =
1991 cpu_to_le16(beacon_int);
1992 priv->rxon_timing.beacon_interval =
1993 iwl3945_adjust_beacon_interval(
1994 le16_to_cpu(priv->rxon_timing.beacon_interval));
1995 }
1996
1997 priv->rxon_timing.atim_window = 0;
1998 } else {
1999 priv->rxon_timing.beacon_interval =
2000 iwl3945_adjust_beacon_interval(conf->beacon_int);
2001 /* TODO: we need to get atim_window from upper stack
2002 * for now we set to 0 */
2003 priv->rxon_timing.atim_window = 0;
2004 }
2005
2006 interval_tm_unit =
2007 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2008 result = do_div(tsf, interval_tm_unit);
2009 priv->rxon_timing.beacon_init_val =
2010 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2011
2012 IWL_DEBUG_ASSOC
2013 ("beacon interval %d beacon timer %d beacon tim %d\n",
2014 le16_to_cpu(priv->rxon_timing.beacon_interval),
2015 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2016 le16_to_cpu(priv->rxon_timing.atim_window));
2017 }
2018
2019 static int iwl3945_scan_initiate(struct iwl_priv *priv)
2020 {
2021 if (!iwl3945_is_ready_rf(priv)) {
2022 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2023 return -EIO;
2024 }
2025
2026 if (test_bit(STATUS_SCANNING, &priv->status)) {
2027 IWL_DEBUG_SCAN("Scan already in progress.\n");
2028 return -EAGAIN;
2029 }
2030
2031 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2032 IWL_DEBUG_SCAN("Scan request while abort pending. "
2033 "Queuing.\n");
2034 return -EAGAIN;
2035 }
2036
2037 IWL_DEBUG_INFO("Starting scan...\n");
2038 if (priv->cfg->sku & IWL_SKU_G)
2039 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2040 if (priv->cfg->sku & IWL_SKU_A)
2041 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
2042 set_bit(STATUS_SCANNING, &priv->status);
2043 priv->scan_start = jiffies;
2044 priv->scan_pass_start = priv->scan_start;
2045
2046 queue_work(priv->workqueue, &priv->request_scan);
2047
2048 return 0;
2049 }
2050
2051 static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
2052 {
2053 struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
2054
2055 if (hw_decrypt)
2056 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2057 else
2058 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2059
2060 return 0;
2061 }
2062
2063 static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
2064 enum ieee80211_band band)
2065 {
2066 if (band == IEEE80211_BAND_5GHZ) {
2067 priv->staging39_rxon.flags &=
2068 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2069 | RXON_FLG_CCK_MSK);
2070 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2071 } else {
2072 /* Copied from iwl3945_bg_post_associate() */
2073 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2074 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2075 else
2076 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2077
2078 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2079 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2080
2081 priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2082 priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2083 priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
2084 }
2085 }
2086
2087 /*
2088 * initialize rxon structure with default values from eeprom
2089 */
2090 static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
2091 int mode)
2092 {
2093 const struct iwl_channel_info *ch_info;
2094
2095 memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
2096
2097 switch (mode) {
2098 case NL80211_IFTYPE_AP:
2099 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
2100 break;
2101
2102 case NL80211_IFTYPE_STATION:
2103 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
2104 priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2105 break;
2106
2107 case NL80211_IFTYPE_ADHOC:
2108 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2109 priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2110 priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2111 RXON_FILTER_ACCEPT_GRP_MSK;
2112 break;
2113
2114 case NL80211_IFTYPE_MONITOR:
2115 priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2116 priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2117 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2118 break;
2119 default:
2120 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
2121 break;
2122 }
2123
2124 #if 0
2125 /* TODO: Figure out when short_preamble would be set and cache from
2126 * that */
2127 if (!hw_to_local(priv->hw)->short_preamble)
2128 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2129 else
2130 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2131 #endif
2132
2133 ch_info = iwl3945_get_channel_info(priv, priv->band,
2134 le16_to_cpu(priv->active39_rxon.channel));
2135
2136 if (!ch_info)
2137 ch_info = &priv->channel_info[0];
2138
2139 /*
2140 * in some case A channels are all non IBSS
2141 * in this case force B/G channel
2142 */
2143 if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
2144 ch_info = &priv->channel_info[0];
2145
2146 priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
2147 if (is_channel_a_band(ch_info))
2148 priv->band = IEEE80211_BAND_5GHZ;
2149 else
2150 priv->band = IEEE80211_BAND_2GHZ;
2151
2152 iwl3945_set_flags_for_phymode(priv, priv->band);
2153
2154 priv->staging39_rxon.ofdm_basic_rates =
2155 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2156 priv->staging39_rxon.cck_basic_rates =
2157 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2158 }
2159
2160 static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
2161 {
2162 if (mode == NL80211_IFTYPE_ADHOC) {
2163 const struct iwl_channel_info *ch_info;
2164
2165 ch_info = iwl3945_get_channel_info(priv,
2166 priv->band,
2167 le16_to_cpu(priv->staging39_rxon.channel));
2168
2169 if (!ch_info || !is_channel_ibss(ch_info)) {
2170 IWL_ERR(priv, "channel %d not IBSS channel\n",
2171 le16_to_cpu(priv->staging39_rxon.channel));
2172 return -EINVAL;
2173 }
2174 }
2175
2176 iwl3945_connection_init_rx_config(priv, mode);
2177 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2178
2179 iwl3945_clear_stations_table(priv);
2180
2181 /* don't commit rxon if rf-kill is on*/
2182 if (!iwl3945_is_ready_rf(priv))
2183 return -EAGAIN;
2184
2185 cancel_delayed_work(&priv->scan_check);
2186 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2187 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2188 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2189 return -EAGAIN;
2190 }
2191
2192 iwl3945_commit_rxon(priv);
2193
2194 return 0;
2195 }
2196
2197 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
2198 struct ieee80211_tx_info *info,
2199 struct iwl_cmd *cmd,
2200 struct sk_buff *skb_frag,
2201 int last_frag)
2202 {
2203 struct iwl3945_hw_key *keyinfo =
2204 &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
2205
2206 switch (keyinfo->alg) {
2207 case ALG_CCMP:
2208 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2209 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2210 IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
2211 break;
2212
2213 case ALG_TKIP:
2214 #if 0
2215 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2216
2217 if (last_frag)
2218 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2219 8);
2220 else
2221 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2222 #endif
2223 break;
2224
2225 case ALG_WEP:
2226 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2227 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2228
2229 if (keyinfo->keylen == 13)
2230 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2231
2232 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2233
2234 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2235 "with key %d\n", info->control.hw_key->hw_key_idx);
2236 break;
2237
2238 default:
2239 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
2240 break;
2241 }
2242 }
2243
2244 /*
2245 * handle build REPLY_TX command notification.
2246 */
2247 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
2248 struct iwl_cmd *cmd,
2249 struct ieee80211_tx_info *info,
2250 struct ieee80211_hdr *hdr,
2251 int is_unicast, u8 std_id)
2252 {
2253 __le16 fc = hdr->frame_control;
2254 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2255 u8 rc_flags = info->control.rates[0].flags;
2256
2257 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2258 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
2259 tx_flags |= TX_CMD_FLG_ACK_MSK;
2260 if (ieee80211_is_mgmt(fc))
2261 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2262 if (ieee80211_is_probe_resp(fc) &&
2263 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2264 tx_flags |= TX_CMD_FLG_TSF_MSK;
2265 } else {
2266 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2267 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2268 }
2269
2270 cmd->cmd.tx.sta_id = std_id;
2271 if (ieee80211_has_morefrags(fc))
2272 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2273
2274 if (ieee80211_is_data_qos(fc)) {
2275 u8 *qc = ieee80211_get_qos_ctl(hdr);
2276 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
2277 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2278 } else {
2279 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2280 }
2281
2282 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
2283 tx_flags |= TX_CMD_FLG_RTS_MSK;
2284 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2285 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
2286 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2287 tx_flags |= TX_CMD_FLG_CTS_MSK;
2288 }
2289
2290 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2291 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2292
2293 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2294 if (ieee80211_is_mgmt(fc)) {
2295 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
2296 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2297 else
2298 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2299 } else {
2300 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2301 #ifdef CONFIG_IWL3945_LEDS
2302 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2303 #endif
2304 }
2305
2306 cmd->cmd.tx.driver_txop = 0;
2307 cmd->cmd.tx.tx_flags = tx_flags;
2308 cmd->cmd.tx.next_frame_len = 0;
2309 }
2310
2311 /**
2312 * iwl3945_get_sta_id - Find station's index within station table
2313 */
2314 static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
2315 {
2316 int sta_id;
2317 u16 fc = le16_to_cpu(hdr->frame_control);
2318
2319 /* If this frame is broadcast or management, use broadcast station id */
2320 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2321 is_multicast_ether_addr(hdr->addr1))
2322 return priv->hw_params.bcast_sta_id;
2323
2324 switch (priv->iw_mode) {
2325
2326 /* If we are a client station in a BSS network, use the special
2327 * AP station entry (that's the only station we communicate with) */
2328 case NL80211_IFTYPE_STATION:
2329 return IWL_AP_ID;
2330
2331 /* If we are an AP, then find the station, or use BCAST */
2332 case NL80211_IFTYPE_AP:
2333 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2334 if (sta_id != IWL_INVALID_STATION)
2335 return sta_id;
2336 return priv->hw_params.bcast_sta_id;
2337
2338 /* If this frame is going out to an IBSS network, find the station,
2339 * or create a new station table entry */
2340 case NL80211_IFTYPE_ADHOC: {
2341 /* Create new station table entry */
2342 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2343 if (sta_id != IWL_INVALID_STATION)
2344 return sta_id;
2345
2346 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2347
2348 if (sta_id != IWL_INVALID_STATION)
2349 return sta_id;
2350
2351 IWL_DEBUG_DROP("Station %pM not in station map. "
2352 "Defaulting to broadcast...\n",
2353 hdr->addr1);
2354 iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2355 return priv->hw_params.bcast_sta_id;
2356 }
2357 /* If we are in monitor mode, use BCAST. This is required for
2358 * packet injection. */
2359 case NL80211_IFTYPE_MONITOR:
2360 return priv->hw_params.bcast_sta_id;
2361
2362 default:
2363 IWL_WARN(priv, "Unknown mode of operation: %d\n",
2364 priv->iw_mode);
2365 return priv->hw_params.bcast_sta_id;
2366 }
2367 }
2368
2369 /*
2370 * start REPLY_TX command process
2371 */
2372 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
2373 {
2374 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2375 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2376 struct iwl3945_tfd_frame *tfd;
2377 u32 *control_flags;
2378 int txq_id = skb_get_queue_mapping(skb);
2379 struct iwl3945_tx_queue *txq = NULL;
2380 struct iwl_queue *q = NULL;
2381 dma_addr_t phys_addr;
2382 dma_addr_t txcmd_phys;
2383 struct iwl_cmd *out_cmd = NULL;
2384 u16 len, idx, len_org, hdr_len;
2385 u8 id;
2386 u8 unicast;
2387 u8 sta_id;
2388 u8 tid = 0;
2389 u16 seq_number = 0;
2390 __le16 fc;
2391 u8 wait_write_ptr = 0;
2392 u8 *qc = NULL;
2393 unsigned long flags;
2394 int rc;
2395
2396 spin_lock_irqsave(&priv->lock, flags);
2397 if (iwl3945_is_rfkill(priv)) {
2398 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2399 goto drop_unlock;
2400 }
2401
2402 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
2403 IWL_ERR(priv, "ERROR: No TX rate available.\n");
2404 goto drop_unlock;
2405 }
2406
2407 unicast = !is_multicast_ether_addr(hdr->addr1);
2408 id = 0;
2409
2410 fc = hdr->frame_control;
2411
2412 #ifdef CONFIG_IWL3945_DEBUG
2413 if (ieee80211_is_auth(fc))
2414 IWL_DEBUG_TX("Sending AUTH frame\n");
2415 else if (ieee80211_is_assoc_req(fc))
2416 IWL_DEBUG_TX("Sending ASSOC frame\n");
2417 else if (ieee80211_is_reassoc_req(fc))
2418 IWL_DEBUG_TX("Sending REASSOC frame\n");
2419 #endif
2420
2421 /* drop all data frame if we are not associated */
2422 if (ieee80211_is_data(fc) &&
2423 (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
2424 (!iwl3945_is_associated(priv) ||
2425 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
2426 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2427 goto drop_unlock;
2428 }
2429
2430 spin_unlock_irqrestore(&priv->lock, flags);
2431
2432 hdr_len = ieee80211_hdrlen(fc);
2433
2434 /* Find (or create) index into station table for destination station */
2435 sta_id = iwl3945_get_sta_id(priv, hdr);
2436 if (sta_id == IWL_INVALID_STATION) {
2437 IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
2438 hdr->addr1);
2439 goto drop;
2440 }
2441
2442 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2443
2444 if (ieee80211_is_data_qos(fc)) {
2445 qc = ieee80211_get_qos_ctl(hdr);
2446 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
2447 seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
2448 IEEE80211_SCTL_SEQ;
2449 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2450 (hdr->seq_ctrl &
2451 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2452 seq_number += 0x10;
2453 }
2454
2455 /* Descriptor for chosen Tx queue */
2456 txq = &priv->txq39[txq_id];
2457 q = &txq->q;
2458
2459 spin_lock_irqsave(&priv->lock, flags);
2460
2461 /* Set up first empty TFD within this queue's circular TFD buffer */
2462 tfd = &txq->bd[q->write_ptr];
2463 memset(tfd, 0, sizeof(*tfd));
2464 control_flags = (u32 *) tfd;
2465 idx = get_cmd_index(q, q->write_ptr, 0);
2466
2467 /* Set up driver data for this TFD */
2468 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2469 txq->txb[q->write_ptr].skb[0] = skb;
2470
2471 /* Init first empty entry in queue's array of Tx/cmd buffers */
2472 out_cmd = &txq->cmd[idx];
2473 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2474 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2475
2476 /*
2477 * Set up the Tx-command (not MAC!) header.
2478 * Store the chosen Tx queue and TFD index within the sequence field;
2479 * after Tx, uCode's Tx response will return this value so driver can
2480 * locate the frame within the tx queue and do post-tx processing.
2481 */
2482 out_cmd->hdr.cmd = REPLY_TX;
2483 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2484 INDEX_TO_SEQ(q->write_ptr)));
2485
2486 /* Copy MAC header from skb into command buffer */
2487 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2488
2489 /*
2490 * Use the first empty entry in this queue's command buffer array
2491 * to contain the Tx command and MAC header concatenated together
2492 * (payload data will be in another buffer).
2493 * Size of this varies, due to varying MAC header length.
2494 * If end is not dword aligned, we'll have 2 extra bytes at the end
2495 * of the MAC header (device reads on dword boundaries).
2496 * We'll tell device about this padding later.
2497 */
2498 len = sizeof(struct iwl3945_tx_cmd) +
2499 sizeof(struct iwl_cmd_header) + hdr_len;
2500
2501 len_org = len;
2502 len = (len + 3) & ~3;
2503
2504 if (len_org != len)
2505 len_org = 1;
2506 else
2507 len_org = 0;
2508
2509 /* Physical address of this Tx command's header (not MAC header!),
2510 * within command buffer array. */
2511 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2512 offsetof(struct iwl_cmd, hdr);
2513
2514 /* Add buffer containing Tx command and MAC(!) header to TFD's
2515 * first entry */
2516 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2517
2518 if (info->control.hw_key)
2519 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
2520
2521 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2522 * if any (802.11 null frames have no payload). */
2523 len = skb->len - hdr_len;
2524 if (len) {
2525 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2526 len, PCI_DMA_TODEVICE);
2527 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2528 }
2529
2530 if (!len)
2531 /* If there is no payload, then we use only one Tx buffer */
2532 *control_flags = TFD_CTL_COUNT_SET(1);
2533 else
2534 /* Else use 2 buffers.
2535 * Tell 3945 about any padding after MAC header */
2536 *control_flags = TFD_CTL_COUNT_SET(2) |
2537 TFD_CTL_PAD_SET(U32_PAD(len));
2538
2539 /* Total # bytes to be transmitted */
2540 len = (u16)skb->len;
2541 out_cmd->cmd.tx.len = cpu_to_le16(len);
2542
2543 /* TODO need this for burst mode later on */
2544 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
2545
2546 /* set is_hcca to 0; it probably will never be implemented */
2547 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
2548
2549 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2550 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2551
2552 if (!ieee80211_has_morefrags(hdr->frame_control)) {
2553 txq->need_update = 1;
2554 if (qc)
2555 priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
2556 } else {
2557 wait_write_ptr = 1;
2558 txq->need_update = 0;
2559 }
2560
2561 iwl_print_hex_dump(priv, IWL_DL_TX, out_cmd->cmd.payload,
2562 sizeof(out_cmd->cmd.tx));
2563
2564 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2565 ieee80211_hdrlen(fc));
2566
2567 /* Tell device the write index *just past* this latest filled TFD */
2568 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
2569 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2570 spin_unlock_irqrestore(&priv->lock, flags);
2571
2572 if (rc)
2573 return rc;
2574
2575 if ((iwl_queue_space(q) < q->high_mark)
2576 && priv->mac80211_registered) {
2577 if (wait_write_ptr) {
2578 spin_lock_irqsave(&priv->lock, flags);
2579 txq->need_update = 1;
2580 iwl3945_tx_queue_update_write_ptr(priv, txq);
2581 spin_unlock_irqrestore(&priv->lock, flags);
2582 }
2583
2584 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
2585 }
2586
2587 return 0;
2588
2589 drop_unlock:
2590 spin_unlock_irqrestore(&priv->lock, flags);
2591 drop:
2592 return -1;
2593 }
2594
2595 static void iwl3945_set_rate(struct iwl_priv *priv)
2596 {
2597 const struct ieee80211_supported_band *sband = NULL;
2598 struct ieee80211_rate *rate;
2599 int i;
2600
2601 sband = iwl3945_get_band(priv, priv->band);
2602 if (!sband) {
2603 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
2604 return;
2605 }
2606
2607 priv->active_rate = 0;
2608 priv->active_rate_basic = 0;
2609
2610 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2611 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
2612
2613 for (i = 0; i < sband->n_bitrates; i++) {
2614 rate = &sband->bitrates[i];
2615 if ((rate->hw_value < IWL_RATE_COUNT) &&
2616 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2617 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2618 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2619 priv->active_rate |= (1 << rate->hw_value);
2620 }
2621 }
2622
2623 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2624 priv->active_rate, priv->active_rate_basic);
2625
2626 /*
2627 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2628 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2629 * OFDM
2630 */
2631 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2632 priv->staging39_rxon.cck_basic_rates =
2633 ((priv->active_rate_basic &
2634 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2635 else
2636 priv->staging39_rxon.cck_basic_rates =
2637 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2638
2639 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2640 priv->staging39_rxon.ofdm_basic_rates =
2641 ((priv->active_rate_basic &
2642 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2643 IWL_FIRST_OFDM_RATE) & 0xFF;
2644 else
2645 priv->staging39_rxon.ofdm_basic_rates =
2646 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2647 }
2648
2649 static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2650 {
2651 unsigned long flags;
2652
2653 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2654 return;
2655
2656 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2657 disable_radio ? "OFF" : "ON");
2658
2659 if (disable_radio) {
2660 iwl3945_scan_cancel(priv);
2661 /* FIXME: This is a workaround for AP */
2662 if (priv->iw_mode != NL80211_IFTYPE_AP) {
2663 spin_lock_irqsave(&priv->lock, flags);
2664 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2665 CSR_UCODE_SW_BIT_RFKILL);
2666 spin_unlock_irqrestore(&priv->lock, flags);
2667 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2668 set_bit(STATUS_RF_KILL_SW, &priv->status);
2669 }
2670 return;
2671 }
2672
2673 spin_lock_irqsave(&priv->lock, flags);
2674 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2675
2676 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2677 spin_unlock_irqrestore(&priv->lock, flags);
2678
2679 /* wake up ucode */
2680 msleep(10);
2681
2682 spin_lock_irqsave(&priv->lock, flags);
2683 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2684 if (!iwl_grab_nic_access(priv))
2685 iwl_release_nic_access(priv);
2686 spin_unlock_irqrestore(&priv->lock, flags);
2687
2688 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2689 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2690 "disabled by HW switch\n");
2691 return;
2692 }
2693
2694 if (priv->is_open)
2695 queue_work(priv->workqueue, &priv->restart);
2696 return;
2697 }
2698
2699 void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
2700 u32 decrypt_res, struct ieee80211_rx_status *stats)
2701 {
2702 u16 fc =
2703 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2704
2705 if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2706 return;
2707
2708 if (!(fc & IEEE80211_FCTL_PROTECTED))
2709 return;
2710
2711 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2712 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2713 case RX_RES_STATUS_SEC_TYPE_TKIP:
2714 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2715 RX_RES_STATUS_BAD_ICV_MIC)
2716 stats->flag |= RX_FLAG_MMIC_ERROR;
2717 case RX_RES_STATUS_SEC_TYPE_WEP:
2718 case RX_RES_STATUS_SEC_TYPE_CCMP:
2719 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2720 RX_RES_STATUS_DECRYPT_OK) {
2721 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2722 stats->flag |= RX_FLAG_DECRYPTED;
2723 }
2724 break;
2725
2726 default:
2727 break;
2728 }
2729 }
2730
2731 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2732
2733 #include "iwl-spectrum.h"
2734
2735 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
2736 #define BEACON_TIME_MASK_HIGH 0xFF000000
2737 #define TIME_UNIT 1024
2738
2739 /*
2740 * extended beacon time format
2741 * time in usec will be changed into a 32-bit value in 8:24 format
2742 * the high 1 byte is the beacon counts
2743 * the lower 3 bytes is the time in usec within one beacon interval
2744 */
2745
2746 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
2747 {
2748 u32 quot;
2749 u32 rem;
2750 u32 interval = beacon_interval * 1024;
2751
2752 if (!interval || !usec)
2753 return 0;
2754
2755 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2756 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2757
2758 return (quot << 24) + rem;
2759 }
2760
2761 /* base is usually what we get from ucode with each received frame,
2762 * the same as HW timer counter counting down
2763 */
2764
2765 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
2766 {
2767 u32 base_low = base & BEACON_TIME_MASK_LOW;
2768 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2769 u32 interval = beacon_interval * TIME_UNIT;
2770 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2771 (addon & BEACON_TIME_MASK_HIGH);
2772
2773 if (base_low > addon_low)
2774 res += base_low - addon_low;
2775 else if (base_low < addon_low) {
2776 res += interval + base_low - addon_low;
2777 res += (1 << 24);
2778 } else
2779 res += (1 << 24);
2780
2781 return cpu_to_le32(res);
2782 }
2783
2784 static int iwl3945_get_measurement(struct iwl_priv *priv,
2785 struct ieee80211_measurement_params *params,
2786 u8 type)
2787 {
2788 struct iwl_spectrum_cmd spectrum;
2789 struct iwl_rx_packet *res;
2790 struct iwl_host_cmd cmd = {
2791 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2792 .data = (void *)&spectrum,
2793 .meta.flags = CMD_WANT_SKB,
2794 };
2795 u32 add_time = le64_to_cpu(params->start_time);
2796 int rc;
2797 int spectrum_resp_status;
2798 int duration = le16_to_cpu(params->duration);
2799
2800 if (iwl3945_is_associated(priv))
2801 add_time =
2802 iwl3945_usecs_to_beacons(
2803 le64_to_cpu(params->start_time) - priv->last_tsf,
2804 le16_to_cpu(priv->rxon_timing.beacon_interval));
2805
2806 memset(&spectrum, 0, sizeof(spectrum));
2807
2808 spectrum.channel_count = cpu_to_le16(1);
2809 spectrum.flags =
2810 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2811 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2812 cmd.len = sizeof(spectrum);
2813 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2814
2815 if (iwl3945_is_associated(priv))
2816 spectrum.start_time =
2817 iwl3945_add_beacon_time(priv->last_beacon_time,
2818 add_time,
2819 le16_to_cpu(priv->rxon_timing.beacon_interval));
2820 else
2821 spectrum.start_time = 0;
2822
2823 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2824 spectrum.channels[0].channel = params->channel;
2825 spectrum.channels[0].type = type;
2826 if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
2827 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2828 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2829
2830 rc = iwl3945_send_cmd_sync(priv, &cmd);
2831 if (rc)
2832 return rc;
2833
2834 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
2835 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2836 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
2837 rc = -EIO;
2838 }
2839
2840 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2841 switch (spectrum_resp_status) {
2842 case 0: /* Command will be handled */
2843 if (res->u.spectrum.id != 0xff) {
2844 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
2845 res->u.spectrum.id);
2846 priv->measurement_status &= ~MEASUREMENT_READY;
2847 }
2848 priv->measurement_status |= MEASUREMENT_ACTIVE;
2849 rc = 0;
2850 break;
2851
2852 case 1: /* Command will not be handled */
2853 rc = -EAGAIN;
2854 break;
2855 }
2856
2857 dev_kfree_skb_any(cmd.meta.u.skb);
2858
2859 return rc;
2860 }
2861 #endif
2862
2863 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
2864 struct iwl_rx_mem_buffer *rxb)
2865 {
2866 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2867 struct iwl_alive_resp *palive;
2868 struct delayed_work *pwork;
2869
2870 palive = &pkt->u.alive_frame;
2871
2872 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
2873 "0x%01X 0x%01X\n",
2874 palive->is_valid, palive->ver_type,
2875 palive->ver_subtype);
2876
2877 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
2878 IWL_DEBUG_INFO("Initialization Alive received.\n");
2879 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
2880 sizeof(struct iwl_alive_resp));
2881 pwork = &priv->init_alive_start;
2882 } else {
2883 IWL_DEBUG_INFO("Runtime Alive received.\n");
2884 memcpy(&priv->card_alive, &pkt->u.alive_frame,
2885 sizeof(struct iwl_alive_resp));
2886 pwork = &priv->alive_start;
2887 iwl3945_disable_events(priv);
2888 }
2889
2890 /* We delay the ALIVE response by 5ms to
2891 * give the HW RF Kill time to activate... */
2892 if (palive->is_valid == UCODE_VALID_OK)
2893 queue_delayed_work(priv->workqueue, pwork,
2894 msecs_to_jiffies(5));
2895 else
2896 IWL_WARN(priv, "uCode did not respond OK.\n");
2897 }
2898
2899 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
2900 struct iwl_rx_mem_buffer *rxb)
2901 {
2902 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2903
2904 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
2905 return;
2906 }
2907
2908 static void iwl3945_rx_reply_error(struct iwl_priv *priv,
2909 struct iwl_rx_mem_buffer *rxb)
2910 {
2911 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2912
2913 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2914 "seq 0x%04X ser 0x%08X\n",
2915 le32_to_cpu(pkt->u.err_resp.error_type),
2916 get_cmd_string(pkt->u.err_resp.cmd_id),
2917 pkt->u.err_resp.cmd_id,
2918 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
2919 le32_to_cpu(pkt->u.err_resp.error_info));
2920 }
2921
2922 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2923
2924 static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
2925 {
2926 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2927 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
2928 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
2929 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
2930 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
2931 rxon->channel = csa->channel;
2932 priv->staging39_rxon.channel = csa->channel;
2933 }
2934
2935 static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
2936 struct iwl_rx_mem_buffer *rxb)
2937 {
2938 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
2939 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2940 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
2941
2942 if (!report->state) {
2943 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
2944 "Spectrum Measure Notification: Start\n");
2945 return;
2946 }
2947
2948 memcpy(&priv->measure_report, report, sizeof(*report));
2949 priv->measurement_status |= MEASUREMENT_READY;
2950 #endif
2951 }
2952
2953 static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
2954 struct iwl_rx_mem_buffer *rxb)
2955 {
2956 #ifdef CONFIG_IWL3945_DEBUG
2957 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2958 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2959 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
2960 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
2961 #endif
2962 }
2963
2964 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2965 struct iwl_rx_mem_buffer *rxb)
2966 {
2967 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
2968 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
2969 "notification for %s:\n",
2970 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
2971 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
2972 le32_to_cpu(pkt->len));
2973 }
2974
2975 static void iwl3945_bg_beacon_update(struct work_struct *work)
2976 {
2977 struct iwl_priv *priv =
2978 container_of(work, struct iwl_priv, beacon_update);
2979 struct sk_buff *beacon;
2980
2981 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
2982 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
2983
2984 if (!beacon) {
2985 IWL_ERR(priv, "update beacon failed\n");
2986 return;
2987 }
2988
2989 mutex_lock(&priv->mutex);
2990 /* new beacon skb is allocated every time; dispose previous.*/
2991 if (priv->ibss_beacon)
2992 dev_kfree_skb(priv->ibss_beacon);
2993
2994 priv->ibss_beacon = beacon;
2995 mutex_unlock(&priv->mutex);
2996
2997 iwl3945_send_beacon_cmd(priv);
2998 }
2999
3000 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
3001 struct iwl_rx_mem_buffer *rxb)
3002 {
3003 #ifdef CONFIG_IWL3945_DEBUG
3004 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3005 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3006 u8 rate = beacon->beacon_notify_hdr.rate;
3007
3008 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3009 "tsf %d %d rate %d\n",
3010 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3011 beacon->beacon_notify_hdr.failure_frame,
3012 le32_to_cpu(beacon->ibss_mgr_status),
3013 le32_to_cpu(beacon->high_tsf),
3014 le32_to_cpu(beacon->low_tsf), rate);
3015 #endif
3016
3017 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
3018 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3019 queue_work(priv->workqueue, &priv->beacon_update);
3020 }
3021
3022 /* Service response to REPLY_SCAN_CMD (0x80) */
3023 static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
3024 struct iwl_rx_mem_buffer *rxb)
3025 {
3026 #ifdef CONFIG_IWL3945_DEBUG
3027 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3028 struct iwl_scanreq_notification *notif =
3029 (struct iwl_scanreq_notification *)pkt->u.raw;
3030
3031 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3032 #endif
3033 }
3034
3035 /* Service SCAN_START_NOTIFICATION (0x82) */
3036 static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
3037 struct iwl_rx_mem_buffer *rxb)
3038 {
3039 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3040 struct iwl_scanstart_notification *notif =
3041 (struct iwl_scanstart_notification *)pkt->u.raw;
3042 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3043 IWL_DEBUG_SCAN("Scan start: "
3044 "%d [802.11%s] "
3045 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3046 notif->channel,
3047 notif->band ? "bg" : "a",
3048 notif->tsf_high,
3049 notif->tsf_low, notif->status, notif->beacon_timer);
3050 }
3051
3052 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3053 static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
3054 struct iwl_rx_mem_buffer *rxb)
3055 {
3056 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3057 struct iwl_scanresults_notification *notif =
3058 (struct iwl_scanresults_notification *)pkt->u.raw;
3059
3060 IWL_DEBUG_SCAN("Scan ch.res: "
3061 "%d [802.11%s] "
3062 "(TSF: 0x%08X:%08X) - %d "
3063 "elapsed=%lu usec (%dms since last)\n",
3064 notif->channel,
3065 notif->band ? "bg" : "a",
3066 le32_to_cpu(notif->tsf_high),
3067 le32_to_cpu(notif->tsf_low),
3068 le32_to_cpu(notif->statistics[0]),
3069 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3070 jiffies_to_msecs(elapsed_jiffies
3071 (priv->last_scan_jiffies, jiffies)));
3072
3073 priv->last_scan_jiffies = jiffies;
3074 priv->next_scan_jiffies = 0;
3075 }
3076
3077 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3078 static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
3079 struct iwl_rx_mem_buffer *rxb)
3080 {
3081 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3082 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3083
3084 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3085 scan_notif->scanned_channels,
3086 scan_notif->tsf_low,
3087 scan_notif->tsf_high, scan_notif->status);
3088
3089 /* The HW is no longer scanning */
3090 clear_bit(STATUS_SCAN_HW, &priv->status);
3091
3092 /* The scan completion notification came in, so kill that timer... */
3093 cancel_delayed_work(&priv->scan_check);
3094
3095 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3096 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3097 "2.4" : "5.2",
3098 jiffies_to_msecs(elapsed_jiffies
3099 (priv->scan_pass_start, jiffies)));
3100
3101 /* Remove this scanned band from the list of pending
3102 * bands to scan, band G precedes A in order of scanning
3103 * as seen in iwl3945_bg_request_scan */
3104 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3105 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3106 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3107 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
3108
3109 /* If a request to abort was given, or the scan did not succeed
3110 * then we reset the scan state machine and terminate,
3111 * re-queuing another scan if one has been requested */
3112 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3113 IWL_DEBUG_INFO("Aborted scan completed.\n");
3114 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3115 } else {
3116 /* If there are more bands on this scan pass reschedule */
3117 if (priv->scan_bands > 0)
3118 goto reschedule;
3119 }
3120
3121 priv->last_scan_jiffies = jiffies;
3122 priv->next_scan_jiffies = 0;
3123 IWL_DEBUG_INFO("Setting scan to off\n");
3124
3125 clear_bit(STATUS_SCANNING, &priv->status);
3126
3127 IWL_DEBUG_INFO("Scan took %dms\n",
3128 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3129
3130 queue_work(priv->workqueue, &priv->scan_completed);
3131
3132 return;
3133
3134 reschedule:
3135 priv->scan_pass_start = jiffies;
3136 queue_work(priv->workqueue, &priv->request_scan);
3137 }
3138
3139 /* Handle notification from uCode that card's power state is changing
3140 * due to software, hardware, or critical temperature RFKILL */
3141 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
3142 struct iwl_rx_mem_buffer *rxb)
3143 {
3144 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3145 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3146 unsigned long status = priv->status;
3147
3148 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3149 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3150 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3151
3152 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3153 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3154
3155 if (flags & HW_CARD_DISABLED)
3156 set_bit(STATUS_RF_KILL_HW, &priv->status);
3157 else
3158 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3159
3160
3161 if (flags & SW_CARD_DISABLED)
3162 set_bit(STATUS_RF_KILL_SW, &priv->status);
3163 else
3164 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3165
3166 iwl3945_scan_cancel(priv);
3167
3168 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3169 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3170 (test_bit(STATUS_RF_KILL_SW, &status) !=
3171 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3172 queue_work(priv->workqueue, &priv->rf_kill);
3173 else
3174 wake_up_interruptible(&priv->wait_command_queue);
3175 }
3176
3177 /**
3178 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3179 *
3180 * Setup the RX handlers for each of the reply types sent from the uCode
3181 * to the host.
3182 *
3183 * This function chains into the hardware specific files for them to setup
3184 * any hardware specific handlers as well.
3185 */
3186 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
3187 {
3188 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3189 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3190 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3191 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3192 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3193 iwl3945_rx_spectrum_measure_notif;
3194 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3195 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3196 iwl3945_rx_pm_debug_statistics_notif;
3197 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3198
3199 /*
3200 * The same handler is used for both the REPLY to a discrete
3201 * statistics request from the host as well as for the periodic
3202 * statistics notifications (after received beacons) from the uCode.
3203 */
3204 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3205 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3206
3207 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3208 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3209 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3210 iwl3945_rx_scan_results_notif;
3211 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3212 iwl3945_rx_scan_complete_notif;
3213 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3214
3215 /* Set up hardware specific Rx handlers */
3216 iwl3945_hw_rx_handler_setup(priv);
3217 }
3218
3219 /**
3220 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3221 * When FW advances 'R' index, all entries between old and new 'R' index
3222 * need to be reclaimed.
3223 */
3224 static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
3225 int txq_id, int index)
3226 {
3227 struct iwl3945_tx_queue *txq = &priv->txq39[txq_id];
3228 struct iwl_queue *q = &txq->q;
3229 int nfreed = 0;
3230
3231 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3232 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
3233 "is out of range [0-%d] %d %d.\n", txq_id,
3234 index, q->n_bd, q->write_ptr, q->read_ptr);
3235 return;
3236 }
3237
3238 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3239 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3240 if (nfreed > 1) {
3241 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
3242 q->write_ptr, q->read_ptr);
3243 queue_work(priv->workqueue, &priv->restart);
3244 break;
3245 }
3246 nfreed++;
3247 }
3248 }
3249
3250
3251 /**
3252 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3253 * @rxb: Rx buffer to reclaim
3254 *
3255 * If an Rx buffer has an async callback associated with it the callback
3256 * will be executed. The attached skb (if present) will only be freed
3257 * if the callback returns 1
3258 */
3259 static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
3260 struct iwl_rx_mem_buffer *rxb)
3261 {
3262 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3263 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3264 int txq_id = SEQ_TO_QUEUE(sequence);
3265 int index = SEQ_TO_INDEX(sequence);
3266 int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3267 int cmd_index;
3268 struct iwl_cmd *cmd;
3269
3270 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3271
3272 cmd_index = get_cmd_index(&priv->txq39[IWL_CMD_QUEUE_NUM].q, index, huge);
3273 cmd = &priv->txq39[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3274
3275 /* Input error checking is done when commands are added to queue. */
3276 if (cmd->meta.flags & CMD_WANT_SKB) {
3277 cmd->meta.source->u.skb = rxb->skb;
3278 rxb->skb = NULL;
3279 } else if (cmd->meta.u.callback &&
3280 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3281 rxb->skb = NULL;
3282
3283 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
3284
3285 if (!(cmd->meta.flags & CMD_ASYNC)) {
3286 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3287 wake_up_interruptible(&priv->wait_command_queue);
3288 }
3289 }
3290
3291 /************************** RX-FUNCTIONS ****************************/
3292 /*
3293 * Rx theory of operation
3294 *
3295 * The host allocates 32 DMA target addresses and passes the host address
3296 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3297 * 0 to 31
3298 *
3299 * Rx Queue Indexes
3300 * The host/firmware share two index registers for managing the Rx buffers.
3301 *
3302 * The READ index maps to the first position that the firmware may be writing
3303 * to -- the driver can read up to (but not including) this position and get
3304 * good data.
3305 * The READ index is managed by the firmware once the card is enabled.
3306 *
3307 * The WRITE index maps to the last position the driver has read from -- the
3308 * position preceding WRITE is the last slot the firmware can place a packet.
3309 *
3310 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3311 * WRITE = READ.
3312 *
3313 * During initialization, the host sets up the READ queue position to the first
3314 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3315 *
3316 * When the firmware places a packet in a buffer, it will advance the READ index
3317 * and fire the RX interrupt. The driver can then query the READ index and
3318 * process as many packets as possible, moving the WRITE index forward as it
3319 * resets the Rx queue buffers with new memory.
3320 *
3321 * The management in the driver is as follows:
3322 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3323 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3324 * to replenish the iwl->rxq->rx_free.
3325 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3326 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3327 * 'processed' and 'read' driver indexes as well)
3328 * + A received packet is processed and handed to the kernel network stack,
3329 * detached from the iwl->rxq. The driver 'processed' index is updated.
3330 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3331 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3332 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3333 * were enough free buffers and RX_STALLED is set it is cleared.
3334 *
3335 *
3336 * Driver sequence:
3337 *
3338 * iwl3945_rx_queue_alloc() Allocates rx_free
3339 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3340 * iwl3945_rx_queue_restock
3341 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3342 * queue, updates firmware pointers, and updates
3343 * the WRITE index. If insufficient rx_free buffers
3344 * are available, schedules iwl3945_rx_replenish
3345 *
3346 * -- enable interrupts --
3347 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
3348 * READ INDEX, detaching the SKB from the pool.
3349 * Moves the packet buffer from queue to rx_used.
3350 * Calls iwl3945_rx_queue_restock to refill any empty
3351 * slots.
3352 * ...
3353 *
3354 */
3355
3356 /**
3357 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3358 */
3359 static int iwl3945_rx_queue_space(const struct iwl_rx_queue *q)
3360 {
3361 int s = q->read - q->write;
3362 if (s <= 0)
3363 s += RX_QUEUE_SIZE;
3364 /* keep some buffer to not confuse full and empty queue */
3365 s -= 2;
3366 if (s < 0)
3367 s = 0;
3368 return s;
3369 }
3370
3371 /**
3372 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3373 */
3374 int iwl3945_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
3375 {
3376 u32 reg = 0;
3377 int rc = 0;
3378 unsigned long flags;
3379
3380 spin_lock_irqsave(&q->lock, flags);
3381
3382 if (q->need_update == 0)
3383 goto exit_unlock;
3384
3385 /* If power-saving is in use, make sure device is awake */
3386 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3387 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3388
3389 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3390 iwl_set_bit(priv, CSR_GP_CNTRL,
3391 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3392 goto exit_unlock;
3393 }
3394
3395 rc = iwl_grab_nic_access(priv);
3396 if (rc)
3397 goto exit_unlock;
3398
3399 /* Device expects a multiple of 8 */
3400 iwl_write_direct32(priv, FH39_RSCSR_CHNL0_WPTR,
3401 q->write & ~0x7);
3402 iwl_release_nic_access(priv);
3403
3404 /* Else device is assumed to be awake */
3405 } else
3406 /* Device expects a multiple of 8 */
3407 iwl_write32(priv, FH39_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3408
3409
3410 q->need_update = 0;
3411
3412 exit_unlock:
3413 spin_unlock_irqrestore(&q->lock, flags);
3414 return rc;
3415 }
3416
3417 /**
3418 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3419 */
3420 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
3421 dma_addr_t dma_addr)
3422 {
3423 return cpu_to_le32((u32)dma_addr);
3424 }
3425
3426 /**
3427 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3428 *
3429 * If there are slots in the RX queue that need to be restocked,
3430 * and we have free pre-allocated buffers, fill the ranks as much
3431 * as we can, pulling from rx_free.
3432 *
3433 * This moves the 'write' index forward to catch up with 'processed', and
3434 * also updates the memory address in the firmware to reference the new
3435 * target buffer.
3436 */
3437 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
3438 {
3439 struct iwl_rx_queue *rxq = &priv->rxq;
3440 struct list_head *element;
3441 struct iwl_rx_mem_buffer *rxb;
3442 unsigned long flags;
3443 int write, rc;
3444
3445 spin_lock_irqsave(&rxq->lock, flags);
3446 write = rxq->write & ~0x7;
3447 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
3448 /* Get next free Rx buffer, remove from free list */
3449 element = rxq->rx_free.next;
3450 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3451 list_del(element);
3452
3453 /* Point to Rx buffer via next RBD in circular buffer */
3454 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
3455 rxq->queue[rxq->write] = rxb;
3456 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3457 rxq->free_count--;
3458 }
3459 spin_unlock_irqrestore(&rxq->lock, flags);
3460 /* If the pre-allocated buffer pool is dropping low, schedule to
3461 * refill it */
3462 if (rxq->free_count <= RX_LOW_WATERMARK)
3463 queue_work(priv->workqueue, &priv->rx_replenish);
3464
3465
3466 /* If we've added more space for the firmware to place data, tell it.
3467 * Increment device's write pointer in multiples of 8. */
3468 if ((write != (rxq->write & ~0x7))
3469 || (abs(rxq->write - rxq->read) > 7)) {
3470 spin_lock_irqsave(&rxq->lock, flags);
3471 rxq->need_update = 1;
3472 spin_unlock_irqrestore(&rxq->lock, flags);
3473 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
3474 if (rc)
3475 return rc;
3476 }
3477
3478 return 0;
3479 }
3480
3481 /**
3482 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
3483 *
3484 * When moving to rx_free an SKB is allocated for the slot.
3485 *
3486 * Also restock the Rx queue via iwl3945_rx_queue_restock.
3487 * This is called as a scheduled work item (except for during initialization)
3488 */
3489 static void iwl3945_rx_allocate(struct iwl_priv *priv)
3490 {
3491 struct iwl_rx_queue *rxq = &priv->rxq;
3492 struct list_head *element;
3493 struct iwl_rx_mem_buffer *rxb;
3494 unsigned long flags;
3495 spin_lock_irqsave(&rxq->lock, flags);
3496 while (!list_empty(&rxq->rx_used)) {
3497 element = rxq->rx_used.next;
3498 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
3499
3500 /* Alloc a new receive buffer */
3501 rxb->skb =
3502 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3503 if (!rxb->skb) {
3504 if (net_ratelimit())
3505 IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
3506 /* We don't reschedule replenish work here -- we will
3507 * call the restock method and if it still needs
3508 * more buffers it will schedule replenish */
3509 break;
3510 }
3511
3512 /* If radiotap head is required, reserve some headroom here.
3513 * The physical head count is a variable rx_stats->phy_count.
3514 * We reserve 4 bytes here. Plus these extra bytes, the
3515 * headroom of the physical head should be enough for the
3516 * radiotap head that iwl3945 supported. See iwl3945_rt.
3517 */
3518 skb_reserve(rxb->skb, 4);
3519
3520 priv->alloc_rxb_skb++;
3521 list_del(element);
3522
3523 /* Get physical address of RB/SKB */
3524 rxb->real_dma_addr =
3525 pci_map_single(priv->pci_dev, rxb->skb->data,
3526 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3527 list_add_tail(&rxb->list, &rxq->rx_free);
3528 rxq->free_count++;
3529 }
3530 spin_unlock_irqrestore(&rxq->lock, flags);
3531 }
3532
3533 /*
3534 * this should be called while priv->lock is locked
3535 */
3536 static void __iwl3945_rx_replenish(void *data)
3537 {
3538 struct iwl_priv *priv = data;
3539
3540 iwl3945_rx_allocate(priv);
3541 iwl3945_rx_queue_restock(priv);
3542 }
3543
3544
3545 void iwl3945_rx_replenish(void *data)
3546 {
3547 struct iwl_priv *priv = data;
3548 unsigned long flags;
3549
3550 iwl3945_rx_allocate(priv);
3551
3552 spin_lock_irqsave(&priv->lock, flags);
3553 iwl3945_rx_queue_restock(priv);
3554 spin_unlock_irqrestore(&priv->lock, flags);
3555 }
3556
3557 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
3558 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
3559 * This free routine walks the list of POOL entries and if SKB is set to
3560 * non NULL it is unmapped and freed
3561 */
3562 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3563 {
3564 int i;
3565 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3566 if (rxq->pool[i].skb != NULL) {
3567 pci_unmap_single(priv->pci_dev,
3568 rxq->pool[i].real_dma_addr,
3569 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3570 dev_kfree_skb(rxq->pool[i].skb);
3571 }
3572 }
3573
3574 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3575 rxq->dma_addr);
3576 rxq->bd = NULL;
3577 }
3578
3579 int iwl3945_rx_queue_alloc(struct iwl_priv *priv)
3580 {
3581 struct iwl_rx_queue *rxq = &priv->rxq;
3582 struct pci_dev *dev = priv->pci_dev;
3583 int i;
3584
3585 spin_lock_init(&rxq->lock);
3586 INIT_LIST_HEAD(&rxq->rx_free);
3587 INIT_LIST_HEAD(&rxq->rx_used);
3588
3589 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
3590 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3591 if (!rxq->bd)
3592 return -ENOMEM;
3593
3594 /* Fill the rx_used queue with _all_ of the Rx buffers */
3595 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3596 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3597
3598 /* Set us so that we have processed and used all buffers, but have
3599 * not restocked the Rx queue with fresh buffers */
3600 rxq->read = rxq->write = 0;
3601 rxq->free_count = 0;
3602 rxq->need_update = 0;
3603 return 0;
3604 }
3605
3606 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
3607 {
3608 unsigned long flags;
3609 int i;
3610 spin_lock_irqsave(&rxq->lock, flags);
3611 INIT_LIST_HEAD(&rxq->rx_free);
3612 INIT_LIST_HEAD(&rxq->rx_used);
3613 /* Fill the rx_used queue with _all_ of the Rx buffers */
3614 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3615 /* In the reset function, these buffers may have been allocated
3616 * to an SKB, so we need to unmap and free potential storage */
3617 if (rxq->pool[i].skb != NULL) {
3618 pci_unmap_single(priv->pci_dev,
3619 rxq->pool[i].real_dma_addr,
3620 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3621 priv->alloc_rxb_skb--;
3622 dev_kfree_skb(rxq->pool[i].skb);
3623 rxq->pool[i].skb = NULL;
3624 }
3625 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3626 }
3627
3628 /* Set us so that we have processed and used all buffers, but have
3629 * not restocked the Rx queue with fresh buffers */
3630 rxq->read = rxq->write = 0;
3631 rxq->free_count = 0;
3632 spin_unlock_irqrestore(&rxq->lock, flags);
3633 }
3634
3635 /* Convert linear signal-to-noise ratio into dB */
3636 static u8 ratio2dB[100] = {
3637 /* 0 1 2 3 4 5 6 7 8 9 */
3638 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3639 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3640 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3641 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3642 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3643 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3644 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3645 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3646 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3647 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3648 };
3649
3650 /* Calculates a relative dB value from a ratio of linear
3651 * (i.e. not dB) signal levels.
3652 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
3653 int iwl3945_calc_db_from_ratio(int sig_ratio)
3654 {
3655 /* 1000:1 or higher just report as 60 dB */
3656 if (sig_ratio >= 1000)
3657 return 60;
3658
3659 /* 100:1 or higher, divide by 10 and use table,
3660 * add 20 dB to make up for divide by 10 */
3661 if (sig_ratio >= 100)
3662 return 20 + (int)ratio2dB[sig_ratio/10];
3663
3664 /* We shouldn't see this */
3665 if (sig_ratio < 1)
3666 return 0;
3667
3668 /* Use table for ratios 1:1 - 99:1 */
3669 return (int)ratio2dB[sig_ratio];
3670 }
3671
3672 #define PERFECT_RSSI (-20) /* dBm */
3673 #define WORST_RSSI (-95) /* dBm */
3674 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3675
3676 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
3677 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3678 * about formulas used below. */
3679 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
3680 {
3681 int sig_qual;
3682 int degradation = PERFECT_RSSI - rssi_dbm;
3683
3684 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3685 * as indicator; formula is (signal dbm - noise dbm).
3686 * SNR at or above 40 is a great signal (100%).
3687 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3688 * Weakest usable signal is usually 10 - 15 dB SNR. */
3689 if (noise_dbm) {
3690 if (rssi_dbm - noise_dbm >= 40)
3691 return 100;
3692 else if (rssi_dbm < noise_dbm)
3693 return 0;
3694 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3695
3696 /* Else use just the signal level.
3697 * This formula is a least squares fit of data points collected and
3698 * compared with a reference system that had a percentage (%) display
3699 * for signal quality. */
3700 } else
3701 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3702 (15 * RSSI_RANGE + 62 * degradation)) /
3703 (RSSI_RANGE * RSSI_RANGE);
3704
3705 if (sig_qual > 100)
3706 sig_qual = 100;
3707 else if (sig_qual < 1)
3708 sig_qual = 0;
3709
3710 return sig_qual;
3711 }
3712
3713 /**
3714 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
3715 *
3716 * Uses the priv->rx_handlers callback function array to invoke
3717 * the appropriate handlers, including command responses,
3718 * frame-received notifications, and other notifications.
3719 */
3720 static void iwl3945_rx_handle(struct iwl_priv *priv)
3721 {
3722 struct iwl_rx_mem_buffer *rxb;
3723 struct iwl_rx_packet *pkt;
3724 struct iwl_rx_queue *rxq = &priv->rxq;
3725 u32 r, i;
3726 int reclaim;
3727 unsigned long flags;
3728 u8 fill_rx = 0;
3729 u32 count = 8;
3730
3731 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3732 * buffer that the driver may process (last buffer filled by ucode). */
3733 r = iwl3945_hw_get_rx_read(priv);
3734 i = rxq->read;
3735
3736 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3737 fill_rx = 1;
3738 /* Rx interrupt, but nothing sent from uCode */
3739 if (i == r)
3740 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3741
3742 while (i != r) {
3743 rxb = rxq->queue[i];
3744
3745 /* If an RXB doesn't have a Rx queue slot associated with it,
3746 * then a bug has been introduced in the queue refilling
3747 * routines -- catch it here */
3748 BUG_ON(rxb == NULL);
3749
3750 rxq->queue[i] = NULL;
3751
3752 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
3753 IWL_RX_BUF_SIZE,
3754 PCI_DMA_FROMDEVICE);
3755 pkt = (struct iwl_rx_packet *)rxb->skb->data;
3756
3757 /* Reclaim a command buffer only if this packet is a response
3758 * to a (driver-originated) command.
3759 * If the packet (e.g. Rx frame) originated from uCode,
3760 * there is no command buffer to reclaim.
3761 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
3762 * but apparently a few don't get set; catch them here. */
3763 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
3764 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
3765 (pkt->hdr.cmd != REPLY_TX);
3766
3767 /* Based on type of command response or notification,
3768 * handle those that need handling via function in
3769 * rx_handlers table. See iwl3945_setup_rx_handlers() */
3770 if (priv->rx_handlers[pkt->hdr.cmd]) {
3771 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3772 "r = %d, i = %d, %s, 0x%02x\n", r, i,
3773 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
3774 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
3775 } else {
3776 /* No handling needed */
3777 IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
3778 "r %d i %d No handler needed for %s, 0x%02x\n",
3779 r, i, get_cmd_string(pkt->hdr.cmd),
3780 pkt->hdr.cmd);
3781 }
3782
3783 if (reclaim) {
3784 /* Invoke any callbacks, transfer the skb to caller, and
3785 * fire off the (possibly) blocking iwl3945_send_cmd()
3786 * as we reclaim the driver command queue */
3787 if (rxb && rxb->skb)
3788 iwl3945_tx_cmd_complete(priv, rxb);
3789 else
3790 IWL_WARN(priv, "Claim null rxb?\n");
3791 }
3792
3793 /* For now we just don't re-use anything. We can tweak this
3794 * later to try and re-use notification packets and SKBs that
3795 * fail to Rx correctly */
3796 if (rxb->skb != NULL) {
3797 priv->alloc_rxb_skb--;
3798 dev_kfree_skb_any(rxb->skb);
3799 rxb->skb = NULL;
3800 }
3801
3802 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
3803 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3804 spin_lock_irqsave(&rxq->lock, flags);
3805 list_add_tail(&rxb->list, &priv->rxq.rx_used);
3806 spin_unlock_irqrestore(&rxq->lock, flags);
3807 i = (i + 1) & RX_QUEUE_MASK;
3808 /* If there are a lot of unused frames,
3809 * restock the Rx queue so ucode won't assert. */
3810 if (fill_rx) {
3811 count++;
3812 if (count >= 8) {
3813 priv->rxq.read = i;
3814 __iwl3945_rx_replenish(priv);
3815 count = 0;
3816 }
3817 }
3818 }
3819
3820 /* Backtrack one entry */
3821 priv->rxq.read = i;
3822 iwl3945_rx_queue_restock(priv);
3823 }
3824
3825 /**
3826 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
3827 */
3828 static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv,
3829 struct iwl3945_tx_queue *txq)
3830 {
3831 u32 reg = 0;
3832 int rc = 0;
3833 int txq_id = txq->q.id;
3834
3835 if (txq->need_update == 0)
3836 return rc;
3837
3838 /* if we're trying to save power */
3839 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3840 /* wake up nic if it's powered down ...
3841 * uCode will wake up, and interrupt us again, so next
3842 * time we'll skip this part. */
3843 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3844
3845 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3846 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
3847 iwl_set_bit(priv, CSR_GP_CNTRL,
3848 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3849 return rc;
3850 }
3851
3852 /* restore this queue's parameters in nic hardware. */
3853 rc = iwl_grab_nic_access(priv);
3854 if (rc)
3855 return rc;
3856 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
3857 txq->q.write_ptr | (txq_id << 8));
3858 iwl_release_nic_access(priv);
3859
3860 /* else not in power-save mode, uCode will never sleep when we're
3861 * trying to tx (during RFKILL, we're not trying to tx). */
3862 } else
3863 iwl_write32(priv, HBUS_TARG_WRPTR,
3864 txq->q.write_ptr | (txq_id << 8));
3865
3866 txq->need_update = 0;
3867
3868 return rc;
3869 }
3870
3871 #ifdef CONFIG_IWL3945_DEBUG
3872 static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
3873 struct iwl3945_rxon_cmd *rxon)
3874 {
3875 IWL_DEBUG_RADIO("RX CONFIG:\n");
3876 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
3877 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
3878 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
3879 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
3880 le32_to_cpu(rxon->filter_flags));
3881 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
3882 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
3883 rxon->ofdm_basic_rates);
3884 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
3885 IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
3886 IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
3887 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
3888 }
3889 #endif
3890
3891 static void iwl3945_enable_interrupts(struct iwl_priv *priv)
3892 {
3893 IWL_DEBUG_ISR("Enabling interrupts\n");
3894 set_bit(STATUS_INT_ENABLED, &priv->status);
3895 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
3896 }
3897
3898
3899 /* call this function to flush any scheduled tasklet */
3900 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
3901 {
3902 /* wait to make sure we flush pending tasklet*/
3903 synchronize_irq(priv->pci_dev->irq);
3904 tasklet_kill(&priv->irq_tasklet);
3905 }
3906
3907
3908 static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
3909 {
3910 clear_bit(STATUS_INT_ENABLED, &priv->status);
3911
3912 /* disable interrupts from uCode/NIC to host */
3913 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
3914
3915 /* acknowledge/clear/reset any interrupts still pending
3916 * from uCode or flow handler (Rx/Tx DMA) */
3917 iwl_write32(priv, CSR_INT, 0xffffffff);
3918 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
3919 IWL_DEBUG_ISR("Disabled interrupts\n");
3920 }
3921
3922 static const char *desc_lookup(int i)
3923 {
3924 switch (i) {
3925 case 1:
3926 return "FAIL";
3927 case 2:
3928 return "BAD_PARAM";
3929 case 3:
3930 return "BAD_CHECKSUM";
3931 case 4:
3932 return "NMI_INTERRUPT";
3933 case 5:
3934 return "SYSASSERT";
3935 case 6:
3936 return "FATAL_ERROR";
3937 }
3938
3939 return "UNKNOWN";
3940 }
3941
3942 #define ERROR_START_OFFSET (1 * sizeof(u32))
3943 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
3944
3945 static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
3946 {
3947 u32 i;
3948 u32 desc, time, count, base, data1;
3949 u32 blink1, blink2, ilink1, ilink2;
3950 int rc;
3951
3952 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
3953
3954 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
3955 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
3956 return;
3957 }
3958
3959 rc = iwl_grab_nic_access(priv);
3960 if (rc) {
3961 IWL_WARN(priv, "Can not read from adapter at this time.\n");
3962 return;
3963 }
3964
3965 count = iwl_read_targ_mem(priv, base);
3966
3967 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
3968 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
3969 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
3970 priv->status, count);
3971 }
3972
3973 IWL_ERR(priv, "Desc Time asrtPC blink2 "
3974 "ilink1 nmiPC Line\n");
3975 for (i = ERROR_START_OFFSET;
3976 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
3977 i += ERROR_ELEM_SIZE) {
3978 desc = iwl_read_targ_mem(priv, base + i);
3979 time =
3980 iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
3981 blink1 =
3982 iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
3983 blink2 =
3984 iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
3985 ilink1 =
3986 iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
3987 ilink2 =
3988 iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
3989 data1 =
3990 iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
3991
3992 IWL_ERR(priv,
3993 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
3994 desc_lookup(desc), desc, time, blink1, blink2,
3995 ilink1, ilink2, data1);
3996 }
3997
3998 iwl_release_nic_access(priv);
3999
4000 }
4001
4002 #define EVENT_START_OFFSET (6 * sizeof(u32))
4003
4004 /**
4005 * iwl3945_print_event_log - Dump error event log to syslog
4006 *
4007 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
4008 */
4009 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
4010 u32 num_events, u32 mode)
4011 {
4012 u32 i;
4013 u32 base; /* SRAM byte address of event log header */
4014 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4015 u32 ptr; /* SRAM byte address of log data */
4016 u32 ev, time, data; /* event log data */
4017
4018 if (num_events == 0)
4019 return;
4020
4021 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4022
4023 if (mode == 0)
4024 event_size = 2 * sizeof(u32);
4025 else
4026 event_size = 3 * sizeof(u32);
4027
4028 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4029
4030 /* "time" is actually "data" for mode 0 (no timestamp).
4031 * place event id # at far right for easier visual parsing. */
4032 for (i = 0; i < num_events; i++) {
4033 ev = iwl_read_targ_mem(priv, ptr);
4034 ptr += sizeof(u32);
4035 time = iwl_read_targ_mem(priv, ptr);
4036 ptr += sizeof(u32);
4037 if (mode == 0) {
4038 /* data, ev */
4039 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
4040 } else {
4041 data = iwl_read_targ_mem(priv, ptr);
4042 ptr += sizeof(u32);
4043 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
4044 }
4045 }
4046 }
4047
4048 static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
4049 {
4050 int rc;
4051 u32 base; /* SRAM byte address of event log header */
4052 u32 capacity; /* event log capacity in # entries */
4053 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4054 u32 num_wraps; /* # times uCode wrapped to top of log */
4055 u32 next_entry; /* index of next entry to be written by uCode */
4056 u32 size; /* # entries that we'll print */
4057
4058 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4059 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4060 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
4061 return;
4062 }
4063
4064 rc = iwl_grab_nic_access(priv);
4065 if (rc) {
4066 IWL_WARN(priv, "Can not read from adapter at this time.\n");
4067 return;
4068 }
4069
4070 /* event log header */
4071 capacity = iwl_read_targ_mem(priv, base);
4072 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4073 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4074 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
4075
4076 size = num_wraps ? capacity : next_entry;
4077
4078 /* bail out if nothing in log */
4079 if (size == 0) {
4080 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
4081 iwl_release_nic_access(priv);
4082 return;
4083 }
4084
4085 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
4086 size, num_wraps);
4087
4088 /* if uCode has wrapped back to top of log, start at the oldest entry,
4089 * i.e the next one that uCode would fill. */
4090 if (num_wraps)
4091 iwl3945_print_event_log(priv, next_entry,
4092 capacity - next_entry, mode);
4093
4094 /* (then/else) start at top of log */
4095 iwl3945_print_event_log(priv, 0, next_entry, mode);
4096
4097 iwl_release_nic_access(priv);
4098 }
4099
4100 /**
4101 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4102 */
4103 static void iwl3945_irq_handle_error(struct iwl_priv *priv)
4104 {
4105 /* Set the FW error flag -- cleared on iwl3945_down */
4106 set_bit(STATUS_FW_ERROR, &priv->status);
4107
4108 /* Cancel currently queued command. */
4109 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4110
4111 #ifdef CONFIG_IWL3945_DEBUG
4112 if (priv->debug_level & IWL_DL_FW_ERRORS) {
4113 iwl3945_dump_nic_error_log(priv);
4114 iwl3945_dump_nic_event_log(priv);
4115 iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
4116 }
4117 #endif
4118
4119 wake_up_interruptible(&priv->wait_command_queue);
4120
4121 /* Keep the restart process from trying to send host
4122 * commands by clearing the INIT status bit */
4123 clear_bit(STATUS_READY, &priv->status);
4124
4125 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4126 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4127 "Restarting adapter due to uCode error.\n");
4128
4129 if (iwl3945_is_associated(priv)) {
4130 memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
4131 sizeof(priv->recovery39_rxon));
4132 priv->error_recovering = 1;
4133 }
4134 queue_work(priv->workqueue, &priv->restart);
4135 }
4136 }
4137
4138 static void iwl3945_error_recovery(struct iwl_priv *priv)
4139 {
4140 unsigned long flags;
4141
4142 memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
4143 sizeof(priv->staging39_rxon));
4144 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4145 iwl3945_commit_rxon(priv);
4146
4147 iwl3945_add_station(priv, priv->bssid, 1, 0);
4148
4149 spin_lock_irqsave(&priv->lock, flags);
4150 priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
4151 priv->error_recovering = 0;
4152 spin_unlock_irqrestore(&priv->lock, flags);
4153 }
4154
4155 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
4156 {
4157 u32 inta, handled = 0;
4158 u32 inta_fh;
4159 unsigned long flags;
4160 #ifdef CONFIG_IWL3945_DEBUG
4161 u32 inta_mask;
4162 #endif
4163
4164 spin_lock_irqsave(&priv->lock, flags);
4165
4166 /* Ack/clear/reset pending uCode interrupts.
4167 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4168 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4169 inta = iwl_read32(priv, CSR_INT);
4170 iwl_write32(priv, CSR_INT, inta);
4171
4172 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4173 * Any new interrupts that happen after this, either while we're
4174 * in this tasklet, or later, will show up in next ISR/tasklet. */
4175 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4176 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4177
4178 #ifdef CONFIG_IWL3945_DEBUG
4179 if (priv->debug_level & IWL_DL_ISR) {
4180 /* just for debug */
4181 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4182 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4183 inta, inta_mask, inta_fh);
4184 }
4185 #endif
4186
4187 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4188 * atomic, make sure that inta covers all the interrupts that
4189 * we've discovered, even if FH interrupt came in just after
4190 * reading CSR_INT. */
4191 if (inta_fh & CSR39_FH_INT_RX_MASK)
4192 inta |= CSR_INT_BIT_FH_RX;
4193 if (inta_fh & CSR39_FH_INT_TX_MASK)
4194 inta |= CSR_INT_BIT_FH_TX;
4195
4196 /* Now service all interrupt bits discovered above. */
4197 if (inta & CSR_INT_BIT_HW_ERR) {
4198 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
4199
4200 /* Tell the device to stop sending interrupts */
4201 iwl3945_disable_interrupts(priv);
4202
4203 iwl3945_irq_handle_error(priv);
4204
4205 handled |= CSR_INT_BIT_HW_ERR;
4206
4207 spin_unlock_irqrestore(&priv->lock, flags);
4208
4209 return;
4210 }
4211
4212 #ifdef CONFIG_IWL3945_DEBUG
4213 if (priv->debug_level & (IWL_DL_ISR)) {
4214 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4215 if (inta & CSR_INT_BIT_SCD)
4216 IWL_DEBUG_ISR("Scheduler finished to transmit "
4217 "the frame/frames.\n");
4218
4219 /* Alive notification via Rx interrupt will do the real work */
4220 if (inta & CSR_INT_BIT_ALIVE)
4221 IWL_DEBUG_ISR("Alive interrupt\n");
4222 }
4223 #endif
4224 /* Safely ignore these bits for debug checks below */
4225 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4226
4227 /* Error detected by uCode */
4228 if (inta & CSR_INT_BIT_SW_ERR) {
4229 IWL_ERR(priv, "Microcode SW error detected. "
4230 "Restarting 0x%X.\n", inta);
4231 iwl3945_irq_handle_error(priv);
4232 handled |= CSR_INT_BIT_SW_ERR;
4233 }
4234
4235 /* uCode wakes up after power-down sleep */
4236 if (inta & CSR_INT_BIT_WAKEUP) {
4237 IWL_DEBUG_ISR("Wakeup interrupt\n");
4238 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4239 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[0]);
4240 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[1]);
4241 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[2]);
4242 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[3]);
4243 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[4]);
4244 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq39[5]);
4245
4246 handled |= CSR_INT_BIT_WAKEUP;
4247 }
4248
4249 /* All uCode command responses, including Tx command responses,
4250 * Rx "responses" (frame-received notification), and other
4251 * notifications from uCode come through here*/
4252 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4253 iwl3945_rx_handle(priv);
4254 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4255 }
4256
4257 if (inta & CSR_INT_BIT_FH_TX) {
4258 IWL_DEBUG_ISR("Tx interrupt\n");
4259
4260 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4261 if (!iwl_grab_nic_access(priv)) {
4262 iwl_write_direct32(priv, FH39_TCSR_CREDIT
4263 (FH39_SRVC_CHNL), 0x0);
4264 iwl_release_nic_access(priv);
4265 }
4266 handled |= CSR_INT_BIT_FH_TX;
4267 }
4268
4269 if (inta & ~handled)
4270 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
4271
4272 if (inta & ~CSR_INI_SET_MASK) {
4273 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
4274 inta & ~CSR_INI_SET_MASK);
4275 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
4276 }
4277
4278 /* Re-enable all interrupts */
4279 /* only Re-enable if disabled by irq */
4280 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4281 iwl3945_enable_interrupts(priv);
4282
4283 #ifdef CONFIG_IWL3945_DEBUG
4284 if (priv->debug_level & (IWL_DL_ISR)) {
4285 inta = iwl_read32(priv, CSR_INT);
4286 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4287 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4288 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4289 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4290 }
4291 #endif
4292 spin_unlock_irqrestore(&priv->lock, flags);
4293 }
4294
4295 static irqreturn_t iwl3945_isr(int irq, void *data)
4296 {
4297 struct iwl_priv *priv = data;
4298 u32 inta, inta_mask;
4299 u32 inta_fh;
4300 if (!priv)
4301 return IRQ_NONE;
4302
4303 spin_lock(&priv->lock);
4304
4305 /* Disable (but don't clear!) interrupts here to avoid
4306 * back-to-back ISRs and sporadic interrupts from our NIC.
4307 * If we have something to service, the tasklet will re-enable ints.
4308 * If we *don't* have something, we'll re-enable before leaving here. */
4309 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4310 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4311
4312 /* Discover which interrupts are active/pending */
4313 inta = iwl_read32(priv, CSR_INT);
4314 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4315
4316 /* Ignore interrupt if there's nothing in NIC to service.
4317 * This may be due to IRQ shared with another device,
4318 * or due to sporadic interrupts thrown from our NIC. */
4319 if (!inta && !inta_fh) {
4320 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4321 goto none;
4322 }
4323
4324 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4325 /* Hardware disappeared */
4326 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
4327 goto unplugged;
4328 }
4329
4330 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4331 inta, inta_mask, inta_fh);
4332
4333 inta &= ~CSR_INT_BIT_SCD;
4334
4335 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4336 if (likely(inta || inta_fh))
4337 tasklet_schedule(&priv->irq_tasklet);
4338 unplugged:
4339 spin_unlock(&priv->lock);
4340
4341 return IRQ_HANDLED;
4342
4343 none:
4344 /* re-enable interrupts here since we don't have anything to service. */
4345 /* only Re-enable if disabled by irq */
4346 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4347 iwl3945_enable_interrupts(priv);
4348 spin_unlock(&priv->lock);
4349 return IRQ_NONE;
4350 }
4351
4352 /************************** EEPROM BANDS ****************************
4353 *
4354 * The iwl3945_eeprom_band definitions below provide the mapping from the
4355 * EEPROM contents to the specific channel number supported for each
4356 * band.
4357 *
4358 * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
4359 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4360 * The specific geography and calibration information for that channel
4361 * is contained in the eeprom map itself.
4362 *
4363 * During init, we copy the eeprom information and channel map
4364 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4365 *
4366 * channel_map_24/52 provides the index in the channel_info array for a
4367 * given channel. We have to have two separate maps as there is channel
4368 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4369 * band_2
4370 *
4371 * A value of 0xff stored in the channel_map indicates that the channel
4372 * is not supported by the hardware at all.
4373 *
4374 * A value of 0xfe in the channel_map indicates that the channel is not
4375 * valid for Tx with the current hardware. This means that
4376 * while the system can tune and receive on a given channel, it may not
4377 * be able to associate or transmit any frames on that
4378 * channel. There is no corresponding channel information for that
4379 * entry.
4380 *
4381 *********************************************************************/
4382
4383 /* 2.4 GHz */
4384 static const u8 iwl3945_eeprom_band_1[14] = {
4385 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4386 };
4387
4388 /* 5.2 GHz bands */
4389 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4390 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4391 };
4392
4393 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4394 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4395 };
4396
4397 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4398 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4399 };
4400
4401 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
4402 145, 149, 153, 157, 161, 165
4403 };
4404
4405 static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
4406 int *eeprom_ch_count,
4407 const struct iwl_eeprom_channel
4408 **eeprom_ch_info,
4409 const u8 **eeprom_ch_index)
4410 {
4411 switch (band) {
4412 case 1: /* 2.4GHz band */
4413 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4414 *eeprom_ch_info = priv->eeprom39.band_1_channels;
4415 *eeprom_ch_index = iwl3945_eeprom_band_1;
4416 break;
4417 case 2: /* 4.9GHz band */
4418 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4419 *eeprom_ch_info = priv->eeprom39.band_2_channels;
4420 *eeprom_ch_index = iwl3945_eeprom_band_2;
4421 break;
4422 case 3: /* 5.2GHz band */
4423 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4424 *eeprom_ch_info = priv->eeprom39.band_3_channels;
4425 *eeprom_ch_index = iwl3945_eeprom_band_3;
4426 break;
4427 case 4: /* 5.5GHz band */
4428 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4429 *eeprom_ch_info = priv->eeprom39.band_4_channels;
4430 *eeprom_ch_index = iwl3945_eeprom_band_4;
4431 break;
4432 case 5: /* 5.7GHz band */
4433 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4434 *eeprom_ch_info = priv->eeprom39.band_5_channels;
4435 *eeprom_ch_index = iwl3945_eeprom_band_5;
4436 break;
4437 default:
4438 BUG();
4439 return;
4440 }
4441 }
4442
4443 /**
4444 * iwl3945_get_channel_info - Find driver's private channel info
4445 *
4446 * Based on band and channel number.
4447 */
4448 const struct iwl_channel_info *
4449 iwl3945_get_channel_info(const struct iwl_priv *priv,
4450 enum ieee80211_band band, u16 channel)
4451 {
4452 int i;
4453
4454 switch (band) {
4455 case IEEE80211_BAND_5GHZ:
4456 for (i = 14; i < priv->channel_count; i++) {
4457 if (priv->channel_info[i].channel == channel)
4458 return &priv->channel_info[i];
4459 }
4460 break;
4461
4462 case IEEE80211_BAND_2GHZ:
4463 if (channel >= 1 && channel <= 14)
4464 return &priv->channel_info[channel - 1];
4465 break;
4466 case IEEE80211_NUM_BANDS:
4467 WARN_ON(1);
4468 }
4469
4470 return NULL;
4471 }
4472
4473 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4474 ? # x " " : "")
4475
4476 /**
4477 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4478 */
4479 static int iwl3945_init_channel_map(struct iwl_priv *priv)
4480 {
4481 int eeprom_ch_count = 0;
4482 const u8 *eeprom_ch_index = NULL;
4483 const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
4484 int band, ch;
4485 struct iwl_channel_info *ch_info;
4486
4487 if (priv->channel_count) {
4488 IWL_DEBUG_INFO("Channel map already initialized.\n");
4489 return 0;
4490 }
4491
4492 if (priv->eeprom39.version < 0x2f) {
4493 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
4494 priv->eeprom39.version);
4495 return -EINVAL;
4496 }
4497
4498 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4499
4500 priv->channel_count =
4501 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4502 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4503 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4504 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4505 ARRAY_SIZE(iwl3945_eeprom_band_5);
4506
4507 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4508
4509 priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
4510 priv->channel_count, GFP_KERNEL);
4511 if (!priv->channel_info) {
4512 IWL_ERR(priv, "Could not allocate channel_info\n");
4513 priv->channel_count = 0;
4514 return -ENOMEM;
4515 }
4516
4517 ch_info = priv->channel_info;
4518
4519 /* Loop through the 5 EEPROM bands adding them in order to the
4520 * channel map we maintain (that contains additional information than
4521 * what just in the EEPROM) */
4522 for (band = 1; band <= 5; band++) {
4523
4524 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
4525 &eeprom_ch_info, &eeprom_ch_index);
4526
4527 /* Loop through each band adding each of the channels */
4528 for (ch = 0; ch < eeprom_ch_count; ch++) {
4529 ch_info->channel = eeprom_ch_index[ch];
4530 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4531 IEEE80211_BAND_5GHZ;
4532
4533 /* permanently store EEPROM's channel regulatory flags
4534 * and max power in channel info database. */
4535 ch_info->eeprom = eeprom_ch_info[ch];
4536
4537 /* Copy the run-time flags so they are there even on
4538 * invalid channels */
4539 ch_info->flags = eeprom_ch_info[ch].flags;
4540
4541 if (!(is_channel_valid(ch_info))) {
4542 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4543 "No traffic\n",
4544 ch_info->channel,
4545 ch_info->flags,
4546 is_channel_a_band(ch_info) ?
4547 "5.2" : "2.4");
4548 ch_info++;
4549 continue;
4550 }
4551
4552 /* Initialize regulatory-based run-time data */
4553 ch_info->max_power_avg = ch_info->curr_txpow =
4554 eeprom_ch_info[ch].max_power_avg;
4555 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4556 ch_info->min_power = 0;
4557
4558 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
4559 " %ddBm): Ad-Hoc %ssupported\n",
4560 ch_info->channel,
4561 is_channel_a_band(ch_info) ?
4562 "5.2" : "2.4",
4563 CHECK_AND_PRINT(VALID),
4564 CHECK_AND_PRINT(IBSS),
4565 CHECK_AND_PRINT(ACTIVE),
4566 CHECK_AND_PRINT(RADAR),
4567 CHECK_AND_PRINT(WIDE),
4568 CHECK_AND_PRINT(DFS),
4569 eeprom_ch_info[ch].flags,
4570 eeprom_ch_info[ch].max_power_avg,
4571 ((eeprom_ch_info[ch].
4572 flags & EEPROM_CHANNEL_IBSS)
4573 && !(eeprom_ch_info[ch].
4574 flags & EEPROM_CHANNEL_RADAR))
4575 ? "" : "not ");
4576
4577 /* Set the user_txpower_limit to the highest power
4578 * supported by any channel */
4579 if (eeprom_ch_info[ch].max_power_avg >
4580 priv->user_txpower_limit)
4581 priv->user_txpower_limit =
4582 eeprom_ch_info[ch].max_power_avg;
4583
4584 ch_info++;
4585 }
4586 }
4587
4588 /* Set up txpower settings in driver for all channels */
4589 if (iwl3945_txpower_set_from_eeprom(priv))
4590 return -EIO;
4591
4592 return 0;
4593 }
4594
4595 /*
4596 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4597 */
4598 static void iwl3945_free_channel_map(struct iwl_priv *priv)
4599 {
4600 kfree(priv->channel_info);
4601 priv->channel_count = 0;
4602 }
4603
4604 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4605 * sending probe req. This should be set long enough to hear probe responses
4606 * from more than one AP. */
4607 #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
4608 #define IWL_ACTIVE_DWELL_TIME_52 (20)
4609
4610 #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
4611 #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
4612
4613 /* For faster active scanning, scan will move to the next channel if fewer than
4614 * PLCP_QUIET_THRESH packets are heard on this channel within
4615 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4616 * time if it's a quiet channel (nothing responded to our probe, and there's
4617 * no other traffic).
4618 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4619 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4620 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
4621
4622 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4623 * Must be set longer than active dwell time.
4624 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4625 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4626 #define IWL_PASSIVE_DWELL_TIME_52 (10)
4627 #define IWL_PASSIVE_DWELL_BASE (100)
4628 #define IWL_CHANNEL_TUNE_TIME 5
4629
4630 #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
4631
4632 static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
4633 enum ieee80211_band band,
4634 u8 n_probes)
4635 {
4636 if (band == IEEE80211_BAND_5GHZ)
4637 return IWL_ACTIVE_DWELL_TIME_52 +
4638 IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
4639 else
4640 return IWL_ACTIVE_DWELL_TIME_24 +
4641 IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
4642 }
4643
4644 static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
4645 enum ieee80211_band band)
4646 {
4647 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
4648 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4649 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4650
4651 if (iwl3945_is_associated(priv)) {
4652 /* If we're associated, we clamp the maximum passive
4653 * dwell time to be 98% of the beacon interval (minus
4654 * 2 * channel tune time) */
4655 passive = priv->beacon_int;
4656 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4657 passive = IWL_PASSIVE_DWELL_BASE;
4658 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4659 }
4660
4661 return passive;
4662 }
4663
4664 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
4665 enum ieee80211_band band,
4666 u8 is_active, u8 n_probes,
4667 struct iwl3945_scan_channel *scan_ch)
4668 {
4669 const struct ieee80211_channel *channels = NULL;
4670 const struct ieee80211_supported_band *sband;
4671 const struct iwl_channel_info *ch_info;
4672 u16 passive_dwell = 0;
4673 u16 active_dwell = 0;
4674 int added, i;
4675
4676 sband = iwl3945_get_band(priv, band);
4677 if (!sband)
4678 return 0;
4679
4680 channels = sband->channels;
4681
4682 active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
4683 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
4684
4685 if (passive_dwell <= active_dwell)
4686 passive_dwell = active_dwell + 1;
4687
4688 for (i = 0, added = 0; i < sband->n_channels; i++) {
4689 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4690 continue;
4691
4692 scan_ch->channel = channels[i].hw_value;
4693
4694 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
4695 if (!is_channel_valid(ch_info)) {
4696 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
4697 scan_ch->channel);
4698 continue;
4699 }
4700
4701 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4702 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4703 /* If passive , set up for auto-switch
4704 * and use long active_dwell time.
4705 */
4706 if (!is_active || is_channel_passive(ch_info) ||
4707 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
4708 scan_ch->type = 0; /* passive */
4709 if (IWL_UCODE_API(priv->ucode_ver) == 1)
4710 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
4711 } else {
4712 scan_ch->type = 1; /* active */
4713 }
4714
4715 /* Set direct probe bits. These may be used both for active
4716 * scan channels (probes gets sent right away),
4717 * or for passive channels (probes get se sent only after
4718 * hearing clear Rx packet).*/
4719 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
4720 if (n_probes)
4721 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4722 } else {
4723 /* uCode v1 does not allow setting direct probe bits on
4724 * passive channel. */
4725 if ((scan_ch->type & 1) && n_probes)
4726 scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
4727 }
4728
4729 /* Set txpower levels to defaults */
4730 scan_ch->tpc.dsp_atten = 110;
4731 /* scan_pwr_info->tpc.dsp_atten; */
4732
4733 /*scan_pwr_info->tpc.tx_gain; */
4734 if (band == IEEE80211_BAND_5GHZ)
4735 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4736 else {
4737 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4738 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
4739 * power level:
4740 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
4741 */
4742 }
4743
4744 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4745 scan_ch->channel,
4746 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4747 (scan_ch->type & 1) ?
4748 active_dwell : passive_dwell);
4749
4750 scan_ch++;
4751 added++;
4752 }
4753
4754 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4755 return added;
4756 }
4757
4758 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
4759 struct ieee80211_rate *rates)
4760 {
4761 int i;
4762
4763 for (i = 0; i < IWL_RATE_COUNT; i++) {
4764 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
4765 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4766 rates[i].hw_value_short = i;
4767 rates[i].flags = 0;
4768 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
4769 /*
4770 * If CCK != 1M then set short preamble rate flag.
4771 */
4772 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
4773 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4774 }
4775 }
4776 }
4777
4778 /**
4779 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
4780 */
4781 static int iwl3945_init_geos(struct iwl_priv *priv)
4782 {
4783 struct iwl_channel_info *ch;
4784 struct ieee80211_supported_band *sband;
4785 struct ieee80211_channel *channels;
4786 struct ieee80211_channel *geo_ch;
4787 struct ieee80211_rate *rates;
4788 int i = 0;
4789
4790 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4791 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
4792 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4793 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4794 return 0;
4795 }
4796
4797 channels = kzalloc(sizeof(struct ieee80211_channel) *
4798 priv->channel_count, GFP_KERNEL);
4799 if (!channels)
4800 return -ENOMEM;
4801
4802 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
4803 GFP_KERNEL);
4804 if (!rates) {
4805 kfree(channels);
4806 return -ENOMEM;
4807 }
4808
4809 /* 5.2GHz channels start after the 2.4GHz channels */
4810 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4811 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
4812 /* just OFDM */
4813 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4814 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
4815
4816 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4817 sband->channels = channels;
4818 /* OFDM & CCK */
4819 sband->bitrates = rates;
4820 sband->n_bitrates = IWL_RATE_COUNT;
4821
4822 priv->ieee_channels = channels;
4823 priv->ieee_rates = rates;
4824
4825 iwl3945_init_hw_rates(priv, rates);
4826
4827 for (i = 0; i < priv->channel_count; i++) {
4828 ch = &priv->channel_info[i];
4829
4830 /* FIXME: might be removed if scan is OK*/
4831 if (!is_channel_valid(ch))
4832 continue;
4833
4834 if (is_channel_a_band(ch))
4835 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4836 else
4837 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4838
4839 geo_ch = &sband->channels[sband->n_channels++];
4840
4841 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
4842 geo_ch->max_power = ch->max_power_avg;
4843 geo_ch->max_antenna_gain = 0xff;
4844 geo_ch->hw_value = ch->channel;
4845
4846 if (is_channel_valid(ch)) {
4847 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4848 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
4849
4850 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4851 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4852
4853 if (ch->flags & EEPROM_CHANNEL_RADAR)
4854 geo_ch->flags |= IEEE80211_CHAN_RADAR;
4855
4856 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4857 priv->max_channel_txpower_limit =
4858 ch->max_power_avg;
4859 } else {
4860 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
4861 }
4862
4863 /* Save flags for reg domain usage */
4864 geo_ch->orig_flags = geo_ch->flags;
4865
4866 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4867 ch->channel, geo_ch->center_freq,
4868 is_channel_a_band(ch) ? "5.2" : "2.4",
4869 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4870 "restricted" : "valid",
4871 geo_ch->flags);
4872 }
4873
4874 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4875 priv->cfg->sku & IWL_SKU_A) {
4876 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
4877 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
4878 priv->pci_dev->device, priv->pci_dev->subsystem_device);
4879 priv->cfg->sku &= ~IWL_SKU_A;
4880 }
4881
4882 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
4883 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
4884 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
4885
4886 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
4887 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
4888 &priv->bands[IEEE80211_BAND_2GHZ];
4889 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
4890 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
4891 &priv->bands[IEEE80211_BAND_5GHZ];
4892
4893 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4894
4895 return 0;
4896 }
4897
4898 /*
4899 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
4900 */
4901 static void iwl3945_free_geos(struct iwl_priv *priv)
4902 {
4903 kfree(priv->ieee_channels);
4904 kfree(priv->ieee_rates);
4905 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
4906 }
4907
4908 /******************************************************************************
4909 *
4910 * uCode download functions
4911 *
4912 ******************************************************************************/
4913
4914 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
4915 {
4916 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
4917 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
4918 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
4919 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
4920 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
4921 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
4922 }
4923
4924 /**
4925 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
4926 * looking at all data.
4927 */
4928 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
4929 {
4930 u32 val;
4931 u32 save_len = len;
4932 int rc = 0;
4933 u32 errcnt;
4934
4935 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4936
4937 rc = iwl_grab_nic_access(priv);
4938 if (rc)
4939 return rc;
4940
4941 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4942 IWL39_RTC_INST_LOWER_BOUND);
4943
4944 errcnt = 0;
4945 for (; len > 0; len -= sizeof(u32), image++) {
4946 /* read data comes through single port, auto-incr addr */
4947 /* NOTE: Use the debugless read so we don't flood kernel log
4948 * if IWL_DL_IO is set */
4949 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4950 if (val != le32_to_cpu(*image)) {
4951 IWL_ERR(priv, "uCode INST section is invalid at "
4952 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4953 save_len - len, val, le32_to_cpu(*image));
4954 rc = -EIO;
4955 errcnt++;
4956 if (errcnt >= 20)
4957 break;
4958 }
4959 }
4960
4961 iwl_release_nic_access(priv);
4962
4963 if (!errcnt)
4964 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
4965
4966 return rc;
4967 }
4968
4969
4970 /**
4971 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
4972 * using sample data 100 bytes apart. If these sample points are good,
4973 * it's a pretty good bet that everything between them is good, too.
4974 */
4975 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
4976 {
4977 u32 val;
4978 int rc = 0;
4979 u32 errcnt = 0;
4980 u32 i;
4981
4982 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
4983
4984 rc = iwl_grab_nic_access(priv);
4985 if (rc)
4986 return rc;
4987
4988 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
4989 /* read data comes through single port, auto-incr addr */
4990 /* NOTE: Use the debugless read so we don't flood kernel log
4991 * if IWL_DL_IO is set */
4992 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
4993 i + IWL39_RTC_INST_LOWER_BOUND);
4994 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
4995 if (val != le32_to_cpu(*image)) {
4996 #if 0 /* Enable this if you want to see details */
4997 IWL_ERR(priv, "uCode INST section is invalid at "
4998 "offset 0x%x, is 0x%x, s/b 0x%x\n",
4999 i, val, *image);
5000 #endif
5001 rc = -EIO;
5002 errcnt++;
5003 if (errcnt >= 3)
5004 break;
5005 }
5006 }
5007
5008 iwl_release_nic_access(priv);
5009
5010 return rc;
5011 }
5012
5013
5014 /**
5015 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5016 * and verify its contents
5017 */
5018 static int iwl3945_verify_ucode(struct iwl_priv *priv)
5019 {
5020 __le32 *image;
5021 u32 len;
5022 int rc = 0;
5023
5024 /* Try bootstrap */
5025 image = (__le32 *)priv->ucode_boot.v_addr;
5026 len = priv->ucode_boot.len;
5027 rc = iwl3945_verify_inst_sparse(priv, image, len);
5028 if (rc == 0) {
5029 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5030 return 0;
5031 }
5032
5033 /* Try initialize */
5034 image = (__le32 *)priv->ucode_init.v_addr;
5035 len = priv->ucode_init.len;
5036 rc = iwl3945_verify_inst_sparse(priv, image, len);
5037 if (rc == 0) {
5038 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5039 return 0;
5040 }
5041
5042 /* Try runtime/protocol */
5043 image = (__le32 *)priv->ucode_code.v_addr;
5044 len = priv->ucode_code.len;
5045 rc = iwl3945_verify_inst_sparse(priv, image, len);
5046 if (rc == 0) {
5047 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5048 return 0;
5049 }
5050
5051 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5052
5053 /* Since nothing seems to match, show first several data entries in
5054 * instruction SRAM, so maybe visual inspection will give a clue.
5055 * Selection of bootstrap image (vs. other images) is arbitrary. */
5056 image = (__le32 *)priv->ucode_boot.v_addr;
5057 len = priv->ucode_boot.len;
5058 rc = iwl3945_verify_inst_full(priv, image, len);
5059
5060 return rc;
5061 }
5062
5063
5064 /* check contents of special bootstrap uCode SRAM */
5065 static int iwl3945_verify_bsm(struct iwl_priv *priv)
5066 {
5067 __le32 *image = priv->ucode_boot.v_addr;
5068 u32 len = priv->ucode_boot.len;
5069 u32 reg;
5070 u32 val;
5071
5072 IWL_DEBUG_INFO("Begin verify bsm\n");
5073
5074 /* verify BSM SRAM contents */
5075 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
5076 for (reg = BSM_SRAM_LOWER_BOUND;
5077 reg < BSM_SRAM_LOWER_BOUND + len;
5078 reg += sizeof(u32), image++) {
5079 val = iwl_read_prph(priv, reg);
5080 if (val != le32_to_cpu(*image)) {
5081 IWL_ERR(priv, "BSM uCode verification failed at "
5082 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5083 BSM_SRAM_LOWER_BOUND,
5084 reg - BSM_SRAM_LOWER_BOUND, len,
5085 val, le32_to_cpu(*image));
5086 return -EIO;
5087 }
5088 }
5089
5090 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5091
5092 return 0;
5093 }
5094
5095 /**
5096 * iwl3945_load_bsm - Load bootstrap instructions
5097 *
5098 * BSM operation:
5099 *
5100 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5101 * in special SRAM that does not power down during RFKILL. When powering back
5102 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5103 * the bootstrap program into the on-board processor, and starts it.
5104 *
5105 * The bootstrap program loads (via DMA) instructions and data for a new
5106 * program from host DRAM locations indicated by the host driver in the
5107 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5108 * automatically.
5109 *
5110 * When initializing the NIC, the host driver points the BSM to the
5111 * "initialize" uCode image. This uCode sets up some internal data, then
5112 * notifies host via "initialize alive" that it is complete.
5113 *
5114 * The host then replaces the BSM_DRAM_* pointer values to point to the
5115 * normal runtime uCode instructions and a backup uCode data cache buffer
5116 * (filled initially with starting data values for the on-board processor),
5117 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5118 * which begins normal operation.
5119 *
5120 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5121 * the backup data cache in DRAM before SRAM is powered down.
5122 *
5123 * When powering back up, the BSM loads the bootstrap program. This reloads
5124 * the runtime uCode instructions and the backup data cache into SRAM,
5125 * and re-launches the runtime uCode from where it left off.
5126 */
5127 static int iwl3945_load_bsm(struct iwl_priv *priv)
5128 {
5129 __le32 *image = priv->ucode_boot.v_addr;
5130 u32 len = priv->ucode_boot.len;
5131 dma_addr_t pinst;
5132 dma_addr_t pdata;
5133 u32 inst_len;
5134 u32 data_len;
5135 int rc;
5136 int i;
5137 u32 done;
5138 u32 reg_offset;
5139
5140 IWL_DEBUG_INFO("Begin load bsm\n");
5141
5142 /* make sure bootstrap program is no larger than BSM's SRAM size */
5143 if (len > IWL39_MAX_BSM_SIZE)
5144 return -EINVAL;
5145
5146 /* Tell bootstrap uCode where to find the "Initialize" uCode
5147 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5148 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5149 * after the "initialize" uCode has run, to point to
5150 * runtime/protocol instructions and backup data cache. */
5151 pinst = priv->ucode_init.p_addr;
5152 pdata = priv->ucode_init_data.p_addr;
5153 inst_len = priv->ucode_init.len;
5154 data_len = priv->ucode_init_data.len;
5155
5156 rc = iwl_grab_nic_access(priv);
5157 if (rc)
5158 return rc;
5159
5160 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5161 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5162 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5163 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5164
5165 /* Fill BSM memory with bootstrap instructions */
5166 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5167 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5168 reg_offset += sizeof(u32), image++)
5169 _iwl_write_prph(priv, reg_offset,
5170 le32_to_cpu(*image));
5171
5172 rc = iwl3945_verify_bsm(priv);
5173 if (rc) {
5174 iwl_release_nic_access(priv);
5175 return rc;
5176 }
5177
5178 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5179 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5180 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5181 IWL39_RTC_INST_LOWER_BOUND);
5182 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5183
5184 /* Load bootstrap code into instruction SRAM now,
5185 * to prepare to load "initialize" uCode */
5186 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5187 BSM_WR_CTRL_REG_BIT_START);
5188
5189 /* Wait for load of bootstrap uCode to finish */
5190 for (i = 0; i < 100; i++) {
5191 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5192 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5193 break;
5194 udelay(10);
5195 }
5196 if (i < 100)
5197 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5198 else {
5199 IWL_ERR(priv, "BSM write did not complete!\n");
5200 return -EIO;
5201 }
5202
5203 /* Enable future boot loads whenever power management unit triggers it
5204 * (e.g. when powering back up after power-save shutdown) */
5205 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5206 BSM_WR_CTRL_REG_BIT_START_EN);
5207
5208 iwl_release_nic_access(priv);
5209
5210 return 0;
5211 }
5212
5213 static void iwl3945_nic_start(struct iwl_priv *priv)
5214 {
5215 /* Remove all resets to allow NIC to operate */
5216 iwl_write32(priv, CSR_RESET, 0);
5217 }
5218
5219 /**
5220 * iwl3945_read_ucode - Read uCode images from disk file.
5221 *
5222 * Copy into buffers for card to fetch via bus-mastering
5223 */
5224 static int iwl3945_read_ucode(struct iwl_priv *priv)
5225 {
5226 struct iwl_ucode *ucode;
5227 int ret = -EINVAL, index;
5228 const struct firmware *ucode_raw;
5229 /* firmware file name contains uCode/driver compatibility version */
5230 const char *name_pre = priv->cfg->fw_name_pre;
5231 const unsigned int api_max = priv->cfg->ucode_api_max;
5232 const unsigned int api_min = priv->cfg->ucode_api_min;
5233 char buf[25];
5234 u8 *src;
5235 size_t len;
5236 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
5237
5238 /* Ask kernel firmware_class module to get the boot firmware off disk.
5239 * request_firmware() is synchronous, file is in memory on return. */
5240 for (index = api_max; index >= api_min; index--) {
5241 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
5242 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
5243 if (ret < 0) {
5244 IWL_ERR(priv, "%s firmware file req failed: %d\n",
5245 buf, ret);
5246 if (ret == -ENOENT)
5247 continue;
5248 else
5249 goto error;
5250 } else {
5251 if (index < api_max)
5252 IWL_ERR(priv, "Loaded firmware %s, "
5253 "which is deprecated. "
5254 " Please use API v%u instead.\n",
5255 buf, api_max);
5256 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5257 buf, ucode_raw->size);
5258 break;
5259 }
5260 }
5261
5262 if (ret < 0)
5263 goto error;
5264
5265 /* Make sure that we got at least our header! */
5266 if (ucode_raw->size < sizeof(*ucode)) {
5267 IWL_ERR(priv, "File size way too small!\n");
5268 ret = -EINVAL;
5269 goto err_release;
5270 }
5271
5272 /* Data from ucode file: header followed by uCode images */
5273 ucode = (void *)ucode_raw->data;
5274
5275 priv->ucode_ver = le32_to_cpu(ucode->ver);
5276 api_ver = IWL_UCODE_API(priv->ucode_ver);
5277 inst_size = le32_to_cpu(ucode->inst_size);
5278 data_size = le32_to_cpu(ucode->data_size);
5279 init_size = le32_to_cpu(ucode->init_size);
5280 init_data_size = le32_to_cpu(ucode->init_data_size);
5281 boot_size = le32_to_cpu(ucode->boot_size);
5282
5283 /* api_ver should match the api version forming part of the
5284 * firmware filename ... but we don't check for that and only rely
5285 * on the API version read from firware header from here on forward */
5286
5287 if (api_ver < api_min || api_ver > api_max) {
5288 IWL_ERR(priv, "Driver unable to support your firmware API. "
5289 "Driver supports v%u, firmware is v%u.\n",
5290 api_max, api_ver);
5291 priv->ucode_ver = 0;
5292 ret = -EINVAL;
5293 goto err_release;
5294 }
5295 if (api_ver != api_max)
5296 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
5297 "got %u. New firmware can be obtained "
5298 "from http://www.intellinuxwireless.org.\n",
5299 api_max, api_ver);
5300
5301 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
5302 IWL_UCODE_MAJOR(priv->ucode_ver),
5303 IWL_UCODE_MINOR(priv->ucode_ver),
5304 IWL_UCODE_API(priv->ucode_ver),
5305 IWL_UCODE_SERIAL(priv->ucode_ver));
5306
5307 IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
5308 priv->ucode_ver);
5309 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5310 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5311 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5312 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5313 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5314
5315
5316 /* Verify size of file vs. image size info in file's header */
5317 if (ucode_raw->size < sizeof(*ucode) +
5318 inst_size + data_size + init_size +
5319 init_data_size + boot_size) {
5320
5321 IWL_DEBUG_INFO("uCode file size %d too small\n",
5322 (int)ucode_raw->size);
5323 ret = -EINVAL;
5324 goto err_release;
5325 }
5326
5327 /* Verify that uCode images will fit in card's SRAM */
5328 if (inst_size > IWL39_MAX_INST_SIZE) {
5329 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5330 inst_size);
5331 ret = -EINVAL;
5332 goto err_release;
5333 }
5334
5335 if (data_size > IWL39_MAX_DATA_SIZE) {
5336 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5337 data_size);
5338 ret = -EINVAL;
5339 goto err_release;
5340 }
5341 if (init_size > IWL39_MAX_INST_SIZE) {
5342 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5343 init_size);
5344 ret = -EINVAL;
5345 goto err_release;
5346 }
5347 if (init_data_size > IWL39_MAX_DATA_SIZE) {
5348 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5349 init_data_size);
5350 ret = -EINVAL;
5351 goto err_release;
5352 }
5353 if (boot_size > IWL39_MAX_BSM_SIZE) {
5354 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5355 boot_size);
5356 ret = -EINVAL;
5357 goto err_release;
5358 }
5359
5360 /* Allocate ucode buffers for card's bus-master loading ... */
5361
5362 /* Runtime instructions and 2 copies of data:
5363 * 1) unmodified from disk
5364 * 2) backup cache for save/restore during power-downs */
5365 priv->ucode_code.len = inst_size;
5366 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5367
5368 priv->ucode_data.len = data_size;
5369 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5370
5371 priv->ucode_data_backup.len = data_size;
5372 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5373
5374 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5375 !priv->ucode_data_backup.v_addr)
5376 goto err_pci_alloc;
5377
5378 /* Initialization instructions and data */
5379 if (init_size && init_data_size) {
5380 priv->ucode_init.len = init_size;
5381 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5382
5383 priv->ucode_init_data.len = init_data_size;
5384 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5385
5386 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5387 goto err_pci_alloc;
5388 }
5389
5390 /* Bootstrap (instructions only, no data) */
5391 if (boot_size) {
5392 priv->ucode_boot.len = boot_size;
5393 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5394
5395 if (!priv->ucode_boot.v_addr)
5396 goto err_pci_alloc;
5397 }
5398
5399 /* Copy images into buffers for card's bus-master reads ... */
5400
5401 /* Runtime instructions (first block of data in file) */
5402 src = &ucode->data[0];
5403 len = priv->ucode_code.len;
5404 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5405 memcpy(priv->ucode_code.v_addr, src, len);
5406 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5407 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5408
5409 /* Runtime data (2nd block)
5410 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5411 src = &ucode->data[inst_size];
5412 len = priv->ucode_data.len;
5413 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5414 memcpy(priv->ucode_data.v_addr, src, len);
5415 memcpy(priv->ucode_data_backup.v_addr, src, len);
5416
5417 /* Initialization instructions (3rd block) */
5418 if (init_size) {
5419 src = &ucode->data[inst_size + data_size];
5420 len = priv->ucode_init.len;
5421 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5422 len);
5423 memcpy(priv->ucode_init.v_addr, src, len);
5424 }
5425
5426 /* Initialization data (4th block) */
5427 if (init_data_size) {
5428 src = &ucode->data[inst_size + data_size + init_size];
5429 len = priv->ucode_init_data.len;
5430 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5431 (int)len);
5432 memcpy(priv->ucode_init_data.v_addr, src, len);
5433 }
5434
5435 /* Bootstrap instructions (5th block) */
5436 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5437 len = priv->ucode_boot.len;
5438 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5439 (int)len);
5440 memcpy(priv->ucode_boot.v_addr, src, len);
5441
5442 /* We have our copies now, allow OS release its copies */
5443 release_firmware(ucode_raw);
5444 return 0;
5445
5446 err_pci_alloc:
5447 IWL_ERR(priv, "failed to allocate pci memory\n");
5448 ret = -ENOMEM;
5449 iwl3945_dealloc_ucode_pci(priv);
5450
5451 err_release:
5452 release_firmware(ucode_raw);
5453
5454 error:
5455 return ret;
5456 }
5457
5458
5459 /**
5460 * iwl3945_set_ucode_ptrs - Set uCode address location
5461 *
5462 * Tell initialization uCode where to find runtime uCode.
5463 *
5464 * BSM registers initially contain pointers to initialization uCode.
5465 * We need to replace them to load runtime uCode inst and data,
5466 * and to save runtime data when powering down.
5467 */
5468 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
5469 {
5470 dma_addr_t pinst;
5471 dma_addr_t pdata;
5472 int rc = 0;
5473 unsigned long flags;
5474
5475 /* bits 31:0 for 3945 */
5476 pinst = priv->ucode_code.p_addr;
5477 pdata = priv->ucode_data_backup.p_addr;
5478
5479 spin_lock_irqsave(&priv->lock, flags);
5480 rc = iwl_grab_nic_access(priv);
5481 if (rc) {
5482 spin_unlock_irqrestore(&priv->lock, flags);
5483 return rc;
5484 }
5485
5486 /* Tell bootstrap uCode where to find image to load */
5487 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5488 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5489 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5490 priv->ucode_data.len);
5491
5492 /* Inst byte count must be last to set up, bit 31 signals uCode
5493 * that all new ptr/size info is in place */
5494 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5495 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5496
5497 iwl_release_nic_access(priv);
5498
5499 spin_unlock_irqrestore(&priv->lock, flags);
5500
5501 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5502
5503 return rc;
5504 }
5505
5506 /**
5507 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
5508 *
5509 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5510 *
5511 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5512 */
5513 static void iwl3945_init_alive_start(struct iwl_priv *priv)
5514 {
5515 /* Check alive response for "valid" sign from uCode */
5516 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5517 /* We had an error bringing up the hardware, so take it
5518 * all the way back down so we can try again */
5519 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5520 goto restart;
5521 }
5522
5523 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5524 * This is a paranoid check, because we would not have gotten the
5525 * "initialize" alive if code weren't properly loaded. */
5526 if (iwl3945_verify_ucode(priv)) {
5527 /* Runtime instruction load was bad;
5528 * take it all the way back down so we can try again */
5529 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5530 goto restart;
5531 }
5532
5533 /* Send pointers to protocol/runtime uCode image ... init code will
5534 * load and launch runtime uCode, which will send us another "Alive"
5535 * notification. */
5536 IWL_DEBUG_INFO("Initialization Alive received.\n");
5537 if (iwl3945_set_ucode_ptrs(priv)) {
5538 /* Runtime instruction load won't happen;
5539 * take it all the way back down so we can try again */
5540 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5541 goto restart;
5542 }
5543 return;
5544
5545 restart:
5546 queue_work(priv->workqueue, &priv->restart);
5547 }
5548
5549
5550 /* temporary */
5551 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
5552 struct sk_buff *skb);
5553
5554 /**
5555 * iwl3945_alive_start - called after REPLY_ALIVE notification received
5556 * from protocol/runtime uCode (initialization uCode's
5557 * Alive gets handled by iwl3945_init_alive_start()).
5558 */
5559 static void iwl3945_alive_start(struct iwl_priv *priv)
5560 {
5561 int rc = 0;
5562 int thermal_spin = 0;
5563 u32 rfkill;
5564
5565 IWL_DEBUG_INFO("Runtime Alive received.\n");
5566
5567 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5568 /* We had an error bringing up the hardware, so take it
5569 * all the way back down so we can try again */
5570 IWL_DEBUG_INFO("Alive failed.\n");
5571 goto restart;
5572 }
5573
5574 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5575 * This is a paranoid check, because we would not have gotten the
5576 * "runtime" alive if code weren't properly loaded. */
5577 if (iwl3945_verify_ucode(priv)) {
5578 /* Runtime instruction load was bad;
5579 * take it all the way back down so we can try again */
5580 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5581 goto restart;
5582 }
5583
5584 iwl3945_clear_stations_table(priv);
5585
5586 rc = iwl_grab_nic_access(priv);
5587 if (rc) {
5588 IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
5589 return;
5590 }
5591
5592 rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
5593 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
5594 iwl_release_nic_access(priv);
5595
5596 if (rfkill & 0x1) {
5597 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5598 /* if RFKILL is not on, then wait for thermal
5599 * sensor in adapter to kick in */
5600 while (iwl3945_hw_get_temperature(priv) == 0) {
5601 thermal_spin++;
5602 udelay(10);
5603 }
5604
5605 if (thermal_spin)
5606 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5607 thermal_spin * 10);
5608 } else
5609 set_bit(STATUS_RF_KILL_HW, &priv->status);
5610
5611 /* After the ALIVE response, we can send commands to 3945 uCode */
5612 set_bit(STATUS_ALIVE, &priv->status);
5613
5614 /* Clear out the uCode error bit if it is set */
5615 clear_bit(STATUS_FW_ERROR, &priv->status);
5616
5617 if (iwl3945_is_rfkill(priv))
5618 return;
5619
5620 ieee80211_wake_queues(priv->hw);
5621
5622 priv->active_rate = priv->rates_mask;
5623 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5624
5625 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
5626
5627 if (iwl3945_is_associated(priv)) {
5628 struct iwl3945_rxon_cmd *active_rxon =
5629 (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
5630
5631 memcpy(&priv->staging39_rxon, &priv->active39_rxon,
5632 sizeof(priv->staging39_rxon));
5633 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5634 } else {
5635 /* Initialize our rx_config data */
5636 iwl3945_connection_init_rx_config(priv, priv->iw_mode);
5637 memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5638 }
5639
5640 /* Configure Bluetooth device coexistence support */
5641 iwl3945_send_bt_config(priv);
5642
5643 /* Configure the adapter for unassociated operation */
5644 iwl3945_commit_rxon(priv);
5645
5646 iwl3945_reg_txpower_periodic(priv);
5647
5648 iwl3945_led_register(priv);
5649
5650 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5651 set_bit(STATUS_READY, &priv->status);
5652 wake_up_interruptible(&priv->wait_command_queue);
5653
5654 if (priv->error_recovering)
5655 iwl3945_error_recovery(priv);
5656
5657 /* reassociate for ADHOC mode */
5658 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
5659 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
5660 priv->vif);
5661 if (beacon)
5662 iwl3945_mac_beacon_update(priv->hw, beacon);
5663 }
5664
5665 return;
5666
5667 restart:
5668 queue_work(priv->workqueue, &priv->restart);
5669 }
5670
5671 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
5672
5673 static void __iwl3945_down(struct iwl_priv *priv)
5674 {
5675 unsigned long flags;
5676 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5677 struct ieee80211_conf *conf = NULL;
5678
5679 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5680
5681 conf = ieee80211_get_hw_conf(priv->hw);
5682
5683 if (!exit_pending)
5684 set_bit(STATUS_EXIT_PENDING, &priv->status);
5685
5686 iwl3945_led_unregister(priv);
5687 iwl3945_clear_stations_table(priv);
5688
5689 /* Unblock any waiting calls */
5690 wake_up_interruptible_all(&priv->wait_command_queue);
5691
5692 /* Wipe out the EXIT_PENDING status bit if we are not actually
5693 * exiting the module */
5694 if (!exit_pending)
5695 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5696
5697 /* stop and reset the on-board processor */
5698 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5699
5700 /* tell the device to stop sending interrupts */
5701 spin_lock_irqsave(&priv->lock, flags);
5702 iwl3945_disable_interrupts(priv);
5703 spin_unlock_irqrestore(&priv->lock, flags);
5704 iwl_synchronize_irq(priv);
5705
5706 if (priv->mac80211_registered)
5707 ieee80211_stop_queues(priv->hw);
5708
5709 /* If we have not previously called iwl3945_init() then
5710 * clear all bits but the RF Kill and SUSPEND bits and return */
5711 if (!iwl3945_is_init(priv)) {
5712 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5713 STATUS_RF_KILL_HW |
5714 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5715 STATUS_RF_KILL_SW |
5716 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5717 STATUS_GEO_CONFIGURED |
5718 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5719 STATUS_IN_SUSPEND |
5720 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5721 STATUS_EXIT_PENDING;
5722 goto exit;
5723 }
5724
5725 /* ...otherwise clear out all the status bits but the RF Kill and
5726 * SUSPEND bits and continue taking the NIC down. */
5727 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5728 STATUS_RF_KILL_HW |
5729 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5730 STATUS_RF_KILL_SW |
5731 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5732 STATUS_GEO_CONFIGURED |
5733 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5734 STATUS_IN_SUSPEND |
5735 test_bit(STATUS_FW_ERROR, &priv->status) <<
5736 STATUS_FW_ERROR |
5737 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
5738 STATUS_EXIT_PENDING;
5739
5740 spin_lock_irqsave(&priv->lock, flags);
5741 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5742 spin_unlock_irqrestore(&priv->lock, flags);
5743
5744 iwl3945_hw_txq_ctx_stop(priv);
5745 iwl3945_hw_rxq_stop(priv);
5746
5747 spin_lock_irqsave(&priv->lock, flags);
5748 if (!iwl_grab_nic_access(priv)) {
5749 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5750 APMG_CLK_VAL_DMA_CLK_RQT);
5751 iwl_release_nic_access(priv);
5752 }
5753 spin_unlock_irqrestore(&priv->lock, flags);
5754
5755 udelay(5);
5756
5757 iwl3945_hw_nic_stop_master(priv);
5758 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5759 iwl3945_hw_nic_reset(priv);
5760
5761 exit:
5762 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
5763
5764 if (priv->ibss_beacon)
5765 dev_kfree_skb(priv->ibss_beacon);
5766 priv->ibss_beacon = NULL;
5767
5768 /* clear out any free frames */
5769 iwl3945_clear_free_frames(priv);
5770 }
5771
5772 static void iwl3945_down(struct iwl_priv *priv)
5773 {
5774 mutex_lock(&priv->mutex);
5775 __iwl3945_down(priv);
5776 mutex_unlock(&priv->mutex);
5777
5778 iwl3945_cancel_deferred_work(priv);
5779 }
5780
5781 #define MAX_HW_RESTARTS 5
5782
5783 static int __iwl3945_up(struct iwl_priv *priv)
5784 {
5785 int rc, i;
5786
5787 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5788 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
5789 return -EIO;
5790 }
5791
5792 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5793 IWL_WARN(priv, "Radio disabled by SW RF kill (module "
5794 "parameter)\n");
5795 return -ENODEV;
5796 }
5797
5798 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5799 IWL_ERR(priv, "ucode not available for device bring up\n");
5800 return -EIO;
5801 }
5802
5803 /* If platform's RF_KILL switch is NOT set to KILL */
5804 if (iwl_read32(priv, CSR_GP_CNTRL) &
5805 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5806 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5807 else {
5808 set_bit(STATUS_RF_KILL_HW, &priv->status);
5809 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5810 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
5811 return -ENODEV;
5812 }
5813 }
5814
5815 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5816
5817 rc = iwl3945_hw_nic_init(priv);
5818 if (rc) {
5819 IWL_ERR(priv, "Unable to int nic\n");
5820 return rc;
5821 }
5822
5823 /* make sure rfkill handshake bits are cleared */
5824 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5825 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5826 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5827
5828 /* clear (again), then enable host interrupts */
5829 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5830 iwl3945_enable_interrupts(priv);
5831
5832 /* really make sure rfkill handshake bits are cleared */
5833 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5834 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5835
5836 /* Copy original ucode data image from disk into backup cache.
5837 * This will be used to initialize the on-board processor's
5838 * data SRAM for a clean start when the runtime program first loads. */
5839 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5840 priv->ucode_data.len);
5841
5842 /* We return success when we resume from suspend and rf_kill is on. */
5843 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
5844 return 0;
5845
5846 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5847
5848 iwl3945_clear_stations_table(priv);
5849
5850 /* load bootstrap state machine,
5851 * load bootstrap program into processor's memory,
5852 * prepare to load the "initialize" uCode */
5853 rc = iwl3945_load_bsm(priv);
5854
5855 if (rc) {
5856 IWL_ERR(priv,
5857 "Unable to set up bootstrap uCode: %d\n", rc);
5858 continue;
5859 }
5860
5861 /* start card; "initialize" will load runtime ucode */
5862 iwl3945_nic_start(priv);
5863
5864 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5865
5866 return 0;
5867 }
5868
5869 set_bit(STATUS_EXIT_PENDING, &priv->status);
5870 __iwl3945_down(priv);
5871 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5872
5873 /* tried to restart and config the device for as long as our
5874 * patience could withstand */
5875 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
5876 return -EIO;
5877 }
5878
5879
5880 /*****************************************************************************
5881 *
5882 * Workqueue callbacks
5883 *
5884 *****************************************************************************/
5885
5886 static void iwl3945_bg_init_alive_start(struct work_struct *data)
5887 {
5888 struct iwl_priv *priv =
5889 container_of(data, struct iwl_priv, init_alive_start.work);
5890
5891 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5892 return;
5893
5894 mutex_lock(&priv->mutex);
5895 iwl3945_init_alive_start(priv);
5896 mutex_unlock(&priv->mutex);
5897 }
5898
5899 static void iwl3945_bg_alive_start(struct work_struct *data)
5900 {
5901 struct iwl_priv *priv =
5902 container_of(data, struct iwl_priv, alive_start.work);
5903
5904 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5905 return;
5906
5907 mutex_lock(&priv->mutex);
5908 iwl3945_alive_start(priv);
5909 mutex_unlock(&priv->mutex);
5910 }
5911
5912 static void iwl3945_bg_rf_kill(struct work_struct *work)
5913 {
5914 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
5915
5916 wake_up_interruptible(&priv->wait_command_queue);
5917
5918 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5919 return;
5920
5921 mutex_lock(&priv->mutex);
5922
5923 if (!iwl3945_is_rfkill(priv)) {
5924 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5925 "HW and/or SW RF Kill no longer active, restarting "
5926 "device\n");
5927 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5928 queue_work(priv->workqueue, &priv->restart);
5929 } else {
5930
5931 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5932 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5933 "disabled by SW switch\n");
5934 else
5935 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
5936 "Kill switch must be turned off for "
5937 "wireless networking to work.\n");
5938 }
5939
5940 mutex_unlock(&priv->mutex);
5941 iwl3945_rfkill_set_hw_state(priv);
5942 }
5943
5944 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5945
5946 static void iwl3945_bg_scan_check(struct work_struct *data)
5947 {
5948 struct iwl_priv *priv =
5949 container_of(data, struct iwl_priv, scan_check.work);
5950
5951 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5952 return;
5953
5954 mutex_lock(&priv->mutex);
5955 if (test_bit(STATUS_SCANNING, &priv->status) ||
5956 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5957 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
5958 "Scan completion watchdog resetting adapter (%dms)\n",
5959 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
5960
5961 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5962 iwl3945_send_scan_abort(priv);
5963 }
5964 mutex_unlock(&priv->mutex);
5965 }
5966
5967 static void iwl3945_bg_request_scan(struct work_struct *data)
5968 {
5969 struct iwl_priv *priv =
5970 container_of(data, struct iwl_priv, request_scan);
5971 struct iwl_host_cmd cmd = {
5972 .id = REPLY_SCAN_CMD,
5973 .len = sizeof(struct iwl3945_scan_cmd),
5974 .meta.flags = CMD_SIZE_HUGE,
5975 };
5976 int rc = 0;
5977 struct iwl3945_scan_cmd *scan;
5978 struct ieee80211_conf *conf = NULL;
5979 u8 n_probes = 2;
5980 enum ieee80211_band band;
5981 DECLARE_SSID_BUF(ssid);
5982
5983 conf = ieee80211_get_hw_conf(priv->hw);
5984
5985 mutex_lock(&priv->mutex);
5986
5987 if (!iwl3945_is_ready(priv)) {
5988 IWL_WARN(priv, "request scan called when driver not ready.\n");
5989 goto done;
5990 }
5991
5992 /* Make sure the scan wasn't canceled before this queued work
5993 * was given the chance to run... */
5994 if (!test_bit(STATUS_SCANNING, &priv->status))
5995 goto done;
5996
5997 /* This should never be called or scheduled if there is currently
5998 * a scan active in the hardware. */
5999 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6000 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6001 "Ignoring second request.\n");
6002 rc = -EIO;
6003 goto done;
6004 }
6005
6006 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6007 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6008 goto done;
6009 }
6010
6011 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6012 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6013 goto done;
6014 }
6015
6016 if (iwl3945_is_rfkill(priv)) {
6017 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6018 goto done;
6019 }
6020
6021 if (!test_bit(STATUS_READY, &priv->status)) {
6022 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6023 goto done;
6024 }
6025
6026 if (!priv->scan_bands) {
6027 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6028 goto done;
6029 }
6030
6031 if (!priv->scan39) {
6032 priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6033 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6034 if (!priv->scan39) {
6035 rc = -ENOMEM;
6036 goto done;
6037 }
6038 }
6039 scan = priv->scan39;
6040 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6041
6042 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6043 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6044
6045 if (iwl3945_is_associated(priv)) {
6046 u16 interval = 0;
6047 u32 extra;
6048 u32 suspend_time = 100;
6049 u32 scan_suspend_time = 100;
6050 unsigned long flags;
6051
6052 IWL_DEBUG_INFO("Scanning while associated...\n");
6053
6054 spin_lock_irqsave(&priv->lock, flags);
6055 interval = priv->beacon_int;
6056 spin_unlock_irqrestore(&priv->lock, flags);
6057
6058 scan->suspend_time = 0;
6059 scan->max_out_time = cpu_to_le32(200 * 1024);
6060 if (!interval)
6061 interval = suspend_time;
6062 /*
6063 * suspend time format:
6064 * 0-19: beacon interval in usec (time before exec.)
6065 * 20-23: 0
6066 * 24-31: number of beacons (suspend between channels)
6067 */
6068
6069 extra = (suspend_time / interval) << 24;
6070 scan_suspend_time = 0xFF0FFFFF &
6071 (extra | ((suspend_time % interval) * 1024));
6072
6073 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6074 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6075 scan_suspend_time, interval);
6076 }
6077
6078 /* We should add the ability for user to lock to PASSIVE ONLY */
6079 if (priv->one_direct_scan) {
6080 IWL_DEBUG_SCAN
6081 ("Kicking off one direct scan for '%s'\n",
6082 print_ssid(ssid, priv->direct_ssid,
6083 priv->direct_ssid_len));
6084 scan->direct_scan[0].id = WLAN_EID_SSID;
6085 scan->direct_scan[0].len = priv->direct_ssid_len;
6086 memcpy(scan->direct_scan[0].ssid,
6087 priv->direct_ssid, priv->direct_ssid_len);
6088 n_probes++;
6089 } else
6090 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
6091
6092 /* We don't build a direct scan probe request; the uCode will do
6093 * that based on the direct_mask added to each channel entry */
6094 scan->tx_cmd.len = cpu_to_le16(
6095 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6096 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
6097 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6098 scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
6099 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6100
6101 /* flags + rate selection */
6102
6103 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
6104 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6105 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6106 scan->good_CRC_th = 0;
6107 band = IEEE80211_BAND_2GHZ;
6108 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
6109 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6110 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6111 band = IEEE80211_BAND_5GHZ;
6112 } else {
6113 IWL_WARN(priv, "Invalid scan band count\n");
6114 goto done;
6115 }
6116
6117 /* select Rx antennas */
6118 scan->flags |= iwl3945_get_antenna_flags(priv);
6119
6120 if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
6121 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6122
6123 scan->channel_count =
6124 iwl3945_get_channels_for_scan(priv, band, 1, /* active */
6125 n_probes,
6126 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6127
6128 if (scan->channel_count == 0) {
6129 IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
6130 goto done;
6131 }
6132
6133 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6134 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6135 cmd.data = scan;
6136 scan->len = cpu_to_le16(cmd.len);
6137
6138 set_bit(STATUS_SCAN_HW, &priv->status);
6139 rc = iwl3945_send_cmd_sync(priv, &cmd);
6140 if (rc)
6141 goto done;
6142
6143 queue_delayed_work(priv->workqueue, &priv->scan_check,
6144 IWL_SCAN_CHECK_WATCHDOG);
6145
6146 mutex_unlock(&priv->mutex);
6147 return;
6148
6149 done:
6150 /* can not perform scan make sure we clear scanning
6151 * bits from status so next scan request can be performed.
6152 * if we dont clear scanning status bit here all next scan
6153 * will fail
6154 */
6155 clear_bit(STATUS_SCAN_HW, &priv->status);
6156 clear_bit(STATUS_SCANNING, &priv->status);
6157
6158 /* inform mac80211 scan aborted */
6159 queue_work(priv->workqueue, &priv->scan_completed);
6160 mutex_unlock(&priv->mutex);
6161 }
6162
6163 static void iwl3945_bg_up(struct work_struct *data)
6164 {
6165 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
6166
6167 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6168 return;
6169
6170 mutex_lock(&priv->mutex);
6171 __iwl3945_up(priv);
6172 mutex_unlock(&priv->mutex);
6173 iwl3945_rfkill_set_hw_state(priv);
6174 }
6175
6176 static void iwl3945_bg_restart(struct work_struct *data)
6177 {
6178 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
6179
6180 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6181 return;
6182
6183 iwl3945_down(priv);
6184 queue_work(priv->workqueue, &priv->up);
6185 }
6186
6187 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6188 {
6189 struct iwl_priv *priv =
6190 container_of(data, struct iwl_priv, rx_replenish);
6191
6192 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6193 return;
6194
6195 mutex_lock(&priv->mutex);
6196 iwl3945_rx_replenish(priv);
6197 mutex_unlock(&priv->mutex);
6198 }
6199
6200 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6201
6202 static void iwl3945_post_associate(struct iwl_priv *priv)
6203 {
6204 int rc = 0;
6205 struct ieee80211_conf *conf = NULL;
6206
6207 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6208 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
6209 return;
6210 }
6211
6212
6213 IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
6214 priv->assoc_id, priv->active39_rxon.bssid_addr);
6215
6216 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6217 return;
6218
6219 if (!priv->vif || !priv->is_open)
6220 return;
6221
6222 iwl3945_scan_cancel_timeout(priv, 200);
6223
6224 conf = ieee80211_get_hw_conf(priv->hw);
6225
6226 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6227 iwl3945_commit_rxon(priv);
6228
6229 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6230 iwl3945_setup_rxon_timing(priv);
6231 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6232 sizeof(priv->rxon_timing), &priv->rxon_timing);
6233 if (rc)
6234 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6235 "Attempting to continue.\n");
6236
6237 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6238
6239 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6240
6241 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6242 priv->assoc_id, priv->beacon_int);
6243
6244 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6245 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6246 else
6247 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6248
6249 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6250 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6251 priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6252 else
6253 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6254
6255 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6256 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6257
6258 }
6259
6260 iwl3945_commit_rxon(priv);
6261
6262 switch (priv->iw_mode) {
6263 case NL80211_IFTYPE_STATION:
6264 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6265 break;
6266
6267 case NL80211_IFTYPE_ADHOC:
6268
6269 priv->assoc_id = 1;
6270 iwl3945_add_station(priv, priv->bssid, 0, 0);
6271 iwl3945_sync_sta(priv, IWL_STA_ID,
6272 (priv->band == IEEE80211_BAND_5GHZ) ?
6273 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6274 CMD_ASYNC);
6275 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6276 iwl3945_send_beacon_cmd(priv);
6277
6278 break;
6279
6280 default:
6281 IWL_ERR(priv, "%s Should not be called in %d mode\n",
6282 __func__, priv->iw_mode);
6283 break;
6284 }
6285
6286 iwl3945_activate_qos(priv, 0);
6287
6288 /* we have just associated, don't start scan too early */
6289 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6290 }
6291
6292 static void iwl3945_bg_abort_scan(struct work_struct *work)
6293 {
6294 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
6295
6296 if (!iwl3945_is_ready(priv))
6297 return;
6298
6299 mutex_lock(&priv->mutex);
6300
6301 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6302 iwl3945_send_scan_abort(priv);
6303
6304 mutex_unlock(&priv->mutex);
6305 }
6306
6307 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
6308
6309 static void iwl3945_bg_scan_completed(struct work_struct *work)
6310 {
6311 struct iwl_priv *priv =
6312 container_of(work, struct iwl_priv, scan_completed);
6313
6314 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6315
6316 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6317 return;
6318
6319 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6320 iwl3945_mac_config(priv->hw, 0);
6321
6322 ieee80211_scan_completed(priv->hw);
6323
6324 /* Since setting the TXPOWER may have been deferred while
6325 * performing the scan, fire one off */
6326 mutex_lock(&priv->mutex);
6327 iwl3945_hw_reg_send_txpower(priv);
6328 mutex_unlock(&priv->mutex);
6329 }
6330
6331 /*****************************************************************************
6332 *
6333 * mac80211 entry point functions
6334 *
6335 *****************************************************************************/
6336
6337 #define UCODE_READY_TIMEOUT (2 * HZ)
6338
6339 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6340 {
6341 struct iwl_priv *priv = hw->priv;
6342 int ret;
6343
6344 IWL_DEBUG_MAC80211("enter\n");
6345
6346 if (pci_enable_device(priv->pci_dev)) {
6347 IWL_ERR(priv, "Fail to pci_enable_device\n");
6348 return -ENODEV;
6349 }
6350 pci_restore_state(priv->pci_dev);
6351 pci_enable_msi(priv->pci_dev);
6352
6353 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6354 DRV_NAME, priv);
6355 if (ret) {
6356 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
6357 goto out_disable_msi;
6358 }
6359
6360 /* we should be verifying the device is ready to be opened */
6361 mutex_lock(&priv->mutex);
6362
6363 memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6364 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6365 * ucode filename and max sizes are card-specific. */
6366
6367 if (!priv->ucode_code.len) {
6368 ret = iwl3945_read_ucode(priv);
6369 if (ret) {
6370 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
6371 mutex_unlock(&priv->mutex);
6372 goto out_release_irq;
6373 }
6374 }
6375
6376 ret = __iwl3945_up(priv);
6377
6378 mutex_unlock(&priv->mutex);
6379
6380 iwl3945_rfkill_set_hw_state(priv);
6381
6382 if (ret)
6383 goto out_release_irq;
6384
6385 IWL_DEBUG_INFO("Start UP work.\n");
6386
6387 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6388 return 0;
6389
6390 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6391 * mac80211 will not be run successfully. */
6392 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6393 test_bit(STATUS_READY, &priv->status),
6394 UCODE_READY_TIMEOUT);
6395 if (!ret) {
6396 if (!test_bit(STATUS_READY, &priv->status)) {
6397 IWL_ERR(priv,
6398 "Wait for START_ALIVE timeout after %dms.\n",
6399 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6400 ret = -ETIMEDOUT;
6401 goto out_release_irq;
6402 }
6403 }
6404
6405 priv->is_open = 1;
6406 IWL_DEBUG_MAC80211("leave\n");
6407 return 0;
6408
6409 out_release_irq:
6410 free_irq(priv->pci_dev->irq, priv);
6411 out_disable_msi:
6412 pci_disable_msi(priv->pci_dev);
6413 pci_disable_device(priv->pci_dev);
6414 priv->is_open = 0;
6415 IWL_DEBUG_MAC80211("leave - failed\n");
6416 return ret;
6417 }
6418
6419 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6420 {
6421 struct iwl_priv *priv = hw->priv;
6422
6423 IWL_DEBUG_MAC80211("enter\n");
6424
6425 if (!priv->is_open) {
6426 IWL_DEBUG_MAC80211("leave - skip\n");
6427 return;
6428 }
6429
6430 priv->is_open = 0;
6431
6432 if (iwl3945_is_ready_rf(priv)) {
6433 /* stop mac, cancel any scan request and clear
6434 * RXON_FILTER_ASSOC_MSK BIT
6435 */
6436 mutex_lock(&priv->mutex);
6437 iwl3945_scan_cancel_timeout(priv, 100);
6438 mutex_unlock(&priv->mutex);
6439 }
6440
6441 iwl3945_down(priv);
6442
6443 flush_workqueue(priv->workqueue);
6444 free_irq(priv->pci_dev->irq, priv);
6445 pci_disable_msi(priv->pci_dev);
6446 pci_save_state(priv->pci_dev);
6447 pci_disable_device(priv->pci_dev);
6448
6449 IWL_DEBUG_MAC80211("leave\n");
6450 }
6451
6452 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
6453 {
6454 struct iwl_priv *priv = hw->priv;
6455
6456 IWL_DEBUG_MAC80211("enter\n");
6457
6458 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
6459 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
6460
6461 if (iwl3945_tx_skb(priv, skb))
6462 dev_kfree_skb_any(skb);
6463
6464 IWL_DEBUG_MAC80211("leave\n");
6465 return NETDEV_TX_OK;
6466 }
6467
6468 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6469 struct ieee80211_if_init_conf *conf)
6470 {
6471 struct iwl_priv *priv = hw->priv;
6472 unsigned long flags;
6473
6474 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
6475
6476 if (priv->vif) {
6477 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
6478 return -EOPNOTSUPP;
6479 }
6480
6481 spin_lock_irqsave(&priv->lock, flags);
6482 priv->vif = conf->vif;
6483 priv->iw_mode = conf->type;
6484
6485 spin_unlock_irqrestore(&priv->lock, flags);
6486
6487 mutex_lock(&priv->mutex);
6488
6489 if (conf->mac_addr) {
6490 IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
6491 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6492 }
6493
6494 if (iwl3945_is_ready(priv))
6495 iwl3945_set_mode(priv, conf->type);
6496
6497 mutex_unlock(&priv->mutex);
6498
6499 IWL_DEBUG_MAC80211("leave\n");
6500 return 0;
6501 }
6502
6503 /**
6504 * iwl3945_mac_config - mac80211 config callback
6505 *
6506 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6507 * be set inappropriately and the driver currently sets the hardware up to
6508 * use it whenever needed.
6509 */
6510 static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
6511 {
6512 struct iwl_priv *priv = hw->priv;
6513 const struct iwl_channel_info *ch_info;
6514 struct ieee80211_conf *conf = &hw->conf;
6515 unsigned long flags;
6516 int ret = 0;
6517
6518 mutex_lock(&priv->mutex);
6519 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
6520
6521 if (!iwl3945_is_ready(priv)) {
6522 IWL_DEBUG_MAC80211("leave - not ready\n");
6523 ret = -EIO;
6524 goto out;
6525 }
6526
6527 if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
6528 test_bit(STATUS_SCANNING, &priv->status))) {
6529 IWL_DEBUG_MAC80211("leave - scanning\n");
6530 set_bit(STATUS_CONF_PENDING, &priv->status);
6531 mutex_unlock(&priv->mutex);
6532 return 0;
6533 }
6534
6535 spin_lock_irqsave(&priv->lock, flags);
6536
6537 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6538 conf->channel->hw_value);
6539 if (!is_channel_valid(ch_info)) {
6540 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
6541 conf->channel->hw_value, conf->channel->band);
6542 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6543 spin_unlock_irqrestore(&priv->lock, flags);
6544 ret = -EINVAL;
6545 goto out;
6546 }
6547
6548 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
6549
6550 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
6551
6552 /* The list of supported rates and rate mask can be different
6553 * for each phymode; since the phymode may have changed, reset
6554 * the rate mask to what mac80211 lists */
6555 iwl3945_set_rate(priv);
6556
6557 spin_unlock_irqrestore(&priv->lock, flags);
6558
6559 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
6560 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
6561 iwl3945_hw_channel_switch(priv, conf->channel);
6562 goto out;
6563 }
6564 #endif
6565
6566 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
6567
6568 if (!conf->radio_enabled) {
6569 IWL_DEBUG_MAC80211("leave - radio disabled\n");
6570 goto out;
6571 }
6572
6573 if (iwl3945_is_rfkill(priv)) {
6574 IWL_DEBUG_MAC80211("leave - RF kill\n");
6575 ret = -EIO;
6576 goto out;
6577 }
6578
6579 iwl3945_set_rate(priv);
6580
6581 if (memcmp(&priv->active39_rxon,
6582 &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
6583 iwl3945_commit_rxon(priv);
6584 else
6585 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6586
6587 IWL_DEBUG_MAC80211("leave\n");
6588
6589 out:
6590 clear_bit(STATUS_CONF_PENDING, &priv->status);
6591 mutex_unlock(&priv->mutex);
6592 return ret;
6593 }
6594
6595 static void iwl3945_config_ap(struct iwl_priv *priv)
6596 {
6597 int rc = 0;
6598
6599 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6600 return;
6601
6602 /* The following should be done only at AP bring up */
6603 if (!(iwl3945_is_associated(priv))) {
6604
6605 /* RXON - unassoc (to set timing command) */
6606 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6607 iwl3945_commit_rxon(priv);
6608
6609 /* RXON Timing */
6610 memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
6611 iwl3945_setup_rxon_timing(priv);
6612 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6613 sizeof(priv->rxon_timing), &priv->rxon_timing);
6614 if (rc)
6615 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
6616 "Attempting to continue.\n");
6617
6618 /* FIXME: what should be the assoc_id for AP? */
6619 priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6620 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6621 priv->staging39_rxon.flags |=
6622 RXON_FLG_SHORT_PREAMBLE_MSK;
6623 else
6624 priv->staging39_rxon.flags &=
6625 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6626
6627 if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6628 if (priv->assoc_capability &
6629 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6630 priv->staging39_rxon.flags |=
6631 RXON_FLG_SHORT_SLOT_MSK;
6632 else
6633 priv->staging39_rxon.flags &=
6634 ~RXON_FLG_SHORT_SLOT_MSK;
6635
6636 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
6637 priv->staging39_rxon.flags &=
6638 ~RXON_FLG_SHORT_SLOT_MSK;
6639 }
6640 /* restore RXON assoc */
6641 priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6642 iwl3945_commit_rxon(priv);
6643 iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
6644 }
6645 iwl3945_send_beacon_cmd(priv);
6646
6647 /* FIXME - we need to add code here to detect a totally new
6648 * configuration, reset the AP, unassoc, rxon timing, assoc,
6649 * clear sta table, add BCAST sta... */
6650 }
6651
6652 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6653 struct ieee80211_vif *vif,
6654 struct ieee80211_if_conf *conf)
6655 {
6656 struct iwl_priv *priv = hw->priv;
6657 int rc;
6658
6659 if (conf == NULL)
6660 return -EIO;
6661
6662 if (priv->vif != vif) {
6663 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6664 return 0;
6665 }
6666
6667 /* handle this temporarily here */
6668 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
6669 conf->changed & IEEE80211_IFCC_BEACON) {
6670 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
6671 if (!beacon)
6672 return -ENOMEM;
6673 mutex_lock(&priv->mutex);
6674 rc = iwl3945_mac_beacon_update(hw, beacon);
6675 mutex_unlock(&priv->mutex);
6676 if (rc)
6677 return rc;
6678 }
6679
6680 if (!iwl3945_is_alive(priv))
6681 return -EAGAIN;
6682
6683 mutex_lock(&priv->mutex);
6684
6685 if (conf->bssid)
6686 IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
6687
6688 /*
6689 * very dubious code was here; the probe filtering flag is never set:
6690 *
6691 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6692 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
6693 */
6694
6695 if (priv->iw_mode == NL80211_IFTYPE_AP) {
6696 if (!conf->bssid) {
6697 conf->bssid = priv->mac_addr;
6698 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
6699 IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
6700 conf->bssid);
6701 }
6702 if (priv->ibss_beacon)
6703 dev_kfree_skb(priv->ibss_beacon);
6704
6705 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
6706 }
6707
6708 if (iwl3945_is_rfkill(priv))
6709 goto done;
6710
6711 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6712 !is_multicast_ether_addr(conf->bssid)) {
6713 /* If there is currently a HW scan going on in the background
6714 * then we need to cancel it else the RXON below will fail. */
6715 if (iwl3945_scan_cancel_timeout(priv, 100)) {
6716 IWL_WARN(priv, "Aborted scan still in progress "
6717 "after 100ms\n");
6718 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6719 mutex_unlock(&priv->mutex);
6720 return -EAGAIN;
6721 }
6722 memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6723
6724 /* TODO: Audit driver for usage of these members and see
6725 * if mac80211 deprecates them (priv->bssid looks like it
6726 * shouldn't be there, but I haven't scanned the IBSS code
6727 * to verify) - jpk */
6728 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6729
6730 if (priv->iw_mode == NL80211_IFTYPE_AP)
6731 iwl3945_config_ap(priv);
6732 else {
6733 rc = iwl3945_commit_rxon(priv);
6734 if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
6735 iwl3945_add_station(priv,
6736 priv->active39_rxon.bssid_addr, 1, 0);
6737 }
6738
6739 } else {
6740 iwl3945_scan_cancel_timeout(priv, 100);
6741 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6742 iwl3945_commit_rxon(priv);
6743 }
6744
6745 done:
6746 IWL_DEBUG_MAC80211("leave\n");
6747 mutex_unlock(&priv->mutex);
6748
6749 return 0;
6750 }
6751
6752 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
6753 unsigned int changed_flags,
6754 unsigned int *total_flags,
6755 int mc_count, struct dev_addr_list *mc_list)
6756 {
6757 struct iwl_priv *priv = hw->priv;
6758 __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
6759
6760 IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
6761 changed_flags, *total_flags);
6762
6763 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
6764 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
6765 *filter_flags |= RXON_FILTER_PROMISC_MSK;
6766 else
6767 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
6768 }
6769 if (changed_flags & FIF_ALLMULTI) {
6770 if (*total_flags & FIF_ALLMULTI)
6771 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
6772 else
6773 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
6774 }
6775 if (changed_flags & FIF_CONTROL) {
6776 if (*total_flags & FIF_CONTROL)
6777 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
6778 else
6779 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
6780 }
6781 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
6782 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
6783 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
6784 else
6785 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
6786 }
6787
6788 /* We avoid iwl_commit_rxon here to commit the new filter flags
6789 * since mac80211 will call ieee80211_hw_config immediately.
6790 * (mc_list is not supported at this time). Otherwise, we need to
6791 * queue a background iwl_commit_rxon work.
6792 */
6793
6794 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6795 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6796 }
6797
6798 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
6799 struct ieee80211_if_init_conf *conf)
6800 {
6801 struct iwl_priv *priv = hw->priv;
6802
6803 IWL_DEBUG_MAC80211("enter\n");
6804
6805 mutex_lock(&priv->mutex);
6806
6807 if (iwl3945_is_ready_rf(priv)) {
6808 iwl3945_scan_cancel_timeout(priv, 100);
6809 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6810 iwl3945_commit_rxon(priv);
6811 }
6812 if (priv->vif == conf->vif) {
6813 priv->vif = NULL;
6814 memset(priv->bssid, 0, ETH_ALEN);
6815 }
6816 mutex_unlock(&priv->mutex);
6817
6818 IWL_DEBUG_MAC80211("leave\n");
6819 }
6820
6821 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
6822
6823 static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
6824 struct ieee80211_vif *vif,
6825 struct ieee80211_bss_conf *bss_conf,
6826 u32 changes)
6827 {
6828 struct iwl_priv *priv = hw->priv;
6829
6830 IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
6831
6832 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6833 IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
6834 bss_conf->use_short_preamble);
6835 if (bss_conf->use_short_preamble)
6836 priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6837 else
6838 priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6839 }
6840
6841 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
6842 IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
6843 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
6844 priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6845 else
6846 priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6847 }
6848
6849 if (changes & BSS_CHANGED_ASSOC) {
6850 IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
6851 /* This should never happen as this function should
6852 * never be called from interrupt context. */
6853 if (WARN_ON_ONCE(in_interrupt()))
6854 return;
6855 if (bss_conf->assoc) {
6856 priv->assoc_id = bss_conf->aid;
6857 priv->beacon_int = bss_conf->beacon_int;
6858 priv->timestamp = bss_conf->timestamp;
6859 priv->assoc_capability = bss_conf->assoc_capability;
6860 priv->next_scan_jiffies = jiffies +
6861 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
6862 mutex_lock(&priv->mutex);
6863 iwl3945_post_associate(priv);
6864 mutex_unlock(&priv->mutex);
6865 } else {
6866 priv->assoc_id = 0;
6867 IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
6868 }
6869 } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
6870 IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
6871 iwl3945_send_rxon_assoc(priv);
6872 }
6873
6874 }
6875
6876 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
6877 {
6878 int rc = 0;
6879 unsigned long flags;
6880 struct iwl_priv *priv = hw->priv;
6881 DECLARE_SSID_BUF(ssid_buf);
6882
6883 IWL_DEBUG_MAC80211("enter\n");
6884
6885 mutex_lock(&priv->mutex);
6886 spin_lock_irqsave(&priv->lock, flags);
6887
6888 if (!iwl3945_is_ready_rf(priv)) {
6889 rc = -EIO;
6890 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6891 goto out_unlock;
6892 }
6893
6894 /* we don't schedule scan within next_scan_jiffies period */
6895 if (priv->next_scan_jiffies &&
6896 time_after(priv->next_scan_jiffies, jiffies)) {
6897 rc = -EAGAIN;
6898 goto out_unlock;
6899 }
6900 /* if we just finished scan ask for delay for a broadcast scan */
6901 if ((len == 0) && priv->last_scan_jiffies &&
6902 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
6903 jiffies)) {
6904 rc = -EAGAIN;
6905 goto out_unlock;
6906 }
6907 if (len) {
6908 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
6909 print_ssid(ssid_buf, ssid, len), (int)len);
6910
6911 priv->one_direct_scan = 1;
6912 priv->direct_ssid_len = (u8)
6913 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6914 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
6915 } else
6916 priv->one_direct_scan = 0;
6917
6918 rc = iwl3945_scan_initiate(priv);
6919
6920 IWL_DEBUG_MAC80211("leave\n");
6921
6922 out_unlock:
6923 spin_unlock_irqrestore(&priv->lock, flags);
6924 mutex_unlock(&priv->mutex);
6925
6926 return rc;
6927 }
6928
6929 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
6930 const u8 *local_addr, const u8 *addr,
6931 struct ieee80211_key_conf *key)
6932 {
6933 struct iwl_priv *priv = hw->priv;
6934 int rc = 0;
6935 u8 sta_id;
6936
6937 IWL_DEBUG_MAC80211("enter\n");
6938
6939 if (iwl3945_mod_params.sw_crypto) {
6940 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
6941 return -EOPNOTSUPP;
6942 }
6943
6944 if (is_zero_ether_addr(addr))
6945 /* only support pairwise keys */
6946 return -EOPNOTSUPP;
6947
6948 sta_id = iwl3945_hw_find_station(priv, addr);
6949 if (sta_id == IWL_INVALID_STATION) {
6950 IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
6951 addr);
6952 return -EINVAL;
6953 }
6954
6955 mutex_lock(&priv->mutex);
6956
6957 iwl3945_scan_cancel_timeout(priv, 100);
6958
6959 switch (cmd) {
6960 case SET_KEY:
6961 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
6962 if (!rc) {
6963 iwl3945_set_rxon_hwcrypto(priv, 1);
6964 iwl3945_commit_rxon(priv);
6965 key->hw_key_idx = sta_id;
6966 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
6967 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
6968 }
6969 break;
6970 case DISABLE_KEY:
6971 rc = iwl3945_clear_sta_key_info(priv, sta_id);
6972 if (!rc) {
6973 iwl3945_set_rxon_hwcrypto(priv, 0);
6974 iwl3945_commit_rxon(priv);
6975 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
6976 }
6977 break;
6978 default:
6979 rc = -EINVAL;
6980 }
6981
6982 IWL_DEBUG_MAC80211("leave\n");
6983 mutex_unlock(&priv->mutex);
6984
6985 return rc;
6986 }
6987
6988 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
6989 const struct ieee80211_tx_queue_params *params)
6990 {
6991 struct iwl_priv *priv = hw->priv;
6992 unsigned long flags;
6993 int q;
6994
6995 IWL_DEBUG_MAC80211("enter\n");
6996
6997 if (!iwl3945_is_ready_rf(priv)) {
6998 IWL_DEBUG_MAC80211("leave - RF not ready\n");
6999 return -EIO;
7000 }
7001
7002 if (queue >= AC_NUM) {
7003 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7004 return 0;
7005 }
7006
7007 q = AC_NUM - 1 - queue;
7008
7009 spin_lock_irqsave(&priv->lock, flags);
7010
7011 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7012 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7013 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7014 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7015 cpu_to_le16((params->txop * 32));
7016
7017 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7018 priv->qos_data.qos_active = 1;
7019
7020 spin_unlock_irqrestore(&priv->lock, flags);
7021
7022 mutex_lock(&priv->mutex);
7023 if (priv->iw_mode == NL80211_IFTYPE_AP)
7024 iwl3945_activate_qos(priv, 1);
7025 else if (priv->assoc_id && iwl3945_is_associated(priv))
7026 iwl3945_activate_qos(priv, 0);
7027
7028 mutex_unlock(&priv->mutex);
7029
7030 IWL_DEBUG_MAC80211("leave\n");
7031 return 0;
7032 }
7033
7034 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7035 struct ieee80211_tx_queue_stats *stats)
7036 {
7037 struct iwl_priv *priv = hw->priv;
7038 int i, avail;
7039 struct iwl3945_tx_queue *txq;
7040 struct iwl_queue *q;
7041 unsigned long flags;
7042
7043 IWL_DEBUG_MAC80211("enter\n");
7044
7045 if (!iwl3945_is_ready_rf(priv)) {
7046 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7047 return -EIO;
7048 }
7049
7050 spin_lock_irqsave(&priv->lock, flags);
7051
7052 for (i = 0; i < AC_NUM; i++) {
7053 txq = &priv->txq39[i];
7054 q = &txq->q;
7055 avail = iwl_queue_space(q);
7056
7057 stats[i].len = q->n_window - avail;
7058 stats[i].limit = q->n_window - q->high_mark;
7059 stats[i].count = q->n_window;
7060
7061 }
7062 spin_unlock_irqrestore(&priv->lock, flags);
7063
7064 IWL_DEBUG_MAC80211("leave\n");
7065
7066 return 0;
7067 }
7068
7069 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7070 {
7071 struct iwl_priv *priv = hw->priv;
7072 unsigned long flags;
7073
7074 mutex_lock(&priv->mutex);
7075 IWL_DEBUG_MAC80211("enter\n");
7076
7077 iwl3945_reset_qos(priv);
7078
7079 spin_lock_irqsave(&priv->lock, flags);
7080 priv->assoc_id = 0;
7081 priv->assoc_capability = 0;
7082 priv->call_post_assoc_from_beacon = 0;
7083
7084 /* new association get rid of ibss beacon skb */
7085 if (priv->ibss_beacon)
7086 dev_kfree_skb(priv->ibss_beacon);
7087
7088 priv->ibss_beacon = NULL;
7089
7090 priv->beacon_int = priv->hw->conf.beacon_int;
7091 priv->timestamp = 0;
7092 if ((priv->iw_mode == NL80211_IFTYPE_STATION))
7093 priv->beacon_int = 0;
7094
7095 spin_unlock_irqrestore(&priv->lock, flags);
7096
7097 if (!iwl3945_is_ready_rf(priv)) {
7098 IWL_DEBUG_MAC80211("leave - not ready\n");
7099 mutex_unlock(&priv->mutex);
7100 return;
7101 }
7102
7103 /* we are restarting association process
7104 * clear RXON_FILTER_ASSOC_MSK bit
7105 */
7106 if (priv->iw_mode != NL80211_IFTYPE_AP) {
7107 iwl3945_scan_cancel_timeout(priv, 100);
7108 priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7109 iwl3945_commit_rxon(priv);
7110 }
7111
7112 /* Per mac80211.h: This is only used in IBSS mode... */
7113 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7114
7115 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7116 mutex_unlock(&priv->mutex);
7117 return;
7118 }
7119
7120 iwl3945_set_rate(priv);
7121
7122 mutex_unlock(&priv->mutex);
7123
7124 IWL_DEBUG_MAC80211("leave\n");
7125
7126 }
7127
7128 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
7129 {
7130 struct iwl_priv *priv = hw->priv;
7131 unsigned long flags;
7132
7133 IWL_DEBUG_MAC80211("enter\n");
7134
7135 if (!iwl3945_is_ready_rf(priv)) {
7136 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7137 return -EIO;
7138 }
7139
7140 if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
7141 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7142 return -EIO;
7143 }
7144
7145 spin_lock_irqsave(&priv->lock, flags);
7146
7147 if (priv->ibss_beacon)
7148 dev_kfree_skb(priv->ibss_beacon);
7149
7150 priv->ibss_beacon = skb;
7151
7152 priv->assoc_id = 0;
7153
7154 IWL_DEBUG_MAC80211("leave\n");
7155 spin_unlock_irqrestore(&priv->lock, flags);
7156
7157 iwl3945_reset_qos(priv);
7158
7159 iwl3945_post_associate(priv);
7160
7161
7162 return 0;
7163 }
7164
7165 /*****************************************************************************
7166 *
7167 * sysfs attributes
7168 *
7169 *****************************************************************************/
7170
7171 #ifdef CONFIG_IWL3945_DEBUG
7172
7173 /*
7174 * The following adds a new attribute to the sysfs representation
7175 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7176 * used for controlling the debug level.
7177 *
7178 * See the level definitions in iwl for details.
7179 */
7180 static ssize_t show_debug_level(struct device *d,
7181 struct device_attribute *attr, char *buf)
7182 {
7183 struct iwl_priv *priv = d->driver_data;
7184
7185 return sprintf(buf, "0x%08X\n", priv->debug_level);
7186 }
7187 static ssize_t store_debug_level(struct device *d,
7188 struct device_attribute *attr,
7189 const char *buf, size_t count)
7190 {
7191 struct iwl_priv *priv = d->driver_data;
7192 unsigned long val;
7193 int ret;
7194
7195 ret = strict_strtoul(buf, 0, &val);
7196 if (ret)
7197 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
7198 else
7199 priv->debug_level = val;
7200
7201 return strnlen(buf, count);
7202 }
7203
7204 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
7205 show_debug_level, store_debug_level);
7206
7207 #endif /* CONFIG_IWL3945_DEBUG */
7208
7209 static ssize_t show_temperature(struct device *d,
7210 struct device_attribute *attr, char *buf)
7211 {
7212 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7213
7214 if (!iwl3945_is_alive(priv))
7215 return -EAGAIN;
7216
7217 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7218 }
7219
7220 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7221
7222 static ssize_t show_tx_power(struct device *d,
7223 struct device_attribute *attr, char *buf)
7224 {
7225 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7226 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7227 }
7228
7229 static ssize_t store_tx_power(struct device *d,
7230 struct device_attribute *attr,
7231 const char *buf, size_t count)
7232 {
7233 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7234 char *p = (char *)buf;
7235 u32 val;
7236
7237 val = simple_strtoul(p, &p, 10);
7238 if (p == buf)
7239 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
7240 else
7241 iwl3945_hw_reg_set_txpower(priv, val);
7242
7243 return count;
7244 }
7245
7246 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7247
7248 static ssize_t show_flags(struct device *d,
7249 struct device_attribute *attr, char *buf)
7250 {
7251 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7252
7253 return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
7254 }
7255
7256 static ssize_t store_flags(struct device *d,
7257 struct device_attribute *attr,
7258 const char *buf, size_t count)
7259 {
7260 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7261 u32 flags = simple_strtoul(buf, NULL, 0);
7262
7263 mutex_lock(&priv->mutex);
7264 if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
7265 /* Cancel any currently running scans... */
7266 if (iwl3945_scan_cancel_timeout(priv, 100))
7267 IWL_WARN(priv, "Could not cancel scan.\n");
7268 else {
7269 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7270 flags);
7271 priv->staging39_rxon.flags = cpu_to_le32(flags);
7272 iwl3945_commit_rxon(priv);
7273 }
7274 }
7275 mutex_unlock(&priv->mutex);
7276
7277 return count;
7278 }
7279
7280 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7281
7282 static ssize_t show_filter_flags(struct device *d,
7283 struct device_attribute *attr, char *buf)
7284 {
7285 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7286
7287 return sprintf(buf, "0x%04X\n",
7288 le32_to_cpu(priv->active39_rxon.filter_flags));
7289 }
7290
7291 static ssize_t store_filter_flags(struct device *d,
7292 struct device_attribute *attr,
7293 const char *buf, size_t count)
7294 {
7295 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7296 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7297
7298 mutex_lock(&priv->mutex);
7299 if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
7300 /* Cancel any currently running scans... */
7301 if (iwl3945_scan_cancel_timeout(priv, 100))
7302 IWL_WARN(priv, "Could not cancel scan.\n");
7303 else {
7304 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7305 "0x%04X\n", filter_flags);
7306 priv->staging39_rxon.filter_flags =
7307 cpu_to_le32(filter_flags);
7308 iwl3945_commit_rxon(priv);
7309 }
7310 }
7311 mutex_unlock(&priv->mutex);
7312
7313 return count;
7314 }
7315
7316 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7317 store_filter_flags);
7318
7319 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7320
7321 static ssize_t show_measurement(struct device *d,
7322 struct device_attribute *attr, char *buf)
7323 {
7324 struct iwl_priv *priv = dev_get_drvdata(d);
7325 struct iwl_spectrum_notification measure_report;
7326 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7327 u8 *data = (u8 *)&measure_report;
7328 unsigned long flags;
7329
7330 spin_lock_irqsave(&priv->lock, flags);
7331 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7332 spin_unlock_irqrestore(&priv->lock, flags);
7333 return 0;
7334 }
7335 memcpy(&measure_report, &priv->measure_report, size);
7336 priv->measurement_status = 0;
7337 spin_unlock_irqrestore(&priv->lock, flags);
7338
7339 while (size && (PAGE_SIZE - len)) {
7340 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7341 PAGE_SIZE - len, 1);
7342 len = strlen(buf);
7343 if (PAGE_SIZE - len)
7344 buf[len++] = '\n';
7345
7346 ofs += 16;
7347 size -= min(size, 16U);
7348 }
7349
7350 return len;
7351 }
7352
7353 static ssize_t store_measurement(struct device *d,
7354 struct device_attribute *attr,
7355 const char *buf, size_t count)
7356 {
7357 struct iwl_priv *priv = dev_get_drvdata(d);
7358 struct ieee80211_measurement_params params = {
7359 .channel = le16_to_cpu(priv->active39_rxon.channel),
7360 .start_time = cpu_to_le64(priv->last_tsf),
7361 .duration = cpu_to_le16(1),
7362 };
7363 u8 type = IWL_MEASURE_BASIC;
7364 u8 buffer[32];
7365 u8 channel;
7366
7367 if (count) {
7368 char *p = buffer;
7369 strncpy(buffer, buf, min(sizeof(buffer), count));
7370 channel = simple_strtoul(p, NULL, 0);
7371 if (channel)
7372 params.channel = channel;
7373
7374 p = buffer;
7375 while (*p && *p != ' ')
7376 p++;
7377 if (*p)
7378 type = simple_strtoul(p + 1, NULL, 0);
7379 }
7380
7381 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7382 "channel %d (for '%s')\n", type, params.channel, buf);
7383 iwl3945_get_measurement(priv, &params, type);
7384
7385 return count;
7386 }
7387
7388 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7389 show_measurement, store_measurement);
7390 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7391
7392 static ssize_t store_retry_rate(struct device *d,
7393 struct device_attribute *attr,
7394 const char *buf, size_t count)
7395 {
7396 struct iwl_priv *priv = dev_get_drvdata(d);
7397
7398 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7399 if (priv->retry_rate <= 0)
7400 priv->retry_rate = 1;
7401
7402 return count;
7403 }
7404
7405 static ssize_t show_retry_rate(struct device *d,
7406 struct device_attribute *attr, char *buf)
7407 {
7408 struct iwl_priv *priv = dev_get_drvdata(d);
7409 return sprintf(buf, "%d", priv->retry_rate);
7410 }
7411
7412 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7413 store_retry_rate);
7414
7415 static ssize_t store_power_level(struct device *d,
7416 struct device_attribute *attr,
7417 const char *buf, size_t count)
7418 {
7419 struct iwl_priv *priv = dev_get_drvdata(d);
7420 int rc;
7421 int mode;
7422
7423 mode = simple_strtoul(buf, NULL, 0);
7424 mutex_lock(&priv->mutex);
7425
7426 if (!iwl3945_is_ready(priv)) {
7427 rc = -EAGAIN;
7428 goto out;
7429 }
7430
7431 if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
7432 (mode == IWL39_POWER_AC))
7433 mode = IWL39_POWER_AC;
7434 else
7435 mode |= IWL_POWER_ENABLED;
7436
7437 if (mode != priv->power_mode) {
7438 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7439 if (rc) {
7440 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7441 goto out;
7442 }
7443 priv->power_mode = mode;
7444 }
7445
7446 rc = count;
7447
7448 out:
7449 mutex_unlock(&priv->mutex);
7450 return rc;
7451 }
7452
7453 #define MAX_WX_STRING 80
7454
7455 /* Values are in microsecond */
7456 static const s32 timeout_duration[] = {
7457 350000,
7458 250000,
7459 75000,
7460 37000,
7461 25000,
7462 };
7463 static const s32 period_duration[] = {
7464 400000,
7465 700000,
7466 1000000,
7467 1000000,
7468 1000000
7469 };
7470
7471 static ssize_t show_power_level(struct device *d,
7472 struct device_attribute *attr, char *buf)
7473 {
7474 struct iwl_priv *priv = dev_get_drvdata(d);
7475 int level = IWL_POWER_LEVEL(priv->power_mode);
7476 char *p = buf;
7477
7478 p += sprintf(p, "%d ", level);
7479 switch (level) {
7480 case IWL_POWER_MODE_CAM:
7481 case IWL39_POWER_AC:
7482 p += sprintf(p, "(AC)");
7483 break;
7484 case IWL39_POWER_BATTERY:
7485 p += sprintf(p, "(BATTERY)");
7486 break;
7487 default:
7488 p += sprintf(p,
7489 "(Timeout %dms, Period %dms)",
7490 timeout_duration[level - 1] / 1000,
7491 period_duration[level - 1] / 1000);
7492 }
7493
7494 if (!(priv->power_mode & IWL_POWER_ENABLED))
7495 p += sprintf(p, " OFF\n");
7496 else
7497 p += sprintf(p, " \n");
7498
7499 return p - buf + 1;
7500
7501 }
7502
7503 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7504 store_power_level);
7505
7506 static ssize_t show_channels(struct device *d,
7507 struct device_attribute *attr, char *buf)
7508 {
7509 /* all this shit doesn't belong into sysfs anyway */
7510 return 0;
7511 }
7512
7513 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7514
7515 static ssize_t show_statistics(struct device *d,
7516 struct device_attribute *attr, char *buf)
7517 {
7518 struct iwl_priv *priv = dev_get_drvdata(d);
7519 u32 size = sizeof(struct iwl3945_notif_statistics);
7520 u32 len = 0, ofs = 0;
7521 u8 *data = (u8 *)&priv->statistics_39;
7522 int rc = 0;
7523
7524 if (!iwl3945_is_alive(priv))
7525 return -EAGAIN;
7526
7527 mutex_lock(&priv->mutex);
7528 rc = iwl3945_send_statistics_request(priv);
7529 mutex_unlock(&priv->mutex);
7530
7531 if (rc) {
7532 len = sprintf(buf,
7533 "Error sending statistics request: 0x%08X\n", rc);
7534 return len;
7535 }
7536
7537 while (size && (PAGE_SIZE - len)) {
7538 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7539 PAGE_SIZE - len, 1);
7540 len = strlen(buf);
7541 if (PAGE_SIZE - len)
7542 buf[len++] = '\n';
7543
7544 ofs += 16;
7545 size -= min(size, 16U);
7546 }
7547
7548 return len;
7549 }
7550
7551 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7552
7553 static ssize_t show_antenna(struct device *d,
7554 struct device_attribute *attr, char *buf)
7555 {
7556 struct iwl_priv *priv = dev_get_drvdata(d);
7557
7558 if (!iwl3945_is_alive(priv))
7559 return -EAGAIN;
7560
7561 return sprintf(buf, "%d\n", priv->antenna);
7562 }
7563
7564 static ssize_t store_antenna(struct device *d,
7565 struct device_attribute *attr,
7566 const char *buf, size_t count)
7567 {
7568 int ant;
7569 struct iwl_priv *priv = dev_get_drvdata(d);
7570
7571 if (count == 0)
7572 return 0;
7573
7574 if (sscanf(buf, "%1i", &ant) != 1) {
7575 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7576 return count;
7577 }
7578
7579 if ((ant >= 0) && (ant <= 2)) {
7580 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
7581 priv->antenna = (enum iwl3945_antenna)ant;
7582 } else
7583 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7584
7585
7586 return count;
7587 }
7588
7589 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7590
7591 static ssize_t show_status(struct device *d,
7592 struct device_attribute *attr, char *buf)
7593 {
7594 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
7595 if (!iwl3945_is_alive(priv))
7596 return -EAGAIN;
7597 return sprintf(buf, "0x%08x\n", (int)priv->status);
7598 }
7599
7600 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7601
7602 static ssize_t dump_error_log(struct device *d,
7603 struct device_attribute *attr,
7604 const char *buf, size_t count)
7605 {
7606 char *p = (char *)buf;
7607
7608 if (p[0] == '1')
7609 iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
7610
7611 return strnlen(buf, count);
7612 }
7613
7614 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7615
7616 static ssize_t dump_event_log(struct device *d,
7617 struct device_attribute *attr,
7618 const char *buf, size_t count)
7619 {
7620 char *p = (char *)buf;
7621
7622 if (p[0] == '1')
7623 iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
7624
7625 return strnlen(buf, count);
7626 }
7627
7628 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7629
7630 /*****************************************************************************
7631 *
7632 * driver setup and tear down
7633 *
7634 *****************************************************************************/
7635
7636 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
7637 {
7638 priv->workqueue = create_workqueue(DRV_NAME);
7639
7640 init_waitqueue_head(&priv->wait_command_queue);
7641
7642 INIT_WORK(&priv->up, iwl3945_bg_up);
7643 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7644 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7645 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7646 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7647 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7648 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7649 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7650 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7651 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7652 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
7653
7654 iwl3945_hw_setup_deferred_work(priv);
7655
7656 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
7657 iwl3945_irq_tasklet, (unsigned long)priv);
7658 }
7659
7660 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
7661 {
7662 iwl3945_hw_cancel_deferred_work(priv);
7663
7664 cancel_delayed_work_sync(&priv->init_alive_start);
7665 cancel_delayed_work(&priv->scan_check);
7666 cancel_delayed_work(&priv->alive_start);
7667 cancel_work_sync(&priv->beacon_update);
7668 }
7669
7670 static struct attribute *iwl3945_sysfs_entries[] = {
7671 &dev_attr_antenna.attr,
7672 &dev_attr_channels.attr,
7673 &dev_attr_dump_errors.attr,
7674 &dev_attr_dump_events.attr,
7675 &dev_attr_flags.attr,
7676 &dev_attr_filter_flags.attr,
7677 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7678 &dev_attr_measurement.attr,
7679 #endif
7680 &dev_attr_power_level.attr,
7681 &dev_attr_retry_rate.attr,
7682 &dev_attr_statistics.attr,
7683 &dev_attr_status.attr,
7684 &dev_attr_temperature.attr,
7685 &dev_attr_tx_power.attr,
7686 #ifdef CONFIG_IWL3945_DEBUG
7687 &dev_attr_debug_level.attr,
7688 #endif
7689 NULL
7690 };
7691
7692 static struct attribute_group iwl3945_attribute_group = {
7693 .name = NULL, /* put in device directory */
7694 .attrs = iwl3945_sysfs_entries,
7695 };
7696
7697 static struct ieee80211_ops iwl3945_hw_ops = {
7698 .tx = iwl3945_mac_tx,
7699 .start = iwl3945_mac_start,
7700 .stop = iwl3945_mac_stop,
7701 .add_interface = iwl3945_mac_add_interface,
7702 .remove_interface = iwl3945_mac_remove_interface,
7703 .config = iwl3945_mac_config,
7704 .config_interface = iwl3945_mac_config_interface,
7705 .configure_filter = iwl3945_configure_filter,
7706 .set_key = iwl3945_mac_set_key,
7707 .get_tx_stats = iwl3945_mac_get_tx_stats,
7708 .conf_tx = iwl3945_mac_conf_tx,
7709 .reset_tsf = iwl3945_mac_reset_tsf,
7710 .bss_info_changed = iwl3945_bss_info_changed,
7711 .hw_scan = iwl3945_mac_hw_scan
7712 };
7713
7714 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7715 {
7716 int err = 0;
7717 struct iwl_priv *priv;
7718 struct ieee80211_hw *hw;
7719 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
7720 unsigned long flags;
7721
7722 /***********************
7723 * 1. Allocating HW data
7724 * ********************/
7725
7726 /* mac80211 allocates memory for this device instance, including
7727 * space for this driver's private structure */
7728 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl3945_hw_ops);
7729 if (hw == NULL) {
7730 printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
7731 err = -ENOMEM;
7732 goto out;
7733 }
7734
7735 SET_IEEE80211_DEV(hw, &pdev->dev);
7736
7737 priv = hw->priv;
7738 priv->hw = hw;
7739 priv->pci_dev = pdev;
7740 priv->cfg = cfg;
7741
7742 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
7743 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
7744 IWL_ERR(priv,
7745 "invalid queues_num, should be between %d and %d\n",
7746 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
7747 err = -EINVAL;
7748 goto out;
7749 }
7750
7751 /* Disabling hardware scan means that mac80211 will perform scans
7752 * "the hard way", rather than using device's scan. */
7753 if (iwl3945_mod_params.disable_hw_scan) {
7754 IWL_DEBUG_INFO("Disabling hw_scan\n");
7755 iwl3945_hw_ops.hw_scan = NULL;
7756 }
7757
7758 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7759 hw->rate_control_algorithm = "iwl-3945-rs";
7760 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
7761
7762 /* Select antenna (may be helpful if only one antenna is connected) */
7763 priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
7764 #ifdef CONFIG_IWL3945_DEBUG
7765 priv->debug_level = iwl3945_mod_params.debug;
7766 atomic_set(&priv->restrict_refcnt, 0);
7767 #endif
7768
7769 /* Tell mac80211 our characteristics */
7770 hw->flags = IEEE80211_HW_SIGNAL_DBM |
7771 IEEE80211_HW_NOISE_DBM;
7772
7773 hw->wiphy->interface_modes =
7774 BIT(NL80211_IFTYPE_STATION) |
7775 BIT(NL80211_IFTYPE_ADHOC);
7776
7777 hw->wiphy->fw_handles_regulatory = true;
7778
7779 /* 4 EDCA QOS priorities */
7780 hw->queues = 4;
7781
7782 /***************************
7783 * 2. Initializing PCI bus
7784 * *************************/
7785 if (pci_enable_device(pdev)) {
7786 err = -ENODEV;
7787 goto out_ieee80211_free_hw;
7788 }
7789
7790 pci_set_master(pdev);
7791
7792 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
7793 if (!err)
7794 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
7795 if (err) {
7796 IWL_WARN(priv, "No suitable DMA available.\n");
7797 goto out_pci_disable_device;
7798 }
7799
7800 pci_set_drvdata(pdev, priv);
7801 err = pci_request_regions(pdev, DRV_NAME);
7802 if (err)
7803 goto out_pci_disable_device;
7804
7805 /***********************
7806 * 3. Read REV Register
7807 * ********************/
7808 priv->hw_base = pci_iomap(pdev, 0, 0);
7809 if (!priv->hw_base) {
7810 err = -ENODEV;
7811 goto out_pci_release_regions;
7812 }
7813
7814 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
7815 (unsigned long long) pci_resource_len(pdev, 0));
7816 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
7817
7818 /* We disable the RETRY_TIMEOUT register (0x41) to keep
7819 * PCI Tx retries from interfering with C3 CPU state */
7820 pci_write_config_byte(pdev, 0x41, 0x00);
7821
7822 /* nic init */
7823 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
7824 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
7825
7826 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
7827 err = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
7828 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
7829 if (err < 0) {
7830 IWL_DEBUG_INFO("Failed to init the card\n");
7831 goto out_remove_sysfs;
7832 }
7833
7834 /***********************
7835 * 4. Read EEPROM
7836 * ********************/
7837 /* Read the EEPROM */
7838 err = iwl3945_eeprom_init(priv);
7839 if (err) {
7840 IWL_ERR(priv, "Unable to init EEPROM\n");
7841 goto out_remove_sysfs;
7842 }
7843 /* MAC Address location in EEPROM same for 3945/4965 */
7844 get_eeprom_mac(priv, priv->mac_addr);
7845 IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
7846 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
7847
7848 /***********************
7849 * 5. Setup HW Constants
7850 * ********************/
7851 /* Device-specific setup */
7852 if (iwl3945_hw_set_hw_params(priv)) {
7853 IWL_ERR(priv, "failed to set hw settings\n");
7854 goto out_iounmap;
7855 }
7856
7857 /***********************
7858 * 6. Setup priv
7859 * ********************/
7860 priv->retry_rate = 1;
7861 priv->ibss_beacon = NULL;
7862
7863 spin_lock_init(&priv->lock);
7864 spin_lock_init(&priv->power_data_39.lock);
7865 spin_lock_init(&priv->sta_lock);
7866 spin_lock_init(&priv->hcmd_lock);
7867
7868 INIT_LIST_HEAD(&priv->free_frames);
7869 mutex_init(&priv->mutex);
7870
7871 /* Clear the driver's (not device's) station table */
7872 iwl3945_clear_stations_table(priv);
7873
7874 priv->data_retry_limit = -1;
7875 priv->ieee_channels = NULL;
7876 priv->ieee_rates = NULL;
7877 priv->band = IEEE80211_BAND_2GHZ;
7878
7879 priv->iw_mode = NL80211_IFTYPE_STATION;
7880
7881 iwl3945_reset_qos(priv);
7882
7883 priv->qos_data.qos_active = 0;
7884 priv->qos_data.qos_cap.val = 0;
7885
7886
7887 priv->rates_mask = IWL_RATES_MASK;
7888 /* If power management is turned on, default to AC mode */
7889 priv->power_mode = IWL39_POWER_AC;
7890 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
7891
7892 err = iwl3945_init_channel_map(priv);
7893 if (err) {
7894 IWL_ERR(priv, "initializing regulatory failed: %d\n", err);
7895 goto out_release_irq;
7896 }
7897
7898 err = iwl3945_init_geos(priv);
7899 if (err) {
7900 IWL_ERR(priv, "initializing geos failed: %d\n", err);
7901 goto out_free_channel_map;
7902 }
7903
7904 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
7905 priv->cfg->name);
7906
7907 /***********************************
7908 * 7. Initialize Module Parameters
7909 * **********************************/
7910
7911 /* Initialize module parameter values here */
7912 /* Disable radio (SW RF KILL) via parameter when loading driver */
7913 if (iwl3945_mod_params.disable) {
7914 set_bit(STATUS_RF_KILL_SW, &priv->status);
7915 IWL_DEBUG_INFO("Radio disabled.\n");
7916 }
7917
7918
7919 /***********************
7920 * 8. Setup Services
7921 * ********************/
7922
7923 spin_lock_irqsave(&priv->lock, flags);
7924 iwl3945_disable_interrupts(priv);
7925 spin_unlock_irqrestore(&priv->lock, flags);
7926
7927 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7928 if (err) {
7929 IWL_ERR(priv, "failed to create sysfs device attributes\n");
7930 goto out_free_geos;
7931 }
7932
7933 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
7934 iwl3945_setup_deferred_work(priv);
7935 iwl3945_setup_rx_handlers(priv);
7936
7937 /***********************
7938 * 9. Conclude
7939 * ********************/
7940 pci_save_state(pdev);
7941 pci_disable_device(pdev);
7942
7943 /*********************************
7944 * 10. Setup and Register mac80211
7945 * *******************************/
7946
7947 err = ieee80211_register_hw(priv->hw);
7948 if (err) {
7949 IWL_ERR(priv, "Failed to register network device: %d\n", err);
7950 goto out_remove_sysfs;
7951 }
7952
7953 priv->hw->conf.beacon_int = 100;
7954 priv->mac80211_registered = 1;
7955
7956
7957 err = iwl3945_rfkill_init(priv);
7958 if (err)
7959 IWL_ERR(priv, "Unable to initialize RFKILL system. "
7960 "Ignoring error: %d\n", err);
7961
7962 return 0;
7963
7964 out_remove_sysfs:
7965 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
7966 out_free_geos:
7967 iwl3945_free_geos(priv);
7968 out_free_channel_map:
7969 iwl3945_free_channel_map(priv);
7970
7971
7972 out_release_irq:
7973 destroy_workqueue(priv->workqueue);
7974 priv->workqueue = NULL;
7975 iwl3945_unset_hw_params(priv);
7976
7977 out_iounmap:
7978 pci_iounmap(pdev, priv->hw_base);
7979 out_pci_release_regions:
7980 pci_release_regions(pdev);
7981 out_pci_disable_device:
7982 pci_disable_device(pdev);
7983 pci_set_drvdata(pdev, NULL);
7984 out_ieee80211_free_hw:
7985 ieee80211_free_hw(priv->hw);
7986 out:
7987 return err;
7988 }
7989
7990 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
7991 {
7992 struct iwl_priv *priv = pci_get_drvdata(pdev);
7993 unsigned long flags;
7994
7995 if (!priv)
7996 return;
7997
7998 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
7999
8000 set_bit(STATUS_EXIT_PENDING, &priv->status);
8001
8002 iwl3945_down(priv);
8003
8004 /* make sure we flush any pending irq or
8005 * tasklet for the driver
8006 */
8007 spin_lock_irqsave(&priv->lock, flags);
8008 iwl3945_disable_interrupts(priv);
8009 spin_unlock_irqrestore(&priv->lock, flags);
8010
8011 iwl_synchronize_irq(priv);
8012
8013 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8014
8015 iwl3945_rfkill_unregister(priv);
8016 iwl3945_dealloc_ucode_pci(priv);
8017
8018 if (priv->rxq.bd)
8019 iwl3945_rx_queue_free(priv, &priv->rxq);
8020 iwl3945_hw_txq_ctx_free(priv);
8021
8022 iwl3945_unset_hw_params(priv);
8023 iwl3945_clear_stations_table(priv);
8024
8025 if (priv->mac80211_registered)
8026 ieee80211_unregister_hw(priv->hw);
8027
8028 /*netif_stop_queue(dev); */
8029 flush_workqueue(priv->workqueue);
8030
8031 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8032 * priv->workqueue... so we can't take down the workqueue
8033 * until now... */
8034 destroy_workqueue(priv->workqueue);
8035 priv->workqueue = NULL;
8036
8037 pci_iounmap(pdev, priv->hw_base);
8038 pci_release_regions(pdev);
8039 pci_disable_device(pdev);
8040 pci_set_drvdata(pdev, NULL);
8041
8042 iwl3945_free_channel_map(priv);
8043 iwl3945_free_geos(priv);
8044 kfree(priv->scan39);
8045 if (priv->ibss_beacon)
8046 dev_kfree_skb(priv->ibss_beacon);
8047
8048 ieee80211_free_hw(priv->hw);
8049 }
8050
8051 #ifdef CONFIG_PM
8052
8053 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8054 {
8055 struct iwl_priv *priv = pci_get_drvdata(pdev);
8056
8057 if (priv->is_open) {
8058 set_bit(STATUS_IN_SUSPEND, &priv->status);
8059 iwl3945_mac_stop(priv->hw);
8060 priv->is_open = 1;
8061 }
8062
8063 pci_set_power_state(pdev, PCI_D3hot);
8064
8065 return 0;
8066 }
8067
8068 static int iwl3945_pci_resume(struct pci_dev *pdev)
8069 {
8070 struct iwl_priv *priv = pci_get_drvdata(pdev);
8071
8072 pci_set_power_state(pdev, PCI_D0);
8073
8074 if (priv->is_open)
8075 iwl3945_mac_start(priv->hw);
8076
8077 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8078 return 0;
8079 }
8080
8081 #endif /* CONFIG_PM */
8082
8083 /*************** RFKILL FUNCTIONS **********/
8084 #ifdef CONFIG_IWL3945_RFKILL
8085 /* software rf-kill from user */
8086 static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
8087 {
8088 struct iwl_priv *priv = data;
8089 int err = 0;
8090
8091 if (!priv->rfkill)
8092 return 0;
8093
8094 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
8095 return 0;
8096
8097 IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
8098 mutex_lock(&priv->mutex);
8099
8100 switch (state) {
8101 case RFKILL_STATE_UNBLOCKED:
8102 if (iwl3945_is_rfkill_hw(priv)) {
8103 err = -EBUSY;
8104 goto out_unlock;
8105 }
8106 iwl3945_radio_kill_sw(priv, 0);
8107 break;
8108 case RFKILL_STATE_SOFT_BLOCKED:
8109 iwl3945_radio_kill_sw(priv, 1);
8110 break;
8111 default:
8112 IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
8113 break;
8114 }
8115 out_unlock:
8116 mutex_unlock(&priv->mutex);
8117
8118 return err;
8119 }
8120
8121 int iwl3945_rfkill_init(struct iwl_priv *priv)
8122 {
8123 struct device *device = wiphy_dev(priv->hw->wiphy);
8124 int ret = 0;
8125
8126 BUG_ON(device == NULL);
8127
8128 IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
8129 priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
8130 if (!priv->rfkill) {
8131 IWL_ERR(priv, "Unable to allocate rfkill device.\n");
8132 ret = -ENOMEM;
8133 goto error;
8134 }
8135
8136 priv->rfkill->name = priv->cfg->name;
8137 priv->rfkill->data = priv;
8138 priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
8139 priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
8140 priv->rfkill->user_claim_unsupported = 1;
8141
8142 priv->rfkill->dev.class->suspend = NULL;
8143 priv->rfkill->dev.class->resume = NULL;
8144
8145 ret = rfkill_register(priv->rfkill);
8146 if (ret) {
8147 IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
8148 goto freed_rfkill;
8149 }
8150
8151 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8152 return ret;
8153
8154 freed_rfkill:
8155 if (priv->rfkill != NULL)
8156 rfkill_free(priv->rfkill);
8157 priv->rfkill = NULL;
8158
8159 error:
8160 IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
8161 return ret;
8162 }
8163
8164 void iwl3945_rfkill_unregister(struct iwl_priv *priv)
8165 {
8166 if (priv->rfkill)
8167 rfkill_unregister(priv->rfkill);
8168
8169 priv->rfkill = NULL;
8170 }
8171
8172 /* set rf-kill to the right state. */
8173 void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
8174 {
8175
8176 if (!priv->rfkill)
8177 return;
8178
8179 if (iwl3945_is_rfkill_hw(priv)) {
8180 rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
8181 return;
8182 }
8183
8184 if (!iwl3945_is_rfkill_sw(priv))
8185 rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
8186 else
8187 rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
8188 }
8189 #endif
8190
8191 /*****************************************************************************
8192 *
8193 * driver and module entry point
8194 *
8195 *****************************************************************************/
8196
8197 static struct pci_driver iwl3945_driver = {
8198 .name = DRV_NAME,
8199 .id_table = iwl3945_hw_card_ids,
8200 .probe = iwl3945_pci_probe,
8201 .remove = __devexit_p(iwl3945_pci_remove),
8202 #ifdef CONFIG_PM
8203 .suspend = iwl3945_pci_suspend,
8204 .resume = iwl3945_pci_resume,
8205 #endif
8206 };
8207
8208 static int __init iwl3945_init(void)
8209 {
8210
8211 int ret;
8212 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8213 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8214
8215 ret = iwl3945_rate_control_register();
8216 if (ret) {
8217 printk(KERN_ERR DRV_NAME
8218 "Unable to register rate control algorithm: %d\n", ret);
8219 return ret;
8220 }
8221
8222 ret = pci_register_driver(&iwl3945_driver);
8223 if (ret) {
8224 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
8225 goto error_register;
8226 }
8227
8228 return ret;
8229
8230 error_register:
8231 iwl3945_rate_control_unregister();
8232 return ret;
8233 }
8234
8235 static void __exit iwl3945_exit(void)
8236 {
8237 pci_unregister_driver(&iwl3945_driver);
8238 iwl3945_rate_control_unregister();
8239 }
8240
8241 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
8242
8243 module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
8244 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8245 module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
8246 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8247 module_param_named(hwcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
8248 MODULE_PARM_DESC(hwcrypto,
8249 "using hardware crypto engine (default 0 [software])\n");
8250 module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
8251 MODULE_PARM_DESC(debug, "debug output mask");
8252 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
8253 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8254
8255 module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
8256 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8257
8258 module_exit(iwl3945_exit);
8259 module_init(iwl3945_init);
Linus' kernel tree