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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6.git] / drivers / net / netxen / netxen_nic_init.c
blob81253abbfa34f58d0287960b684946ebb5c7614d
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31 #include <linux/netdevice.h>
32 #include <linux/delay.h>
33 #include "netxen_nic.h"
34 #include "netxen_nic_hw.h"
35 #include "netxen_nic_phan_reg.h"
36
37 struct crb_addr_pair {
38 u32 addr;
39 u32 data;
40 };
41
42 #define NETXEN_MAX_CRB_XFORM 60
43 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
44 #define NETXEN_ADDR_ERROR (0xffffffff)
45
46 #define crb_addr_transform(name) \
47 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
48 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
49
50 #define NETXEN_NIC_XDMA_RESET 0x8000ff
51
52 static void
53 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
54 struct nx_host_rds_ring *rds_ring);
55
56 static void crb_addr_transform_setup(void)
57 {
58 crb_addr_transform(XDMA);
59 crb_addr_transform(TIMR);
60 crb_addr_transform(SRE);
61 crb_addr_transform(SQN3);
62 crb_addr_transform(SQN2);
63 crb_addr_transform(SQN1);
64 crb_addr_transform(SQN0);
65 crb_addr_transform(SQS3);
66 crb_addr_transform(SQS2);
67 crb_addr_transform(SQS1);
68 crb_addr_transform(SQS0);
69 crb_addr_transform(RPMX7);
70 crb_addr_transform(RPMX6);
71 crb_addr_transform(RPMX5);
72 crb_addr_transform(RPMX4);
73 crb_addr_transform(RPMX3);
74 crb_addr_transform(RPMX2);
75 crb_addr_transform(RPMX1);
76 crb_addr_transform(RPMX0);
77 crb_addr_transform(ROMUSB);
78 crb_addr_transform(SN);
79 crb_addr_transform(QMN);
80 crb_addr_transform(QMS);
81 crb_addr_transform(PGNI);
82 crb_addr_transform(PGND);
83 crb_addr_transform(PGN3);
84 crb_addr_transform(PGN2);
85 crb_addr_transform(PGN1);
86 crb_addr_transform(PGN0);
87 crb_addr_transform(PGSI);
88 crb_addr_transform(PGSD);
89 crb_addr_transform(PGS3);
90 crb_addr_transform(PGS2);
91 crb_addr_transform(PGS1);
92 crb_addr_transform(PGS0);
93 crb_addr_transform(PS);
94 crb_addr_transform(PH);
95 crb_addr_transform(NIU);
96 crb_addr_transform(I2Q);
97 crb_addr_transform(EG);
98 crb_addr_transform(MN);
99 crb_addr_transform(MS);
100 crb_addr_transform(CAS2);
101 crb_addr_transform(CAS1);
102 crb_addr_transform(CAS0);
103 crb_addr_transform(CAM);
104 crb_addr_transform(C2C1);
105 crb_addr_transform(C2C0);
106 crb_addr_transform(SMB);
107 crb_addr_transform(OCM0);
108 crb_addr_transform(I2C0);
109 }
110
111 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
112 {
113 struct netxen_recv_context *recv_ctx;
114 struct nx_host_rds_ring *rds_ring;
115 struct netxen_rx_buffer *rx_buf;
116 int i, ring;
117
118 recv_ctx = &adapter->recv_ctx;
119 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
120 rds_ring = &recv_ctx->rds_rings[ring];
121 for (i = 0; i < rds_ring->num_desc; ++i) {
122 rx_buf = &(rds_ring->rx_buf_arr[i]);
123 if (rx_buf->state == NETXEN_BUFFER_FREE)
124 continue;
125 pci_unmap_single(adapter->pdev,
126 rx_buf->dma,
127 rds_ring->dma_size,
128 PCI_DMA_FROMDEVICE);
129 if (rx_buf->skb != NULL)
130 dev_kfree_skb_any(rx_buf->skb);
131 }
132 }
133 }
134
135 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
136 {
137 struct netxen_cmd_buffer *cmd_buf;
138 struct netxen_skb_frag *buffrag;
139 int i, j;
140 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
141
142 cmd_buf = tx_ring->cmd_buf_arr;
143 for (i = 0; i < tx_ring->num_desc; i++) {
144 buffrag = cmd_buf->frag_array;
145 if (buffrag->dma) {
146 pci_unmap_single(adapter->pdev, buffrag->dma,
147 buffrag->length, PCI_DMA_TODEVICE);
148 buffrag->dma = 0ULL;
149 }
150 for (j = 0; j < cmd_buf->frag_count; j++) {
151 buffrag++;
152 if (buffrag->dma) {
153 pci_unmap_page(adapter->pdev, buffrag->dma,
154 buffrag->length,
155 PCI_DMA_TODEVICE);
156 buffrag->dma = 0ULL;
157 }
158 }
159 if (cmd_buf->skb) {
160 dev_kfree_skb_any(cmd_buf->skb);
161 cmd_buf->skb = NULL;
162 }
163 cmd_buf++;
164 }
165 }
166
167 void netxen_free_sw_resources(struct netxen_adapter *adapter)
168 {
169 struct netxen_recv_context *recv_ctx;
170 struct nx_host_rds_ring *rds_ring;
171 struct nx_host_tx_ring *tx_ring;
172 int ring;
173
174 recv_ctx = &adapter->recv_ctx;
175
176 if (recv_ctx->rds_rings == NULL)
177 goto skip_rds;
178
179 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
180 rds_ring = &recv_ctx->rds_rings[ring];
181 vfree(rds_ring->rx_buf_arr);
182 rds_ring->rx_buf_arr = NULL;
183 }
184 kfree(recv_ctx->rds_rings);
185
186 skip_rds:
187 if (recv_ctx->sds_rings == NULL)
188 goto skip_sds;
189
190 for(ring = 0; ring < adapter->max_sds_rings; ring++)
191 recv_ctx->sds_rings[ring].consumer = 0;
192
193 skip_sds:
194 if (adapter->tx_ring == NULL)
195 return;
196
197 tx_ring = adapter->tx_ring;
198 vfree(tx_ring->cmd_buf_arr);
199 }
200
201 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
202 {
203 struct netxen_recv_context *recv_ctx;
204 struct nx_host_rds_ring *rds_ring;
205 struct nx_host_sds_ring *sds_ring;
206 struct nx_host_tx_ring *tx_ring;
207 struct netxen_rx_buffer *rx_buf;
208 int ring, i, size;
209
210 struct netxen_cmd_buffer *cmd_buf_arr;
211 struct net_device *netdev = adapter->netdev;
212 struct pci_dev *pdev = adapter->pdev;
213
214 size = sizeof(struct nx_host_tx_ring);
215 tx_ring = kzalloc(size, GFP_KERNEL);
216 if (tx_ring == NULL) {
217 dev_err(&pdev->dev, "%s: failed to allocate tx ring struct\n",
218 netdev->name);
219 return -ENOMEM;
220 }
221 adapter->tx_ring = tx_ring;
222
223 tx_ring->num_desc = adapter->num_txd;
224 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
225
226 cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
227 if (cmd_buf_arr == NULL) {
228 dev_err(&pdev->dev, "%s: failed to allocate cmd buffer ring\n",
229 netdev->name);
230 return -ENOMEM;
231 }
232 memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
233 tx_ring->cmd_buf_arr = cmd_buf_arr;
234
235 recv_ctx = &adapter->recv_ctx;
236
237 size = adapter->max_rds_rings * sizeof (struct nx_host_rds_ring);
238 rds_ring = kzalloc(size, GFP_KERNEL);
239 if (rds_ring == NULL) {
240 dev_err(&pdev->dev, "%s: failed to allocate rds ring struct\n",
241 netdev->name);
242 return -ENOMEM;
243 }
244 recv_ctx->rds_rings = rds_ring;
245
246 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
247 rds_ring = &recv_ctx->rds_rings[ring];
248 switch (ring) {
249 case RCV_RING_NORMAL:
250 rds_ring->num_desc = adapter->num_rxd;
251 if (adapter->ahw.cut_through) {
252 rds_ring->dma_size =
253 NX_CT_DEFAULT_RX_BUF_LEN;
254 rds_ring->skb_size =
255 NX_CT_DEFAULT_RX_BUF_LEN;
256 } else {
257 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
258 rds_ring->dma_size =
259 NX_P3_RX_BUF_MAX_LEN;
260 else
261 rds_ring->dma_size =
262 NX_P2_RX_BUF_MAX_LEN;
263 rds_ring->skb_size =
264 rds_ring->dma_size + NET_IP_ALIGN;
265 }
266 break;
267
268 case RCV_RING_JUMBO:
269 rds_ring->num_desc = adapter->num_jumbo_rxd;
270 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
271 rds_ring->dma_size =
272 NX_P3_RX_JUMBO_BUF_MAX_LEN;
273 else
274 rds_ring->dma_size =
275 NX_P2_RX_JUMBO_BUF_MAX_LEN;
276 rds_ring->skb_size =
277 rds_ring->dma_size + NET_IP_ALIGN;
278 break;
279
280 case RCV_RING_LRO:
281 rds_ring->num_desc = adapter->num_lro_rxd;
282 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
283 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
284 break;
285
286 }
287 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
288 vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
289 if (rds_ring->rx_buf_arr == NULL) {
290 printk(KERN_ERR "%s: Failed to allocate "
291 "rx buffer ring %d\n",
292 netdev->name, ring);
293 /* free whatever was already allocated */
294 goto err_out;
295 }
296 memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
297 INIT_LIST_HEAD(&rds_ring->free_list);
298 /*
299 * Now go through all of them, set reference handles
300 * and put them in the queues.
301 */
302 rx_buf = rds_ring->rx_buf_arr;
303 for (i = 0; i < rds_ring->num_desc; i++) {
304 list_add_tail(&rx_buf->list,
305 &rds_ring->free_list);
306 rx_buf->ref_handle = i;
307 rx_buf->state = NETXEN_BUFFER_FREE;
308 rx_buf++;
309 }
310 spin_lock_init(&rds_ring->lock);
311 }
312
313 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
314 sds_ring = &recv_ctx->sds_rings[ring];
315 sds_ring->irq = adapter->msix_entries[ring].vector;
316 sds_ring->adapter = adapter;
317 sds_ring->num_desc = adapter->num_rxd;
318
319 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
320 INIT_LIST_HEAD(&sds_ring->free_list[i]);
321 }
322
323 return 0;
324
325 err_out:
326 netxen_free_sw_resources(adapter);
327 return -ENOMEM;
328 }
329
330 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
331 {
332 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
333 adapter->set_multi = netxen_p2_nic_set_multi;
334
335 switch (adapter->ahw.port_type) {
336 case NETXEN_NIC_GBE:
337 adapter->enable_phy_interrupts =
338 netxen_niu_gbe_enable_phy_interrupts;
339 adapter->disable_phy_interrupts =
340 netxen_niu_gbe_disable_phy_interrupts;
341 adapter->set_mtu = netxen_nic_set_mtu_gb;
342 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
343 adapter->phy_read = netxen_niu_gbe_phy_read;
344 adapter->phy_write = netxen_niu_gbe_phy_write;
345 adapter->init_port = netxen_niu_gbe_init_port;
346 adapter->stop_port = netxen_niu_disable_gbe_port;
347 break;
348
349 case NETXEN_NIC_XGBE:
350 adapter->enable_phy_interrupts =
351 netxen_niu_xgbe_enable_phy_interrupts;
352 adapter->disable_phy_interrupts =
353 netxen_niu_xgbe_disable_phy_interrupts;
354 adapter->set_mtu = netxen_nic_set_mtu_xgb;
355 adapter->init_port = netxen_niu_xg_init_port;
356 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
357 adapter->stop_port = netxen_niu_disable_xg_port;
358 break;
359
360 default:
361 break;
362 }
363
364 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
365 adapter->set_mtu = nx_fw_cmd_set_mtu;
366 adapter->set_promisc = netxen_p3_nic_set_promisc;
367 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
368 adapter->set_multi = netxen_p3_nic_set_multi;
369 }
370 }
371
372 /*
373 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
374 * address to external PCI CRB address.
375 */
376 static u32 netxen_decode_crb_addr(u32 addr)
377 {
378 int i;
379 u32 base_addr, offset, pci_base;
380
381 crb_addr_transform_setup();
382
383 pci_base = NETXEN_ADDR_ERROR;
384 base_addr = addr & 0xfff00000;
385 offset = addr & 0x000fffff;
386
387 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
388 if (crb_addr_xform[i] == base_addr) {
389 pci_base = i << 20;
390 break;
391 }
392 }
393 if (pci_base == NETXEN_ADDR_ERROR)
394 return pci_base;
395 else
396 return (pci_base + offset);
397 }
398
399 static long rom_max_timeout = 100;
400 static long rom_lock_timeout = 10000;
401
402 static int rom_lock(struct netxen_adapter *adapter)
403 {
404 int iter;
405 u32 done = 0;
406 int timeout = 0;
407
408 while (!done) {
409 /* acquire semaphore2 from PCI HW block */
410 done = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK));
411 if (done == 1)
412 break;
413 if (timeout >= rom_lock_timeout)
414 return -EIO;
415
416 timeout++;
417 /*
418 * Yield CPU
419 */
420 if (!in_atomic())
421 schedule();
422 else {
423 for (iter = 0; iter < 20; iter++)
424 cpu_relax(); /*This a nop instr on i386 */
425 }
426 }
427 NXWR32(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
428 return 0;
429 }
430
431 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
432 {
433 long timeout = 0;
434 long done = 0;
435
436 cond_resched();
437
438 while (done == 0) {
439 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
440 done &= 2;
441 timeout++;
442 if (timeout >= rom_max_timeout) {
443 printk("Timeout reached waiting for rom done");
444 return -EIO;
445 }
446 }
447 return 0;
448 }
449
450 static void netxen_rom_unlock(struct netxen_adapter *adapter)
451 {
452 /* release semaphore2 */
453 NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK));
454
455 }
456
457 static int do_rom_fast_read(struct netxen_adapter *adapter,
458 int addr, int *valp)
459 {
460 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
461 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
462 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
463 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
464 if (netxen_wait_rom_done(adapter)) {
465 printk("Error waiting for rom done\n");
466 return -EIO;
467 }
468 /* reset abyte_cnt and dummy_byte_cnt */
469 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
470 udelay(10);
471 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
472
473 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
474 return 0;
475 }
476
477 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
478 u8 *bytes, size_t size)
479 {
480 int addridx;
481 int ret = 0;
482
483 for (addridx = addr; addridx < (addr + size); addridx += 4) {
484 int v;
485 ret = do_rom_fast_read(adapter, addridx, &v);
486 if (ret != 0)
487 break;
488 *(__le32 *)bytes = cpu_to_le32(v);
489 bytes += 4;
490 }
491
492 return ret;
493 }
494
495 int
496 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
497 u8 *bytes, size_t size)
498 {
499 int ret;
500
501 ret = rom_lock(adapter);
502 if (ret < 0)
503 return ret;
504
505 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
506
507 netxen_rom_unlock(adapter);
508 return ret;
509 }
510
511 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
512 {
513 int ret;
514
515 if (rom_lock(adapter) != 0)
516 return -EIO;
517
518 ret = do_rom_fast_read(adapter, addr, valp);
519 netxen_rom_unlock(adapter);
520 return ret;
521 }
522
523 #define NETXEN_BOARDTYPE 0x4008
524 #define NETXEN_BOARDNUM 0x400c
525 #define NETXEN_CHIPNUM 0x4010
526
527 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
528 {
529 int addr, val;
530 int i, n, init_delay = 0;
531 struct crb_addr_pair *buf;
532 unsigned offset;
533 u32 off;
534
535 /* resetall */
536 rom_lock(adapter);
537 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xffffffff);
538 netxen_rom_unlock(adapter);
539
540 if (verbose) {
541 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
542 printk("P2 ROM board type: 0x%08x\n", val);
543 else
544 printk("Could not read board type\n");
545 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
546 printk("P2 ROM board num: 0x%08x\n", val);
547 else
548 printk("Could not read board number\n");
549 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
550 printk("P2 ROM chip num: 0x%08x\n", val);
551 else
552 printk("Could not read chip number\n");
553 }
554
555 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
556 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
557 (n != 0xcafecafe) ||
558 netxen_rom_fast_read(adapter, 4, &n) != 0) {
559 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
560 "n: %08x\n", netxen_nic_driver_name, n);
561 return -EIO;
562 }
563 offset = n & 0xffffU;
564 n = (n >> 16) & 0xffffU;
565 } else {
566 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
567 !(n & 0x80000000)) {
568 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
569 "n: %08x\n", netxen_nic_driver_name, n);
570 return -EIO;
571 }
572 offset = 1;
573 n &= ~0x80000000;
574 }
575
576 if (n < 1024) {
577 if (verbose)
578 printk(KERN_DEBUG "%s: %d CRB init values found"
579 " in ROM.\n", netxen_nic_driver_name, n);
580 } else {
581 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
582 " initialized.\n", __func__, n);
583 return -EIO;
584 }
585
586 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
587 if (buf == NULL) {
588 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
589 netxen_nic_driver_name);
590 return -ENOMEM;
591 }
592 for (i = 0; i < n; i++) {
593 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
594 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
595 kfree(buf);
596 return -EIO;
597 }
598
599 buf[i].addr = addr;
600 buf[i].data = val;
601
602 if (verbose)
603 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
604 netxen_nic_driver_name,
605 (u32)netxen_decode_crb_addr(addr), val);
606 }
607 for (i = 0; i < n; i++) {
608
609 off = netxen_decode_crb_addr(buf[i].addr);
610 if (off == NETXEN_ADDR_ERROR) {
611 printk(KERN_ERR"CRB init value out of range %x\n",
612 buf[i].addr);
613 continue;
614 }
615 off += NETXEN_PCI_CRBSPACE;
616 /* skipping cold reboot MAGIC */
617 if (off == NETXEN_CAM_RAM(0x1fc))
618 continue;
619
620 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
621 /* do not reset PCI */
622 if (off == (ROMUSB_GLB + 0xbc))
623 continue;
624 if (off == (ROMUSB_GLB + 0xa8))
625 continue;
626 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
627 continue;
628 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
629 continue;
630 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
631 continue;
632 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
633 buf[i].data = 0x1020;
634 /* skip the function enable register */
635 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
636 continue;
637 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
638 continue;
639 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
640 continue;
641 }
642
643 if (off == NETXEN_ADDR_ERROR) {
644 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
645 netxen_nic_driver_name, buf[i].addr);
646 continue;
647 }
648
649 init_delay = 1;
650 /* After writing this register, HW needs time for CRB */
651 /* to quiet down (else crb_window returns 0xffffffff) */
652 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
653 init_delay = 1000;
654 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
655 /* hold xdma in reset also */
656 buf[i].data = NETXEN_NIC_XDMA_RESET;
657 buf[i].data = 0x8000ff;
658 }
659 }
660
661 NXWR32(adapter, off, buf[i].data);
662
663 msleep(init_delay);
664 }
665 kfree(buf);
666
667 /* disable_peg_cache_all */
668
669 /* unreset_net_cache */
670 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
671 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
672 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
673 }
674
675 /* p2dn replyCount */
676 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
677 /* disable_peg_cache 0 */
678 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
679 /* disable_peg_cache 1 */
680 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
681
682 /* peg_clr_all */
683
684 /* peg_clr 0 */
685 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
686 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
687 /* peg_clr 1 */
688 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
689 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
690 /* peg_clr 2 */
691 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
692 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
693 /* peg_clr 3 */
694 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
695 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
696 return 0;
697 }
698
699 int
700 netxen_need_fw_reset(struct netxen_adapter *adapter)
701 {
702 u32 count, old_count;
703 u32 val, version, major, minor, build;
704 int i, timeout;
705 u8 fw_type;
706
707 /* NX2031 firmware doesn't support heartbit */
708 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
709 return 1;
710
711 /* last attempt had failed */
712 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
713 return 1;
714
715 old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
716
717 for (i = 0; i < 10; i++) {
718
719 timeout = msleep_interruptible(200);
720 if (timeout) {
721 NXWR32(adapter, CRB_CMDPEG_STATE,
722 PHAN_INITIALIZE_FAILED);
723 return -EINTR;
724 }
725
726 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
727 if (count != old_count)
728 break;
729 }
730
731 /* firmware is dead */
732 if (count == old_count)
733 return 1;
734
735 /* check if we have got newer or different file firmware */
736 if (adapter->fw) {
737
738 const struct firmware *fw = adapter->fw;
739
740 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
741 version = NETXEN_DECODE_VERSION(val);
742
743 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
744 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
745 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
746
747 if (version > NETXEN_VERSION_CODE(major, minor, build))
748 return 1;
749
750 if (version == NETXEN_VERSION_CODE(major, minor, build)) {
751
752 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
753 fw_type = (val & 0x4) ?
754 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
755
756 if (adapter->fw_type != fw_type)
757 return 1;
758 }
759 }
760
761 return 0;
762 }
763
764 static char *fw_name[] = {
765 "nxromimg.bin", "nx3fwct.bin", "nx3fwmn.bin", "flash",
766 };
767
768 int
769 netxen_load_firmware(struct netxen_adapter *adapter)
770 {
771 u64 *ptr64;
772 u32 i, flashaddr, size;
773 const struct firmware *fw = adapter->fw;
774 struct pci_dev *pdev = adapter->pdev;
775
776 dev_info(&pdev->dev, "loading firmware from %s\n",
777 fw_name[adapter->fw_type]);
778
779 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
780 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
781
782 if (fw) {
783 __le64 data;
784
785 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
786
787 ptr64 = (u64 *)&fw->data[NETXEN_BOOTLD_START];
788 flashaddr = NETXEN_BOOTLD_START;
789
790 for (i = 0; i < size; i++) {
791 data = cpu_to_le64(ptr64[i]);
792 adapter->pci_mem_write(adapter, flashaddr, &data, 8);
793 flashaddr += 8;
794 }
795
796 size = *(u32 *)&fw->data[NX_FW_SIZE_OFFSET];
797 size = (__force u32)cpu_to_le32(size) / 8;
798
799 ptr64 = (u64 *)&fw->data[NETXEN_IMAGE_START];
800 flashaddr = NETXEN_IMAGE_START;
801
802 for (i = 0; i < size; i++) {
803 data = cpu_to_le64(ptr64[i]);
804
805 if (adapter->pci_mem_write(adapter,
806 flashaddr, &data, 8))
807 return -EIO;
808
809 flashaddr += 8;
810 }
811 } else {
812 u32 data;
813
814 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 4;
815 flashaddr = NETXEN_BOOTLD_START;
816
817 for (i = 0; i < size; i++) {
818 if (netxen_rom_fast_read(adapter,
819 flashaddr, (int *)&data) != 0)
820 return -EIO;
821
822 if (adapter->pci_mem_write(adapter,
823 flashaddr, &data, 4))
824 return -EIO;
825
826 flashaddr += 4;
827 }
828 }
829 msleep(1);
830
831 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
832 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
833 else {
834 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
835 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
836 }
837
838 return 0;
839 }
840
841 static int
842 netxen_validate_firmware(struct netxen_adapter *adapter, const char *fwname)
843 {
844 __le32 val;
845 u32 ver, min_ver, bios;
846 struct pci_dev *pdev = adapter->pdev;
847 const struct firmware *fw = adapter->fw;
848
849 if (fw->size < NX_FW_MIN_SIZE)
850 return -EINVAL;
851
852 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
853 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
854 return -EINVAL;
855
856 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
857
858 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
859 min_ver = NETXEN_VERSION_CODE(4, 0, 216);
860 else
861 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
862
863 ver = NETXEN_DECODE_VERSION(val);
864
865 if ((_major(ver) > _NETXEN_NIC_LINUX_MAJOR) || (ver < min_ver)) {
866 dev_err(&pdev->dev,
867 "%s: firmware version %d.%d.%d unsupported\n",
868 fwname, _major(ver), _minor(ver), _build(ver));
869 return -EINVAL;
870 }
871
872 val = cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
873 netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios);
874 if ((__force u32)val != bios) {
875 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
876 fwname);
877 return -EINVAL;
878 }
879
880 /* check if flashed firmware is newer */
881 if (netxen_rom_fast_read(adapter,
882 NX_FW_VERSION_OFFSET, (int *)&val))
883 return -EIO;
884 val = NETXEN_DECODE_VERSION(val);
885 if (val > ver) {
886 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
887 fwname);
888 return -EINVAL;
889 }
890
891 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
892 return 0;
893 }
894
895 static int
896 netxen_p3_has_mn(struct netxen_adapter *adapter)
897 {
898 u32 capability, flashed_ver;
899 capability = 0;
900
901 netxen_rom_fast_read(adapter,
902 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
903 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
904
905 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
906
907 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
908 if (capability & NX_PEG_TUNE_MN_PRESENT)
909 return 1;
910 }
911 return 0;
912 }
913
914 void netxen_request_firmware(struct netxen_adapter *adapter)
915 {
916 u8 fw_type;
917 struct pci_dev *pdev = adapter->pdev;
918 int rc = 0;
919
920 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
921 fw_type = NX_P2_MN_ROMIMAGE;
922 goto request_fw;
923 }
924
925 fw_type = netxen_p3_has_mn(adapter) ?
926 NX_P3_MN_ROMIMAGE : NX_P3_CT_ROMIMAGE;
927
928 request_fw:
929 rc = request_firmware(&adapter->fw, fw_name[fw_type], &pdev->dev);
930 if (rc != 0) {
931 if (fw_type == NX_P3_MN_ROMIMAGE) {
932 msleep(1);
933 fw_type = NX_P3_CT_ROMIMAGE;
934 goto request_fw;
935 }
936
937 fw_type = NX_FLASH_ROMIMAGE;
938 adapter->fw = NULL;
939 goto done;
940 }
941
942 rc = netxen_validate_firmware(adapter, fw_name[fw_type]);
943 if (rc != 0) {
944 release_firmware(adapter->fw);
945
946 if (fw_type == NX_P3_MN_ROMIMAGE) {
947 msleep(1);
948 fw_type = NX_P3_CT_ROMIMAGE;
949 goto request_fw;
950 }
951
952 fw_type = NX_FLASH_ROMIMAGE;
953 adapter->fw = NULL;
954 goto done;
955 }
956
957 done:
958 adapter->fw_type = fw_type;
959 }
960
961
962 void
963 netxen_release_firmware(struct netxen_adapter *adapter)
964 {
965 if (adapter->fw)
966 release_firmware(adapter->fw);
967 }
968
969 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
970 {
971 u64 addr;
972 u32 hi, lo;
973
974 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
975 return 0;
976
977 adapter->dummy_dma.addr = pci_alloc_consistent(adapter->pdev,
978 NETXEN_HOST_DUMMY_DMA_SIZE,
979 &adapter->dummy_dma.phys_addr);
980 if (adapter->dummy_dma.addr == NULL) {
981 dev_err(&adapter->pdev->dev,
982 "ERROR: Could not allocate dummy DMA memory\n");
983 return -ENOMEM;
984 }
985
986 addr = (uint64_t) adapter->dummy_dma.phys_addr;
987 hi = (addr >> 32) & 0xffffffff;
988 lo = addr & 0xffffffff;
989
990 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
991 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
992
993 return 0;
994 }
995
996 /*
997 * NetXen DMA watchdog control:
998 *
999 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
1000 * Bit 1 : disable_request => 1 req disable dma watchdog
1001 * Bit 2 : enable_request => 1 req enable dma watchdog
1002 * Bit 3-31 : unused
1003 */
1004 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
1005 {
1006 int i = 100;
1007 u32 ctrl;
1008
1009 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1010 return;
1011
1012 if (!adapter->dummy_dma.addr)
1013 return;
1014
1015 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1016 if ((ctrl & 0x1) != 0) {
1017 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1018
1019 while ((ctrl & 0x1) != 0) {
1020
1021 msleep(50);
1022
1023 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1024
1025 if (--i == 0)
1026 break;
1027 };
1028 }
1029
1030 if (i) {
1031 pci_free_consistent(adapter->pdev,
1032 NETXEN_HOST_DUMMY_DMA_SIZE,
1033 adapter->dummy_dma.addr,
1034 adapter->dummy_dma.phys_addr);
1035 adapter->dummy_dma.addr = NULL;
1036 } else
1037 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
1038 }
1039
1040 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1041 {
1042 u32 val = 0;
1043 int retries = 60;
1044
1045 if (pegtune_val)
1046 return 0;
1047
1048 do {
1049 val = NXRD32(adapter, CRB_CMDPEG_STATE);
1050
1051 switch (val) {
1052 case PHAN_INITIALIZE_COMPLETE:
1053 case PHAN_INITIALIZE_ACK:
1054 return 0;
1055 case PHAN_INITIALIZE_FAILED:
1056 goto out_err;
1057 default:
1058 break;
1059 }
1060
1061 msleep(500);
1062
1063 } while (--retries);
1064
1065 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1066
1067 out_err:
1068 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1069 return -EIO;
1070 }
1071
1072 static int
1073 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1074 {
1075 u32 val = 0;
1076 int retries = 2000;
1077
1078 do {
1079 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1080
1081 if (val == PHAN_PEG_RCV_INITIALIZED)
1082 return 0;
1083
1084 msleep(10);
1085
1086 } while (--retries);
1087
1088 if (!retries) {
1089 printk(KERN_ERR "Receive Peg initialization not "
1090 "complete, state: 0x%x.\n", val);
1091 return -EIO;
1092 }
1093
1094 return 0;
1095 }
1096
1097 int netxen_init_firmware(struct netxen_adapter *adapter)
1098 {
1099 int err;
1100
1101 err = netxen_receive_peg_ready(adapter);
1102 if (err)
1103 return err;
1104
1105 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1106 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1107 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1108 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1109
1110 return err;
1111 }
1112
1113 static void
1114 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1115 {
1116 u32 cable_OUI;
1117 u16 cable_len;
1118 u16 link_speed;
1119 u8 link_status, module, duplex, autoneg;
1120 struct net_device *netdev = adapter->netdev;
1121
1122 adapter->has_link_events = 1;
1123
1124 cable_OUI = msg->body[1] & 0xffffffff;
1125 cable_len = (msg->body[1] >> 32) & 0xffff;
1126 link_speed = (msg->body[1] >> 48) & 0xffff;
1127
1128 link_status = msg->body[2] & 0xff;
1129 duplex = (msg->body[2] >> 16) & 0xff;
1130 autoneg = (msg->body[2] >> 24) & 0xff;
1131
1132 module = (msg->body[2] >> 8) & 0xff;
1133 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1134 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1135 netdev->name, cable_OUI, cable_len);
1136 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1137 printk(KERN_INFO "%s: unsupported cable length %d\n",
1138 netdev->name, cable_len);
1139 }
1140
1141 netxen_advert_link_change(adapter, link_status);
1142
1143 /* update link parameters */
1144 if (duplex == LINKEVENT_FULL_DUPLEX)
1145 adapter->link_duplex = DUPLEX_FULL;
1146 else
1147 adapter->link_duplex = DUPLEX_HALF;
1148 adapter->module_type = module;
1149 adapter->link_autoneg = autoneg;
1150 adapter->link_speed = link_speed;
1151 }
1152
1153 static void
1154 netxen_handle_fw_message(int desc_cnt, int index,
1155 struct nx_host_sds_ring *sds_ring)
1156 {
1157 nx_fw_msg_t msg;
1158 struct status_desc *desc;
1159 int i = 0, opcode;
1160
1161 while (desc_cnt > 0 && i < 8) {
1162 desc = &sds_ring->desc_head[index];
1163 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1164 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1165
1166 index = get_next_index(index, sds_ring->num_desc);
1167 desc_cnt--;
1168 }
1169
1170 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1171 switch (opcode) {
1172 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1173 netxen_handle_linkevent(sds_ring->adapter, &msg);
1174 break;
1175 default:
1176 break;
1177 }
1178 }
1179
1180 static int
1181 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1182 struct nx_host_rds_ring *rds_ring,
1183 struct netxen_rx_buffer *buffer)
1184 {
1185 struct sk_buff *skb;
1186 dma_addr_t dma;
1187 struct pci_dev *pdev = adapter->pdev;
1188
1189 buffer->skb = dev_alloc_skb(rds_ring->skb_size);
1190 if (!buffer->skb)
1191 return 1;
1192
1193 skb = buffer->skb;
1194
1195 if (!adapter->ahw.cut_through)
1196 skb_reserve(skb, 2);
1197
1198 dma = pci_map_single(pdev, skb->data,
1199 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1200
1201 if (pci_dma_mapping_error(pdev, dma)) {
1202 dev_kfree_skb_any(skb);
1203 buffer->skb = NULL;
1204 return 1;
1205 }
1206
1207 buffer->skb = skb;
1208 buffer->dma = dma;
1209 buffer->state = NETXEN_BUFFER_BUSY;
1210
1211 return 0;
1212 }
1213
1214 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1215 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1216 {
1217 struct netxen_rx_buffer *buffer;
1218 struct sk_buff *skb;
1219
1220 buffer = &rds_ring->rx_buf_arr[index];
1221
1222 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1223 PCI_DMA_FROMDEVICE);
1224
1225 skb = buffer->skb;
1226 if (!skb)
1227 goto no_skb;
1228
1229 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1230 adapter->stats.csummed++;
1231 skb->ip_summed = CHECKSUM_UNNECESSARY;
1232 } else
1233 skb->ip_summed = CHECKSUM_NONE;
1234
1235 skb->dev = adapter->netdev;
1236
1237 buffer->skb = NULL;
1238 no_skb:
1239 buffer->state = NETXEN_BUFFER_FREE;
1240 return skb;
1241 }
1242
1243 static struct netxen_rx_buffer *
1244 netxen_process_rcv(struct netxen_adapter *adapter,
1245 int ring, int index, int length, int cksum, int pkt_offset,
1246 struct nx_host_sds_ring *sds_ring)
1247 {
1248 struct net_device *netdev = adapter->netdev;
1249 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1250 struct netxen_rx_buffer *buffer;
1251 struct sk_buff *skb;
1252 struct nx_host_rds_ring *rds_ring = &recv_ctx->rds_rings[ring];
1253
1254 if (unlikely(index > rds_ring->num_desc))
1255 return NULL;
1256
1257 buffer = &rds_ring->rx_buf_arr[index];
1258
1259 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1260 if (!skb)
1261 return buffer;
1262
1263 if (length > rds_ring->skb_size)
1264 skb_put(skb, rds_ring->skb_size);
1265 else
1266 skb_put(skb, length);
1267
1268
1269 if (pkt_offset)
1270 skb_pull(skb, pkt_offset);
1271
1272 skb->protocol = eth_type_trans(skb, netdev);
1273
1274 napi_gro_receive(&sds_ring->napi, skb);
1275
1276 adapter->stats.no_rcv++;
1277 adapter->stats.rxbytes += length;
1278
1279 return buffer;
1280 }
1281
1282 #define netxen_merge_rx_buffers(list, head) \
1283 do { list_splice_tail_init(list, head); } while (0);
1284
1285 int
1286 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1287 {
1288 struct netxen_adapter *adapter = sds_ring->adapter;
1289
1290 struct list_head *cur;
1291
1292 struct status_desc *desc;
1293 struct netxen_rx_buffer *rxbuf;
1294
1295 u32 consumer = sds_ring->consumer;
1296
1297 int count = 0;
1298 u64 sts_data;
1299 int opcode, ring, index, length, cksum, pkt_offset, desc_cnt;
1300
1301 while (count < max) {
1302 desc = &sds_ring->desc_head[consumer];
1303 sts_data = le64_to_cpu(desc->status_desc_data[0]);
1304
1305 if (!(sts_data & STATUS_OWNER_HOST))
1306 break;
1307
1308 desc_cnt = netxen_get_sts_desc_cnt(sts_data);
1309 ring = netxen_get_sts_type(sts_data);
1310
1311 if (ring > RCV_RING_JUMBO)
1312 goto skip;
1313
1314 opcode = netxen_get_sts_opcode(sts_data);
1315
1316 switch (opcode) {
1317 case NETXEN_NIC_RXPKT_DESC:
1318 case NETXEN_OLD_RXPKT_DESC:
1319 case NETXEN_NIC_SYN_OFFLOAD:
1320 break;
1321 case NETXEN_NIC_RESPONSE_DESC:
1322 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1323 default:
1324 goto skip;
1325 }
1326
1327 WARN_ON(desc_cnt > 1);
1328
1329 index = netxen_get_sts_refhandle(sts_data);
1330 length = netxen_get_sts_totallength(sts_data);
1331 cksum = netxen_get_sts_status(sts_data);
1332 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1333
1334 rxbuf = netxen_process_rcv(adapter, ring, index,
1335 length, cksum, pkt_offset, sds_ring);
1336
1337 if (rxbuf)
1338 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1339
1340 skip:
1341 for (; desc_cnt > 0; desc_cnt--) {
1342 desc = &sds_ring->desc_head[consumer];
1343 desc->status_desc_data[0] =
1344 cpu_to_le64(STATUS_OWNER_PHANTOM);
1345 consumer = get_next_index(consumer, sds_ring->num_desc);
1346 }
1347 count++;
1348 }
1349
1350 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1351 struct nx_host_rds_ring *rds_ring =
1352 &adapter->recv_ctx.rds_rings[ring];
1353
1354 if (!list_empty(&sds_ring->free_list[ring])) {
1355 list_for_each(cur, &sds_ring->free_list[ring]) {
1356 rxbuf = list_entry(cur,
1357 struct netxen_rx_buffer, list);
1358 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1359 }
1360 spin_lock(&rds_ring->lock);
1361 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1362 &rds_ring->free_list);
1363 spin_unlock(&rds_ring->lock);
1364 }
1365
1366 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1367 }
1368
1369 if (count) {
1370 sds_ring->consumer = consumer;
1371 NXWR32(adapter, sds_ring->crb_sts_consumer, consumer);
1372 }
1373
1374 return count;
1375 }
1376
1377 /* Process Command status ring */
1378 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1379 {
1380 u32 sw_consumer, hw_consumer;
1381 int count = 0, i;
1382 struct netxen_cmd_buffer *buffer;
1383 struct pci_dev *pdev = adapter->pdev;
1384 struct net_device *netdev = adapter->netdev;
1385 struct netxen_skb_frag *frag;
1386 int done = 0;
1387 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1388
1389 if (!spin_trylock(&adapter->tx_clean_lock))
1390 return 1;
1391
1392 sw_consumer = tx_ring->sw_consumer;
1393 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1394
1395 while (sw_consumer != hw_consumer) {
1396 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1397 if (buffer->skb) {
1398 frag = &buffer->frag_array[0];
1399 pci_unmap_single(pdev, frag->dma, frag->length,
1400 PCI_DMA_TODEVICE);
1401 frag->dma = 0ULL;
1402 for (i = 1; i < buffer->frag_count; i++) {
1403 frag++; /* Get the next frag */
1404 pci_unmap_page(pdev, frag->dma, frag->length,
1405 PCI_DMA_TODEVICE);
1406 frag->dma = 0ULL;
1407 }
1408
1409 adapter->stats.xmitfinished++;
1410 dev_kfree_skb_any(buffer->skb);
1411 buffer->skb = NULL;
1412 }
1413
1414 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1415 if (++count >= MAX_STATUS_HANDLE)
1416 break;
1417 }
1418
1419 if (count && netif_running(netdev)) {
1420 tx_ring->sw_consumer = sw_consumer;
1421
1422 smp_mb();
1423
1424 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev)) {
1425 __netif_tx_lock(tx_ring->txq, smp_processor_id());
1426 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1427 netif_wake_queue(netdev);
1428 __netif_tx_unlock(tx_ring->txq);
1429 }
1430 }
1431 /*
1432 * If everything is freed up to consumer then check if the ring is full
1433 * If the ring is full then check if more needs to be freed and
1434 * schedule the call back again.
1435 *
1436 * This happens when there are 2 CPUs. One could be freeing and the
1437 * other filling it. If the ring is full when we get out of here and
1438 * the card has already interrupted the host then the host can miss the
1439 * interrupt.
1440 *
1441 * There is still a possible race condition and the host could miss an
1442 * interrupt. The card has to take care of this.
1443 */
1444 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1445 done = (sw_consumer == hw_consumer);
1446 spin_unlock(&adapter->tx_clean_lock);
1447
1448 return (done);
1449 }
1450
1451 void
1452 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1453 struct nx_host_rds_ring *rds_ring)
1454 {
1455 struct rcv_desc *pdesc;
1456 struct netxen_rx_buffer *buffer;
1457 int producer, count = 0;
1458 netxen_ctx_msg msg = 0;
1459 struct list_head *head;
1460
1461 producer = rds_ring->producer;
1462
1463 spin_lock(&rds_ring->lock);
1464 head = &rds_ring->free_list;
1465 while (!list_empty(head)) {
1466
1467 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1468
1469 if (!buffer->skb) {
1470 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1471 break;
1472 }
1473
1474 count++;
1475 list_del(&buffer->list);
1476
1477 /* make a rcv descriptor */
1478 pdesc = &rds_ring->desc_head[producer];
1479 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1480 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1481 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1482
1483 producer = get_next_index(producer, rds_ring->num_desc);
1484 }
1485 spin_unlock(&rds_ring->lock);
1486
1487 if (count) {
1488 rds_ring->producer = producer;
1489 NXWR32(adapter, rds_ring->crb_rcv_producer,
1490 (producer-1) & (rds_ring->num_desc-1));
1491
1492 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1493 /*
1494 * Write a doorbell msg to tell phanmon of change in
1495 * receive ring producer
1496 * Only for firmware version < 4.0.0
1497 */
1498 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1499 netxen_set_msg_privid(msg);
1500 netxen_set_msg_count(msg,
1501 ((producer - 1) &
1502 (rds_ring->num_desc - 1)));
1503 netxen_set_msg_ctxid(msg, adapter->portnum);
1504 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1505 writel(msg,
1506 DB_NORMALIZE(adapter,
1507 NETXEN_RCV_PRODUCER_OFFSET));
1508 }
1509 }
1510 }
1511
1512 static void
1513 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1514 struct nx_host_rds_ring *rds_ring)
1515 {
1516 struct rcv_desc *pdesc;
1517 struct netxen_rx_buffer *buffer;
1518 int producer, count = 0;
1519 struct list_head *head;
1520
1521 producer = rds_ring->producer;
1522 if (!spin_trylock(&rds_ring->lock))
1523 return;
1524
1525 head = &rds_ring->free_list;
1526 while (!list_empty(head)) {
1527
1528 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1529
1530 if (!buffer->skb) {
1531 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1532 break;
1533 }
1534
1535 count++;
1536 list_del(&buffer->list);
1537
1538 /* make a rcv descriptor */
1539 pdesc = &rds_ring->desc_head[producer];
1540 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1541 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1542 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1543
1544 producer = get_next_index(producer, rds_ring->num_desc);
1545 }
1546
1547 if (count) {
1548 rds_ring->producer = producer;
1549 NXWR32(adapter, rds_ring->crb_rcv_producer,
1550 (producer - 1) & (rds_ring->num_desc - 1));
1551 }
1552 spin_unlock(&rds_ring->lock);
1553 }
1554
1555 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1556 {
1557 memset(&adapter->stats, 0, sizeof(adapter->stats));
1558 return;
1559 }
1560
Linus' kernel tree