2 * arch/blackfin/kernel/setup.c
4 * Copyright 2004-2006 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/delay.h>
12 #include <linux/console.h>
13 #include <linux/bootmem.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
16 #include <linux/module.h>
17 #include <linux/tty.h>
18 #include <linux/pfn.h>
20 #include <linux/ext2_fs.h>
21 #include <linux/cramfs_fs.h>
22 #include <linux/romfs_fs.h>
25 #include <asm/cacheflush.h>
26 #include <asm/blackfin.h>
27 #include <asm/cplbinit.h>
28 #include <asm/div64.h>
30 #include <asm/fixed_code.h>
31 #include <asm/early_printk.h>
34 EXPORT_SYMBOL(_bfin_swrst
);
36 unsigned long memory_start
, memory_end
, physical_mem_end
;
37 unsigned long _rambase
, _ramstart
, _ramend
;
38 unsigned long reserved_mem_dcache_on
;
39 unsigned long reserved_mem_icache_on
;
40 EXPORT_SYMBOL(memory_start
);
41 EXPORT_SYMBOL(memory_end
);
42 EXPORT_SYMBOL(physical_mem_end
);
43 EXPORT_SYMBOL(_ramend
);
44 EXPORT_SYMBOL(reserved_mem_dcache_on
);
46 #ifdef CONFIG_MTD_UCLINUX
47 unsigned long memory_mtd_end
, memory_mtd_start
, mtd_size
;
49 EXPORT_SYMBOL(memory_mtd_end
);
50 EXPORT_SYMBOL(memory_mtd_start
);
51 EXPORT_SYMBOL(mtd_size
);
54 char __initdata command_line
[COMMAND_LINE_SIZE
];
55 void __initdata
*init_retx
, *init_saved_retx
, *init_saved_seqstat
,
56 *init_saved_icplb_fault_addr
, *init_saved_dcplb_fault_addr
;
58 /* boot memmap, for parsing "memmap=" */
59 #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
60 #define BFIN_MEMMAP_RAM 1
61 #define BFIN_MEMMAP_RESERVED 2
64 struct bfin_memmap_entry
{
65 unsigned long long addr
; /* start of memory segment */
66 unsigned long long size
;
68 } map
[BFIN_MEMMAP_MAX
];
69 } bfin_memmap __initdata
;
71 /* for memmap sanitization */
72 struct change_member
{
73 struct bfin_memmap_entry
*pentry
; /* pointer to original entry */
74 unsigned long long addr
; /* address for this change point */
76 static struct change_member change_point_list
[2*BFIN_MEMMAP_MAX
] __initdata
;
77 static struct change_member
*change_point
[2*BFIN_MEMMAP_MAX
] __initdata
;
78 static struct bfin_memmap_entry
*overlap_list
[BFIN_MEMMAP_MAX
] __initdata
;
79 static struct bfin_memmap_entry new_map
[BFIN_MEMMAP_MAX
] __initdata
;
81 DEFINE_PER_CPU(struct blackfin_cpudata
, cpu_data
);
83 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
84 void __init
generate_cplb_tables(void)
88 /* Generate per-CPU I&D CPLB tables */
89 for (cpu
= 0; cpu
< num_possible_cpus(); ++cpu
)
90 generate_cplb_tables_cpu(cpu
);
94 void __cpuinit
bfin_setup_caches(unsigned int cpu
)
96 #ifdef CONFIG_BFIN_ICACHE
98 bfin_icache_init(icplb_tbl
[cpu
]);
100 bfin_icache_init(icplb_tables
[cpu
]);
104 #ifdef CONFIG_BFIN_DCACHE
106 bfin_dcache_init(dcplb_tbl
[cpu
]);
108 bfin_dcache_init(dcplb_tables
[cpu
]);
113 * In cache coherence emulation mode, we need to have the
114 * D-cache enabled before running any atomic operation which
115 * might invove cache invalidation (i.e. spinlock, rwlock).
116 * So printk's are deferred until then.
118 #ifdef CONFIG_BFIN_ICACHE
119 printk(KERN_INFO
"Instruction Cache Enabled for CPU%u\n", cpu
);
121 #ifdef CONFIG_BFIN_DCACHE
122 printk(KERN_INFO
"Data Cache Enabled for CPU%u"
123 # if defined CONFIG_BFIN_WB
125 # elif defined CONFIG_BFIN_WT
132 void __cpuinit
bfin_setup_cpudata(unsigned int cpu
)
134 struct blackfin_cpudata
*cpudata
= &per_cpu(cpu_data
, cpu
);
136 cpudata
->idle
= current
;
137 cpudata
->loops_per_jiffy
= loops_per_jiffy
;
138 cpudata
->imemctl
= bfin_read_IMEM_CONTROL();
139 cpudata
->dmemctl
= bfin_read_DMEM_CONTROL();
142 void __init
bfin_cache_init(void)
144 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
145 generate_cplb_tables();
147 bfin_setup_caches(0);
150 void __init
bfin_relocate_l1_mem(void)
152 unsigned long l1_code_length
;
153 unsigned long l1_data_a_length
;
154 unsigned long l1_data_b_length
;
155 unsigned long l2_length
;
157 blackfin_dma_early_init();
159 l1_code_length
= _etext_l1
- _stext_l1
;
160 if (l1_code_length
> L1_CODE_LENGTH
)
161 panic("L1 Instruction SRAM Overflow\n");
162 /* cannot complain as printk is not available as yet.
163 * But we can continue booting and complain later!
166 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
167 dma_memcpy(_stext_l1
, _l1_lma_start
, l1_code_length
);
169 l1_data_a_length
= _sbss_l1
- _sdata_l1
;
170 if (l1_data_a_length
> L1_DATA_A_LENGTH
)
171 panic("L1 Data SRAM Bank A Overflow\n");
173 /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
174 dma_memcpy(_sdata_l1
, _l1_lma_start
+ l1_code_length
, l1_data_a_length
);
176 l1_data_b_length
= _sbss_b_l1
- _sdata_b_l1
;
177 if (l1_data_b_length
> L1_DATA_B_LENGTH
)
178 panic("L1 Data SRAM Bank B Overflow\n");
180 /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
181 dma_memcpy(_sdata_b_l1
, _l1_lma_start
+ l1_code_length
+
182 l1_data_a_length
, l1_data_b_length
);
184 if (L2_LENGTH
!= 0) {
185 l2_length
= _sbss_l2
- _stext_l2
;
186 if (l2_length
> L2_LENGTH
)
187 panic("L2 SRAM Overflow\n");
189 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
190 dma_memcpy(_stext_l2
, _l2_lma_start
, l2_length
);
194 /* add_memory_region to memmap */
195 static void __init
add_memory_region(unsigned long long start
,
196 unsigned long long size
, int type
)
200 i
= bfin_memmap
.nr_map
;
202 if (i
== BFIN_MEMMAP_MAX
) {
203 printk(KERN_ERR
"Ooops! Too many entries in the memory map!\n");
207 bfin_memmap
.map
[i
].addr
= start
;
208 bfin_memmap
.map
[i
].size
= size
;
209 bfin_memmap
.map
[i
].type
= type
;
210 bfin_memmap
.nr_map
++;
214 * Sanitize the boot memmap, removing overlaps.
216 static int __init
sanitize_memmap(struct bfin_memmap_entry
*map
, int *pnr_map
)
218 struct change_member
*change_tmp
;
219 unsigned long current_type
, last_type
;
220 unsigned long long last_addr
;
221 int chgidx
, still_changing
;
224 int old_nr
, new_nr
, chg_nr
;
228 Visually we're performing the following (1,2,3,4 = memory types)
230 Sample memory map (w/overlaps):
231 ____22__________________
232 ______________________4_
233 ____1111________________
234 _44_____________________
235 11111111________________
236 ____________________33__
237 ___________44___________
238 __________33333_________
239 ______________22________
240 ___________________2222_
241 _________111111111______
242 _____________________11_
243 _________________4______
245 Sanitized equivalent (no overlap):
246 1_______________________
247 _44_____________________
248 ___1____________________
249 ____22__________________
250 ______11________________
251 _________1______________
252 __________3_____________
253 ___________44___________
254 _____________33_________
255 _______________2________
256 ________________1_______
257 _________________4______
258 ___________________2____
259 ____________________33__
260 ______________________4_
262 /* if there's only one memory region, don't bother */
268 /* bail out if we find any unreasonable addresses in memmap */
269 for (i
= 0; i
< old_nr
; i
++)
270 if (map
[i
].addr
+ map
[i
].size
< map
[i
].addr
)
273 /* create pointers for initial change-point information (for sorting) */
274 for (i
= 0; i
< 2*old_nr
; i
++)
275 change_point
[i
] = &change_point_list
[i
];
277 /* record all known change-points (starting and ending addresses),
278 omitting those that are for empty memory regions */
280 for (i
= 0; i
< old_nr
; i
++) {
281 if (map
[i
].size
!= 0) {
282 change_point
[chgidx
]->addr
= map
[i
].addr
;
283 change_point
[chgidx
++]->pentry
= &map
[i
];
284 change_point
[chgidx
]->addr
= map
[i
].addr
+ map
[i
].size
;
285 change_point
[chgidx
++]->pentry
= &map
[i
];
288 chg_nr
= chgidx
; /* true number of change-points */
290 /* sort change-point list by memory addresses (low -> high) */
292 while (still_changing
) {
294 for (i
= 1; i
< chg_nr
; i
++) {
295 /* if <current_addr> > <last_addr>, swap */
296 /* or, if current=<start_addr> & last=<end_addr>, swap */
297 if ((change_point
[i
]->addr
< change_point
[i
-1]->addr
) ||
298 ((change_point
[i
]->addr
== change_point
[i
-1]->addr
) &&
299 (change_point
[i
]->addr
== change_point
[i
]->pentry
->addr
) &&
300 (change_point
[i
-1]->addr
!= change_point
[i
-1]->pentry
->addr
))
302 change_tmp
= change_point
[i
];
303 change_point
[i
] = change_point
[i
-1];
304 change_point
[i
-1] = change_tmp
;
310 /* create a new memmap, removing overlaps */
311 overlap_entries
= 0; /* number of entries in the overlap table */
312 new_entry
= 0; /* index for creating new memmap entries */
313 last_type
= 0; /* start with undefined memory type */
314 last_addr
= 0; /* start with 0 as last starting address */
315 /* loop through change-points, determining affect on the new memmap */
316 for (chgidx
= 0; chgidx
< chg_nr
; chgidx
++) {
317 /* keep track of all overlapping memmap entries */
318 if (change_point
[chgidx
]->addr
== change_point
[chgidx
]->pentry
->addr
) {
319 /* add map entry to overlap list (> 1 entry implies an overlap) */
320 overlap_list
[overlap_entries
++] = change_point
[chgidx
]->pentry
;
322 /* remove entry from list (order independent, so swap with last) */
323 for (i
= 0; i
< overlap_entries
; i
++) {
324 if (overlap_list
[i
] == change_point
[chgidx
]->pentry
)
325 overlap_list
[i
] = overlap_list
[overlap_entries
-1];
329 /* if there are overlapping entries, decide which "type" to use */
330 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
332 for (i
= 0; i
< overlap_entries
; i
++)
333 if (overlap_list
[i
]->type
> current_type
)
334 current_type
= overlap_list
[i
]->type
;
335 /* continue building up new memmap based on this information */
336 if (current_type
!= last_type
) {
337 if (last_type
!= 0) {
338 new_map
[new_entry
].size
=
339 change_point
[chgidx
]->addr
- last_addr
;
340 /* move forward only if the new size was non-zero */
341 if (new_map
[new_entry
].size
!= 0)
342 if (++new_entry
>= BFIN_MEMMAP_MAX
)
343 break; /* no more space left for new entries */
345 if (current_type
!= 0) {
346 new_map
[new_entry
].addr
= change_point
[chgidx
]->addr
;
347 new_map
[new_entry
].type
= current_type
;
348 last_addr
= change_point
[chgidx
]->addr
;
350 last_type
= current_type
;
353 new_nr
= new_entry
; /* retain count for new entries */
355 /* copy new mapping into original location */
356 memcpy(map
, new_map
, new_nr
*sizeof(struct bfin_memmap_entry
));
362 static void __init
print_memory_map(char *who
)
366 for (i
= 0; i
< bfin_memmap
.nr_map
; i
++) {
367 printk(KERN_DEBUG
" %s: %016Lx - %016Lx ", who
,
368 bfin_memmap
.map
[i
].addr
,
369 bfin_memmap
.map
[i
].addr
+ bfin_memmap
.map
[i
].size
);
370 switch (bfin_memmap
.map
[i
].type
) {
371 case BFIN_MEMMAP_RAM
:
372 printk("(usable)\n");
374 case BFIN_MEMMAP_RESERVED
:
375 printk("(reserved)\n");
377 default: printk("type %lu\n", bfin_memmap
.map
[i
].type
);
383 static __init
int parse_memmap(char *arg
)
385 unsigned long long start_at
, mem_size
;
390 mem_size
= memparse(arg
, &arg
);
392 start_at
= memparse(arg
+1, &arg
);
393 add_memory_region(start_at
, mem_size
, BFIN_MEMMAP_RAM
);
394 } else if (*arg
== '$') {
395 start_at
= memparse(arg
+1, &arg
);
396 add_memory_region(start_at
, mem_size
, BFIN_MEMMAP_RESERVED
);
403 * Initial parsing of the command line. Currently, we support:
404 * - Controlling the linux memory size: mem=xxx[KMG]
405 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
406 * $ -> reserved memory is dcacheable
407 * # -> reserved memory is icacheable
408 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
409 * @ from <start> to <start>+<mem>, type RAM
410 * $ from <start> to <start>+<mem>, type RESERVED
412 static __init
void parse_cmdline_early(char *cmdline_p
)
414 char c
= ' ', *to
= cmdline_p
;
415 unsigned int memsize
;
418 if (!memcmp(to
, "mem=", 4)) {
420 memsize
= memparse(to
, &to
);
424 } else if (!memcmp(to
, "max_mem=", 8)) {
426 memsize
= memparse(to
, &to
);
428 physical_mem_end
= memsize
;
432 reserved_mem_dcache_on
= 1;
435 reserved_mem_icache_on
= 1;
438 } else if (!memcmp(to
, "earlyprintk=", 12)) {
440 setup_early_printk(to
);
441 } else if (!memcmp(to
, "memmap=", 7)) {
453 * Setup memory defaults from user config.
454 * The physical memory layout looks like:
456 * [_rambase, _ramstart]: kernel image
457 * [memory_start, memory_end]: dynamic memory managed by kernel
458 * [memory_end, _ramend]: reserved memory
459 * [memory_mtd_start(memory_end),
460 * memory_mtd_start + mtd_size]: rootfs (if any)
461 * [_ramend - DMA_UNCACHED_REGION,
462 * _ramend]: uncached DMA region
463 * [_ramend, physical_mem_end]: memory not managed by kernel
465 static __init
void memory_setup(void)
467 #ifdef CONFIG_MTD_UCLINUX
468 unsigned long mtd_phys
= 0;
471 _rambase
= (unsigned long)_stext
;
472 _ramstart
= (unsigned long)_end
;
474 if (DMA_UNCACHED_REGION
> (_ramend
- _ramstart
)) {
476 panic("DMA region exceeds memory limit: %lu.\n",
477 _ramend
- _ramstart
);
479 memory_end
= _ramend
- DMA_UNCACHED_REGION
;
482 /* Round up to multiple of 4MB */
483 memory_start
= (_ramstart
+ 0x3fffff) & ~0x3fffff;
485 memory_start
= PAGE_ALIGN(_ramstart
);
488 #if defined(CONFIG_MTD_UCLINUX)
489 /* generic memory mapped MTD driver */
490 memory_mtd_end
= memory_end
;
492 mtd_phys
= _ramstart
;
493 mtd_size
= PAGE_ALIGN(*((unsigned long *)(mtd_phys
+ 8)));
495 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
496 if (*((unsigned short *)(mtd_phys
+ 0x438)) == EXT2_SUPER_MAGIC
)
498 PAGE_ALIGN(*((unsigned long *)(mtd_phys
+ 0x404)) << 10);
501 # if defined(CONFIG_CRAMFS)
502 if (*((unsigned long *)(mtd_phys
)) == CRAMFS_MAGIC
)
503 mtd_size
= PAGE_ALIGN(*((unsigned long *)(mtd_phys
+ 0x4)));
506 # if defined(CONFIG_ROMFS_FS)
507 if (((unsigned long *)mtd_phys
)[0] == ROMSB_WORD0
508 && ((unsigned long *)mtd_phys
)[1] == ROMSB_WORD1
)
510 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys
)[2]));
511 # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
512 /* Due to a Hardware Anomaly we need to limit the size of usable
513 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
514 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
516 # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
517 if (memory_end
>= 56 * 1024 * 1024)
518 memory_end
= 56 * 1024 * 1024;
520 if (memory_end
>= 60 * 1024 * 1024)
521 memory_end
= 60 * 1024 * 1024;
522 # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
523 # endif /* ANOMALY_05000263 */
524 # endif /* CONFIG_ROMFS_FS */
526 memory_end
-= mtd_size
;
530 panic("Don't boot kernel without rootfs attached.\n");
533 /* Relocate MTD image to the top of memory after the uncached memory area */
534 dma_memcpy((char *)memory_end
, _end
, mtd_size
);
536 memory_mtd_start
= memory_end
;
537 _ebss
= memory_mtd_start
; /* define _ebss for compatible */
538 #endif /* CONFIG_MTD_UCLINUX */
540 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
541 /* Due to a Hardware Anomaly we need to limit the size of usable
542 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
543 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
545 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
546 if (memory_end
>= 56 * 1024 * 1024)
547 memory_end
= 56 * 1024 * 1024;
549 if (memory_end
>= 60 * 1024 * 1024)
550 memory_end
= 60 * 1024 * 1024;
551 #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
552 printk(KERN_NOTICE
"Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end
>> 20);
553 #endif /* ANOMALY_05000263 */
556 page_mask_nelts
= ((_ramend
>> PAGE_SHIFT
) + 31) / 32;
557 page_mask_order
= get_order(3 * page_mask_nelts
* sizeof(long));
560 #if !defined(CONFIG_MTD_UCLINUX)
561 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
562 memory_end
-= SIZE_4K
;
565 init_mm
.start_code
= (unsigned long)_stext
;
566 init_mm
.end_code
= (unsigned long)_etext
;
567 init_mm
.end_data
= (unsigned long)_edata
;
568 init_mm
.brk
= (unsigned long)0;
570 printk(KERN_INFO
"Board Memory: %ldMB\n", physical_mem_end
>> 20);
571 printk(KERN_INFO
"Kernel Managed Memory: %ldMB\n", _ramend
>> 20);
573 printk(KERN_INFO
"Memory map:\n"
574 KERN_INFO
" fixedcode = 0x%p-0x%p\n"
575 KERN_INFO
" text = 0x%p-0x%p\n"
576 KERN_INFO
" rodata = 0x%p-0x%p\n"
577 KERN_INFO
" bss = 0x%p-0x%p\n"
578 KERN_INFO
" data = 0x%p-0x%p\n"
579 KERN_INFO
" stack = 0x%p-0x%p\n"
580 KERN_INFO
" init = 0x%p-0x%p\n"
581 KERN_INFO
" available = 0x%p-0x%p\n"
582 #ifdef CONFIG_MTD_UCLINUX
583 KERN_INFO
" rootfs = 0x%p-0x%p\n"
585 #if DMA_UNCACHED_REGION > 0
586 KERN_INFO
" DMA Zone = 0x%p-0x%p\n"
588 , (void *)FIXED_CODE_START
, (void *)FIXED_CODE_END
,
590 __start_rodata
, __end_rodata
,
591 __bss_start
, __bss_stop
,
593 (void *)&init_thread_union
,
594 (void *)((int)(&init_thread_union
) + 0x2000),
595 __init_begin
, __init_end
,
596 (void *)_ramstart
, (void *)memory_end
597 #ifdef CONFIG_MTD_UCLINUX
598 , (void *)memory_mtd_start
, (void *)(memory_mtd_start
+ mtd_size
)
600 #if DMA_UNCACHED_REGION > 0
601 , (void *)(_ramend
- DMA_UNCACHED_REGION
), (void *)(_ramend
)
607 * Find the lowest, highest page frame number we have available
609 void __init
find_min_max_pfn(void)
614 min_low_pfn
= memory_end
;
616 for (i
= 0; i
< bfin_memmap
.nr_map
; i
++) {
617 unsigned long start
, end
;
619 if (bfin_memmap
.map
[i
].type
!= BFIN_MEMMAP_RAM
)
621 start
= PFN_UP(bfin_memmap
.map
[i
].addr
);
622 end
= PFN_DOWN(bfin_memmap
.map
[i
].addr
+
623 bfin_memmap
.map
[i
].size
);
628 if (start
< min_low_pfn
)
633 static __init
void setup_bootmem_allocator(void)
637 unsigned long start_pfn
, end_pfn
;
638 unsigned long curr_pfn
, last_pfn
, size
;
640 /* mark memory between memory_start and memory_end usable */
641 add_memory_region(memory_start
,
642 memory_end
- memory_start
, BFIN_MEMMAP_RAM
);
643 /* sanity check for overlap */
644 sanitize_memmap(bfin_memmap
.map
, &bfin_memmap
.nr_map
);
645 print_memory_map("boot memmap");
647 /* intialize globals in linux/bootmem.h */
649 /* pfn of the last usable page frame */
650 if (max_pfn
> memory_end
>> PAGE_SHIFT
)
651 max_pfn
= memory_end
>> PAGE_SHIFT
;
652 /* pfn of last page frame directly mapped by kernel */
653 max_low_pfn
= max_pfn
;
654 /* pfn of the first usable page frame after kernel image*/
655 if (min_low_pfn
< memory_start
>> PAGE_SHIFT
)
656 min_low_pfn
= memory_start
>> PAGE_SHIFT
;
658 start_pfn
= PAGE_OFFSET
>> PAGE_SHIFT
;
659 end_pfn
= memory_end
>> PAGE_SHIFT
;
662 * give all the memory to the bootmap allocator, tell it to put the
663 * boot mem_map at the start of memory.
665 bootmap_size
= init_bootmem_node(NODE_DATA(0),
666 memory_start
>> PAGE_SHIFT
, /* map goes here */
669 /* register the memmap regions with the bootmem allocator */
670 for (i
= 0; i
< bfin_memmap
.nr_map
; i
++) {
672 * Reserve usable memory
674 if (bfin_memmap
.map
[i
].type
!= BFIN_MEMMAP_RAM
)
677 * We are rounding up the start address of usable memory:
679 curr_pfn
= PFN_UP(bfin_memmap
.map
[i
].addr
);
680 if (curr_pfn
>= end_pfn
)
683 * ... and at the end of the usable range downwards:
685 last_pfn
= PFN_DOWN(bfin_memmap
.map
[i
].addr
+
686 bfin_memmap
.map
[i
].size
);
688 if (last_pfn
> end_pfn
)
692 * .. finally, did all the rounding and playing
693 * around just make the area go away?
695 if (last_pfn
<= curr_pfn
)
698 size
= last_pfn
- curr_pfn
;
699 free_bootmem(PFN_PHYS(curr_pfn
), PFN_PHYS(size
));
702 /* reserve memory before memory_start, including bootmap */
703 reserve_bootmem(PAGE_OFFSET
,
704 memory_start
+ bootmap_size
+ PAGE_SIZE
- 1 - PAGE_OFFSET
,
708 #define EBSZ_TO_MEG(ebsz) \
711 switch (ebsz & 0xf) { \
712 case 0x1: meg = 16; break; \
713 case 0x3: meg = 32; break; \
714 case 0x5: meg = 64; break; \
715 case 0x7: meg = 128; break; \
716 case 0x9: meg = 256; break; \
717 case 0xb: meg = 512; break; \
721 static inline int __init
get_mem_size(void)
723 #if defined(EBIU_SDBCTL)
724 # if defined(BF561_FAMILY)
726 u32 sdbctl
= bfin_read_EBIU_SDBCTL();
727 ret
+= EBSZ_TO_MEG(sdbctl
>> 0);
728 ret
+= EBSZ_TO_MEG(sdbctl
>> 8);
729 ret
+= EBSZ_TO_MEG(sdbctl
>> 16);
730 ret
+= EBSZ_TO_MEG(sdbctl
>> 24);
733 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
735 #elif defined(EBIU_DDRCTL1)
736 u32 ddrctl
= bfin_read_EBIU_DDRCTL1();
738 switch (ddrctl
& 0xc0000) {
739 case DEVSZ_64
: ret
= 64 / 8;
740 case DEVSZ_128
: ret
= 128 / 8;
741 case DEVSZ_256
: ret
= 256 / 8;
742 case DEVSZ_512
: ret
= 512 / 8;
744 switch (ddrctl
& 0x30000) {
745 case DEVWD_4
: ret
*= 2;
746 case DEVWD_8
: ret
*= 2;
747 case DEVWD_16
: break;
749 if ((ddrctl
& 0xc000) == 0x4000)
756 void __init
setup_arch(char **cmdline_p
)
758 unsigned long sclk
, cclk
;
760 #ifdef CONFIG_DUMMY_CONSOLE
761 conswitchp
= &dummy_con
;
764 #if defined(CONFIG_CMDLINE_BOOL)
765 strncpy(&command_line
[0], CONFIG_CMDLINE
, sizeof(command_line
));
766 command_line
[sizeof(command_line
) - 1] = 0;
769 /* Keep a copy of command line */
770 *cmdline_p
= &command_line
[0];
771 memcpy(boot_command_line
, command_line
, COMMAND_LINE_SIZE
);
772 boot_command_line
[COMMAND_LINE_SIZE
- 1] = '\0';
774 /* setup memory defaults from the user config */
775 physical_mem_end
= 0;
776 _ramend
= get_mem_size() * 1024 * 1024;
778 memset(&bfin_memmap
, 0, sizeof(bfin_memmap
));
780 parse_cmdline_early(&command_line
[0]);
782 if (physical_mem_end
== 0)
783 physical_mem_end
= _ramend
;
787 /* Initialize Async memory banks */
788 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL
);
789 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL
);
790 bfin_write_EBIU_AMGCTL(AMGCTLVAL
);
791 #ifdef CONFIG_EBIU_MBSCTLVAL
792 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL
);
793 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL
);
794 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL
);
800 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
801 if (ANOMALY_05000273
&& cclk
== sclk
)
802 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
806 if (ANOMALY_05000266
) {
807 bfin_read_IMDMA_D0_IRQ_STATUS();
808 bfin_read_IMDMA_D1_IRQ_STATUS();
811 printk(KERN_INFO
"Hardware Trace ");
812 if (bfin_read_TBUFCTL() & 0x1)
816 if (bfin_read_TBUFCTL() & 0x2)
817 printk("and Enabled\n");
819 printk("and Disabled\n");
821 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
822 /* we need to initialize the Flashrom device here since we might
823 * do things with flash early on in the boot
828 _bfin_swrst
= bfin_read_SWRST();
830 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
831 bfin_write_SWRST(_bfin_swrst
& ~DOUBLE_FAULT
);
833 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
834 bfin_write_SWRST(_bfin_swrst
| DOUBLE_FAULT
);
838 if (_bfin_swrst
& SWRST_DBL_FAULT_A
) {
840 if (_bfin_swrst
& RESET_DOUBLE
) {
842 printk(KERN_EMERG
"Recovering from DOUBLE FAULT event\n");
843 #ifdef CONFIG_DEBUG_DOUBLEFAULT
844 /* We assume the crashing kernel, and the current symbol table match */
845 printk(KERN_EMERG
" While handling exception (EXCAUSE = 0x%x) at %pF\n",
846 (int)init_saved_seqstat
& SEQSTAT_EXCAUSE
, init_saved_retx
);
847 printk(KERN_NOTICE
" DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr
);
848 printk(KERN_NOTICE
" ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr
);
850 printk(KERN_NOTICE
" The instruction at %pF caused a double exception\n",
852 } else if (_bfin_swrst
& RESET_WDOG
)
853 printk(KERN_INFO
"Recovering from Watchdog event\n");
854 else if (_bfin_swrst
& RESET_SOFTWARE
)
855 printk(KERN_NOTICE
"Reset caused by Software reset\n");
857 printk(KERN_INFO
"Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
858 if (bfin_compiled_revid() == 0xffff)
859 printk(KERN_INFO
"Compiled for ADSP-%s Rev any\n", CPU
);
860 else if (bfin_compiled_revid() == -1)
861 printk(KERN_INFO
"Compiled for ADSP-%s Rev none\n", CPU
);
863 printk(KERN_INFO
"Compiled for ADSP-%s Rev 0.%d\n", CPU
, bfin_compiled_revid());
865 if (unlikely(CPUID
!= bfin_cpuid()))
866 printk(KERN_ERR
"ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
867 CPU
, bfin_cpuid(), bfin_revid());
869 if (bfin_revid() != bfin_compiled_revid()) {
870 if (bfin_compiled_revid() == -1)
871 printk(KERN_ERR
"Warning: Compiled for Rev none, but running on Rev %d\n",
873 else if (bfin_compiled_revid() != 0xffff)
874 printk(KERN_ERR
"Warning: Compiled for Rev %d, but running on Rev %d\n",
875 bfin_compiled_revid(), bfin_revid());
877 if (bfin_revid() < CONFIG_BF_REV_MIN
|| bfin_revid() > CONFIG_BF_REV_MAX
)
878 printk(KERN_ERR
"Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
882 printk(KERN_INFO
"Blackfin Linux support by http://blackfin.uclinux.org/\n");
884 printk(KERN_INFO
"Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
885 cclk
/ 1000000, sclk
/ 1000000);
887 if (ANOMALY_05000273
&& (cclk
>> 1) <= sclk
)
888 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
890 setup_bootmem_allocator();
894 /* Copy atomic sequences to their fixed location, and sanity check that
895 these locations are the ones that we advertise to userspace. */
896 memcpy((void *)FIXED_CODE_START
, &fixed_code_start
,
897 FIXED_CODE_END
- FIXED_CODE_START
);
898 BUG_ON((char *)&sigreturn_stub
- (char *)&fixed_code_start
899 != SIGRETURN_STUB
- FIXED_CODE_START
);
900 BUG_ON((char *)&atomic_xchg32
- (char *)&fixed_code_start
901 != ATOMIC_XCHG32
- FIXED_CODE_START
);
902 BUG_ON((char *)&atomic_cas32
- (char *)&fixed_code_start
903 != ATOMIC_CAS32
- FIXED_CODE_START
);
904 BUG_ON((char *)&atomic_add32
- (char *)&fixed_code_start
905 != ATOMIC_ADD32
- FIXED_CODE_START
);
906 BUG_ON((char *)&atomic_sub32
- (char *)&fixed_code_start
907 != ATOMIC_SUB32
- FIXED_CODE_START
);
908 BUG_ON((char *)&atomic_ior32
- (char *)&fixed_code_start
909 != ATOMIC_IOR32
- FIXED_CODE_START
);
910 BUG_ON((char *)&atomic_and32
- (char *)&fixed_code_start
911 != ATOMIC_AND32
- FIXED_CODE_START
);
912 BUG_ON((char *)&atomic_xor32
- (char *)&fixed_code_start
913 != ATOMIC_XOR32
- FIXED_CODE_START
);
914 BUG_ON((char *)&safe_user_instruction
- (char *)&fixed_code_start
915 != SAFE_USER_INSTRUCTION
- FIXED_CODE_START
);
918 platform_init_cpus();
920 init_exception_vectors();
921 bfin_cache_init(); /* Initialize caches for the boot CPU */
924 static int __init
topology_init(void)
927 /* Record CPU-private information for the boot processor. */
928 bfin_setup_cpudata(0);
930 for_each_possible_cpu(cpu
) {
931 register_cpu(&per_cpu(cpu_data
, cpu
).cpu
, cpu
);
937 subsys_initcall(topology_init
);
939 /* Get the voltage input multiplier */
940 static u_long cached_vco_pll_ctl
, cached_vco
;
941 static u_long
get_vco(void)
945 u_long pll_ctl
= bfin_read_PLL_CTL();
946 if (pll_ctl
== cached_vco_pll_ctl
)
949 cached_vco_pll_ctl
= pll_ctl
;
951 msel
= (pll_ctl
>> 9) & 0x3F;
955 cached_vco
= CONFIG_CLKIN_HZ
;
956 cached_vco
>>= (1 & pll_ctl
); /* DF bit */
961 /* Get the Core clock */
962 static u_long cached_cclk_pll_div
, cached_cclk
;
963 u_long
get_cclk(void)
967 if (bfin_read_PLL_STAT() & 0x1)
968 return CONFIG_CLKIN_HZ
;
970 ssel
= bfin_read_PLL_DIV();
971 if (ssel
== cached_cclk_pll_div
)
974 cached_cclk_pll_div
= ssel
;
976 csel
= ((ssel
>> 4) & 0x03);
978 if (ssel
&& ssel
< (1 << csel
)) /* SCLK > CCLK */
979 cached_cclk
= get_vco() / ssel
;
981 cached_cclk
= get_vco() >> csel
;
984 EXPORT_SYMBOL(get_cclk
);
986 /* Get the System clock */
987 static u_long cached_sclk_pll_div
, cached_sclk
;
988 u_long
get_sclk(void)
992 if (bfin_read_PLL_STAT() & 0x1)
993 return CONFIG_CLKIN_HZ
;
995 ssel
= bfin_read_PLL_DIV();
996 if (ssel
== cached_sclk_pll_div
)
999 cached_sclk_pll_div
= ssel
;
1003 printk(KERN_WARNING
"Invalid System Clock\n");
1007 cached_sclk
= get_vco() / ssel
;
1010 EXPORT_SYMBOL(get_sclk
);
1012 unsigned long sclk_to_usecs(unsigned long sclk
)
1014 u64 tmp
= USEC_PER_SEC
* (u64
)sclk
;
1015 do_div(tmp
, get_sclk());
1018 EXPORT_SYMBOL(sclk_to_usecs
);
1020 unsigned long usecs_to_sclk(unsigned long usecs
)
1022 u64 tmp
= get_sclk() * (u64
)usecs
;
1023 do_div(tmp
, USEC_PER_SEC
);
1026 EXPORT_SYMBOL(usecs_to_sclk
);
1029 * Get CPU information for use by the procfs.
1031 static int show_cpuinfo(struct seq_file
*m
, void *v
)
1033 char *cpu
, *mmu
, *fpu
, *vendor
, *cache
;
1037 u_int icache_size
= BFIN_ICACHESIZE
/ 1024, dcache_size
= 0, dsup_banks
= 0;
1038 struct blackfin_cpudata
*cpudata
= &per_cpu(cpu_data
, *(unsigned int *)v
);
1043 revid
= bfin_revid();
1048 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE
) {
1050 vendor
= "Analog Devices";
1057 seq_printf(m
, "processor\t: %d\n" "vendor_id\t: %s\n",
1058 *(unsigned int *)v
, vendor
);
1060 if (CPUID
== bfin_cpuid())
1061 seq_printf(m
, "cpu family\t: 0x%04x\n", CPUID
);
1063 seq_printf(m
, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1064 CPUID
, bfin_cpuid());
1066 seq_printf(m
, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1068 cpu
, cclk
/1000000, sclk
/1000000,
1076 seq_printf(m
, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1077 cclk
/1000000, cclk
%1000000,
1078 sclk
/1000000, sclk
%1000000);
1079 seq_printf(m
, "bogomips\t: %lu.%02lu\n"
1080 "Calibration\t: %lu loops\n",
1081 (cpudata
->loops_per_jiffy
* HZ
) / 500000,
1082 ((cpudata
->loops_per_jiffy
* HZ
) / 5000) % 100,
1083 (cpudata
->loops_per_jiffy
* HZ
));
1085 /* Check Cache configutation */
1086 switch (cpudata
->dmemctl
& (1 << DMC0_P
| 1 << DMC1_P
)) {
1088 cache
= "dbank-A/B\t: cache/sram";
1093 cache
= "dbank-A/B\t: cache/cache";
1098 cache
= "dbank-A/B\t: sram/sram";
1109 /* Is it turned on? */
1110 if ((cpudata
->dmemctl
& (ENDCPLB
| DMC_ENABLE
)) != (ENDCPLB
| DMC_ENABLE
))
1113 if ((cpudata
->imemctl
& (IMC
| ENICPLB
)) != (IMC
| ENICPLB
))
1116 seq_printf(m
, "cache size\t: %d KB(L1 icache) "
1117 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
1118 icache_size
, dcache_size
,
1119 #if defined CONFIG_BFIN_WB
1121 #elif defined CONFIG_BFIN_WT
1126 seq_printf(m
, "%s\n", cache
);
1129 seq_printf(m
, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1130 BFIN_ISUBBANKS
, BFIN_IWAYS
, BFIN_ILINES
);
1132 seq_printf(m
, "icache setup\t: off\n");
1135 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1136 dsup_banks
, BFIN_DSUBBANKS
, BFIN_DWAYS
,
1138 #ifdef __ARCH_SYNC_CORE_DCACHE
1140 "SMP Dcache Flushes\t: %lu\n\n",
1141 per_cpu(cpu_data
, *(unsigned int *)v
).dcache_invld_count
);
1143 #ifdef CONFIG_BFIN_ICACHE_LOCK
1144 switch ((cpudata
->imemctl
>> 3) & WAYALL_L
) {
1146 seq_printf(m
, "Way0 Locked-Down\n");
1149 seq_printf(m
, "Way1 Locked-Down\n");
1152 seq_printf(m
, "Way0,Way1 Locked-Down\n");
1155 seq_printf(m
, "Way2 Locked-Down\n");
1158 seq_printf(m
, "Way0,Way2 Locked-Down\n");
1161 seq_printf(m
, "Way1,Way2 Locked-Down\n");
1164 seq_printf(m
, "Way0,Way1 & Way2 Locked-Down\n");
1167 seq_printf(m
, "Way3 Locked-Down\n");
1170 seq_printf(m
, "Way0,Way3 Locked-Down\n");
1173 seq_printf(m
, "Way1,Way3 Locked-Down\n");
1176 seq_printf(m
, "Way 0,Way1,Way3 Locked-Down\n");
1179 seq_printf(m
, "Way3,Way2 Locked-Down\n");
1182 seq_printf(m
, "Way3,Way2,Way0 Locked-Down\n");
1185 seq_printf(m
, "Way3,Way2,Way1 Locked-Down\n");
1188 seq_printf(m
, "All Ways are locked\n");
1191 seq_printf(m
, "No Ways are locked\n");
1194 if (*(unsigned int *)v
!= NR_CPUS
-1)
1198 seq_printf(m
, "L2 SRAM\t\t: %dKB\n", L2_LENGTH
/0x400);
1200 seq_printf(m
, "board name\t: %s\n", bfin_board_name
);
1201 seq_printf(m
, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1202 physical_mem_end
>> 10, (void *)0, (void *)physical_mem_end
);
1203 seq_printf(m
, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1204 ((int)memory_end
- (int)_stext
) >> 10,
1206 (void *)memory_end
);
1207 seq_printf(m
, "\n");
1212 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
1215 *pos
= first_cpu(cpu_online_map
);
1216 if (*pos
>= num_online_cpus())
1222 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
1224 *pos
= next_cpu(*pos
, cpu_online_map
);
1226 return c_start(m
, pos
);
1229 static void c_stop(struct seq_file
*m
, void *v
)
1233 const struct seq_operations cpuinfo_op
= {
1237 .show
= show_cpuinfo
,
1240 void __init
cmdline_init(const char *r0
)
1243 strncpy(command_line
, r0
, COMMAND_LINE_SIZE
);